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Embedded Systems

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EMBEDDED SYSTEMS
OVERVIEW
Subject
Code: EC-306
04-02-2023
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EMBEDDED SYSTEMS
Subject Code: EC-306
Course Title: EMBEDDED SYSTEMS
Contact Hours: L-3
T-0
P-2
Examination Duration: Theory: 3 Hrs
Practical: 0
Relative Weightage: CWS: 15 PRS-25 MTE: 20 ETE: 40 PRE: 0
Objective
To introduce fundamentals of 16 and 32 bit microcontrollers, assembly language programming.
This course also focuses on interfacing of different interrupt driven peripherals. It also covers in detail real time operating
Systems, Bus architecture, Digital signal processors and systems on-chip.
Pre-requisite
Microprocessors and Computer Architecture
Course Content
Unit I
Contact Hours: 8
Overview of Embedded systems: Characteristics of Embedded systems, Comparison of embedded systems with general
purpose processors, General architecture and functioning of micro controllers.
PIC and 8051 micro controllers: Architecture, memory interfacing, interrupts, instructions, programming and peripherals.
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2
Unit II
Contact Hours: 12
ARM: Architecture, memory interfacing, interrupts, instructions and Assembly Language programming.
Exception processing and pipeline architecture and applications.
Unit III
Contact Hours: 4
Digital Signal Processors: DSP Architecture, DSP applications, algorithms, data path, memory, addressing modes,
peripherals, TI and Sharc family of DSP processors.
Unit IV
Contact Hours: 4
System on Chip: Evolution, features, IP based design, TI OMAP architecture and peripherals.
Digital Multimedia processor: Architecture and peripherals.
Unit V
Contact Hours: 4
SRAM, DRAM working and organization, Interfacing memory with ARM
Elements of Network Embedded Systems
Unit VI
Contact Hours: 10
RTOS: RT-Linux introduction, RTOS kernel, Real-Time Scheduling
Bus Structure: Time multiplexing, serial, parallel communication bus structure
Bus04-02-2023
arbitration, DMA, PCI, AMBA, I2C and SPI Buses.
3
Reference Books
1. Computers as components: Principles of Embedded computing system design, Wayne Wolf, Morgan Kaufman
Publication
2. ARM system Developer’s Guide: Designing and Optimizing system software, Andrew N.Sloss, Dominic Symes, Chris
Wright, Morgan Kaufman Publication
3. Design with PIC Microcontrollers, John B. Peatman, Pearson Education Asia
4. The Design of small-scale embedded systems, Tim Wilmshurst, Palgrav
5. Embedded System Design, Marwedel, Peter Kluwer Publishers
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UNIT-1
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OBJECTIVE
▪ Embedded Systems
▪ Characteristics of Embedded Systems
▪ Advantages/Disadvantages of Embedded Systems
▪ Basic Structure of Embedded Systems
▪ Challenges in Embedded Systems design
▪ Functional and non-functional requirements
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EMBEDDED SYSTEMS
EMBEDDED SYSTEMS
Schematic Representation
▪ Any device that includes a computer but is not itself a
general-purpose computer
▪ Hardware and Software: Part of some larger systems and
expected to function without human intervention
▪ Respond, monitor, control external environment using
sensors and actuators
Embedding a computer
Examples:
▪ Personal digital assistant (PDA)
▪ Printer
▪ Cell phone
▪ Automobile: Engine, brakes, dash etc.
▪ Television
▪ Household Appliances
▪ Surveillance systems
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EMBEDDED SYSTEMS
EMBEDDED SYSTEMS
Schematic Representation
Application Examples:
▪ Front panel of microwave oven
▪ Camera: Contains 32 bit processor
▪ Analog TV: Channel selection
▪ Digital TV: Decompression, Descrambling etc
Automotive Embedded Systems
Today’s high-end automobile may have 100 microprocessors:
▪ 4 bit microcontroller check seat belt
▪ Microcontroller runs display service on the dashboard
▪ 16/32 bit microprocessor controls engine.
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CHARACTERISTICS OF EMBEDDED SYSTEMS
CHARACTERISTICS OF EMBEDDED SYSTEMS
•
•
•
•
•
•
Sophisticated functionality
Real-time operation (Always?)
Low manufacturing cost
Application dependent processor (?)
Restricted Memory
Low Power
• Power consumption is critical in battery-powered devices.
• Excessive power consumption increases system cost even
in wall powered devices.
MANUFACTURING COST
Manufacturing cost has different components.
▪ Non-recurring engineering cost for design and development
▪ Cost of production and marketing
▪ Best technology choice will depend on the number of units we plan to produce.
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CHARACTERISTICS OF EMBEDDED SYSTEMS
CHARACTERISTICS OF EMBEDDED SYSTEMS
REAL TIME OPERATION
Must finish operation by deadlines.
Hard real time: Missing deadline causes failure
Soft real time: Missing deadline result in degraded performance
Many systems are multi-rate: Must handle operation at widely
varying rates
APPLICATION DEPENDENT REQUIREMENT
Fault-tolerance
▪ Continue operation despite hardware or software faults
Safe
▪ Systems to avoid physical or economic damage to person
or property
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CHARACTERISTICS OF EMBEDDED SYSTEMS
CHARACTERISTICS OF EMBEDDED SYSTEMS
MORE FEATURES
▪ Dedicated Systems
▪ Predefined functionality- Accordingly hardware and software
designed
▪ Programmability rarely used during lifetime of the system
▪ Real-time, fault tolerant, safe
APPLICATION DEPENDENT REQUIREMENT
Fault-tolerance
▪ Continue operation despite hardware or software
faults
Safe
▪ Systems to avoid physical or economic damage to
person or property
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TYPES OF EMBEDDED SYSTEMS
TYPES OF EMBEDDED SYSTEMS
Similar to general computing
▪ PDA, Video games, set-top boxes, automatic teller machine
Control Systems
▪ Feed-back control of real time systems
▪ Vehicle engine, flight control, nuclear reactors
Signal processing
▪ Radar, Sonar, DVD players
Communication and networking
▪ Cellular phones, Internet appliances
NATURE OF SYSTEM FUNCTIONS
▪
▪
▪
▪
▪
Control laws
Sequencing Logic
Signal Processing
Application specific interfacing
Fault response
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ADVANTAGES/DISADVANTAGES
EMBEDDED SYSTEM ADVANTAGES
▪
▪
▪
▪
Easily Customizable
Low power consumption
Low cost
Enhanced performance
EMBEDDED SYSTEM DISADVANTAGES
▪ High development effort
▪ Larger time to market
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STRUCTURE OF EMBEDDED SYSTEMS
SOPHISTICATED EMBEDDED SYSTEMS
Schematic Representation
Sensor: It measures the physical quantity and converts it to an
electrical signal which can be read by an observer or by any
electronic instrument like an A-D converter. A sensor stores the
measured quantity to the memory.
A-D Converter: An analog-to-digital converter converts
the analog signal sent by the sensor into a digital signal.
Processor & ASICs: Processors process the data to measure
the output and store it to the memory.
D-A Converter: A digital-to-analog converter converts the digital
data fed by the processor to analog data.
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STRUCTURE OF EMBEDDED SYSTEMS
SOPHISTICATED EMBEDDED SYSTEMS
Schematic Representation
Actuator: An actuator compares the output given by the D-A
Converter to the actual (expected) output stored in it and stores the
approved output.
• Processor is the heart of an embedded system.
• It is the basic unit that takes inputs and produces an output
after processing the data.
• For an embedded system designer, it is necessary to have the
knowledge of both microprocessors and microcontrollers.
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PROCESSORS
PROCESSOR
Schematic Representation
It has two essential units.
1.
Control Unit
•
2.
Includes Fetch Unit for fetching instruction from memory
Execution Unit
• Includes ALU (Arithmetic and logical unit)
• Contain circuits that implement the instruction pertaining to
data transfer operation and data conversion
• Contains circuits that execute instruction for a program control task
such as interrupt or jump to another set of instruction.
• Processor runs the cycle of fetch and executes the instruction in the same
sequence as they are fetched form the memory.
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TYPES OF PROCESSORS
TYPES OF PROCESSOR
Processors can be of the following categories
• General Purpose Processor (GPP)
o Microprocessor
o Microcontroller
o Embedded Processor
Embedded System Hardware
Hardware includes elements like
• User interface,
• Input/Output interfaces,
• Display and memory, etc.
Generally, an embedded system comprises power supply,
processor, memory, timers, serial communication ports and
system application specific circuits.
o Digital Signal Processor
o Media Processor
• Application Specific System Processor (ASSP)
• Application Specific Instruction Processors (ASIPs)
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IMPLEMENTING EMBEDDED SYSTEMS
IMPLEMENTING EMBEDDED SYSTEMS
❑ Hardware
▪ Processing element
▪ Peripherals
▪ Input & output devices
▪ Interfacing sensors and actuators
▪ Interfacing protocols
❑ Memory
❑ Bus
❑ Software
Hardware
Software
Partitioning
of
task
▪ System software
▪ Application
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HARDWARE EVOLUTION
HARDWARE EVOLUTION
▪
▪
▪
▪
System on chip
Application specific processors
DSP
General purpose microprocessors & Microcontrollers
SOFTWARE
▪ Program must be logically and temporally correct
▪ Must deal with inherent physical concurrency
▪ Reactive systems
▪ Reliability and fault tolerance are critical issues
▪ Application specific and single purpose
MULTI-TASKING AND CONCURRENCY
▪ Embedded system needs to deal with several inputs and outputs and multiple events
occurring independently
▪ Separating task simplifies programming, but requires somehow switching back
and forth among different tasks (multi-tasking)
▪ Concurrency is the appearance of simultaneous execution of multiple tasks.
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CHALLENGES IN EMBEDDED SYSTEM DESIGN
CHALLENGES IN ES DESIGN
▪
▪
▪
▪
▪
▪
How much hardware do we need?
What is word size of CPU? Size of memory?
How do we meet our deadlines?
Faster hardware or cleverer software?
How do we minimize power?
Turn off unnecessary logic? Reduce memory access?
DESIGN GOALS
▪
▪
▪
▪
▪
▪
Performance
Overall speed, deadlines
Functionality and user interface
Manufacturing cost
Power consumption
Other requirements (Physical size, etc.)
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FUNCTIONAL VS NON-FUNCTIONAL REQUIREMENTS
CHALLENGES IN ES DESIGN
Top-down Vs Bottom-up
▪
▪
▪
▪
▪
▪
▪
Top down design
▪ Start from most abstract description
▪ Work to most detailed
Bottom-up design
▪ Work from small component to big system
Real design uses both techniques
Functional requirements
Output as a function of input
Non-functional requirements
Time required to compute output
Size, weight etc.
Power consumption
Reliability
DESIGN AND DEVELOPMENT PROCESS
Requirements
Specification
Stepwise refinement
At each level of abstraction, we must
▪ Analyse the design to determine characteristics of the
current state of the design
▪ Refine the design to add detail
Architecture
Component Design
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System Integration
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CONCLUDING REMARK
CONCLUSION
▪ Embedded computers are all around us.
▪ Many systems have complex embedded hardware and software
▪ Embedded systems pose many design challenges: design time, deadlines,
power etc.
▪ Design methodologies help us manage the design process.
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GENERAL ARCHITECTURE
AND FUNCTIONING OF
MICRO-CONTROLLERS
Subject
Code: EC-306
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SUMMARY
▪ Embedded Systems
▪ Characteristics of Embedded Systems
▪ Basic Structure of Embedded Systems
▪ Challenges in Embedded Systems design
▪ Functional and non-functional requirements
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OBJECTIVE
▪ Types of Embedded Systems
▪ Comparison of Embedded systems with general purpose processors
▪ Embedded System Hardware
▪ Microprocessor
▪ Micro-controller
▪ VonNeuman Architecture
▪ Harvard Architecture
▪ CISC
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▪ RISC
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TYPES OF EMBEDDED SYSTEMS
TYPES OF EMBEDDED SYSTEMS
Schematic Representation
Embedded systems are classified into four categories
Based on their performance and functional requirements:
• Stand
• Real
alone embedded systems
time embedded systems
• Networked
• Mobile
embedded systems
embedded systems
Based on the performance of the microcontroller:
• Small
scale embedded systems
• Medium
scale embedded systems
• Sophisticated
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embedded systems
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TYPES OF EMBEDDED SYSTEMS
REAL TIME EMBEDDED SYSTEMS
▪ A Real-Time Embedded System is strictly time specific, these
provides output in a particular/defined time interval.
▪ These type of embedded systems provide quick response in
critical situations which gives most priority to time based
task performance and generation of output.
▪ That’s why real time embedded systems are used in defense
sector, medical and health care sector, and some other
industrial applications where output in the right time is
given more importance.
Schematic Representation
MRI Scanner
Blood pressure device
Soft Real Time Embedded Systems
▪ In these types of embedded systems time/deadline is not so
strictly followed. If deadline of the task is passed (means the
system didn’t give result in the defined time) still result or
output is accepted.
Hard Real-Time Embedded Systems
▪ In these types of embedded systems time/deadline of task is
strictly followed.
▪ Task must be completed in between time frame (defined time
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interval) otherwise result/output may not be accepted.
Example
•Traffic control system
•Military usage in defense sector
•Medical usage in health sector
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TYPES OF EMBEDDED SYSTEMS
STAND ALONE EMBEDDED SYSTEMS
Schematic Representation
▪ Stand alone embedded systems do not require a host system
like a computer, it works by itself.
▪ It takes the input from the input ports either analog or digital
and processes, calculates and converts the data and gives the
resulting data through the connected device-Which either
controls, drives and displays the connected devices.
Examples
▪ MP3 players,
▪ Digital cameras,
▪ Microwave ovens
▪ Calculator
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TYPES OF EMBEDDED SYSTEMS
NETWORKED EMBEDDED SYSTEMS
Schematic Representation
• Networked Embedded Systems are connected to a network
which may be wired or wireless to provide output to the
attached device.
• They communicate with embedded web server through
network.
• The embedded web server is a type of system wherein
all embedded devices are connected to a web server and
accessed and controlled by a web browser.
Example:
• Home security system
• ATM machine
• Card swipe machine
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TYPES OF EMBEDDED SYSTEMS
MOBILE EMBEDDED SYSTEMS
Schematic Representation
• Mobile embedded systems are small and easy to use and
requires less resources.
• They are the most preferred embedded systems. In portability
point of view mobile embedded systems are also best.
• The basic limitation of these devices is the other resources and
limitation of memory.
Examples:
•MP3 player
•Mobile phones
•Digital Camera
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TYPES OF EMBEDDED SYSTEMS
SMALL SCALE EMBEDDED SYSTEMS
▪ Small Scale Embedded Systems are designed using an 8-bit or
16-bit micro-controller.
▪ They can be powered by a battery.
▪ The processor uses very less/limited resources of memory and
processing speed.
▪ Mainly these systems does not act as an independent system
they act as any component of computer system but they did not
compute and dedicated for a specific task.
MEDIUM SACLE EMBEDDED SYSTEMS
▪ Medium Scale Embedded Systems are designed using an 16-bit or
32-bit micro-controller.
▪ These medium Scale Embedded Systems are faster than that of small
Scale Embedded Systems.
▪ Integration of hardware and software is complex in these systems.
▪ Java, C, C++ are the programming languages are used to develop medium
scale embedded systems. Different type of software tools like compiler,
debugger,
simulator etc. are used to develop these type of systems.
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TYPES OF EMBEDDED SYSTEMS
SOPHISTICATED EMBEDDED SYSTEMS
▪ Sophisticated or Complex Embedded Systems are designed using multiple
32-bit or 64-bit micro-controller.
▪ These systems are developed to perform large scale complex functions.
▪ These systems have high hardware and software complexities.
▪ We use both hardware and software components to design final systems
or hardware products.
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COMPARISON OF ES WITH GENERAL PURPOSE PROCESSORS
COMPARISON OF EMBEDDED SYSTEM WITH GPP
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CRITERIA
GENERAL PURPOSE
COMPUTERS/PROCESSORS
EMBEDDED SYSTEMS
Contents
Combination of generic
hardware and general
purpose operating system
for executing variety of
applications.
Combination of special
purpose hardware and
embedded operating
system for executing special
set of applications.
Operating System
It contains general purpose
operating system.
It may or may not contain
operating system.
Alterations
Applications are alterable
by the user.
Applications are nonalterable by the user.
Key factor
Performance is a key factor.
Application specific
requirement are key factor.
Power consumption
More
Less
Response Time
Not critical
Critical for some
applications.
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EMBEDDED SYSTEM HARDWARE
EMBEDDED SYSTEM HARDWARE
▪ Embedded system hardware’s basic task is to receive input
process it and provide output.
▪ The basic hardware is built to meet the requirement of the
information processing system of the embedded appliance.
▪ The information processing system basically it would consist
of a processor and the other peripherals to maintain and
manage input and output interfaces.
▪ The processors are micro processors and micro-controllers, in
comparison to general purpose processors considerations are
▪ High energy efficiency- Enhanced battery life or less power
consumption
▪ High code density- Less requirement of program memory
Example: Intel Pentium microprocessors used as CPU for
computers
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Schematic Representation
Input
Interface
Information
processing
system
Output
Interface
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MICROPROCESSORS
MICROPROCESSORS
Schematic Representation
▪
▪
▪
▪
▪
CPU for computers
No RAM, ROM, I/O on CPU chip itself
Example: Intel’s X86, Motorola’s 680x0
These are general purpose microprocessors.
A typical computer is build around this microprocessor having
this architecture.
▪ This is the architecture of general purpose microprocessor.
What is microcontroller?
▪ Basically a micro-controller is a device which integrates a number of
the components of a microprocessor system onto a single microchip.
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MICROCONTROLLER
MICROCONTROLLER
Schematic Representation
▪ A microcontroller is a device which integrates a number of
components of a microprocessor onto a single chip.
▪ A micro-controller combines onto a same microchip:
▪ The CPU core
▪ Memory (both RAM and ROM)
▪ Some parallel digital I/O and many other peripherals
BLOCK DIAGRAM:
▪ CPU
▪ I/O ports
▪ Memory
▪ All connected via bus.
▪ All these things are integrated on the same silicon chip.
▪ There are other component of microprocessor as well.
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COMPONENTS OF MICROCONTROLLER
MICROCONTROLLER COMPONENTS
Schematic Representation
▪ A timer module to allow microcontroller to perform task for
certain time periods.
▪ A serial I/O port to allow data to flow between the
microcontroller and other devices such as PC or another
microcontroller.
▪ An ADC to allow the microcontroller to accept analog input
data for processing.
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WHY MICROCONTROLLER?
WHY MICROCONTROLLER?
▪
▪
▪
▪
▪
▪
▪
Low cost and small packaging
Low power consumption
Programmable, reprogrammable
Lots of I/O capabilities
Easy integration with circuits
For application in which cost, power and space are critical
Single-purpose
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COMPUTER ARCHITECTURE
1. VONNEUMAN ARCHITECTURE
▪
▪
▪
▪
Schematic Representation
Only one bus between CPU and memory
RAM and program memory share the same bus and the same
Memory, and so must have the same bit width
Bottleneck, Getting instructions interfaces with accessing RAM
▪ Address is provided from the CPU to the memory to fetch instruction
as well as to fetch data and we use the bus to read the data as well
as write the data on to that memory.
▪ There is no difference between the data and instruction in VonNeuman
architecture.
▪ Both program and data memory is connected to the CPU by the same
address and data bus.
▪ we can get a bottleneck because getting instructions may interfere
accessing RAM for data.
▪ we have the same bus and hence the instruction and the data word is
typically of the same bit width.
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BUS
Program
and
Data
Memory
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COMPUTER ARCHITECTURE
2. HARVARD ARCHITECTURE
Schematic Representation
▪ Uses two separate memory spaces for program instruction and
data
▪ Improved operation bandwidth
▪ Allows for different bus widths
▪ Instruction pipelining easy
▪ Program memory different from that of the data memory.
Data
▪ Two distinct buses connecting my CPU to the program memory
Memory
and data memory.
▪ Two distinct buses their bit widths can be different.
8-Bits
Program
▪ Program memory can have 12, 14 or 16 bits while the data
Memory
12/14/16-Bits
memory can be simply having the bus width of eight bits.
▪ Advantage of having two separate memory is that an instruction
can be fetch from the program memory while CPU is actually
doing a processing.
▪ Modern micro-controller are build around
▪ let us assume I have got some data in the CPU and I am doing some
Harvard Architecture.
processing and then I need to store the result. And where shall I store
the result? I shall store the result in data memory.
▪ While storing data, the instruction can also be fetched at the same time.
Instruction pipeline is facilitated by this Harvard Architecture. (Biggest advantage over VonNeuman Architecture)
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CISC-COMPLEX INSTRUCTION SET COMPUTER
COMPLEX INSTRUCTION SET COMPUTER
▪ A large number of instruction each carrying out a different permutation
of the same operation
▪ Instruction provide for complex operations
▪ Different instruction of different format
▪ Different addressing modes
▪ Requires multiples cycle of execution
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RISC-REDUCED INSTRUCTION SET COMPUTER
REDUCED INSTRUCTION SET COMPUTER
▪ Instruction for simple operation that can be executed in a single cycle
▪ Each instruction of fixed length
▪ Facilitates instruction pipelining
▪ Large general purpose register set
▪ Can contain data or address
▪ Load-Store Architecture
▪ No memory access for data processing instructions
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PIC MICRO-CONTROLLER
ARCHITECTURE
Subject
Code: EC-306
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SUMMARY
▪ Types of Embedded Systems
▪ Comparison of Embedded systems with general purpose processors
▪ Embedded System Hardware
▪ Microprocessor
▪ Micro-controller
▪ VonNeuman Architecture
▪ Harvard Architecture
▪ CISC
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▪ RISC
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OBJECTIVE
▪ PIC Microcontroller
▪ General Architecture of PIC Microcontroller
▪ Program Counter
▪ Hardware Stack
▪ Instruction Register
▪ ALU
▪ Status Register
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PIC MICROCONTROLLER FAMILY
PIC MICROCONTROLLER FAMILY
One of the leading architecture for low end applications.
Low End Applications:
▪ The applications which requires 4,8,16 bit processors are called
low end applications.
▪ PIC is one of the leading architecture for low end applications.
▪
▪
▪
▪
PIC are RISC processor i.e. Reduced Instruction Set Computer
Uses fewer instructions (<50)
Only a few addressing modes
Execute 1 instruction in 1 internal clock cycle (Tcyc)
Why PIC is designed as RISC?
▪ Simple set of instruction
▪ Can be executed in 1 cycle
▪ Large number of operations can be executed
▪ Easy implementation of pipelining without having complex hardware
▪ Less complex hardware▪ Less consumption of silicon area
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▪ Less consumption of power
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PIC FAMILY PACKAGES
PIC FAMILY PACKAGES
PIC comes in huge variety of packages.
Examples:
8 pin
:
12 C50x (12 bit) and 12C67x (14 bit)
18 pin :
16C5x (12 bit), 16Cxxx (14 bit)
28 pin :
16C5x (12 bit), 16Cxxx (14 bit)
40 pin :
16Cxxx (14 bit), 17C4x (16 bit)
44-68 pin :
16Cxxx (14 bit), 17C4x/17Cxxx (16 bit)
▪ 12 bit, 14 bit, 16 bit are different word length that this
processor supports.
PIC BLOCK DIAGRAM
Program Counter: Generating address for program memory
for execution of the instructions.
Hardware Stack:
▪ When there is a call / interrupt, the PC value has to be saved
to enable return to that same location.
▪ We know for what purpose stack is used for general purpose
microprocessors.
▪ Here the stack is implemented in hardware.
▪ Stack area is not the part of program/data memory.
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▪ For 8086 processors stack is the part of main memory itself.
Schematic Representation
PIC Mid range block diagram
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PIC FAMILY PACKAGES
PIC FAMILY PACKAGES
Schematic Representation
Instruction Register:
▪ Basic job is to decode the instruction whose address is provided
by the PC to generate control and timing signals for the internal
block of the PIC processor.
Oscillator/Clock, Timing Generation Circuit with RC clock:
▪ Provides a basic clock for the processor to operate.
▪ These are the set of timer blocks. Power up timer, power on reset,
watchdog timer.
Watchdog timer:
▪ Important component of microcontroller intended for embedded
applications.
Example: You have wrote a program, running on pc and it has gone into
an Infinite loop. When you realise that what you do, you try to stop that
program. You initiate an interrupt signal to the processor. Now if such an
error condition happens in an embedded system, you are not there to correct it
because an embedded system is supposed to work without human intervention.
▪ Watchdog time is loaded with a particular timing parameter i.e count, it starts
down counting with respect to the clock.
▪ The system would reset watchdog timer at regular interval.
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▪ If
it does not reset and the count terminates it should generate an interrupt.
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PIC FAMILY PACKAGES
PIC FAMILY PACKAGES
Schematic Representation
Watchdog timer:
▪ Microcontroller has gone to some infinite loop.
▪ The system is not in a position to reset the counter value.
▪ When the timer finishes its count and it has not been reset, it will
generate an interrupt and this will enable system to go back to one
of the known predefined state.
ALU:
▪ For doing arithmetic computation.
RAM:
▪ RAM are also been referred to as register files.
▪ All RAM locations can be considered as registers.
▪ RISC will have a large register bank because it uses register for
majority of its operation.
▪ Same condition is satisfied for PIC processor.
Instruction Register:
▪ Have the instruction refer to registers for operation.
▪ Bus connecting through address MUX to register.
▪ The data would flow into the data bus and goes to the MUX and go to ALU.
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PIC FAMILY PACKAGES
PIC FAMILY PACKAGES
Schematic Representation
There are two kind of bus structure
1. Direct addressing:
▪ Goes in through address MUX to select the register.
2. Immediate addressing:
▪ The 8 bit data part of the instruction coming to MUX
which it is fed to the ALU.
▪ This bus is for immediate mode addressing (when data is
the part of instruction)
3. Indirect Addressing:
▪ A register is selected and come to FSR reg, from this it
generates the indirect addressing.
It supports all these addressing modes.
RAM is the same register bank of RISC processor.
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PERIPHERAL COMPONENTS
PERIPHERAL COMPONENTS
Schematic Representation
▪ Other parts of the same Architecture.
▪ Set of ports integrated on the same chip.
▪ External devices are connected through these ports.
▪ These blocks supports variety of peripheral devices.
Example:
▪ LCD display for an standalone device
▪ Integrated form of LCD driver.
Synchronous serial ports and USARTs:
for communication with PCs and other devices.
Timers:
▪ Application specific timer.
▪ It can be programmed depending on application
requirement.
AD:
▪ To interface or receive analogue inputs.
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PIC FAMILY SPEED
PIC FAMILY SPEED
Schematic Representation
▪ PIC requires a clock to work.
▪ It can use crystals, clock oscillators, or even an RC circuit.
▪ Some PICs have a built in 4MHz RC clock
▪ Not very accurate, but requires no external components.
▪ Instruction speed = 1/4 clock speed (Tcyc = 4 * Tclk)
▪ Clock Frequency Examples:
12C50x
12C67x
16Cxxx
17C4x / 17C7xxx
18Cxxx
4MHz
10MHz
20MHz
33MHz
40MHz
Clock Scheme:
▪ Clock is internally divided into 4 quadrature clock Q1,…Q4.
▪ Whole instruction execution is managed by these 4 clocks.
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52
INSTRUCTION EXECUTION
INSTRUCTION EXECUTION
Schematic Representation
▪
▪
▪
▪
Clock internally divided by 4 to generate 4 quadrature clocks
Instruction cycle consist of 4 Q cycles.
PC incremented every Q1
Instruction is fetched from program and latched into instruction
register by Q4
▪ Instruction is decoded and executed in the following Q1 to Q4
INSTRUCTION EXECUTION
▪ Fetch takes one cycle, decode and execute takes
another cycle
▪ While execution, next instruction can be fetched
▪ No bus conflict due to Harvard Architecture
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53
ARITHMETIC LOGIC UNIT
ARITHMETIC LOGIC UNIT (ALU)
▪
▪
▪
▪
▪
▪
▪
▪
Schematic Representation
W Register is called working register.
W register plays a key role in all arithmetic operations.
It is similar to an accumulator that we have in 8085/86 microprocessor.
Operands from instruction word in case of immediate or from register
that is one of the operand used in arithmetic operation.
Other operand universally comes form W register.
Output of the operation goes either to W register or to anyone of
the register in register file depending on the destination bit in the
instruction.
When d=0 it is part of W register, so the data is stored in the W
register so that it can be used in the next instruction without being
fetched from the register bank.
When d=1 it is stored in the register file.
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54
STATUS REGISTER
STATUS REGISTER
Schematic Representation
Status register contains
▪ Arithmetic status of ALU operation
▪ RESET status
▪ Memory bank select bits
TO: Time Out, PD: Power Down, IRP, RP1, RP0:Bank select,
Z: Zero, DC: Digit Carry (BCD), C: Carry
Status register is just like a flag register in 8085.
For ALU operation: Z, DC and C
Z (Zero): When result of an operation is zero this flag is set.
DC (Digit Carry): For 8 bit arithmetic operation, when there is a carry form 4th bit I get digit carry.
For BCD operation we need to keep track of carry from the 4th bit, for this we have special status register to indicate that.
C (Carry):
TO: Time out indication
PD: Power down mode
We will discuss in power management aspect of this micro-controller.
▪ IRP, RP1,RP0 are used for memory bank select.
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55
PIC:MICRO-CONTROLLER
ARCHITECTURE
&
INSTRUCTION SET
Subject
Code: EC-306
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56
SUMMARY
▪ PIC Microcontroller
▪ General Architecture of PIC Microcontroller
▪ Program Counter
▪ Hardware Stack
▪ Instruction Register
▪ ALU
▪ Status Register
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57
OBJECTIVE
▪ General Architecture of PIC Microcontroller
▪ Memory Organization
▪ Registers & Stack
▪ PIC Instruction Set
▪ PIC Instruction Format
▪ Addressing Modes
▪ Control Instructions
▪ Directing Program Flow
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58
MEMORY ORGANIZATION
MEMORY ORGANIZATION
Memory in PIC is organized in two area.
▪ Program memory
▪ Data memory
Access to both possible in each cycle because of distinct bus.
PROGRAM MEMORY
PICs have two different types of program storage
1. EPROM (Erasable Programmable Read Only Memory)
▪Note: One Time Programmable (OTP) chips are EPROM
chips, but with no window.
▪Window can be used to erase the program through UV light.
▪PIC Examples: Any ‘C’ part: 12C50x, 17C7xx, etc.
2. FLASH
▪Electrical Re-writable memory (even by chip itself)
▪Much faster to develop on, software can be updated.
▪Finite number of writes (~100k Writes)
▪PIC Examples: Any ‘F’ part: 16F84, 16F87x, 18Fxxx (future)
▪PIC program space is different for each chip.
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▪ Mid-range PIC processors have 13 bit program
counter or 8K program memory.
▪ Width of program memory bus 14 bits.
▪ Program memory space divided into 4 pages of
2K each.
59
PROGRAM MEMORY
PROGRAM MEMORY
Schematic Representation
▪ PC has 13 bits, A part of it is mapped to PCLATH (Program
counter latch high register).
▪ PC is connected to the hardware stack.
▪ Through 13 bit bus it is connected to register bank
as well.
▪ Individual pages of size 2K.
▪ First page have got reset vector & interrupt vector.
Interrupt Vector: If interrupt occurs where the jump has to take
place.
▪ Subsequent pages is for on-chip program memory.
▪ Program is stored in on-chip memory area.
▪ First part is separate out so that it can be jump around with
various locations with various kind of constraints imposed.
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REGISTERS & STACK
STACK
Schematic Representation
▪ Mid range PIC 8 level deep 13 bit wide hardware stack
not part of program or data memory
▪ PC is pushed onto stack when CALL instruction is executed or
interrupt occurs PCLATH is not modified when PUSHED to or
POPed from stack
PCLATH: Program counter latch high register
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DATA MEMORY
DATA MEMORY
Data memory:
▪ To store the data which is getting generated during execution of the program.
▪ To store information which may be coming from the external devices.
▪ Data memory is for temporarily calculations.
Offset is expected to be stored in program memory.
Memory is organized into banks.
1. General purpose register files (GPR)
2. Special purpose/function register files (SPR)
▪ Program are stored in program space (not in data space), so low RAM space is
required.
▪ PICs uses general purpose file register for RAM (Each register is 8 bit for all
PICs)
▪ Register file memory consist of 2 components.
▪ Memory organization into banks
▪ 16F877 has 4 banks of register
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REGISTERS
REGISTERS
GPR: Area banked to provide greater than 96 bytes of general purpose RAM
SFR:
▪ To control the peripheral and core functions like indirect addressing
▪ To program the peripheral or to set some bits in the peripheral
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PIC: INSTRUCTION SET
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64
PIC: INSTRUCTION SET
PIC INSTRUCTION SET
▪ Simple instruction set: about 35 instruction
▪ Instruction set grouped into 3 categories
▪ Byte-oriented operations
▪ Bit-oriented operations
▪ Literal and Control operations
▪ Instructions: 14 bit (mid-range)
▪ All instruction execute in one cycle unless condition test is true and next
instruction has to be skipped or PC is changed as a result of an instruction
PIC INSTRUCTION FORMAT
Instruction format is different for different kind of operations.
Byte-oriented Operation
▪ 0…6: 7 bit file register address which is typically the memory location
▪ 7th bit: d bit; 0 for destination W or 1 for 0…6 bit is a destination itself
▪ 8..13: storing the opcode (binary code for specific operation)
Bit-oriented Operation
▪ 0…6: 7 bit file register address
▪ 7..9: 3-bit number which is to be checked or modified in the file specified in
the address
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▪ 10…13:
65
PIC: INSTRUCTION SET
PIC INSTRUCTION SET
Literal and Control Operations
▪ General
▪ 0…7: 8 bit literal (immediate) value as a part of the instruction
▪ 8..13: storing opcode
▪ CALL & GOTO Instructions
▪ 0…10: 11 bit literal value (target address) as the part of the instruction
▪ Upper 2 bits (MSB) of PC loaded from PCLATH <4:3>
▪ 11..13: Storing opcode
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PIC: ADDRESSING MODES
DIRECT ADDRESSING
▪
▪
▪
▪
▪
Addressing modes are used for specifying operand in an instruction.
PIC supports direct, indirect and immediate mode of addressing.
RP1 & RP0 bits are a part of status register, used for selecting memory bank. in status
In the bank address is specified by 7 bit which is the part of the instruction. register
These 7 bits makes the choice of the location in the specific bank.
INDIRECT ADDRESSING
▪
▪
▪
▪
▪
▪
▪
▪
PIC uses slightly more complex structure.
Full 8-bit register file address is first written into FSR, a special purpose register.
FSR serves as address pointer to any address through out the entire register file.
Subsequent direct access of INDF (a SFR) will actually access the register file
using the content of FSR as a pointer to the location of operand.
You first load the FSR register with a value, These value you need to load in FSR
register through an instruction, The bank select is via IRP bit which is the part of
the status register and the 7th bit in the FSR register.
Remaining 7 bits is used for selecting the offset in the bank.
Once FSR register is loaded with these values, Access INDF register, PIC uses the
address in the FSR register to access operand in the memory.
In
indirect addressing require two instruction instead of one for specifying the
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address.
in status
register
67
INSTRUCTIONS
▪ There are variety of instruction in PIC.
▪ The number of instruction is much smaller compare to that of a CISC
processor.
▪ Compare to 8086 the number of instruction here is much less.
▪ The number of addressing modes here is much less compare to any CISC
processor.
BYTE ORIENTED OPERATIONS
▪ Arithmetic and logical operations
▪ Data Movement
Examples:
▪ addwf f,d
Add contents of W with register f, if d=0 store result in W
else store in register f. eg.: addwf 0x20,0
▪ clrf f
Contents of register f are cleared and Z bit (STATUS) is set;
eg.: clrf 0x30
▪ Movwf f
Move data from W register to register f
e.g: movwf 0x04
In data move first bank select operation has to be done prior to execution of this instruction.
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So that
correct location is accessed.
68
INSTRUCTIONS
BYTE ORIENTED OPERATIONS
▪ In PIC goto instruction is unconditional branch.
▪ Decfsz f,d
conditional branching
▪ In conditional we skip only next instruction
Decrement register f, place result in f or W depending on the
▪ Its not that we can make any arbitrary jump in
values of d; Skip the next instruction if result is zero.
the memory.
e.g: decfsz 0x20,1
▪ This indicates an operation as well as branching, It is not just a simple ▪ It is the distinctive feature of PIC.
branching instruction.
▪ It combines arithmetic operation with conditional branching.
▪ The next instruction can not be executed but it is fetched hence this
has to be replaced by NOP i.e. no operation.
▪ This instruction will require two cycle for execution.
▪ Similar instruction are in other micro-controller targeted for embedded
systems.
▪ This increases the code density, instead of using two instructions (one for
decrement and then jump) single instruction is used.
▪ The number of memory location that a code occupies can be decreased.
▪ Less memory leads to less power consumption.
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LITERAL OPERATIONS
IMMEDIATE ADDRESSING MODE
Examples
Direct instruction, data is the part of the instruction itself.
▪ Addlw k
Add literal k (part of instruction) to register W
e.g: addlw 0x05
▪ Movlw k
Move literal k into register W
e.g: movlw 0x21
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INSTRUCTIONS
BYTE ORIENTED OPERATIONS
▪ Decf f,d
Decrement f, place result depending on value of d either in W or f, it
effects Z flag
e.g: decf 0x30, 0
SUMMARY OF BYTE ORIENTED DATA TRANSFER INSTRUCTIONS
▪ Data Writing: Provision of writing in W register through immediate mode i.e. literals
can be copied to W register.
▪ Data movement: Data can be copied from W register onto RAM and from RAM to
be copied onto W register.
These are the basic data transfer operations that is supported in PIC instruction set.
▪ Instruction CLRF writes constant 0 in f register, and CLRW writes constant 0 in register W.
▪ All registers can be make 0.
▪ Register contents to be cleared requires for various types of initialization task for arithmetic
or doing hardware interfacing operations.
▪ SWAPF instruction exchanges places of the 4-bit nibbles field inside a register.
▪ This exchange takes place in a single instruction.
▪ Generally additional memory location is required to swap the content of two memory locations.
▪ These kind of exchange involving more than one instruction can also leads to various kind of problems
▪ If there is an interrupt occurring in between.
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71
INSTRUCTIONS
SUMMARY OF BYTE ORIENTED DATA TRANSFER INSTRUCTIONS
▪ Because of interrupt SWAP may not take place correctly.
▪ If SWAP can be provided as an atomic operation then we can guarantee that SWAP
operation is taking place.
Example: SWAP operation for nibbles, swap lower 4 bits with higher 4 bits with W register.
Why SWAP instruction is required?
▪ Required for various kind of synchronising construct implementations when we have
concurrent supported in an embedded system.
Example:
▪ A temperature controller sensing the temperature, it can be modified by the user to
set a value and it also recording the real time clock.
▪ It is doing 3 task supported in an embedded system.
▪ These 3 task is accessing a common memory location or executing a common code.
▪ We have to make sure that only one of the task is accessing the common memory
location or executing that common code.
▪ To ensure exclusive access we need to implement locking schemes, it is also called as
synchronising primitives which is facilitated by SWAP instruction.
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72
PIC:MICRO-CONTROLLER
ARCHITECTURE
&
INSTRUCTION SET
Subject
Code: EC-306
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73
SUMMARY
▪ General Architecture of PIC Microcontroller
▪ Memory Organization
▪ Registers & Stack
▪ PIC Instruction Set
▪ PIC Instruction Format
▪ Addressing Modes
▪ Control Instructions
▪ Directing Program Flow
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74
OBJECTIVE
▪ PIC Instruction Set
▪ Control Instructions
▪ Directing Program Flow
▪ Example Code
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75
ARITHMETIC AND LOGICAL INSTRUCTIONS
SUMMARY OF BYTE ORIENTED DATA TRANSFER INSTRUCTIONS
▪ PIC like many microcontrollers supports only subtraction and addition.
▪ Flags C, DC and Z are set depending on a result of addition or subtraction.
▪ Since subtraction is performed like addition of a negative value, C flag is inverse
following a subtraction.
▪ Logic unit of PIC has capability of performing operations AND, OR, EX-OR,
complementing (COMF) and rotation (RLF and RRF).
Rotation Instruction:
▪ Rotates the register contents through flag C
▪ Bits move by one bit to the left (towards bit 7), or to the right (towards bit 0).
▪ Bit which “comes out” of a register is written in flag C, and value of C flag is written
▪ In a bit on the “opposite side” of the register.
Example: rrf f,F(W)
▪ Copy f into F or W, rotate F or W right through the carry bit.
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BIT ORIENTED OPERATIONS
BIT ORIENTED OPERATIONS
▪ Bit manipulations are essential when we have hardware flags or hardware interfaces to be
manipulated or controlled.
▪ Microcontroller targeted for embedded application has got number of peripherals on chip.
▪ Various control bits of these peripherals have to be manipulated through software.
▪ I/O operations are needed to be control through software.
▪ These operations are bit oriented operations.
▪ Manipulates bits in control and status registers
Examples:
▪ bsf f,b
Set bit b (where b=0 to 7) in register f
e.g: bsf 0x03, 5
▪ btfsc f,b
(conditional branching)
Test bit b of register f, skip next instruction if bit is 0
e.g: btfsc 0x03, 2
▪ Instruction bcf and bsf perform set or clear one bit anywhere in the memory
▪ Bit operations consist of following micro-operations
▪ CPU reads the complete byte
𝑹𝒆𝒂𝒅 → 𝑴𝒐𝒅𝒊𝒇𝒚 → 𝑾𝒓𝒊𝒕𝒆
▪ CPU changes one bit in it
▪ Then writes the entire byte back
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▪ It is also an atomic operation i.e. can not be interrupted by an external interrupt.
77
CONTROL INSTRUCTIONS
CONTROL INSTRUCTIONS
▪ Program and processor control
▪ Examples:
▪ goto k
(k- 11 bit)
Unconditional branch, literal k is loaded into PC.
e.g: goto there (Use of labels)
▪ call k
(k-11 bit)
Call subroutine at location k;
e.g: call sum
▪ Upper 2 its of PC is loaded from PCLATH<4:3>
▪ retfie
▪ Return from interrupt service
▪ Routine and re-enable interrupts
▪ sleep
▪ Go to standby mode (power saving mode)
▪ clrwdt
▪ Clear watchdog timer (for clearing the content of watchdog timer, if you don’t want it to
reset the system)
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DIRECTING PROGRAM FLOW
DIRECTING PROGRAM FLOW
▪ GOTO, CALL and RETURN instruction like other micro-controllers
▪ Call and return instructions use hardware stack, independent of internal
RAM and limited to eight levels
▪ “RETLW k” instruction is identical with RETURN instruction, except that
before coming back from a subprogram a constant defined by instruction
operand ‘k’ is written in W register.
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Example Code
Decrement a 16 bit counter:
upper byte of the counter COUNTH & lower byte COUNTL
movf COUNTL,F
btfsc STATUS,Z
decf COUNTH,F
decf COUNTL,F
; Set Z if lower byte =0
; if Z=1, decrement COUNTH
; decrement COUNTL
Example code to clear 0x20 - 7F
00h
INDF
04h
FSR
movlw 0x20
movwf FSR
loop
clrf
incf
btfss
goto
INDF
FSR,F
FSR,7
loop
7Fh
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Register File
80
Example Code
Program puts out a square wave on PORTA Pin 0
clrf PORTA
clrf TRISA
Loop bsf PORTA,0
nop
nop
bcf PORTA,0
goto Loop
: Clear PORTA register
: Make PORTA all outputs
: Turn on PORTA Pin 0
: delay
: delay
: Turn off PORTA Pin 0
: loop back
Branching: Set Equal Flag if PORTA=PORTB
bcf
movf
EqualFlag, 7
PORTA, W
: First , clear the flag
: Move PORTA→ 𝑊
subwf
btfsc
bsf
PORTA, W
STATUS, Z
EqualFlag, 7
: W-PORTB→ 𝑊
: Check Z bit
: Ports equal, set flag
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Software: Relative Addressing
Software: Relative Addressing
▪ PCL = Low byte of the Program Counter
▪ Can be read and written.
▪ Writing to it sets the address of the next instruction to be executed.
14 bit Core
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Assembly Language Programming
Assembly Language Programming
▪ Advantage of using symbolic address and data references
▪ MPASM assembler for PIC family of processors
▪ Uses specification of the target processor provided in .INC file
▪ Assembler directives for specifying configuration details ( bits in
device configuration register)
▪ Supports MACRO facility (Collection of assembly language instruction)
Facility of MACRO
▪ New instructions, at assembler level can be created that are sequences of PIC instructions
Example: macro definition
bank1 macro
bsf status, RP0
endm
▪ Must be defined before use
▪ Use: in the assembly code
bank1 ; to be replaced during assembly process
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Summary
▪ We have studied instruction set of PIC micro-controllers
▪ Looked at small code snippets
▪ We know about MPASM
▪ You will use these instructions for developing different applications
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84
PIC:PERIPHERAL &
INTERRUPTS
Subject
Code: EC-306
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85
SUMMARY
▪ PIC Instruction Set
▪ Control Instructions
▪ Directing Program Flow
▪ Example Code
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86
OBJECTIVE
▪ PIC Peripheral
▪ Interrupts
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87
The PIC Family: Peripherals
The PIC Family: Peripherals
Different PICs have different on-board peripherals
Some common peripherals are:
▪ Tri-state (“floatable”) digital I/O pins
▪ Analog to Digital Converters (ADC)
▪ Serial communications interface: UART (RS-232C), SPI, I2C, CAN
▪ Pulse Width Modulation (PWM)
▪ Timers and counters
▪ Watchdog timers
Interrupts: a review
▪ An interrupt is any service request that causes the CPU to stop its current execution stream
and to execute an instruction stream that services the interrupt
▪ When the CPU finishes servicing the interrupt, it returns to the original execution stream at
the point where it left off.
▪ Interrupt driven I/O for interfacing with on chip peripherals
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Interrupts in PIC
Interrupts in PIC
Sources of interrupt are many
Interrupt generated from external Signal
▪ INT pin interrupt from external source
▪ Port B change interrupt (RB7:RB4)
Interrupt generated from on chip peripherals
▪ Timer overflow interrupts
▪ USART interrupts
▪ A/D conversion interrupts (After completion)
▪ LCD interrupt (due to LCD interface module)
▪ others
Interrupt Management
▪ Use of register INTCON: Status and Control
▪ Bit 7: Global interrupt enable
▪ Enables (if set) all unmasked interrupts or disables all interrupts
▪ Bits 6,5,4,3: For enabling peripheral interrupts, timer0 interrupts, external interrupt,
port B bit change interrupts respectively
▪ Bits 2,1,0 (Interrupt flag bits) :These bits are used to record the source of interrupts.
▪ Timer0, INT, port change interrupt flag respectively
▪ Flag bits get set when interrupt occurs regardless of the value of enable bit
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Peripheral Interrupts
Peripheral Interrupts
▪
▪
▪
▪
Managed using PIE and PIR registers
PIE registers contain bits for enabling interrupts from individual peripherals
PIR registers contain flag bits for individual peripheral interrupts
Bit oriented instructions can be used to examine and/or manipulate interrupt control and
status registers
▪ Source of interrupts can be figure out by examining the flag bits of these registers.
What PIC do to process an interrupt?
Interrupt Processing
▪ When interrupt is responded to
▪ GIE (Global interrupt enable) bit is cleared to disable other interrupts
▪ PC is pushed into stack
▪ PC is loaded with 0004h (Vector for interrupt service routine)
▪ Save STATUS & W register in temporary memory locations
▪ In the ISR (interrupt service routine), source of interrupt is determined by polling the interrupt flag bit
▪ Return from interrupt instruction (retfie) exits ISR, sets GIE (Global interrupt enable) bit to allow pending
interrupt to execute.
▪ Pending interrupts should have set the flag and in ISR flag can be check to determine the interrupt.
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Interrupt Timing
Interrupt Timing
OSC: controlling the entire processing of PIC
processor
CLKOUT: Basic clock
INT Pin:
▪ Source of external interrupt (Interrupt
is occurring at rising edge)
▪ There would be a delay, at that delay INTF
flag would be set.
▪ This flag is indicating the source of interrupt.
▪ GIE (Global interrupt enable) flag is set.
Interrupt latency:
▪ Time gap between the nterrupt occurrence
and service which can be provided.
▪ This is a hardware latency.
▪ There is other software latency along with the
hardware latency.
▪ These two things have to be taken into account
while designing an application.
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91
PIC Interrupt
Interrupt Constraints
▪ PIC has to satisfy interrupt constraints
▪ Making a system which is situated in the external world, there is a possibility of generation of
interrupts from external source.
▪ Each interrupt source characterized by
▪ Minimum time interval between interrupts from the same source
▪ Maximum time it takes the CPU to execute interrupt source’s handler
▪ PIC has to figure out the source by checking the flag bit and then only jump to the
instruction which service the source.
▪ Inside ISR other interrupts are disabled.
▪ While designing PIC has to careful about the maximum time that ISR take delaying other interrupts.
▪ Servicing of interrupts must not be delayed beyond the limit imposed by the timing requirement of the source.
Critical Region
▪ A critical region is a sequence of instructions that must be protected from an
intervening interrupt or produce erroneous output
▪ In PIC this problem is handled by
▪ Single cycle read-modify-write instructions
▪
xorwf PORTD,F
▪
Port D data read, XORed with W and written back
to port D
▪ Disabling interrupts by clearing GIE bit for the required set of
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instructions
92
PIC Peripherals
Critical Region
▪ A critical region is a sequence of instructions that must be protected from an
intervening interrupt or produce erroneous output.
▪ In PIC this problem is handled by
▪ Single cycle read-modify-write instructions
▪
xorwf PORTD,F
▪
Port D data read, XORed with W and written back to port D
▪ Disabling interrupts by clearing GIE bit for the required set of instructions
PIC Peripherals: Digital I/O
▪ All PICs have digital I/O pins, called ‘Ports’
▪ the 8pin 12C508 has 1 Port with 4 digital I/O pins
▪ the 68pin 17C766 has 9 Ports with 66 digital I/O pins
▪ Ports used to control and monitor external devices
▪ Ports have 2 control registers
▪ TRISX sets whether each pin is an input or output
▪ PORTX sets their output bit levels
▪ Most pins have 25mA source/sink (directly drives LEDs)
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PIC Peripherals
Typical Configuration: Port A
▪ For a single bit,
▪ TRIS Latch: Records the status that we set.
▪ Setting a TRISA bit put output drivers in high impedance state
▪ clearing a bit in TRISA puts contents of output latch on the pin
▪ When the output driver is in high impedance state use that pin
as an input pin.
▪ In many cases digital I/O pins can be configured to get analog
inputs.
Example: Port A
All pins are I/O with associated direction bits in TRISA
Initialisation code:
clrf STATUS
;bank 0
clrf PORTA
; initialises by clearing
output latches
bsf STATUS, RP0
; select bank1
movlw 0xCF
; value used to initialise data direction
movlwf TRISA
; PortA<3:0>=input, <5:4>=output
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PIC Peripherals
Managing port read/write
BCF/BSF PORTn does the following:
▪ Reads in the PORTn byte
▪ Clears/sets the bit
▪ Write the whole byte back.
▪ If external input pulls a different output pin low or high during
the READ, the read in value will not be what you expect WORSE, the WRITE will permanently change it that way.
Solution: Use Shadowed I/O (e.g.: set PORTA Bit 0)
bsf
_PORTA, 0
movf
_PORTA, W
movwf PORTA
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Assembly Language Programming
PIC Peripherals: Timers
▪ Available in all PICs.
▪ 14+ bit cores may generate interrupts on timer overflow.
▪ Some timers are of 8 bits, some 16 bits, some have prescalers and/or
postscalers
▪ Can use external pins as clock in/clock out
PIC Timers / Timer 0
▪ 8 bit timer/counter with prescaler
▪ Readable and writeable
▪ 8-bit software programmable prescaler
▪ Prescaler can divide the counter input by 2,4,8,16 …256
▪ Time range is defined over which this timer can count
▪ Internal or external clock set
▪ External clock connected to bit 4 of Port A
▪ Interrupt on overflow from 0xFF to 0x00
▪ Edge Select for external clock
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Assembly Language Programming
PIC Timers / Timer 1
▪
▪
▪
▪
16-bit timer/counter
Interrupt on overflow
Readable and writeable
Different Operating modes
▪ External crystal can be used
▪ Programmable prescaler
Timer1: Operating Modes
▪ Synchronised Timer
▪ Increments every instruction cycle
▪ Synchronised Counter
▪ Timer increments on rising edge of external clock
▪ External clock is synchronised with internal phase clock
▪ Asynchronous Counter
▪ Timer increments independent of internal phase clock
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PIC:PERIPHERALS
Subject
Code: EC-306
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98
SUMMARY
▪ PIC Peripheral
▪ Interrupts
▪ Digital I/O
▪ Timers
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99
OBJECTIVE
▪
PIC Peripheral
▪
▪
▪
PIC Timers
▪
PIC Timer 2
▪
Watchdog Timer
CCP Modules
▪
Capture
▪
Compare
▪
ADC
PIC Examples
▪
Low Range
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▪
100
Mid Range
PIC Timers
PIC Timers / Timer 1
▪
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16-bit timer/counter
Interrupt on overflow
Readable and writeable
Different Operating modes
▪ External crystal can be used
▪ Programmable prescaler
Timer1: Operating Modes
▪ Synchronised Timer
▪ Increments every instruction cycle
▪ Synchronised Counter
▪ Timer increments on rising edge of external clock
▪ External clock is synchronised with internal phase clock
▪ Asynchronous Counter
▪ Timer increments independent of internal phase clock
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PIC Timers
Real Time Clock
▪ Even when processor sleeps, timer1 continues to count
in asynchronous mode, on overflow could wake-up the
device.
PIC Timers / Timer 2
▪ Control bits can be set to different values to the prescalar as well as
postscalar.
▪ Readable & writable 8-bit timer/counter with prescaler and postscaler
interrupt on overflow.
▪ The timer can be set to reset with the help of the PR2 regester.
▪ These 3 timers performs and play different roles because of the different
functionalities.
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PIC Timers
Watchdog Timer
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When microcontroller goes into some kind of undefined states because of hardware/software error.
We need some mechanism to come out of those undefined states.
This facility is provided by watchdog timer.
Free running on chip RC oscillator provides input for this timer, which does not require any external component as a
clock source
A WDT time-out generates a device reset
In sleep mode a WDT time-out causes the device to wake-up
To avoid unintended device reset, postscaler has to be changed after clearing watchdog timer
WDT is enabled/disabled by a device configuration bit (In configuration port)
PIC Peripherals: CCP Modules
▪ Capture/Compare/PWM (CCP)
▪ One or more such modules in PIC micro controller targeted for various kinds of control applications.
▪ Each module contains a 16 bit register which can operate as 16-bit capture register, 16-bit compare register
or as 10-bit PWM master-slave duty cycle register.
▪ Capture counts external pin changes.
▪ Compare will interrupt when the timer equals the value in a compare register.
1. Capture:
▪ Capture mode records value of timer1 when events like rising edge or falling edge occurs on pin CCPx (1,2,3 etc no of
modules)
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▪ When
capture is made, interrupt request flag bit is set (One of the source of peripheral interrupts)
PIC Peripherals: CCP Modules
PIC Peripherals: CCP Modules
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Capture records events with respect to time.
These kind of features is not available with other general purpose processors like 8085 & 8086.
It is there in PIC because it is supposed to take care of various external events interface with external world.
It can actually keep track of not only the events but also the time at which it has occurred.
This value is registered in capture register.
2. Compare:
▪ Content of register compared with Timer1 register pair value.
▪ When match occurs, voltage level at CCPx pin is changed depending on the value of control bits.
▪ It can be program what happens when comparison takes place.
▪ External signals can be generated to control other device by this feature apart from matching and
resetting the timer.
PWM:
▪ Pulse Width Modulation feature of CCP module
▪ Duty cycle of the square wave can be changed
▪ Duty Cycle often expressed as a percentage of the period.
▪ Average DC voltage will be approximately the same percentage of
the “on” voltage.
▪ Typical uses:
▪ Intensity control: By changing the DC voltage intensity of a light source can be changed.
▪ Motor control
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▪ Temperature control: Controlling an heating element
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PIC Peripherals: CCP Modules
PIC Peripherals: CCP Modules
PWM Mode
▪ In pulse width modulation mode, CCPx pin produces up to a
10-bit resolution PWM output
▪ Since CCPx pin is multiplexed with the port data latch,
the corresponding TRIS bit must be cleared
▪ Coupled with Timer2 for producing output
▪ Period and duty cycle of timer2 output is manipulated for obtaining
desired PWM waveform
PWM: Set up
Steps required for setting up PWM
▪ Establish the PWM period by writing to PR2 register
▪ Establish the PWM duty cycle by writing onto CCPRxL &
CCPxCON<5:4> bits
▪ Make CCPx pin an output
▪ Establish TMR2 prescale value and enable timer by writing
to T2CON
▪ Configure CCP module for PWM operation
PWM: A simple application
Speed control of a DC motor
▪ Vary the Thigh and Tlow of the output waveform.
▪ When the duty ratio is changed the speed of the Motor
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is changed as average DC input changes
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PIC Peripherals: ADCs
ADCs
▪ Converts an analog input signal to 8-bit/10-bit digital value
▪ Generates result via successive approximation
▪ Input analog channel, Conversion clock, Analog reference
voltage is software selectable
▪ Can operate even while the device in sleep mode.
▪ Can generate an interrupt on ADC conversion done
▪ Result written on to ADRES register
▪ Reason for providing ADC:
▪ Interfacing with external analog input.
▪ Many of the external sensory input is analogue.
▪ This inputs is converted into digital form.
Synchronous Serial Port
▪ Serial interface module (Bus interface modules) for communicating with other
devices or micro-controllers
▪ Provides mechanism for connecting other peripherals and processors with microcontroller
▪ Module operated in one of two modes:
▪ Serial Peripheral Interface
▪ Inter-Integrated Circuit (IIC)
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More PIC Peripherals
More PIC Peripherals
▪ Some devices have 8-bit parallel slave port
▪ Multiplexed onto one of devices I/O port
▪ For interfacing with 8-bit peripherals or microprocessors
▪ USART (universal synchronous and asynchronous receiver transmitter)
▪ Can be configured as a full duplex channel for communication with or
peripheral devices like CRT/PC
▪ Implements RS-232C protocol
▪ LCD Module
▪ Generates timing control to drive LCD panel
▪ Also provides control of pixel data
More PIC Peripherals
▪ EEPROM data memory
▪ Readable and writable under normal operations (normal supply voltages)
▪ Not mapped directly in register file space
▪ Application can be loaded into PIC.
▪ Indirectly accessed using SFR
▪ Time to market is reduced.
▪ In-circuit programmer (for higher versions of PIC)
▪ Serial in-circuit programming support
▪ Developing a software in Assembly language or in C language, Translate it to assembly and to
machine code.
▪ Program area is either EPROM or FLASH.
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▪ To load program onto the program memory area, this facility is provided by SICP.
PIC Examples
PIC: Examples
Low End: 12C508
▪ 8pin package (DIP)
▪ 12bit core - 33 instructions
▪ 1us instruction time (Tclk = 4MHz)
▪ 512 12bit program memory
▪ 25 8bit data memory or registers (“File registers”)
▪ 2 level hardware stack (no interrupts)
▪ 5 GPIO pins, 1 input only (25mA source/sink)
▪ Features: Internal pullups, wake up on pin change, internal oscillator
▪ Peripherals: Timer, Watch Dog Timer
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PIC Examples
PIC: Examples
Mid Range: 16F876
▪ 28pin package (DIP)
▪ 14bit core - 35 instructions
▪ 200ns instruction time (Tclk = 20MHz)
▪ 8,092 14bit FLASH program memory
▪ 368 8bit data memory or registers (“File registers”)
▪ 256 8bit EEPROM (nonvolatile) data registers
▪ 8 level hardware stack (interrupts enabled)
▪ 22 GPIO (20mA source / 25mA 7sink)
▪ Peripherals: 5ch 10bit ADC, USART/I2C/SPI, 16bit & 8bit timers
▪ Features: Brown out detect, In-Circuit Debugger (ICD)
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Summary
▪ We have studied PIC family of processors
▪ Architecture
▪ Instruction set
▪ Peripherals
▪ PIC processors are well suited for low-end and mid-range applications
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