CPRE 465: Digital VLSI Design Homework # 5 (Total 100 points) In Q.1 and Q.2, we will compare different models for an interconnect wire. Various SPICE models are constructed. Then the output waveforms generated by SPICE are compared. The wire has total resistance 275Ω, total capacitance 100fF, and total inductance 2:5nH. It is driven by a gate modeled as a resistor of 460Ω. The other end is attached to a capacitive load of 6fF. This configuration roughly corresponds to a Metal 4 wire in a 65nm process with wire width equals 6λ and wire length equals 500µm. The driver resistance corresponds to a gate of size 20x. The load capacitance also corresponds to a gate of size 20x. Assume VDD = 1V and the input signal is a rising ramp with rise time 20ps. You may use any SPICE-like simulator. [Reference: Section 6.3.4 Inductive Effects, Page 224-226] 1. (50 pts.) In this question, models with different numbers and different types of segments are investigated. a) Model the wire in SPICE as a RLC transmission line. [a sample solution is posted on Canvas] b) Model the wire in SPICE as a 10-segment π-type RLC circuit. [a sample solution is posted on Canvas as an example] c) Model the wire in SPICE as a 1-segment π-type RLC circuit. d) Model the wire in SPICE as a 1-segment T-type RLC circuit. e) Model the wire in SPICE as a 1-segment L-type RLC circuit. f) Plot the SPICE output waveforms for all five circuits above on the same graph. Please briefly discuss the appropriateness of these five models. ➔ The RLC pi-model with more segments (here 10) is having higher resemblance with the real wire (highest accuracy) compared to the other models. The pi-model simulation is accepted as general solution to save time due to faster convergence to the required solution with lesser number of segments. If T- or L- model is used, then a greater number of segments are required to achieve the similar accuracy with respect to the real physical wire. Hence in circuit analysis it is preferred to have 3 pi-model segments for mimicking the behavioral simulation of wire/interconnect to the highest possible accuracy in shortest convergence time. 2. (50 pts.) In this question, not all of the R, L, and C components of the wire are captured in the models. The importance of modeling R, L, and C properly will be observed. a. Model the wire in SPICE as a 10-segment π-type RLC circuit. (Note that this is the same as the one in 1(b).) b. Model the wire in SPICE as a 10-segment π-type RC circuit. c. Model the wire in SPICE as a lumped C circuit. d. Model the wire in SPICE by ignoring all R, L, and C of the wire. In other words, only the driver and the load are modeled. e. Plot the SPICE output waveforms for all four circuits above on the same graph. Please briefly discuss the appropriateness of these four models. ➔ Comparing effects of different passive elements on the modelling of wire we understand that if any of these R, L and C are removed then the model becomes un-realistic and follows the source waveform as evidenced by the simulation waveforms. For example, if 10 pi-RLC model segments are compared with the 10 pi-RC model segments then there is slight difference which is not visible unless it is zoomed (as shown below), and that difference is that so non-linear that unless a 99% accuracy is needed like in the case of RF-circuit design, we mostly neglect the inductance part from model and save the circuit design and simulation complexity. The lumped capacitor model is not appropriate in showing the real physical phenomenon and hence it is appearing like RC line with R value only based on the driver resistance. The wire without the wire resistance, inductance and capacitance is almost equivalent to the voltage signal in this scenario due to the value of driver resistance and load capacitance being very small. Due to that the 5 times RC time constant is almost equal to 20ps which is the rise time of the input voltage ramp signal. HW submission: You must submit your HW 5 on canvas and include the followings for Q.1 and Q.2 a) All the simulation files for Q.1 and Q.2. ➔ The schematic (Virtuoso .oa) files are attached along with the pdf file submission in Canvas. b) Prepare a pdf file including all the circuit schematics of Q.1 and Q.2. For output waveforms just add the output waveforms for 1.(f) and 2.(e). ➔ All the circuit schematics are appended from here onwards and then the waveforms are also added after them for each question: Question 1 schematics Pi-model 10 pi- RLC models: both the combinations with R=275 Ohms and R=27.5 Ohms, C=100fF and C=10fF, L=2.5nH and L=0.25nH for each segment are done. L- and T- models Question 1 waveform Question 1 waveform zoomed for 500ps Question 1 waveform separated Question 1 waveform separated zoomed for 500ps All the waveforms separately compared with VCC Question 2 schematics Pi- model L-model T-model 10 segments of pi-RC model Lumped capacitor, and Lumped inductance-capacitor, just wire models 10 segments of pi-RLC model Question 2 waveform Question 2 waveform zoomed 500ps Question 2 waveform separated Question 2 waveform separated zoomed 500ps All the waveforms separately compared with VCC
