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Course project - Microprocessor Based ECG Recorder-Fnal 28pg

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Adi Shankara Institute of Engineering and Technology
COURSE PROJECT
CST 307
Microprocessor and Microcontrollers
Microprocessor Based
ECG Recorder
Submitted by:
Najiya Nasrin
Navneeth Sudevan
Nihal Jagadeesh
Nirandev A B
Paul Thomas
(26)
(27)
(28)
(29)
(30)
Submitted to ,
Asst. Prof. Revathy P
CSE Department, ASIET
Date : Jan 9th, 2023
Department of Computer Science and Engineering(2020-2024)
MicroProcessor and MicroController
Abstract
In this work, a simulator of surface electrocardiogram recorded
signals (ECG) is presented. The device, based on a
microprocessor and commanded by a personal computer, produces an
analog signal resembling actual ECGs, not only in time course
and voltage levels, but also in source impedance. The simulator
is a useful tool for electrocardiograph calibration and
monitoring, to incorporate as well in educational tasks and in
clinical environments for early detection of faulty behavior
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Table of Contents
Abstract
2
Table of Contents
3
Introduction
4
Objectives
6
Design
Hardware design
8
16
Implementation
Software design
21
22
Result Analysis
24
Conclusion
25
References
26
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Introduction
Since 1985, Bioengineering has been established as a
degree-level career at the School of Engineering of Universidad
Nacional de Entre Ríos in Argentina. In its program, the
undergraduate course Bioengineering II deals, among other
things, with metrology applied to biomedical instrumentation and
equipment, one of the competences that future Bioengineers must
acquire. The syllabus contents of Bioengineering II include the
use of transducers and signal conditioning circuits for the
design and calibration of biomedical instruments. One of the
fields concerning biomedical instruments -that we also choose to
train students in theoretical principles and practical aspectsis surface electrocardiography (ECG).
From among the various didactic strategies opted for teaching
purposes, one approach compels students to develop several
theoretical-practical tasks in the Instrumentation Laboratory.
One such task consists of designing and developing a protoboard
(MR) level of an ECG preamplifier, capable of recording,
conditioning and exhibiting ECG in one of the standard bipolar
leads. Recording and signal conditioning specifications, similar
to those encountered in current one-channel clinical
electrocardiographs, such as preamplification, patient
isolation, signal filtering, power amplification, must be
satisfied by the design made by the student.
In order to tune-up the project, students perform standard
electronic bench-tests, by setting each stage (offset, gain,
frequency response, etc.) using conventional waveforms
(sinusoidal, triangular, square) as input signals, and by
revisiting the complete design, if necessary [1], [2]. After the
circuit performance gives results within design specifications,
the students make a field test on the entire circuit, and record
their own ECGs. This final stage of the calibration procedure is
necessary because waveforms used in bench-proofs do not
completely reproduce actual ECG signal patterns, and because
recording artifacts, similar to those produced in ECG cabinets
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under live recording conditions, need to be recognized by
Bioengineering students to learn how to prevent them.
Abnormalities observed in the recording of ECG during the field
test could be originated in improper electrode location, a
faulty circuit, or less probably in genuine cardiac anomalies in
the subject whose ECG is being recorded, borrowing the
interpretation (and prevention) of anomalies in the recording,
which is one of the proposals of the exercise.
Because of this, we decided to feed the tested ECG amplifier
with a pure ECG signal resembling normal, abnormal, and also
artifact ECG recordings, prior to the recording of a live ECG
with the amplifier under test. This strategy aims at reinforcing
the students’ confidence in their own capabilities to produce an
efficient design. An antecedent of a device capable of
generating an artificial ECG can be found in [3].
The recording of an artificial signal with known properties,
similar to those expected in live recordings, and the comparison
in real time between input and output signals, will permit
distortions only related to the ECG amplifier. This is a useful
complement to the classical bench proofs referred to above.
Objectives
In the present work, we have developed a device (ECG simulator)
to generate an analog signal with the most salient attributes of
a live ECG recording, which is capable of being connected to the
input stage of the one-channel ECG amplifiers designed by
students.2. Objectives In the present work, we have developed a
device (ECG simulator) to generate an analog signal with the
most salient attributes of a live ECG recording, which is
capable of being connected to the input stage of the one-channel
ECG amplifiers designed by students.
Interrupt Controller : A priority interrupt system controls the
process of data acquisition. The highest priority interrupt is
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assigned to the stop interrupt, which concludes the data
sampling operation and initiates the waveform 12-lead
recognition program. The sample interrupt is assigned the second
highest priority. This interrupt is driven by an external clock
of 500 Hz. When the processor receives a sample interrupt, it
jumps to the control program and samples three channels of the
ECG waveform. The priority interrupt system is based on the
INTEL 8214 (priority interrupt control unit) and an 8-bit latch
(INTEL 8212).
When an interrupt is received, a restart instruction is placed
on the data bus, which causes control to be transferred to the
address specified by n times 0OO8A, where n is the priority of
the interrupt encoded by the 8214. Sample-and-Hold Units Three
sample-and-hold units are needed to sample three leads of the
ECG simultaneously. When the hold command is issued from the
microcomputer, the units stop tracking the waveform and hold the
signal until Analog-to-Digital Converter A
successive-approximation analog-to-digital converter circuit
(Figure 6), operates by comparing an unknown voltage to a series
of binary weighted voltages. The unknown input voltage is first
compared with the most significant bit (MSB). If it is less than
the MSB, then it is turned off.
Otherwise, the MSB is left on. The remaining bits are tried in
the Same manner until the least significant bit (LSB) has been
tried. Once the process has been completed, the output register
of the processor contains the binary of the unknown inputs.
Successive Approximation converters are capable of high speeds
and high resolutions. Also, since the conversion process is
independent of the analog input, the conversion time is
constant.
MICROCOMPUTER ECG ANALYSIS APPROACH ::
Diagnostic procedures and evaluation of ECG patterns are
discussed and described in many textbooks, but it is obvious
that there is a difference between the logic found in textbooks
on ECG diagnosis and that which can be used in computers. First
of all, when a person examines a record, there are many things
he does subconsciously and easily, such as pattern recognition.
The textbook takes these abilities for granted; it is difficult
to tell a computer how to reliably perform the pattern
recognition needed as input to an ECG diagnosis. Many checks
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need to be made in order to receive valid data from the
computer. On the other hand, the computer will examine each beat
thoroughly, whereas a person might skim and miss significant
differences (Bonner & Schwetman, 1968b). Another consideration
in using textbook logic on ECG diagnosis is that, for a
computer, it is incomplete. When a person performs a diagnosis,
there are many steps in such a manner and order that are not
described by textbooks, if they are mentioned at all. To
simulate these steps in a computer, many arbitrary decisions
must be made.
For example, there are rules by which to deter- mine whether two
complexes are similar, or whether intervals are regular. A
computer must have exact instructions on what to do and when to
do it. It has to have an ordering of tests; in a textbook, there
are usually only lists of tests. Because of this lack of exact
tests for purposes of diagnosing an ECG the Medical Systems
Development Laboratory of the U.S. Public Health Service (1969)
published a bulletin on computer-processed ECG diagnostic
criteria. This bulletin sets up the criteria for just above all
associated heart conditions. As an example, if the statement
"TACHYCARDIA" were printed on an ECG computer printout, it would
be due to the criterion "rate exceeds 100 on any two leads." The
condition printed out is more severe than that which is
suppressed (i.e., "rate exceeds 100 on anyone's lead").
Common Methods of ECG Analysis Programs
There are three common methods to implement the criteria in a
computer analysis of an ECG: a statistical procedures approach,
a logic tree approach, and an approach utilizing concepts of
binary logic. Only two of the three methods could be used on a
microcomputer such as an 8080 system successfully. Because
programming is accomplished in assembler language, and
high-level math packages are not available, this rules out any
type of statistical approach. The logic tree approach presents
the problem that if a mistake is made in the first tests, the
effect is likely to be more disastrous than if it had been made
near the end of the tree, when a final decision has almost been
made. Therefore, the program should be written so that the more
reliable tests are performed first. This is a very natural way
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to think about programming the relations between ECG data and
ECG diagnostics, but it has a rather unclear control path and
usually produces a very complicated program (Bonner & Schwetman,
1968a).
The binary logic system may be used to create decision tables
that provide a clear and very compact means for expressing
complex relations between ECG items and ECG diagnostic
categories (Wartek, Milliken, & Karchman, 1971). This last
method was the one chosen to develop the ECG analysis program on
the 8080 microcomputer system.
Design
The leading idea was to store a digitized live ECG, select an
epoch from it (i.e. a complete cardiac period), and send it to a
digital-to-analog converter (DAC) at an adequate rate of
refreshment to bring up a continuous analog ECG signal to the
ECG amplifier through a driver amplifier. Our ECG simulator
(ECGS) was provided with digital storage capacity, serial
communication and DAC, and was designed based on a
microcontroller and a solid state driver amplifier.
The ECGS is to be configured and controlled from a personal
computer (PC). The block diagram of the ECGS is shown in figure
1. It can be unfolded into five main stages: microcontroller
(figure 2), serial communication (figure 3), EEPROM memory
(figure 4), DAC (figure 5) and analog output (figure 6).
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Figure 1. Block diagram of the ECGS. Personal computer (PC),
serial communication (RS232), ECGS memory (EEPROM), digital to
analog converter (DAC).
One cardiac period (ECG epoch) from a live human ECG in the DI
lead, obtained from a normal individual, was digitized (10 bits,
500 Hz) by means of a computerized polygraph constructed at our
Laboratory in an earlier stage [4], and the most significant 8
bits were stored in the hard disk (HD) of a PC. A dedicated
PC-resident program sends this ECG epoch to ECGS through the PC
serial port, to be stored in the ECGS memory by a dedicated
program resident in the microcontroller.
Then this last program sends the ECG epoch from the memory of
ECGS to the DAC of the microcontroller at the same sampling rate
(500 Hz) in order to present the ECG to the output amplifier of
the ECGS. The transfer output cycle is repeated until an
operator interruption stops the process. The DAC output is
smoothed via analogical low pass filtering (single pole, 100
Hz), and conditioned in impedance and amplitude in order to
ṣsimulate the ECG signal expected at the input of an ECG
amplifier.
A. Electrodes
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There are many different electrode types commercially
available[5]. They should have an adhesive area to fix them
properly to the skin,clip-on wires, and a conductive gel, for
stable low-noise recording.Active electrodes can also be used to
improve the resolution of the recording [6].Our Holter recorder
uses seven electrodes (three lead configuration)that may be
placed at locations suited to the application. Three pairs of
the electrodes are differential voltage inputs and one serves as
a reference [7]
This reference electrode and its associated circuit (Figs. 2 and
3) offer a large reduction of common mode voltage magnitude by
actively reducing the voltage difference between patient and the
ECG amplifier common by means of the so-called driven-right-leg
circuit design [8]. This connection is electrically safe for the
patient.
B. Cable
It consists of seven lead wires that are utilized to create a
three-channel ECG recording. These wires are shielded and twined
inorder to reduce the induced electrical noise. In the ECG
amplifier end,a locking detent system is desirable to prevent
unwanted or accidental disconnection and provide solid
wire-to-contact connection. Many Standard connector accessories
that meet these specifications are commercially available [9].
The recorder includes a test connector to ensure the patient
hook-up is being done properly.The cable shield serves as the
ground wire. It is connected to the common mode voltage of the
integrated precision instrumentation amplifier (described later)
through a voltage follower, which diverts interference currents
induced in each wire toward ground. This Connection is used to
reduce the effect of the parasitic capacitances that appear
between the wires and ground and, therefore, avoid input
impedance reduction. The equivalent circuit of the shield is
shown in Fig. 2.
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C. ECG Amplifier
The ECG amplifier block in Fig. 1 consists of a differential
ampli-fication stage for each lead. Fig. 3 shows the circuit
diagram for this differential amplification stage. It has a
common mode rejection of ap-proximately 120 dB. It also has
small bias currents and offset voltage to prevent saturation of
both the ECG amplifier and analog-to-digital converter
(ADC).corresponds to the voltage achieved with the two batteries
and the step-up dc–dc converter, as described in Section II-H.is
considered zero voltage level.The passive circuit preceding the
precision integrated instrumenta-tion amplifier (in Fig. 3) is
an ac coupling that highpass filters the voltage difference
[10].
This reduces baseline wander and ECG am-plifier saturation. This
ac coupling circuit has the following transfer function
(taking):(1)This ac-coupling network provides a bias path for
the next circuit component without any connection to ground.
It allows closed-loop control of the dc common mode voltage by
means of a driven-right-leg circuit, which is essential in this
application where we have a single power supply ECG amplifier.
No resistor can be spared because of the bias path they provide
[10].
We chose to obtain a cutoff frequency of 0.01 Hz.Following an
integrated precision instrumentation amplifier,,is found. The
general specifications for this circuit component are:
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Fig: General block diagram showing the architecture of this
Holter recorder. The CPU is an Atmel T89C51RC2 microcontroller.
Main memory system is
implemented using a SmartMedia memory card. Analog-to-digital
converter is implemented using the AD7888 circuit.
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Fig. 3. ECG amplifier of the recorder. Core is the
instrumentation amplifier INA118, , supported by some
operational amplifiers in different configurations and an input
network
D. ADC
Once the ECG signal has been amplified and filtered, it must be
digitized. In order to achieve a proper conversion, some general
specifications must be accomplished by the ADC:
• power source level flexibility and low power consumption, in
order to work in a battery powered system. It must admit a 3.3-V
power source and power saving modes.
• minimal resolution of 8 bits, recommended 12 bits;
• microprocessor simple interfacing;
• appropriate sampling rate for the signal under analysis, 200
Hz at least;
• able to digitize multiple signals. Multiple analog input
channels,at least four.
The ADC AD7888 [14] fulfills these requirements. This converter
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has 12 bits of resolution and 8 single-ended analog input
channels. It is capable of a 125-KSPS throughput rate and has
low-power dissipation, typically 2 mW for normal operation and
3W in power-down mode.
The dc accuracy of the AD7888 is typically 1 LSB of integral
nonlinearity,1 1.5 LSB differential nonlinearity and an offset
error of 6 LSB. It includes a serial peripheral interface
(SPI).Three of the converter input channels are used to digitize
the corresponding leads, and another one is used to measure the
charge level of the batteries. The rest remain unconnected.
Communication between the CPU and the ADC is performed through
the SPI port.
E. CPU
It consists of a microcontroller that stores data from the ADC,
controls the calendar, controls the power failure protection
circuit (described later), and controls user interaction through
an LCD display and keyboard. To carry out all these tasks, the
general specifications of the microcontroller are: multiple
parallel ports for peripheral interfacing, timing capabilities,
and power saving modes.
We chose a microcontroller that meets these specifications, the
T89C51RC2 ATMEL microcontroller [16], which is compatible with
the well-known Intel family of microcontrollers MCS51. The
parallel ports of the microcontroller are used as the
peripherals data buses and for additional control lines (Fig.
1). The LCD and the SmartMedia card are memory mapped.
Microcontroller parallel ports 0 and 2 are used as the LCD and
the SmartMedia card data and addresses bus. Parallel port 1 is
used for communications through the integrated.
F. Storage
Long-term portable data acquisition requires a reliable
high-capacity storage and low-power consumption memory system.
For practical rea-sons, such a memory system should also be
light, small, and cheap.A device that meets those specifications
is a memory card. We chosea SmartMedia model [15] whose format
and operation is regulated by the SSFDC [17], [18]. This card
provides nonvolatile digital storage ofECG data. SmartMedia
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cards capacity ranges from 2 to 128 MB. They Can be powered
using two voltages: 5 and 3.3 V. In Fig. 4, the schematic of
this card is depicted.After the recording, data are downloaded
to a computer for further analysis. To serve this purpose, an
electronic adapter shaped like a stan-dard 3.5-in floppy
diskette is used.
The SmartMedia card fits into it through a side slot and works
from a 3.5-in 1.44-MB floppy disk drive,even though the card
capacity is much greater than those 1.44 MB.Data are stored
using a standard FAT16 logical format since after the recording
a floppy disk drive is used to read these data. The ADCtakes
place during the error checking and parameter calculation of
each memory sector: Boot ID, start head, start sector, start
cylinder,system ID, end head, end sector, end cylinder, start
logical sector,and partition size [17].
Each sample converted is stored in the corresponding memory
area, which, after completing a whole datapage, will be
rewritten in memory using the FAT16 format. Patients can operate
a button to mark special events that are recorded along with the
signal data.
G. Visualization
The graphical LCD display is a memory mapped peripheral that
per-mits menu-driven user interaction, warning messages, and
real-time signal display. The display that we used (PG12864-O)
has a 12864 dot matrix in a 65.552.5-mm screen.The LCD
controller requires 3.3 V and the display requires 10.5 V.To
obtain this higher voltage, we used a dc–dc MAX749 fly-back
con-verter to obtain 7.2 V [19]. When this is combined with the
3.3-V Supply, it is sufficient to power the display. The display
draws 2.5 when ṣit is on and 15A when it is off.
H.Power Source
The recorder is powered by two AA batteries in series that
produces nominal supply voltage of 3.0 V. The MAX856 IC [20] is
a step-up dc–dc converter that we use to boost the nominal 3.0-V
supply to regulated 3.3 V.The integrated circuit DS1305 [21] is
a clock/calendar and it also has dual power supply pins for
primary and backup power supplies.It is accessed using SPI, and
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used for time, date, and battery backup management, requesting a
processor interrupt to indicate loss of the primary power
supply.The three devices with the highest current consumption
are the mi-crocontroller, the LCD, and the DS1305. Their
consumption is 30, 2.5,and 1.28 mA, respectively, in the worst
case. Memory might need a current peak of up to 25 mA for erase
operations and 15 mA for write operations, but in its normal
state of stand-by it only needs 1 mA.
I Physical Features
A photo of an actual system built following the recommendations
described in this paper is shown in Fig. 5. As a reference, the
size is3870 117 mm and its weight is 265 g, although this data
may change depending on the specific components utilized. The
current consumption of this recorder is of 42.69 mA (worst case,
multiplied by a factor of 1.2), which gives a maximum resulting
autonomy of 59 using two batteries of 1250 mA/h, even though
only 48 h are needed.In case the memory were continuously
performing erase operations,autonomy would be decreased to 36 h,
but this is nonsense in real functioning
Hardware design
The microcontroller (PIC16C877-20/P, from Microchip, U.S.A.)
commands several actions in the ECGS: data management, serial
communication with the PC, 8 KB EEPROM (24C64, from Microchip,
U.S.A.) memory management, and 8 bit DAC (DAC0808, from
National, U.S.A.) operation [5], [6]. Figure 2 shows the pin out
of the microcontroller.
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Figure 2. Microcontroller module (PIC16C877-20/P) pin out. 20
MHz xtal.(Y1)
Figure 3 shows the stage which adapts voltages between the RS232
serial port in the PC and the transmission and reception pins of
the microcontroller. It is based on a voltage adapter circuit
(MAX232, from Maxim, U.S.A.).
Figure shows the wiring of the EEPROM. The PC, through the
RS232 serial port, brings the ECG epoch previously stored in the
HD to the microcontroller which stores it in the EEPROM memory.
The microcontroller can, in turn, read the EEPROM to send the
ECG epoch to the DAC in a repetitive cycle mode. The
microcontroller and the EEPROM communicate under I2C protocol.
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Figure 3. RS232 adapter. Voltage adapter module (MAX232).
Connection with PC (JP8). Connection with microcontroller (TX,
RX)
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Figure 4. ECGS memory. 8 KB EEPROM module(24C64). Connection
with microcontroller (SCL, SDA)
The circuit in figure 5 illustrates the connection between the
microcontroller and the DAC in order to bring the digitized ECG
epoch stored in the EEPROM as an analog signal to the output
stage. The amplifier (LF353H from National, U.S.A.) converts DAC
output current into a voltage signal.
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Figure 5. DAC wiring. DAC module (DAC 0808). Connection with
microcontroller (RB0…..RB7). Current-to-voltage conversion
(LF353H). Connection with output stage (V1)
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Figure 6. Output stage. Connection with DAC (V1). Connections
with ECG (electrodes 1, 2 and 3, see text)
Figure 6 shows the schemata of the low pass filter and the
output amplifier (LF353H from National, U.S.A.) of the ECGS. The
output signal is conditioned in voltage and impedance to
simulate the floating source which is expected to be presented
by surface electrodes and patient cable to the ECG input stage
in a live ECG. The resistive voltage divider brings an ECG with
8 mV pp and 5 KΩ output resistance [7]-[9]. Electrodes 1 and 2
must be connected to the corresponding input pins of the
electrocardiograph, having in mind the actual leads that
“generate” the simulated ECG. Electrode 3 must be connected to
the “right-leg driver” terminal of the electrocardiograph.
Implementation
Preprocessing
The transformation of an analog signal into a form that can be
easily handled by a digital computer creates a significant
problem for on-line interpretation of the ECG waveform using a
microcomputer. The main problem lies in the fact that the
microcomputer normally has a limited amount of memory space
immediately available for storage of the collected data points.
For the presented application, three analog channels are sampled
simultaneously at sao samples/sec per channel. And to properly
define the ECG waveform, at least 4 sec of data must be taken
from each channel (Steinberg, 1967). .This creates a need for
1,500 words or bytes of memory per second if every point is
stored for all three channels.
Therefore, the minimum requirement for three ECG leads is almost
6 KB of memory and, to examine all 12 leads, 4 X 6 KB, or 24 KB,
of memory. To reduce this data, a preprocessor program known as
AZTEC (amplitude-zone-time-epoch-coding) is incorporated into
the system. The authors of this program recognized that the ECG
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is composed of low-frequency components (P and T waves, ST
segments) and medium frequency components (QRS complexes). These
signal components normally have amplitudes ranging from low
frequencies (respiration at about .2 Hz) to high frequencies
(muscle noise up to about 200 Hz). The AZTEC program suppresses
the low-amplitude signals to reduce the effect of the
undesirable signals (Cox, Nolle, Fozzand, & Oliver, 1968). A
more detailed description of how the AZTEC program was utilized
can be found in Budde (1977).
The resulting data reduction from this software preprocessor
program is from a rate of 500 samples/sec to an average of 25
word pairs. This represents a reduction of about 10 to 1. The
program interprets high frequency but low-amplitude noise simply
as a line, as long as the peak-to-peak amplitude does not exceed
the threshold. This method of data compression offers the
advantage of on-line smoothing as well as data reduction. In
other words, the undesirable noise, which is relatively low in
amplitude, is smoothed and the major ECG components, which are
relatively larger in amplitude, are retained. The data reduction
process is shown in Figure 3. In addition, the line-slope coding
permits rapid searching of the stored data to locate the higher
frequency QRS complexes.
Software design
The program which transfers data from the PC to the ECGS was
built in Delphi 6.0 (from Borland, U.S.A.). This PC resident
program permits the configuration of the RS232 serial port to
comply with ECGS requirements. It transfers the ECG epoch stored
in the HD to the ECGS, exhibits the simulated ECG in the PC
monitor and performs a transmission error-checking protocol.
Figure 7 illustrates the digitized ECG which is the source
signal for ECGS, as seen in the visual environment of the
program, on the PC monitor.
The program resident in the microcontroller was written in
C-compiler Software Development Tools (from CCS, U.S.A.). This
program controls data transfer between EEPROM and MAX 232, and
between EEPROM and DAC.
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Main Components List
Figure 7. Visual environment of ECGS. The upper trace shows the
ECG epoch previously stored in HD; the lower trace shows the ECG
epoch after transmission from PC, as it was recovered from
EEPROM by the transmission error– checking protocol.
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Result Analysis
In
order to verify the performance of the ECGS, two simultaneous
recordings of the digitized ECG shown in figure 7 were performed. The
first recording, showed in figure 8, was taken from the DAC output
with a precision digital oscilloscope (Scopemeter 190/C, from Fluke,
U.S.A.); the second was obtained by connecting the ECGS output to the
patient cable inputs of an electrocardiograph (ECGView, from Eccosur,
Argentina) and recording a DI lead ECG. A fragment of the ECGView
report is reproduced in figure 9.
Figure 8. ECG input signal. Simulated DI lead ECG. Same
digitized ECG than in figure 7, recorded at the output (pin 7)
of of LF353 7 in figure 6 by mean of an oscilloscope, gain (1
V/div), timebase (500 msec/div), probe attenuation (10:1)
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Figure 9. ECG recorded signal. Transcription of ECG report from
ECGView. DI lead. Gain (5 mm./mV), timebase (50 mm/sec).
Discussion:A features comparison between a commercial Holter
recorder and ours is shown in Table I. Although our recorder is
not intended to be a commercial competitor in the market of
Holter recorders, its performance achieves or even surpasses
that of a commercial one. Regarding the physical features, they
greatly depend on the technical resources available, usually
better for a company manufacturing large series of commercial
Holter recorders.
This Holter recorder is aimed at filling the gap many research
groups have when recording their own signals at a low cost. It
can be also very useful as a model to develop other portable
signal recorders, since its design is very simple and easily
customizable. It is being used by our research group for signal
acquisition. The department of cardiology of Alcott's Hospital
is also using it for validation purposes.
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Conclusion
As a gross view of the ECG stored in HD (figure 7), the ECG
signal driven to the electrocardiograph (figure 8) and the ECG
finally recorded by the electrocardiograph (figure 9), permits
recognition of a very high concordance among them.
We thus conclude that the ECGS developed in this work has the
capability of reproducing a stored digitized ECG trace and
transforming it into an analog signal which is, in turn,
suitable for being reproduced without undesired artifacts by a
standard commercial electrocardiograph. Nevertheless, a
quantitative comparison among the three traces could be useful
in order to better characterize the performance of this ECGS.
As a result, we now have a device which can be easily installed
in the teaching laboratory, and the students will have another
tool for completing the calibration procedure of their ECG
amplifiers.
The ability of the device to feed an electrocardiograph with
normal or abnormal ECGs, and to add programmed artifacts to the
recording by digitizing actual ECG records, or by loading the
ECGS with synthetic ECG-like waveforms, will not only expand the
possibilities of the educational tasks, but also provide a
method for early detection of electrocardiograph faults.
This easy-to-operate ECGS, together with its low-cost
characteristic, make it suitable for use in an Electrocardiology
Department in hospitals where technicians could consequently
obtain recordings of simulated ECGs with their in-use
electrocardiographs and, by comparing actual recordings with the
expected ECG as visualized in the PC monitor, will be able to
decide on the recalibration of the electrocardiograph by the
Bioengineering section of the hospital, instead of recording
unsuspected wrong ECGs.
Microprocessor Based ECG Recorder
26
MicroProcessor and MicroController
References
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Microprocessor Based ECG Recorder
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MicroProcessor and MicroController
electrocardiograms,” Circulation, vol. 104, no. 25, pp.
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Microprocessor Based ECG Recorder
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