1
2
3
4
5
6
A
A
B
B
C
C
D
D
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
1
2
3
4
Orderable: N/A
TID #:
TIDA-00365
Number: TIDA-00365
Rev: E1
SVN Rev: Version control disabled
Drawn By:
Engineer: V.Pizzolante
5
Designed for: Public Release
Mod. Date: 8/5/2016
Project Title: Full_Bridge_Power_Stage
Sheet Title:
Assembly Variant: 001
Sheet: 1 of 3
File: TIDA00365_CoverSheet.SchDoc
Size: B
Contact: http://www.ti.com/support
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© Texas Instruments 2016
1
2
3
4
5
6
A
A
+4V
R55
51k
2
RESET
+12V
1
SW1
+12V
OVS
+12V
+12V
+12V
+12V
+12V
9
GND
GND
GND
Triggers @ PCB Temp. = 120degC
3
+12V
Temp_Vth
+3V3
6
U7
C
V+
5
VO
GND
3
GND
2
NC
1
7
V+
V-
B
1
12
4
U6B
LM2901VQD
LMT89DCKR
GND
GND
GND
+12V
3
+3V3
U6D
LM2901VQD
VBUS_sense 10
GND
Triggers @ 84VBus
11
D
V+
V-
14
+4V
R62
51k
R63
51k
5
1
CLK
Q
4
3
D
GND
2
C47
100pF
GND
GND
D12
BZT52C3V9T-7
3.9V
C46
0.01µF
R64
1.8k
GND
GND
Protection Latch
GND
GND
GND
B
+4V
SN74LVC1G175DCKR
GND
GND
D13
Red
GND
VBUS
VFF (3V3 @ 84VBUS, idem OVP)
R65
49.9k
Thresholds for OVP, OCP and OTP
C
+3V3
+12V
R66
49.9k
R67
6.8k
R68
Prot_Vth
R69
1.00k
Temp_Vth
487k
U8
TL431QDBZT
C49
1000pF
GND
GND
R70
VBUS_sense
R71
100k
C50
0.1µF
GND
100
C51
100pF
GND
D14
BAV99W-7-F
3
DC_Link
3
Prot_Vth
13
V+
V-
12
C48
0.1µF
C
VCC
2
12
C45
100pF R61
10.0k
8
2
CLR
C44
0.1µF
1
V+
V-
A
6
2
5
12
Prot_Vth
R59
U6C
100k
LM2901VQD
1
4
3.24k
R56
1.2k
U5
2
U6A
LM2901VQD
combines OTP, OVP and OCP in one!
HS_CS
R58
51k
3
3
B
R60
GND
TP1
R57
51k
1
Triggers @ 15Amp
R72
3.09k
GND
GND
GND
D
D
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
1
2
3
4
Orderable: N/A
TID #:
TIDA-00365
Number: TIDA-00365
Rev: E1
SVN Rev: Version control disabled
Drawn By:
Engineer: V.Pizzolante
5
Designed for: Public Release
Mod. Date: 8/5/2016
Project Title: Full_Bridge_Power_Stage
Sheet Title:
Assembly Variant: 001
Sheet: 2 of 3
File: TIDA00365_Protections.SchDoc
Size: B
Contact: http://www.ti.com/support
6
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© Texas Instruments 2016
1
2
3
4
5
6
A
A
+12V
DC Input Voltage: 20...75V
+3V3
J4
1
3
2
4
61030421121
VBUS
J5
GND
1
2
691311500002
GND
L1
B
B
Vout = 12V, 50mA
100µH
R41
3.0
+12V
C34
R42
C35
0.1µF
U3
BST
7
SW
8
VCC
6
FSW = 300kHz, UVLO = 18V
2
VIN
10µH
R46
R47
200k
200k
R49
R50
51k
51k
4
RON
FB
3
UVLO
RTN
EP
C36
0.1µF
R44
20.0k
C37
4.7µF
C38
4.7µF
C39
0.1µF
R45
9.1k
D9
5
FB
FB
GND
BAS316,115
C41
1µF
1
9
GND
GND
R48
2.26k
Vout = 3.3V, 20mA
D10
Green
+3V3
U4
GND
3
R51
7.5k
LM5018MRX/NOPB
GND
GND
GND
OUT
2
GND
C42
1µF
C
IN
ADJ
R52
1
475
LM317LIPK
C43
1µF
R53
820
R54
806
GND
GND
C
GND
2
100V
C40
3.3µF
10
3300pF
2
L2
R43
1
VBUS
51k
D11
Green
1
GND
GND
D
D
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
1
2
3
4
Orderable: N/A
TID #:
TIDA-00365
Number: TIDA-00365
Rev: E1
SVN Rev: Version control disabled
Drawn By:
Engineer: V.Pizzolante
5
Designed for: Public Release
Mod. Date: 8/5/2016
Project Title: Full_Bridge_Power_Stage
Sheet Title:
Assembly Variant: 001
Sheet: 2 of 3
File: TIDA00365_Power Supply.SchDoc
Size: B
Contact: http://www.ti.com/support
6
http://www.ti.com
© Texas Instruments 2016
1
2
3
4
5
6
A
A
Host Processor Interface
J1
1
3
2
4
61030421121
phaseB
phaseA
J2
1
3
5
7
9
11
2
4
6
8
10
12
61031221121
R25
49.9k
R26
49.9k
R27
49.9k
R28
49.9k
R31
3.32k
R32
3.32k
R29
B
LS_A
HS_A
HS_B
LS_B
R30
22
R33
22
R34
22
R35
22
22R37
GND
22
R36
22R38
22
C26
100pF
GND
C27
100pF
GND
C28
100pF
GND
C29
100pF
GND
C30
100pF
GND
C31
100pF
GND
C32
100pF
GND
B
DC_Link
HS_CS
GND
GND
C33
100pF
GND
Motor Terminals
J3
phaseB
1
2
3
phaseA
phaseB
phaseA
691311500103
C
C
GND
Indicator LEDs
+3V3
+3V3
2
R40
1.2k
2
R39
1.2k
D
PGOOD
1
D8
Red
1
D7
Red
/FAULT
D
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
1
2
3
4
Orderable: N/A
TID #:
TIDA-00365
Number: TIDA-00365
Rev: E1
SVN Rev: Version control disabled
Drawn By:
Engineer: V.Pizzolante
5
Designed for: Public Release
Mod. Date: 8/5/2016
Project Title: Full_Bridge_Power_Stage
Sheet Title:
Assembly Variant: 001
Sheet: 2 of 3
File: TIDA00365_Interfaces.SchDoc
Size: B
Contact: http://www.ti.com/support
6
http://www.ti.com
© Texas Instruments 2016
1
2
3
4
5
6
VBUS
Zener Clamps @ 91V +/-5%
PIR102
A
HS_CSp
COR1
R1
PIC201
PIC202
PIC301
PIC302
PIC401
PIC402
PIC501
PIC502
COC1
C1
100µF
COC2
C2
100µF
100V
COC3
C3
3.3µF
100V
COC4
C4
3.3µF
PIC601
PIC602
100V
COC5
C5
3.3µF
COC6
C6
0.1µF
COR2
R2
PIR201
HS_Gate_A
GND
GND
GND
GND
PIQ2098765
GND
COR6
R6
PIR601
HS_Phase_A
PID301
PID302
B
PIR402
PIR502
CSD19534Q5A
COR4
R4
BAS316,115
PIR401
PIC801
PIC802
phaseA
PIR602
PIQ4098765
COR8
R8
PIR801
COC8
C8
2200pF
PIC1402
PIC1401
PIR10 1
CSD19534Q5A
PIQ404
47
PIQ40321
COD5
D5
PID501
COQ4
Q4
4
PIR802
PIQ1098765
COR5
R5
2.7
3.0
LS_Gate_A
GND
VBUS
PID102
COD3
D3
MMSZ5270BT1G
91V
HS_Boot_B
VBUS
PIQ2031
COD1
D1
PID101
HS_CSn
COQ2
Q2
4
PIQ204
PIR202
47
0.01
PIC10 1
PIC10 2
COC10
C10
1µF
PIC1 01
PIC1 02
PIC1201
COC11
C11
0.01µFPIC1202
COC12
C12
1µF
PIC1301
PIC1302
PIR501
PIC901
PIC902
COC7
C7
0.1µF
PIR301
HS_Gate_B
COD2
D2
PID202
COC9
C9
2200pFphaseB
PID201
BAS316,115
COR7
R7
PIR702
PIR701
3.0
0.01µF
PIC1502
PIC1501
PIR1 01
COC14
C14
2200pF
PIQ3098765
COC15
C15
2200pF
PIQ3021
COR11
R11
2.7
COQ3
Q3
CSD19534Q5A
COR9
R9
4
PIQ304
PIR901
47
PIR1 02
HS_Phase_B
PID401
PID402
COD4
D4
MMSZ5270BT1G
91V
LS_Gate_B
PIR902
GND
COD6
D6
B
PID602
2.7
PIR10 2
BAS316,115
PIC701
PIC702
COC13
C13
COR10
R10
PID502
PIQ1032
2.7
COQ1
Q1
CSD19534Q5A
COR3
R3
4
PIQ104
PIR302
47
7,8
5,6,
PIC101
PIC102
PIR101
HS_Boot_A
1,2,3
VBUS
5,6,
7,8
VBUS
1,2,3
VBUS
5,6,
7,8
VBUS
1,2,3
VBUS
7,8
5,6,
DC-link capacitors
1,2,3
A
PID601
BAS316,115
+3V3
+12V
PIR1202
PIR1302
GND
COR12
R12
PIR1201
COC16
C16
PIC1602
PIR1301
COC17
C17
PIC1601
PIC1802
HS_CSn
PIC1702
COU1
U1
0.01µF
COC18
C18
HS Current Sense: 3.3V @ 15Amp
HS_CSp
COR13
R13
10
10
17
PIU1017
VDD
PIC1801
0.1µF
VCC1
VCC2
21
PIU1021
25
PIU1025
PIC1902
GND
PIC2001 PIC2002
PIR1401
1.50k
COC22
C22
PIC2202
COC23
C23
PIC2201
PIC2302
100pF
SOB
PIR1501
PIC2301
100pF
COR16
R16
PIR1602DNPPIR1601
0
PIR1702
COR17
R17
Optional Current Offset (DNP)
SIB
PIR1701
23.2k
GND
SOA
SIA
+3V3
COC24
C24
GND
IOUT
PIC2402
PIC2401
DNP
PIR20 2COR20
0.01µF
Q5B
DMMT5551-7-F
4
PIQ504
PIR20 1
C25
DNPCOC25
PIC2502 0.01µF
PIR1801
COR18
R18
180k
PIR1802
PIR1902
COR19
R19
180k
PIR1901
HS_CS
IIN
PIR2 02
R21
10k
HBA
26
PIU1026
HS_Boot_A
7
PIU107
HIA
6
PIU106
LIA
HOA
27
PIU1027
HS_Gate_A
HSA
28
PIU1028
HS_Phase_A
8
PIU108
HIB
10k
SOB
C
24
LOA PIU1024
LS_Gate_A
4
PIU104
BIN
22
LOB PIU1022
LS_Gate_B
11
PIU1011 BOUT
HSB
PIU1018
PIU103 IIN
HOB
PIU1019
12
PIU1012
IOUT
HBB
20
PIU1020
HS_Boot_B
OVS
16
PIU1016
OVS
3
COR22
R22
5
PIU105
AGND
PIR2 01
GND
9
PIU109
LIB
15
PIU1015
OVP
IOUT
SIB
PIU1013
/FAULT
BIN
13
SOB
10
PIU1010
PGD
BOUT
14
SIB PIU1014
SIA
PGOOD
BIN
BOUT
PIR2101
GND
LS_B
HS_B
HS_A
LS_A
100pF
U2
ATL431BQDBZR
GND
PIQ501COQ5B
COQ5A
COC21
C21
PIC2102
1
PIU101
18
19
HS_Phase_B
HS_Gate_B
23
PGND PIU1023
SM72295MAX/NOPB
GND
2
PIQ502
DNP
GND
GND
Q5A
DMMT5551-7-F
GND
PIQ506
6
24k
PIR2102COR21
PIC2101
SIA
2
PIU102
SOA
1
3
COR23
R23
COI0CS1
I_CS1
SOB
5
PIQ505
PIQ503
PIR2302DNPPIR2301
PIC2501
R20
16.5k
DNP
+12V
IIN
PII0CS101
PIU20 PIU201 COU2
PIU203
2
COR15
R15
1.50k
1
PIR1502
SOA
3
4700pF
COR14
R14
C
PIC1901
1µF
COC20
C20
PIR1402
PIC1701
1µF
COC19
C19
PIR2402COR24
R24
DNP
33.2k
D
GND
D
PIR2401
GND
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
1
2
3
4
Orderable: N/A
TID #:
TIDA-00365
Number: TIDA-00365
Rev: E1
SVN Rev: Version control disabled
Drawn By:
Engineer: V.Pizzolante
5
Designed for: Public Release
Mod. Date: 8/5/2016
Project Title: Full_Bridge_Power_Stage
Sheet Title:
Assembly Variant: 001
Sheet: 2 of 3
File: TIDA00365_Full Bridge.SchDoc
Size: B
Contact: http://www.ti.com/support
6
http://www.ti.com
© Texas Instruments 2016
1
2
3
4
5
6
A
A
COFID1
FID1
COFID2
FID2
COFID3
FID3
COFID4
FID4
COFID5
FID5
COFID6
FID6
COLogo1
PCB
LOGO
Pb-Free Symbol
COH1
H1
MECH
1514409
COH6
H6
MECH
B
1902C
COH2
H2
MECH
1514409
COH7
H7
MECH
1902C
COH3
H3
COH4
H4
MECH
MECH
1514409
1514409
COH8
H8
COH9
H9
MECH
MECH
1902C
1902C
COH5
H5
MECH
691351500003
COH10
H10
MECH
691352510002
B
CODANGER HIGH VOLTAGE1
DANGER HIGH VOLTAGE
CODANGER HIGH VOLTAGE!1
DANGER HIGH VOLTAGE
COLogo2
PCB
LOGO
FCC disclaimer
C
C
D
D
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
1
2
3
4
Orderable: N/A
TID #:
TIDA-00365
Number: TIDA-00365
Rev: E1
SVN Rev: Version control disabled
Drawn By:
Engineer: V.Pizzolante
5
Designed for: Public Release
Mod. Date: 8/5/2016
Project Title: Full_Bridge_Power_Stage
Sheet Title:
Assembly Variant: 001
Sheet: 3 of 3
File: TIDA00365_Hardware.SchDoc
Size: B
Contact: http://www.ti.com/support
6
http://www.ti.com
© Texas Instruments 2016
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