Chapter #5
MOS CHARGE
1. If a MOS capacitor has positive charge in the gate oxide, this will cause a negative shift in the
threshold voltage.
2. The energy bands for the oxide to bend upward as you move towards the gate in the energy band
diagram.
3. A negative shift in the flat-band voltage.
4. A negative voltage across the gate oxide at the flat-band condition.
5. Following is true when the gate voltage for a MOS capacitor is increased beyond the threshold
voltage,
a. The charge in the inversion layer increases linearly, like a parallel plate capacitor
b. The surface potential, ϕs, stays nearly constant
c. The depletion region width, Wdep, stays nearly constant
d. Nearly all of the increases in gate voltage appear as increases in the voltage across the oxide,
Vox
MOS CAP: P+ Gate, N-Body
1. For a MOS capacitor with a P+ polysilicon gate and an N-type body, if the doping concentration in the
body is decreased, then:
a. The bulk potential, ϕB, will become a smaller positive value.
b. Then the surface potential at threshold, ϕst, will become a smaller negative value.
c. The flat-band voltage will become a smaller positive value
2. For a MOS capacitor with a P+ poly gate over an N-type body at threshold, the energy bands are bent
so that the valence band is just as close to the Fermi level at the surface as the conduction band is to
the Fermi level in the bulk silicon.
3. The surface is accumulated when the surface potential, ϕs, is positive.
4. A MOS capacitor with a P+ poly gate over an N-type body typically has a positive flat band voltage.
5. For a MOS capacitor with a P+ poly gate over an N-type body, the flat band voltage is higher than the
threshold voltage.
6. For a MOS capacitor with an N-type body in depletion, the surface potential, ϕs, is slightly negative.
7. For a MOS capacitor with an N+ poly gate over a P-type body, when the flat-band voltage is applied
to the gate the Fermi level in the silicon body is lower than the Fermi level in the gate.
MOS CAP: N+ Gate, P-Body
1. For a MOS capacitor with a P-type body, if the energy bands bend down slightly as you move from
the silicon body towards the gate, and the middle of the bandgap Ei never crosses the Fermi Level Ef,
then this MOS capacitor is in: Depletion.
2. There is no depletion region when the MOS capacitor is in accumulation.
3. For a MOS capacitor with an N+ poly gate over a P-type body, the flat band voltage is lower than the
threshold voltage.
4. For a MOS capacitor with an N+ poly gate over a P-type body, the threshold voltage can change from
positive to negative if the doping concentration in the body is decreased enough.
5. As the gate voltage is increased above the threshold voltage, the depletion region width stays
approximately constant at a maximum value.
6. As the gate voltage is varied between the flat-band voltage and the threshold voltage, the depletion
region width is proportional to the square root of the surface potential.
7. As the gate voltage is increased above the threshold voltage, the charge in the inversion layer
increases linearly with the gate voltage.
8. The surface is accumulated when the surface potential, ϕs, is negative.
9. The surface is depleted when the surface potential, ϕs, is positive but less than the bulk potential,
ϕB.
10. The surface is neither accumulated nor depleted when the surface potential, ϕs, is zero.
11. The surface is inverted when the surface potential, ϕs, is positive and equal to twice the bulk
potential, ϕB.
12. For a MOS capacitor with a P-type body in accumulation, the surface potential, ϕs, is slightly
negative.
13. For a MOS capacitor with a P-type body: The surface is depleted when the surface potential, ϕs, is
positive but less than the bulk potential, ϕB.
14. Following is true for how MOS C-V characteristics are typically modeled by a circuit, in inversion, if
there is an efficient supply of minority carriers (e.g., from the source and drain of a MOSFET), then a
single capacitor is used to model the capacitance of the gate oxide.
15. For a MOS capacitor with an N+ poly gate over a P-type body at threshold, the energy bands are bent
so that at the surface the Fermi level is above the intrinsic Fermi level (the middle of the band gap).
16. For a MOS capacitor with an N+ poly gate over a P-type body, the threshold condition is reached
when the silicon surface inverts and changes from P-type to N-type.
17. For a MOS capacitor with an N+ polysilicon gate and a P-type body, if the doping concentration in the
body is increased, then the flat-band voltage will become a larger negative value
OXIDE CHARGE
1. Mobile oxide charge can occur due to ions in the oxide.
2. Charge can occur in the oxide due to impurities causing “traps” in the bandgap.
3. The most common cause of oxide charge is sodium ions, since sodium contamination is found all
around us.
4. Fixed oxide charge can occur due to silicon ions at Si-SiO2 interface.
GATE OXIDE THICKNESS
1. If the thickness of the gate oxide for a MOS capacitor is increased,
a. The magnitude of the flat-band voltage will not change.
b. The magnitude of the voltage across the oxide at threshold, Vox, will increase.
c. The magnitude of the surface potential at threshold, ϕst, will not change.
d. The magnitude of the threshold voltage will increase.
2. Following is true about the effective gate oxide thickness, Toxe, it is significantly different than the
physical oxide thickness in newer processes with thinner gate oxides
MOS CAP THEORY
1. In accumulation and inversion, a MOS capacitor operates similar to the capacitance of a parallelplate capacitor.
2. In depletion two capacitors in series are used, one to model the capacitance of the gate oxide, and
the other to model the capacitance of the depletion region.
3. If the C-V curve for a MOS capacitor is measured using a 1 Hz signal, then the maximum capacitance
will be measured when the MOS capacitor is in Both accumulation and inversion
DEPLETION LAYER
1. Depletion layer in the polysilicon gate of a MOS capacitor, is typically only a few nanometers thick,
since the polysilicon gate is very heavily doped.
2. It causes the measured capacitance in a MOS C-V curve to decrease slightly as the gate voltage is
increased above the threshold voltage.
3. It is typically only a few nanometers thick, since the polysilicon gate is very heavily doped.
FLAT BAND VOLTAGE
1. The change in the flat-band voltage due to charge at the Si-SiO2 interface increases as the amount
of charge increases.
Inversion Layer
1. Following is true about the inversion layer which forms under the gate of a MOS capacitor,
a. It typically varies from about 15 to 30 angstroms thick as the gate voltage changes.
b. It causes the measured capacitance in a MOS C-V curve to be slightly lower at the onset of
inversion and accumulation
2. As the magnitude of the gate voltage increases for a MOS capacitor, the thickness of the inversion
layer decreases.
3. For a MOS capacitor in strong inversion, the amount of charge in the depletion region stays
approximately constant as the gate voltage is increased.
4. The thickness of the inversion layer has nothing to do with effective oxide thickness for a MOS
capacitor.