A Flipping Active-Diode Rectifier for PiezoelectricVibration Energy-Harvesting 1 Wan-Ling Wu, 1 Ching-Yuan Yang and 2 Dung-An Wang 1 2 Department of Electrical Engineering, National Chung Hsing University Graduate Institute of Precision Engineering, National Chung Hsing University 145 Xingda Rd., South Dist., Taichung City 402, Taiwan (R.O.C.) Abstract—In the paper, we discuss piezoelectric-vibration energyharvesting flipping active-diode rectifiers, including the full bridge rectifier (FBR), the active diode rectifier, the switch only rectifier (SOR), and the flipping-capacitor rectifier (FCR). The energy harvesting circuits were implemented in 0.35-μm CMOS process. Compared to the transferred-power ability of the conventional FBR, the simulation improved factors of an active diode rectifier, SOR and FCR can reach up to 2x, 3.2x and 4.6x at an excitation frequency of 100 Hz, respectively. Keywords: Piezoeletrics; energy harvesting circuit; full bridge rectifier; switch-only rectifier (SOR); flipping-capacitor rectifier (FCR) I. INTRODUCTION In recent years, energy harvesting has become an important technique for environmental awareness. Instead of other energy harvesting components, piezoelectric energy harvesters (PEHs) are common used owing to its high power density , high scalability, high output voltage generation, and compatibility with integrated circuit (IC) technologies . Since the piezoelectric transducer (PT) cannot be used to power load electronics directly, an interface circuit is able to rectify the output power from PT and provide a stable supply. The equivalent model of a PEH can be represented as a dependent current source Ip and a parallel parasitic capacitor Cp. Generally, conventional FBR circuits can convert PEH’s ac current into a dc output voltage . However, the voltage inversion affect the energy extraction efficiency because of the charging loss of the PEH parasitic capacitor. When a current flows into a capacitor, it may cause a phase difference between voltage and current. The virtual power is the main reason of the power loss. Therefore, some kinds of energy-harvesting circuits are proposed to improve the loss on FBR. An active diode rectifier is mainly used to reduce the reverse current consumption . In addition, some kinds of energy-harvesting circuits are proposed to improve the charging loss caused by the capacitor. The SOR improves this defect by briefly shorting the PEH when the Ip value cross over zero . As a result, the loss of Cp is cut in half, effectively enhance the extracted power. To extract more energy from the PEH, the FCR is proposed [6, 7]. The FCR circuit uses capacitors to store the energy from the current source and give back to Cp on time. The process can flip the voltage and make the loss less. This paper discusses the design and analysis of the above circuits, also organizes these four approaches and compares each output power and voltage . II. CIRCUIT DESCRIPTION A. Full Bridge Rectifiers Full bridge rectifiers (FBRs) are widely used due to their simplicity and stability. Fig. 1 shows the schematic of traditional FBR, which can be sub-divided into positive half cycle and negative half cycle of input current Ip. During positive half cycle, the current source Ip charges the capacitor Cp . When the voltage of Cp higher than the Vth of the power MOS in the rectifier, the current flows into output capacitor CL from node Va. During the negative half cycle, the current source Ip charges the Cp in the opposite direction. When the voltage of Cp is flipped higher than the Vth of the power MOS, the current flows into output capacitor from node Vb. Their power efficiencies are relatively low as they set high-voltage thresholds for the input voltage to overcome prior to any energy extraction. However, the charge loss of Cp is the main cause which limits the energy extraction. The black part of the current waveform in Fig. 1 is the loss during rectification . Vrect IP MP2 MP1 Qloss Va RP IP Vb CP CL RL Vab Vrect -Vrect MN2 MN1 Fig. 1.Schematic of the full bridge rectifier. B. Active diode Rectifier If the output voltage of the FBR is greater than the signal source, it will cause the output energy to flow backward, the circuit may cause additional reverse current consumption, resulting in a reduction of conversion efficiency. In order to avoid this situation, reference  proposed an active diode to prevent the energy backflow, the architecture is called an active diode rectifier, as shown in Fig. 2. Authorized licensed use limited to: Southern Illinois University Carbondale. Downloaded on March 23,2022 at 22:03:00 UTC from IEEE Xplore. Restrictions apply. When the current IP is positive, Va is greater than Vb, the output of comparator CMP1 is able to turn ON the MN1. The current flows through MN1 and MP1 to charge the output capacitor. On the contrary, if the current IP is negative, the comparator CMP2 turns the MN2 ON, the current changes to flow through MN2, MP2 and the output capacitor. The comparator and NMOS are act as active diode, NMOS will quickly turned OFF if the current flows back. When IP starts to turn into negative, Vb rises to a positive value, the output of comparator 1 turns OFF the MN1, and vice versa. Therefore, the current cannot flows back into the input source. Vrect MP2 multiple switched capacitors instead of external high-Q inductor, thus significantly reduces the required circuit area and is suitable for deep-tissue implant applications. Fig. 4 shows the basic form of FCR circuit that uses only one capacitor C1 and five switches. The FCR operation can be sub-divided into three steps. In the beginning, the voltage of Cp maintains Vrect at the end of the positive cycle. First, ph1p signal is generated before Ip current cross over zero, and makes C1 get a part of charge from Cp. Second, the ph00 clears the charge in Cp just at the time when Ip current is zero. Finally, Cp is charged back from C1 in opposite direction. If the capacitance value Cp is same as C1, after calculating several times of flipping, the flipping voltage Vr in steady state can be calculated as MP1 RP Vb IP + ⋯+ + =∑ (1) and Va CP CMP1 | |= CL lim | | = RL CMP2 As a result, this method makes the loss decrease because of the partially voltage flipped. MN2 MN1 (2) ⟶ IP Qloss Fig. 2.Schematic of the active diode rectifier C. Switch Only Rectifier In order to solve the power loss caused by the phase shift between the voltage Vab and the current Ip, the simplest way is to add a switch across the input. In Fig. 3, a switch parallel with PEH makes Va and Vb short at the time when Ip changes direction. The capacitor Cp discharges immediately to ground when the switch is ON. Once Cp has been discharged, the switch turned OFF. Therefore, there is no need to waste the power on pulling the voltage down to zero and the power that we saved can be used to charge the Vab from 0 to a higher ±Vrect during each half cycle. The voltage and the current waveforms of the switch only rectifier is shown in Fig. 3. It can be seen that the power loss during rectification is getting smaller than active diode rectifier. IP Qloss IP Vrect Va PEH AC-DC rectifier CP Vab CL RL Va PEH Vrect ph 1p IP ph 1n AC-DC rectifier ph00 CP ph 1n C1 Vab Vrect CL RL Vr -Vrect ph 1p Vb ph1p ph00 ph1n Fig. 4. Flipping-capacitor rectifier. We can increase the numbers of flipping capacitors in order to get higher flipping voltage Vr. Fig. 5 shows the voltage flip efficiency with different numbers of flipping capacitors. The transient response with one to four sets of flipping capacitors is shown in Fig. 6. As can been seen, increasing the numbers of flipping capacitors can achieve better efficiency but at the cost of circuit. Considering about the chip area and the flipping voltage efficiency, we finally adopted FCR with 4C in the following discussion. Vrect -Vrect Vb VSW Fig. 3. Switch-only rectifier D. Flipping-Capacitor Rectifier  An alternative approach is proposed to synchronously flip the voltage across the piezoelectric transducer using one or Fig. 5. Simulation results of voltage flip efficiency with MATLAB. Authorized licensed use limited to: Southern Illinois University Carbondale. Downloaded on March 23,2022 at 22:03:00 UTC from IEEE Xplore. Restrictions apply. III. MEASUREMENT RESULTS The energy harvesting circuits were designed with 0.35-μm CMOS foundry process. Fig. 9 shows the die photograph of the test chip and the total chip area is about 1.66 mm2. We used function generator generating two input voltage sine wave signals, the peak to peak voltage is about 12V at the frequency of 500Hz.The two coupling capacitors is used to block DC components. The capacitor Cp is used to play as the parallel parasitic capacitor of piezoelectric energy harvesters. Fig. 6. Simulation results of voltage flip efficiency with HSPICE. Fig. 7 shows the simulation results of conventional FBR, the active diode rectifier, SOR, and FCR with 4C for comparison. The piezoelectric element is modeled by a current source about 30 A and a parallel parasitic capacitor about 12 nF with the input frequency of 100 Hz, a load capacitance of 1 F and a load resistance of 5 MΩ, respectively. The simulated output power between difference rectifiers is shown in Fig.8. Table I shows the different output power comparing with a conventional FBR, the active diode rectifier reaches up to 2x, the SOR reaches up to 3.2x and the FCR reaches up to 4.6x. 30uA IP Fig. 9. Micrograph of the test chip. -30uA 3.29v FBR Va Active diode 0.8v Va Vb Vb FCR Va 3.2v 3.75v 5.05v Vab sw_only Vb Fig. 7. Simulation results of the energy harvester circuits. PH00 Fig. 10. Measured transient waveforms of active diode rectifier. Fig. 8.Simulated power at the output of rectifiers. TABLE Ⅰ PERFORMANCE COMPARISON BETWEEN DIFFERENCE RECTIFIERS Rectifiers Full bridge Active Switch only Flipping capacitors Max. output power 9.41μW 18.4μW 30.5μW 43.5μW Normalize 1 2 3.2 4.6 Fig 10 shows the measured output voltage of an active diode rectifier, the output voltage is about 1.8V. Fig 11 shows the measured output voltage of switch only rectifier, the output voltage is about 2V.As the result shows the ph00 signal clears the charge in Cp and pulls the voltage down to zero. Fig 12 shows the measured output voltage of flipping-capacitor rectifier, the output voltage is about 2.8V. The zoom-in voltage flipping instants for the input voltage flipped from negative to positive is shown in Fig. 13 with the switch signal ph00. It can be seen that the power transit into switching capacitor and empty the remaining charge while the ph00 signal pulse turns high. After the signal turns low, Cp is charged back to an opposite polarization during the following pulses. Authorized licensed use limited to: Southern Illinois University Carbondale. Downloaded on March 23,2022 at 22:03:00 UTC from IEEE Xplore. Restrictions apply. Va TABLE II PERFORMANCE COMPARISON WITH STATE-OF-THEART INTERFACE CIRCUITS Vb This work JSCC2014  JSSC2010  TPEL 0.35 m 0.35μm 0.35μm 0.32μm Extraction Technique SSHC Energy Pile-Up SSHI SECE Frequency 100 Hz 100 Hz 225 Hz 60 Hz Inductor No 10mH 47μH 560μH PIC/PFBR 4.6 4.2 2.8 3 Technology Vab (CMOS) PH00 Fig. 11. Measured transient waveforms of switch only rectifier. Va Vb IV. CONCLUSION This paper presented a fully integrated flipping-capacitor rectifier for piezoelectric energy harvesting without requiring large external inductor. The improvement of extracted output voltage between active diode rectifier, switch only rectifier and flipping-capacitor rectifier reveals the proposed flippingcapacitor rectifier as a promising solution for piezoelectric energy harvesting applications, especially for deep-tissue implant implementations. Vab PH00 V. REFERENCES  G. Tang, B. Yang, J.-Q. Liu, B. Xu, H.-Y. Zhu, and C.-S. Yang, “Development Fig. 12. Measured transient waveforms of FCR.   Va Vb  Vab    PH00 Fig. 13. Measured transient waveforms during flipping.   of high performance piezoelectric d33 mode MEMS vibration energy harvester based on PMN-PT single crystal thick film,” Sens. Actuators A, Phys., vol. 205, pp. 150–155, Jan. 2014. N. Elvin and A. Erturk, Advances in Energy Harvesting Methods. New York, NY, USA: Springer, 2013. Z. Chen, M. Law, P. Mak, W. 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