Farmingdale State College Course Syllabus
Fall 2020 – Remote Learning
EET 105
Introduction to Digital Electronics
Credits:
2
Type of Course:
1 hour of Lecture and 3 hours of Lab per week = 4 hours/week
Class Meetings:
14 plus a Final Exam
Co-requisites:
EET111 Electric Circuits 1 or EET104 DC/AC Circuits
Time and Location 02: Thursday: 2:05pm – 5:45pm; Remote Learning via Zoom
Time and Location 05: Wednesday: 4:30pm – 8:10pm; Remote Learning via Zoom
Class Resources:
Instructor:
Office Hours:
Syllabus Date:
http://www.charlesrubenstein.com/105
Charles Rubenstein, Ph.D., CEng
Email  c.rubenstein@ieee.org
Wednesdays 10:00am – 2:00pm BY APPOINTMENT ONLY
Revision 1 – 14 August 2020 – REMOTE LEARNING
I. Course Description:
The objective of this course is to introduce the students to the fundamental concepts of digital electronics,
number systems, basic logic gates and circuits, Boolean algebra, Karnaugh map techniques, adders,
code converters, decoders, seven segment displays, multiplexers, demultiplexers, one- and two-bit
comparators.
Formal report writing is part of the laboratory requirement. Students will purchase and use National
Instrument’s Multisim software application toolset which includes schematic/logic capture and simulation.
Multisim is a full-function testing and simulation environment for analog, digital, and power electronics
designs. They will also use Sontrak’s Logic Friday to analyze combinatorial logic circuits as a truth table
or equation, and reduce their complexity using this minimization and synthesis software.
PLEASE NOTE: Neither the Multisim nor the Logic Friday software is available for MAC systems.
See Section IV.c “Loaner PCs” below.
II. Course Goals:
To introduce the students to the fundamentals of digital electronics, specifically to combinational logic
circuits and prepare them for subsequent courses covering Digital Electronics. The emphasis in this
course is the design and implementation of logic circuits and the verification of digital designs using the
concept of truth tables.
III. Learning Outcomes:
Upon completion of the course (including the assembly of all circuit assignments) students will be able to:
1.
Use various number systems, perform binary arithmetic, understand logic gates and
design combinational circuits such as elementary code convertors.
2.
Use National Instrument’s Multisim simulator software to successfully implement and test logic
circuits.
3.
Apply minimization techniques on logic expressions using Boolean Algebra techniques and
Sontrak’s Logic Friday software.
4.
Apply minimization techniques on logic expressions using Karnaugh Maps techniques and
implement logic circuit using the SOP (Sum of Product) concept using AND gates, OR
gates and NAND gates only.
5.
Determine the output at various points in a logic circuit.
6.
Understand the use of a Binary Adder IC (integrated circuit) for the purpose of addition,
subtraction and code conversion.
7.
Understand the operation and applications of MSI (Medium Scale Integrated) circuits such
as decoders, seven-segment displays, multiplexers and comparators.
8.
Be adequately prepared for the subsequent Digital Electronics courses.
1
© 2020 Charles Rubenstein.
Revision 200814. This syllabus is available electronically at:
http://www.charlesrubenstein.com/105/syllabus.pdf
EET 105
Introduction to Digital Electronics
IV. Course Materials:
a. Required Textbook
Digital Systems: Principles and Applications - 12th Edition, 2017, Pearson Publishers.
By Widmer, Neal S., Moss, Gregory L. and Tocci, Ronald J. ISBN10: 0-13-422013-7
Additional Reference: Digital Fundamentals – 10th Edition, Prentice Hall.
By Thomas L. Floyd. ISBN10: 0-13-235923-5
b. Required Windows-based Software (Will NOT work on MAC OS)
* Multisim Version 14.1 Ed. Version, 2017, National Instrument. (7 Day Eval; 1-2 hour install)
Download NI Circuit Design Suite 14.1 directly from National Instruments - includes Multisim:
https://www.ni.com/en-us/shop/electronic-test-instrumentation/application-software-forelectronic-test-and-instrumentation-category/what-is-multisim.html
Click “GET STUDENT DOWNLOAD”
* Logic Friday Version 1.1.4, 2013, Sontrak. (Freeware; 5 minute install)
Download Logic Friday Version 1.1.4 directly from:
https://download.cnet.com/Logic-Friday/3000-20415_4-75848245.html
c. LOANER PCs. MAC users may request a FSC Windows-based loaner PC at:
https://www.farmingdale.edu/information-technology/chromebook-sf2020.shtml)
V. Course Requirements:
a. Class Sessions: All class sessions of EET105 will be posted on the class website at:
http://www.charlesrubenstein.com/105
The materials for each class will be posted not later than the Monday of the class meeting at 12:00Noon.
It is YOUR responsibility to review the materials for the week, PRIOR TO THE CLASS. This
asynchronous material will be the subject of our synchronous Zoom Meetings.
b. Attendance: Our synchronous Zoom class meetings will open five (5) minutes prior to the start of
class. Attendance will be taken fifteen minutes after the official start of class and then at the end of class.
Arriving more than fifteen minutes late will constitute a class absence. It is common practice, in the event
you know you will be absent, to inform the instructor. It is important that we know as far in advance as
possible if other classes schedule exams, field trips, etc., during our class time.
Two (2) unexcused absences may result in a whole letter grade deduction from your final grade.
Three (3) unexcused absences will result in an automatic “F” for the course.
c. Lab Modules: There are ten lab experiments included in the EET105 Lab Manual. Each requires the
student write a Lab Report on the calculations and/or measurements of that lab. A shell will be provided
for you to enter your simulator results. Information on how to provide your labs to the instructor will be
provided later.
d. Homework: The homework assignments listed are suggested, but your understanding of the concepts
they review will, no doubt, become exam questions.
e. Exams: All exams will be either take-home or given online.
VI. Method of Assessment and Grading:
Your final grade will be calculated as a sum of your Lab Report grades covering the in class hands-on lab
assignments you complete and your grades on the three exams and the final exam.
a. Lab Reports: Worth 40%: 4% each (4=perfect, 3=needs work, 2=barely sufficient, 1=fail, 0=none)
There are ten (10) Hands-on Lab Experiments in the EET105 Lab Manual. Labs will be assigned at least
one week in advance and you should be prepared to work on the week’s experiment(s) the day of our
Zoom Meeting. Each experiment has two basic portions, the Lab which you MUST work on the day of the
class session, and your Lab Report. Lab Reports are due ONE WEEK after assigned. They will be graded
on a scale of one to four points per Lab as noted above. Any lab report presented up to one week LATE
2
© 2020 Charles Rubenstein.
Revision 200814. This syllabus is available electronically at:
http://www.charlesrubenstein.com/105/syllabus.pdf
EET 105
Introduction to Digital Electronics
for grading, without an excused absence, will be penalized one point. Lab reports will NOT be accepted
(except in instructor-approved special circumstances) after one week of lateness; they earn a “0” grade.
REMEMBER: All Lab Reports are Due ONE Week after class completion
Labs Late up to one week = -1 (maximum grade=3); Labs Late more than one week – Automatic ZERO.
b. In-class Exams: Worth 60%: 3 exams plus a Final Exam worth 15% each
There will be three (3) scheduled exams and a Final. These exams are worth 15% each. One or more
may be take-home exams or online exams.
Make up Exams are not given except under extenuating circumstances with prior notification.
VII. Special Notes:
If you have a disability for which you are or may be requesting an accommodation, you are required to
contact me and the Office of Support Services for Students with Disabilities, Memorial hall Room 116,
420-2411, (TDD) 420-2412 as soon as possible in the term.
It is YOUR personal responsibility to immediately inform your instructor of any challenges you may be
having in class, regardless of whether you have a disability or not.
VIII. SUGGESTED HOMEWORK PROBLEMS (EET105)
HWK #
1
2
3
4
5
6
7
8
9
10
Starting Page
32
62
126
128
221
398
63
129
224
726
Homework Problems
1.1-1.10
2.1-2.18
3.1-3.3, 3.6-3.8, 3.11-3.13, 3.16 a, c, e
3.23-3.24
4.1 a, c, e, f; 4.2, 4A, 4.8, 4.9, 4.11-4.12
6.1, 6.2, 6.3 a, c, d; 6.9 a-d
2.19-2.21
3.26; 3.27-3.29
4.13-4.15
9.1-9.4,9.12,9.29, 9.35, 9.37
IX. SEMESTER SCHEDULE:
WEEK
TOPICS
Number systems: binary, decimal, octal, hexadecimal.
Conversion from one number system to another. Basic logic
gates AND, OR, Inverter, NAND, NOR, and elementary
logic circuits. Writing logic expression for logic circuits and
drawing logic circuits corresponding to logic expressions.
Using Multisim.
Exam 1 – Week 5 (23/24 September 2020 - worth 15%)
Boolean theorems, and Boolean algebra. DeMorgan's Theorem,
Universality of NAND and NOR gates, Sum of Product form (SOP).
Karnaugh Maps, Numeric codes (very simple examples), Code
Conversion. XOR and XNOR gates, Binary addition, Half Adder.
Exam 2 – Week 9 (21/22 October 2020 - worth 15%)
Minimization of logic expressions and/or circuits using Logic Friday.
Two's Complement System to represent signed numbers. Addition
in two's complement system. Full Adder. Parallel Binary Adder.
Asserted Levels, Active Low logic signals, Decoders, BCD to seven
segment displays.
Exam 3 – Week 13 (18/19 November 2020 - worth 15%)
Comparators (One bit and Two bit), Multiplexers, Implementation of
logic circuits using multiplexers and demultiplexer, Security
Monitoring System.
Final Exam – (16/17 December 2020 - worth 15%)
1-4
5-8
9-11
12
13-14
15
3
© 2020 Charles Rubenstein.
Revision 200814. This syllabus is available electronically at:
TEXT Chapters
Ch. 1.4
Ch. 2.1, 2.2, 2.3
Ch. 3.1, 3.2, 3.3, 3.4,
3.5, 3.6, 3.7, 3.8,
3.9
Ch.3.10, 3.11, 3.12
Ch. 4.1, 4.2, 4.3, 4.3,
4.5, 4.6
Ch. 6.1, 6.11
Ch. 4.5,
Ch. 6.2, 6.3, 6.10, 6.11
Ch. 3.14,
Ch. 9.1, 9.2
Ch.9.6, 9.7, 9.8
http://www.charlesrubenstein.com/105/syllabus.pdf
LAB
Practice
using
Multisim,
1
2,3,4,5
6,7,8
9
10