26/01/2021 MC 401 LECTURE 2 Embedded Systems Hardware MC 401 - CBU SE 1 1 Lecture learning outcomes • Identify and describe the main subsystems of a typical microcontroller • Describe the primary function of each subsystem in the µC • Describe the differences among common µC architectures • Sketch the functional block diagram of the µC • Describe the differences between the RISC and CISC instruction set • Describe the main bus structures available in µCs (address, bus and control) • Describe the various types of memory • Describe the relationship between width of data and address buses MC 401 - CBU SE 2 2 1 26/01/2021 Microcontroller details • This is an entire computer system contained within a single integrated circuit. There are various types of microcontrollers (µCs): atmega, PICs, Arduinos etc). The goal is to pick the most economical with the desired parameters and features required for an application. • Range of µCs is from limited 4-bit processors to high speed, full featured 32 bit processors. • A µC contains several subsystems to ensure correct operation. The main subsystems include: a. A central processing unit (CPU) b. A bus system c. A memory system d. A bus system e. A port system MC 401 - CBU SE 3 3 µCs overview cont. E Figure 2.1: Microcontroller basic structure MC 401 - CBU SE 4 4 2 26/01/2021 Basic Architecture of a µCs • Figure 2.1 showed the basic architecture of a µC. A µC is equipped with ports which enable the designer to link the outside world to the µC. Generally, ports are bidirectional and have alternate functions such as ADC, serial communications and flexible timing system capability. • Just like a computer a µC is also equipped with various memory components which shall be looked at in greater detail. • To allow interruptions of internal events by external events, the µC has external interrupt pins to integrate interrupt systems. Interrupt systems enable µCs to respond to high priority events and later return to normal processing operation. • The µC can be programmed using a development kit/board which is linked to a personal computer via In System Programming (ISP) features. • Another critical item of the µC structure is the timing subsystem. An operating time base of a µC can be provided via an external crystal oscillator or resonator. MC 401 - CBU SE 5 5 µC CPU cont. • The central processing unit (CPU) which is part of the µC subsystem is a complex sequential circuit whose function is to execute programs which are stored within its Flash EEPROM(Electrically Erasable Programmable Read Only Memory). • Worthwhile mentioning here that a program is simple a series of instructions to perform a specific task. • What you will learn in this course is to program. You as the µC designer will use a program development tool or integrated development environment (IDE) hosted on a computer to develop programs. • Once the program is developed it is written/downloaded/burnt into the µC and allows the µC to be a stand-alone processing system. • Every time a µC is reset, the CPU fetches a program from memory and decodes the instruction’s content and then executes. MC 401 - CBU SE 6 6 3 26/01/2021 µC CPU Architectures Figure 2.2: Various CPU architecture configurations MC 401 - CBU SE 7 7 µC CPU cont. • The CPU is the main control centre of the µC. Apart from executing instructions the CPU calls upon available subsystems to perform their tasks as required by instructions in the program. • Figure 2.2 showed the classifications of CPU architectures available for µCs. Each architecture has its own advantages and disadvantages. The following classes exist: (refer to fig. 2.2) I. Accumulator-based architecture: In an accumulator-based architecture, instructions begin and end in specially designated registers called accumulators (A and B). An operation is performed in which one operand is found in an accumulator and the other is fetched from memory. The result is then saved in the accumulator. It is slower than the other configurations because values have to be constantly fetched from an already slower running memory module compared to the main processor. This forces the processor to also slow down so as to accommodate an operand memory fetch. It has the ability to do fairly complex instructions and can be modified to work with values stored in a register and one in memory. MC 401 - CBU SE 8 8 4 26/01/2021 µC CPU cont. • Register-based architecture: Here, both operands are stored in the register that are typically collocated with the CPU. The result is also stored in a register. Since the CPU and the registers operate at the same speed, the processor does not to slow down to read or write operands. Register contents are read from and written to memory using a background operation. • Stack-based architecture: In a stack-based architecture, both operands and the operation to be performed are stored on the stack. The result is then placed back on the stack. The stack may be based in dedicated registers or maybe a special portion of RAM. • Pipeline architecture: This architecture consists of hardware subsystems arranged in stages to fetch an instruction from memory, decode the instruction, fetch instruction operands from memory or registers, execute the instruction, then write back the results to memory. Each stage simultaneously executes a portion of the instruction set such that the overall result is a completed execution of an instruction every clock cycle. So in a five stage pipeline, five instructions are simultaneously processed through the pipeline. Instructions are simple instructions easily processed by a single stage. MC 401 - CBU SE 9 9 RISC versus CISC instruction set Just like hardware has an architecture, instruction sets also have an architecture. The are two based architectures: • Reduced Instruction Set Computer (RISC) – It has a complement or simple building block instructions. They are used in systems with less complex CPU architectures. • Complex Instruction Set Computer (CISC): It has a complement of a fuller feature and handles more complex instructions. It is difficult to predict whether a given program will be more efficiently coded with a RISC- or CISC-based instruction set. It largely depends on how well the specific algorithm matches the feature set of a given processor. Knowledge of the hardware and software architecture of a given microcontroller is very important when coding in assembly unlike when using a high level language like C. MC 401 - CBU SE 10 10 5 26/01/2021 REGISTER SET • Most microcontrollers have a number of registers designated as a register set. The register set is the interface between the use and the different subsystems in the µC. • Each register is a collection of flipflops (FF) which can either be set to logic one or zero. In software engineering, the flipflop can be seen as a switch that can be turned on by sending a logic level 1 and turned off by sending a logic level zero. • A subsystem contains a set of FFs making a set of registers associated with a given subsystem. To configure a subsystem, a designer determines that appropriate bit within the register. • The function of each register and register bit are documented in the µCs library. To program the bits in a register, you have to set the name of the register to a desired bit pattern. • Each µC has a number of header files which provide a link between the name of the specific register used within a program and its location within the microcontroller. MC 401 - CBU SE 11 11 BUS Structure • A bus is a collection of parallel conductors that have a similar function. Most µCs are built with an address bus, a data bus and a control bus. Address Bus This bus provides a connection between the CPU and the memory subsystem aboard the µC. The number of conductors in the address bus sets the upper limit of memory locations that may be linearly addressed by the µC. The first address in the memory subsystem will be all zeroes while the final address will be all logic ones. The number of individually addressable memory addresses may be determined by evaluating: 2address lines= addressable locations. For example, a microcontroller equipped with a 16-bit address bus is capable of addressing 65 536 (64 kB) separate locations. The first address in this memory space is (0000)16 while the last address in this space will be (FFFF)16. MC 401 - CBU SE 12 12 6 26/01/2021 Address bus cont. To expand the span of addressable memory locations, some microcontrollers employ a paged memory addressing scheme. In paged addressing, a memory system is subdivided into memory pages. Memory page length is usually some smaller block of memory such as a 4 kB page. Many 4 kB pages of memory can be assigned to the same 4,096 addresses in the linearly addressable memory space. To select a specific memory page for access additional addressing or select bits are required. MC 401 - CBU SE 13 13 Data Bus • This is used to route or transfer parallel data about different subsystems with the µC. Common data bus widths are 4, 8, 16 or 32 bit. The width of the data path generally determines the size of a data argument that the microcontroller can process. The largest unsigned integer that may be stored in a microcontroller with an eight-bit data path is 255. It should be emphasized that a 32-bit microcontroller is not a better microcontroller than its four-bit counterpart. Recall that the primary objective of the embedded system designer is to choose the most economical microcontroller that accomplishes the requirements of a specific design. • For example, a four-bit microcontroller may be an ideal choice to host the control algorithm for an irrigation scheme. However, a 32-bit processor may be required to host the control features required for a cell phone. MC 401 - CBU SE 14 14 7 26/01/2021 Control Bus • Microcontrollers are equipped with paths to send and receive a collection of control signals designated as the control bus. • These signal lines carry control signals to different subsystems throughout the microcontroller. • Most of the control signals are internal to the microcontroller integrated circuit (chip). • However, they are often conveniently provided at a microcontroller port so that external components may be added to the processor. • Control signals are issued by the CPU in response to program instructions to insure the instruction is properly executed. MC 401 - CBU SE 15 15 Memory • As previously mentioned the number of uniquely addressable memory locations in a microcontroller is determined by the width of the address bus. This span of addressable memory usually contains several different types of memory including Static Random Access Memory (SRAM), byte-addressable Electrically Erasable Programmable Read Only Memory (EEPROM), and bulk programmable Flash EEPROM. It should be emphasized that these memory components are contained within the confines of the microcontroller chip. • To keep a track of the memory locations in use and the type of memory present within the system, a visual tool called a memory map is employed. The memory map provides the size in bytes of each memory component and its start and stop address within the memory system. MC 401 - CBU SE 16 16 8 26/01/2021 Components of µC memory • RAM : This is volatile memory. . That is, if the microcontroller loses power, the contents of RAM memory are lost. It can be written to and read from during program execution. It is typically used during system development to store a program. Once development is complete, the completed program is stored in non-volatile memory such as Flash EEPROM. When the program is running, RAM is used to store global variables, to provided dynamic memory allocation of variables and to provide location for a stack. • Byte-addressable EEPROM: This type of memory is used to permanently store and recall variables during program execution. It is especially useful for logging system malfunctions and fault data during program execution. It is also useful for storing data that must be retained during a power failure but might need to be changed periodically. Examples where this type of memory is used are found in applications to store system parameters, electronic lock combinations, and automatic garage door electronic unlock sequences. • Flash EEPROM: Bulk programmable Flash EEPROM is used to store programs. It can be erased and programmed as a whole. Some microcontroller systems provide a large complement of both RAM and Flash EEPROM. Therefore, a system program can be developed in RAM and then transferred to Flash EEPROM when complete. Figure 2.3: Memory map example and the types of memory in use. MC 401 - CBU SE 17 17 More on memory • Other microcontrollers provide only a large Flash EEPROM and a smaller RAM component. With this memory configuration, system development takes place in Flash EEPROM. Flash EEPROM is typically programmed using In System Programming (ISP) techniques. That is, a host PC is connected via a cable to a microcontroller while it is resident within its application circuit. The host PC downloads the program to the microcontroller. • A few skills students are expected to have is the ability to use dynamic linked lists to store information in dynamic memory (we will do an example when we tackle embedded C) • Bootstrapping is loading a set of instructions when the microcontroller starts up. These can be preliminary variables that can be loaded necessary for the main program to run on start up. End of Lecture 2! MC 401 - CBU SE 18 18 9