How do I study verilog? Palash Khandale (पलाश खंडाळे ), RTL Design Engineer who likes system architecture & design Updated 2 years ago Related What are the sources for the Verilog HDL Code Learn? Originally Answered: How do I learn Verilog HDL? I read almost all the answers. I wasn’t satisfied. All the answers refer to some sites or some textbooks. First of all, let me make the answer plot. By the end of this answer, one shall have a clear understanding of Verilog HDL and where is one standing in the process of learning. Verilog is not computational language. It is not part of ease of doing programming(referring scripting) and neither used in any platform to serve development purpose. It doesn’t create any intriguing interface or experience. What does it do? It creates hardware. Verilog create digital circuits. A coding that emulates as well as develop a digital circuit for a behavioral requirement. Before jumping to Verilog, ensure the digital circuit is in your blood not in your heart. It breaks and fails too! How do you proceed for digital circuits? Start learning everything from gates, flip-flops, shift register, counters, adders, subtracters, multiplexer & de-multiplexer, encoders, decoder, priority encoder, K-map, boolean algebra, and De-morgan’s law. That’s it? Nope. State machines too! They’re the heart of design cycle. Best references Digital Circuit : 1. Digital Design by M. Morris Mano. You shall have clear ground from this book. You shall not struggle here to understand it. 2. Digital Design by Wakerly (Pearson publication). You can take advanced learning of digital designs from this book. 3. CMOS VLSI Design by Neil Weste and David Harris. Read 3rd chapter with full concentration without skipping a word. Understand maximum out of it. At least how gates and flops are formed in hardware. Now, since the digital circuit is in your blood. You know how nano-meter technology processes and how do electrical signals take a finite time to reach from one point to another point(3rd reference in the digital circuit). Let’s move to learn Verilog in depth. My answer Could you give a detailed explanation of the HDL language? Talks about the need for HDL and evolution that happened 3 decades ago which made semiconductor an innovation of the century. Best References Verilog HDL : 1. Verilog by Samir Palnitkar. You can follow this book as a beginner. It doesn’t keep you up with actual use. It helps you to write the codes which create the logic circuits(synthesize-able). 2. Digital Design references. Have a look at it and check what you can write. 3. A cited reference Cliff Cummings' Award-Winning Verilog & SystemVerilog Papers. Consider this reference as Verilog scripture. Patiently read everything related to Verilog. It’s free. Go for this reference if you have a clear understanding of what is timing, power, and optimization in digital circuits. Not all the codes will create practically possible digital circuits. You need to understand each keyword and its application. Some keywords are designed in Verilog just for simulation purpose(they won’t create any logic circuits). That’s it? Naah. There are some dos and don’t. Never ever ever ever try to learn from Asicworld.com . Use this only for syntax. Do not ever believe in any code sourced from the internet. It sucks. You’ll understand it later. It doesn’t help anyone to grow. Not able to learn some topics? Try to use top university names in the search box. Like “Digital design questions Stanford”. Materials are developed by researchers and smart people on earth. You’ll love it. Try to learn tools such as ModelSim, Xilinx Vivado and Microsemi Libero. They all are free. Strongly recommend Vivado. Some answers recommend reading about Static Timing Analysis, Critical Path, Data Path. But that is not part of Verilog HDL. They all are part of the semiconductor development process wherein the analysis tools are used to perform, improve and make a stable solution. This section of semiconductor is an advanced type and needs separate questions to understand. It will fairly take someone at least 3–4 months. I know my references and recommendations are bulky in size but, think of quality. There is no single material for Verilog because it is not just a language. Now you know, why? ;-) Thanks for 350+ upvotes. I am getting a massive response to this answer. I keep a tab on this answer once in a while for quality. 49.3K views · View upvotes · View 14 shares 590 14 16