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Ideal Operational Amplifiers

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Topic 1: Ideal Operational
Amplifiers and Op-Amp Circuits
Part A
Introduction: Ideal Operational Amplifier
Operational amplifier (Op-amp) is made of many transistors,
diodes, resistors and capacitors in integrated circuit technology.
Ideal op-amp is characterized by:
Infinite input impedance
Infinite gain for differential input
Zero output impedance
Infinite frequency bandwidth
v0  Aod v1  v2 
2
Operational Amplifiers
Applications arise in which we wish to connect one circuit to
another without the first circuit loading the second. This requires
that we connect to a “block” that has infinite input impedance and
zero output impedance. An operational amplifier does a good job
of approximating this. Consider the following:
+
Circuit 1
Vin
_
The
"Block"
+
Vout
Circuit 2
_
Illustrating Isolation.
3
Operational Amplifiers
4
© Dr. ANAS
Equivalent Circuit of Op-Amp
Saturation
+ve output voltage means OpAmp sources current
- ve output voltage means OpAmp sinks current
5
Operational Amplifiers
A model of the op amp, with respect to the symbol, is shown below.
Ro
V1
V1
+
_
_
Vd
+
V2
Ro
Ri
Aodd vd
AV
Vo
Vd
Ri
AV
Aoddvd
Vo
+
V2
_
Working circuit diagram of op amp.
Op Amp Model.
Aod is the open- loop differential gain
If v2 is grounded, and Ri is very large  v10, “virtual ground” concept
6
Operational Amplifiers
Application: As an application of the previous model, consider the
following configuration.
resistors R1 and R2.
Find Vo as a
function of Vin and the
R2
R2
R1
+
_
Vin
vVdi
+
+
Vo
_
_
Op amp functional circuit.
(inverting amplifier)
Av is the closed- loop voltage gain
_
b
a
_
+
Vin
Ro
R1
+
Ri
A
AV
odi vd
Vo
+
_
Total op amp schematic for voltage gain
7
configuration.
Operational Amplifiers
R2
Example
Ro
R1
+
_
Vin
vVdi
_
b
a
+
Ri
Aodi vd
AV
Vo
+
R1 = 10 k
R2 = 40 k
Ro = 50 
Aod = 1000,000
Ri = 1 M
Calculate Av
_
Solution
We can write the following equations for nodes a and b.
Vin  vd vd  vd  Vo
 
R1
Ri
R2
Vin  vd
v
 v  Vo
 d  d
10k
1000k
40k
(1)
8
Operational Amplifiers
We can write the following equations for nodes a and b.
  vd  Vo 

Vo  Aod vd  R0 
 R2 
  vd  Vo 
Vo  Aod vd  50
 (2)
 40k 
From (1)
 25Vo 126vd 100Vin
From (2)
4.005 10 Vo  4 10 vd  0
5
Vo   3.99Vin
9
𝑉0
= −3.99
𝑉𝑖𝑛
9
Operational Amplifiers
For most all operational amplifiers, Ri is 1 M or larger and
Ro is around 50  or less. The open-loop gain, Aod, is greater
than 100,000.
Ideal Op Amp:
The following assumptions are made for the ideal op amp.
1. Infinite open  loop gain; Aod  
2. Zero output resistance; Ro  0
3. Infinite input resistance; Ri  
10
Ideal Op Amp:
i1 = 0
+
V1
_
i2 = 0
+
_ _
vVdi
+ +
V2 = V1
_
+
Vo
_
Ideal op amp.
(a) i1 = i2 = 0: Due to infinite input resistance.
(b) vd is negligibly small; V1 = V2.
11
Op-amp are almost always used with a negative feedback:
Part of the output signal is returned to the input with negative sign
Feedback reduces the gain of op-amp
Since op-amp has large gain even small input produces large
output, thus for the limited output voltage (lest than VCC) the
input voltage vd must be very small.
Practically we set vd to zero when analyzing the op-amp circuits.
i2
with vd =0
i1 = vin /R1
i2 = i1 and
i1
vo = -i2 R2 = -vin R2 /R1
so
Av=vo /vin =-R2 /R1
12
© Dr. ANAS
Inverting Amplifier
Inverting Amplifier
(same as last slide)
Find Vo in terms of Vin for the following configuration.
R2
R1
+
Vin
Writing a nodal equation at (a) gives;
(Vin  vd )  vd  Vo 

R1
R2
a _
vVdi
+
+
Vo
With vd = 0 we have;
V0 
_
_
 R2
Vin
R1
Vin
Vin
R 

R
The input impedance: in iin Vin  0 1
R1
With R2 = 40 k and R1 = 10 k, we have
Vo   4Vin
Earlier
we got
Vo   3.99Vin
13
Inverting Amplifier
Example 2: Consider the op amp configuration below.
Assume Vin = 5 V
At node “a” we can write;
6 k
1 k
( Vin  3 )  3  V0 

1k
6k
a
+
_+
Vin
V0 = -51 V
_
+
3V
V0
(op amp will saturate)
_
14
© Dr. ANAS
Solution
𝑣𝑠
15
Simulation
R2  2k
https://www.multisim.
com/content/oKwHW
P5i59BmNkEKjePVo
g/inverting-opamp/open/
16
Simulation
R2  4k
17
Simulation
R2  8k
18
Simulation
R2  20k
19
1. If noninverting terminal is grounded, then inverting terminal is
virtual ground.
a. Sum currents at node assuming no current enters Op Amp.
2. If noninverting terminal is not grounded, then inverting terminal
voltage is equal to that of the noninverting terminal.
a. Sum currents at node assuming no current enters Op Amp.
3. Output voltage is determined from either Step 1 or 2.
© Dr. ANAS
Problem-Solving Technique:
Ideal Op-Amp Circuits
Topic 1: Ideal Operational
Amplifiers and Op-Amp Circuits
Part B
© Dr. ANAS
Inverting Op-Amp with T-Network
Assume that the amplifier is designed to have Av=-100 and an input
resistance is Ri=R1=50kΩ  (feedback resistance) R2= 5MΩ which
is too large for most practical circuits
R3 R3
R2
Av   (1 
 )
R1
R4 R2
It allows us to obtain a
large gain with reasonably
sized resistors.
22
© Dr. ANAS
What is this topology useful for?
It allows us to obtain a large gain
with reasonably sized resistors.
4
23
Design an Op-Amp with a T-Network assuming the following parameters:
VI(max)=12mV (rms), R1=1kΩ, Vo(max)=1.2V (rms), all resistors are less than
500kΩ
© Dr. ANAS
Example
Solution
vo
1.2
Av 

 100
vI 0.012
R3 R3
R2
Av   (1 
 )
R1
R4 R2

R3 

Av  5 8    100
R4 

R3
 212
.5
R4
Assume
R2
5
R1
R3
7
R2
R1  1k
R2  5k
R3  35k
R4  2.91
14k kΩ
24
© Dr. ANAS
Inverting Op-Amp with Finite
Differential-Mode Gain
Av  
R2
R1
1
R2
1
[1 
(1  )]
Aod
R1
25
© Dr. ANAS
Inverting Summing Op-Amp
Here, we use the superposition theorem and the concept of virtual ground
vO   (
if R1  R2  R3  RF 
RF
R
R
vI1  F vI 2  F vI 3 )
R1
R2
R3
vO  (vI 1  vI 2  vI 3 )
26
© Dr. ANAS
Example
Consider an ideal summing amplifier with R1=20kΩ, R2=40kΩ,
R3=50kΩ, and RF=200kΩ. Determine the output voltage for vI1=0.25V, vI2=0.3V, vI3=-0.5V.
Solution
RF
RF
RF
vO  ( vI 1 
vI 2 
vI 3 )
R1
R2
R3
Input Signals
vO  (10  0.25  5  0.30  4  0.50)  3V
RF
200k
V6
15Vdc
FREQ = 1k
-250.0mV
R1
VAMPL = 0.1
VOFF = -0.25
VI1
20k
3
0
107.5uV
0
1
OS1
-15.00V
6
OUT
V-
UA771
2
-
4
3.002V
V11
+ 7
U1
OS2
V+
VOUT
5
Output
V12
0
FREQ = 1k
300.0mVR2
VI2
VAMPL = 0.1
VOFF = 0.3
15Vdc
V7
15.00V
40k
0
0
V13
FREQ = 1k
-500.0mVR3
VI3
VAMPL = 0.1
VOFF = -0.5
50k
Input Signals
0
27
Noninverting Op-Amp
The input signal is applied to the non-inverting terminal;
v1=v2  virtual short (but in true short circuit, current flows)
(0  v2 )  v2  vo

R1
R2
Av 
v0  R2 
 1  
v2  R1 
1) The output signal is in-phase with the input signal
2) The gain is always greater than one
if R1   
 R 
Av  1  2   1


independent of R2 
voltage follower configuration
So you can use any value for R2. Let us assume R2 =zero.
28
© Dr. ANAS
Voltage Follower
The voltage follower is used as a buffer between the source and the load. It prevents
the loading effect (attenuation in the signal voltage).
vO
RL
1


 0.01
vI RL  RS 1  100
vO  vI
Too much loading
29
© Dr. ANAS
Noninverting Summing Op-Amp
𝑽𝒐𝒖𝒕
𝑹𝒇 +
= 𝟏+
𝑽
𝑹𝒂
𝑽+
30
25 𝑘Ω
Example
Find the output 𝑉0 for 𝑉1 =
1 𝑚𝑉, 𝑉2 = 5 𝑚𝑉, 𝑎𝑛𝑑 𝑉3 = 10 𝑚𝑉
5 𝑘Ω
𝑉3
𝑉0
10 𝑘Ω
15 𝑘Ω
31
Example
Design a summer that has an output voltage given by
vO=1.5vs1-5vs2+0.1vs3
Solution 1:
we have,
Rf1
R1
vO1  (
 1.5 ,
Rf1
R1
Rf1
R3
v S1 
Rf1
R3
 0.1
Let R1  2K , R f 1  3K ,R3  30K
vS 3 )
Rf 2 
 Rf 2

vO  
vO1 
vS 2 
R2
 R4

Rf 2
R2
5
Rf 2
R4
1
Let R2  2K , R f 2  10K ,R4  10K
© Dr. ANAS
Current-to-Voltage Converter
The output of a photodiode (solar cell) is a current. We can convert this output current
to an output voltage.
Ri 
v1
0
i1
In most cases, we assume that RS>>Ri; therefore
i1  i2  iS
and
vO   RF  i2   RF  iS
33
Voltage-to-Current Converter
Practical
circuit with
no terminal
grounded
𝑹𝑭
𝑽𝑰
𝒊𝑳 = −
𝑽𝑰 = −
𝑹𝟏 𝑹𝟑
𝑹𝟐
34
Determine a load current in a voltage-to-current
converter. Consider the circuit in Figure. Let ZL =
100 , R1 = 10 k, R2 = 1 k, R3 = 1 k, and RF = 10 k. If vI
= −5 V, determine the load current iL and the output
voltage vO.
35
© Dr. ANAS
Op-Amp Difference Amplifier
For the amplification of difference of
input signals
(b) vO1  
(c)
R2
vI 1
R1
 R  R4 
vI 2
vO 2  1  2 
 R1  R3  R4 
vO  vO1  vO 2
(a )
 R2  R4 
R
vI 2  2 vI 1
vO  1  
R1
 R1  R3  R4 
vO  0 for vI 2  vI 1
 R4

 R2  R3
1  
 R1  1  R4

R3



R
vO  2 vI 2  vI 1 
  R2 valid for R4  R2
R1
 R1
R3 R1

R

vO  4 vI 2  vI 1  𝑣𝑜 = 𝐴𝑑 𝑣𝑑
R3
36
Design the difference amplifier with the configuration
shown in Figure such that the differential gain is 30.
Standard valued resistors are to be used and the
maximum resistor value is to be 500 k
37
Example
Design a summer that has an output voltage given by
vO=1.5vs1-5vs2+0.1vs3
Solution 2:
© Dr. ANAS
Op-Amp Difference Amplifier
Problems:
1. Different input resistances Rin1≠ Rin2.
Rin1  R1
Rin 2  R3  R4
2. Small input resistances Rin1 and Rin2.
3. Two resistors must be changed simultaneously in order to alter the gain
Remember that
R4 R2

R3 R1
Question:
What is the Differential Input
Resistance?
39
Op-Amp Difference Amplifier input impedance
Rinput
ix
Define input impedance as
Rinput 
vx
ix
vx
ix
Using virtual short concept can
hence right a loop equation:
R
R
Remember that 4  2
R3 R1
Ex. R4  R2 , R3  R1
The Differential Input Resistance
vx  ix R1  ix R1  ix 2 R1 
Rinput 
Rinput  2 R1
40
Op-Amp Difference Amplifier input impedance
In the ideal difference amplifier, vo=0 for VI1=VI2 . However, for
R4 R2
and VI1=VI2 , the input is called Common-mode input signal

R3
R1
The Common-mode input voltage is defined as: vcm 
The Common-mode gain is defined as: Acm 
vo
vcm
vI 2  vI 1
2
ideally vo  0  Acm  0
A figure of merit for difference amplifier is the Common-mode rejection ratio
(CMRR) which is defined as:
CMRR 
ideally CMRR  
Ad
Acm
CMRRdB   20 log10
Ad
Acm
41
Op-Amp Difference Amplifier input impedance
𝑽𝒐 = 𝑨𝒅 𝒗𝒅 + 𝑨𝒄𝒎 𝒗𝒄𝒎
𝑣𝑑 = 𝑣𝐼2 − 𝑣𝐼1
𝒗𝑰𝟏
𝒗𝒅
= 𝒗𝒄𝒎 −
𝟐
vcm
𝒗𝑰𝟐
vI 2  vI 1

2
𝒗𝒅
= 𝒗𝒄𝒎 +
𝟐
Ad
CMRR 
Acm
CMRRdB   20 log10
Ad
Acm
Example: Calculate the common-mode rejection ratio of a difference amplifier. Let
R2/R1 = 10 and R4/R3 = 11.
 R  R4 
R
vI 2  2 vI 1
vO  1  2 
R1
 R1  R3  R4 
43
© Dr. ANAS
Op-amp Applications
44
© Dr. ANAS
Op-amp Applications
45
Op-amp Applications
Op-Amp Integrator
Av  
Z2
Z1
for Z1  R1 , and Z 2 
or
1
1
vO  
vI
SC2
R1SC2
dv
vI
 C2 O  0 
R1
dt
t
1
vO t   vO (0)  
v I d

R1C2 0
If the input is finite step function, the output will be a linear function of time
(ramp function) and will saturate at power supply voltage
vI
Example
Determine the time constant
required in an integrator. Consider
the integrator shown in Figure.
Assume that voltage VC across the
capacitor is zero at t = 0. A step
input voltage of vI = −1 V is applied at
t = 0. Determine the time constant
required such that the output
reaches +10 V at t = 1 ms.
47
Example
If v1 = 10 cos 2 t mV and v2 = 0.5 t mV,
find vo in the op amp circuit in Figure. Assume
that the voltage across the capacitor is initially
zero.
48
Op-amp Applications
Op-Amp Differentiator
Z
Av   2
Z1
for Z1 
1
, and Z 2  R2
SC1
vO   R2 SC1vI
or C1
dvI vO

0
dt R2
vO   R2C1
dvI
dt
Op-amp Applications
Log and Antilog Amplifiers
Log Amplifier
Antilog Amplifier

 vD   vI

iD  I s  exp   1 
 VT   R1

 v

vO  vD  VT ln I  1
 I s R1 

 vD    vO

iD  I s  exp   1 
R1
 VT  


v
vI  vD  vO   R1 I s  exp I
 VT

 
  1

 
Find output voltage if 𝐼𝑠 = 150 𝑛𝐴, 𝑣𝑖 = 2𝑉, 𝑎𝑛𝑑 𝑅1 = 100 𝑘Ω
𝑣𝑜 = −25𝑚𝑉 ln
2
= −0.122 𝑉
150𝑛 × 100𝑘
52
v1
log . Amp. ln v1 
Summer
v2
log . Amp. ln v2 
Amp.
ln v1  v2 
Antilog
Amp.
v1  v2
53
Solving a Differential Equation using Op-amp
𝑑 2 𝑉𝑜
𝑑𝑉𝑜
+
𝑃
+ 𝑄𝑉𝑜 = 𝑉𝑖
𝑑𝑡 2
𝑑𝑡
54
55
56
57
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