8086/8088MP
INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
Main Structural Component of a Computer System
The main elements associated with a computer system are as follows:
1.
Central Processing Unit (CPU)
2.
Main Memory
3.
Secondary Storage Devices
4.
Input and Output (I/O) Devices
5.
Busses
The Processor (CPU)
The CPU or processor acts as the controller of all actions or services provided
by the system. It is the Brain and the Heart of the Computer. The operations of
a CPU can be reduced into the following :
1. Fetch the next instruction from memory.
2. Decode the instruction.
3. Execute the instruction.
4. Store the result of the instruction into main memory.
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8086/8088MP
INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
In general, the CPU has three main units: (See the figure below)
 Arithmetic and Logic Unit (ALU): Performs arithmetic and logical
operations. For example, it can add together two binary numbers either
from memory or from some of the CPU registers.
 Control Unit: controls the action of the other computer components so
that instructions are executed in the correct sequence.
 Registers - Temporary storage inside CPU. Registers can be read and
written at high speed as they are inside the CPU.
2
8086/8088MP
INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
Memory
The memory in a computer system is of two fundamental types:
 Main Memory: used to store information for immediate access by the
CPU. Main Memory is also referred to as Primary Storage or Main Store.

Closely connected to the processor.

The contents are quickly and easily changed.

Stores the programs that the processor is actively working with.
Main memory includes:

Random Access memory (RAM): for temporary storage.

Read-only memory (ROM): for permanent storage.
 Secondary Storage Devices: devices provide permanent storage of large
amounts of data. Secondary storage is also called: secondary memory,
external memory. This storage may consist of magnetic tapes, magnetic
disk, optical memory device.
 Connected to main memory through the bus and a controller.
 The contents are easily changed, but this is very slow compared
main memory.
 Used for permanent storage of programs and data.
Input/Output Devices
Input/output devices provide an interface between the computer and the
user. There is at least one input device (e.g. keyboard, mouse, measuring device
such as a temperature sensor) and at least one output device (e.g. printer, screen,
control device such as an actuator). Input and output devices like keyboards and
printers, together with the external storage devices, are referred to as peripherals.
System Bus
There are three types of busses:
1. Address Buss: A unidirectional lines determine the size of memory
addressable by the processor.
2. Data Bus : A bi-directional lines indicate the size of the data transferred
between the processor and memory or I/O device.
3. Control Bus: consists of a set of control signals indicates the type of
action taking place on the system bus.
3
8086/8088MP
INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
Evolution of Intel Microprocessor
Intel (Integrate electronics) was the first corporation in manufacturing
Microprocessors starting with 4004µP to Pentium µP. Processor vary in their
speed, capacity of memory, register width, and address & data bus size, a brief
description of various Intel processor is explained in the table below.
Register
Width (bit)
Size of
Address Bus
Size of Data
Bus
µP
Memory Size
Clock Rate
4
12
4
4 Kbyte
0.2 MHz
4004
8
14
8
16 Kbyte
0.2 MHz
8008
8
16
8
64 Kbyte
2 MHz
8080
8
16
8
64 Kbyte
3 MHz
8085
16
20
16
1 Mbyte
5 MHz
8086
8
20
16
1 Mbyte
5 MHz
8088
‫) ال تىجد عملياث الضزب والقسمت ويبدأ وجىد هاتيه العمليتيه‬4004-8085( ‫في المعالجاث االربعت‬
0808µP ‫ لذلك يزبط معه‬integer numbers ‫ لكنه يتعامل مع االعداد الصحيحت فقط‬8086µP ‫في‬
floating numbers ‫الذي يتعامل مع االعداد الحقيقيت‬
16
28
16
1 Mbyte
6 MHz
80186
16
24
16
16 Mbyte
8 MHz
80286
floating numbers ‫ الذي يتعامل مع االعداد الحقيقيت‬08208µP ‫يزبط معه‬
32
32
32
4 Gbyte
16 MHz
80386
floating numbers ‫ الذي يتعامل مع االعداد الحقيقيت‬08308µP ‫يزبط معه‬
32
32
32
4 Gbyte + 8 Kbyte cache
50 MHz
80486
‫ لكنهما يصنعان‬، floating numbers ‫ الذي يتعامل مع االعداد الحقيقيت‬08408µP ‫يزبط معه‬
‫قطعت واحدة‬
32
32
4 Gbyte + 8 Kbyte cache
100 MHz
Pentium 64
64 Gbyte + 8K L1 cache
Pentium
64
36
32
180M Hz
+256K L2 cache
Pro
64 Gbyte + 32K L1 cache
233 - 450
Pentium
64
36
32
+512K L2 cache
MHz
II
64 Gbyte + 32K L1 cache
Pentium
64
36
32
1GHz
+512K L2 cache
III
64 Gbyte + 32K L1 cache
Pentium
64
36
32
1.3 GHz
+512K L2 cache
IV
4
8086/8088MP
INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
Intel's 8086 Microprocessor
The 8086µP is manufactured using High performance Metal-Oxide
Semiconductor (HMOS) technology. It has approximately 29000 transistors and
housed in a 40-pin package.
Internal Architecture of 8086µP
The architecture of 8086µP is shown in figure below . It has two separate
functional units : Bus Interface Unit (BIU) and Execution Unit (EU). The
8086µP architecture employs parallel processing—i.e., both the units (BIU and
EU) work at the same time. Parallel processing makes the fetch and execution of
instructions independent operations. This results in efficient use of the system
bus and higher performance for 8086µP systems.
 The BIU has segment registers, instruction pointer, address generation
and bus control logic block, instruction queue.
The main jobs performed by BIU are:
1. The BIU performs all bus operations such as instruction fetching,
reading and writing operands for memory and calculating the addresses
of the memory operands.
2. Input/output of data from/to input/output peripherals.
 The EU has general purpose registers, ALU, control unit, instruction
register, flags (or status) register.
The main jobs performed by the execution unit EU are:
1. Decoding/execution of instructions.
2. It accepts instructions from the instruction queue and data from the
general purpose registers or memory.
3. EU tests the status of flags in the control register and updates them
when executing instructions.
5
8086/8088MP
INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
Pipelining is a process that allows the CPU (Microprocessor) to fetch and
execute instructions at the same time. Intel Co. implemented the concept of
pipelining by splitting the internal architecture of the 8088/8086µP into two
units that works simultaneously:
Q: Explain the operations of instructions queue in BIU.
Ans. The instruction queue is 6-bytes in length, operates on FIFO (first-in firstout) basis. It receives the instruction codes from memory. BIU fetches the
instructions for the instructions queue from memory.
6
8086/8088MP
INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
Types of Buses in the 8086µP
A bus is a number of wires organized to provide a means of communication
among different elements in a microcomputer system. There are three types of
buses:
1. Address Bus : A 20-bit unidirectional lines used hold the address of a
memory location. The address bus allows the processor to access 1 Mbyte
of memory (Memory size = 220 =1048576 bytes = 1 Mbyte).
2. Data Bus : A 16-bit bidirectional lines used for transferring data between
the microprocessor and memory or the peripheral devices.
3. Control Bus : It contains lines that select the memory or I/O and cause
them to perform a read or write operation.
Internal Registers of 8086µP
There are fourteen 16-bit registers. The different groups are:
 The data group (general purpose registers) consists of AX (accumulator),
BX (base), CX (count) and DX (data).
 Pointer group consists of SP (Stack pointer), BP (Base pointer), IP
(Instruction pointer).
 Index group consists of SI (Source Index), and DI (Destination index).
 Segment group consists of CS (Code Segment), DS (Data Segment) ,
SS(Stack Segment) and ES (Extra Segment),.
 16-bit flags (status) register.
Figure below shows the registers placed in the different groups.
8
8086/8088MP
INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
General Purpose Data Registers
Figure below shows the four data registers with their dedicated functions.
15
87
0
Pointers and Index Group
The pointer registers are SP (Stack Pointer), BP (Base pointer) and IP
(Instruction Pointer) while the index registers are SI (Source Index) and DI
(Destination Index). All the five are 16-bit registers and are used to store offset
(effective address) of memory locations relative to segment registers.
Segment Registers : there are four segment registers, they are:
1. Code Segment (CS): The CS register is used for addressing a memory
location in the Code Segment of the memory, where the executable program
is stored.
2. Data Segment (DS): The DS contains most data used by program. Data are
accessed in the Data Segment by an offset address or the content of other
register that holds the offset address.
3. Stack Segment (SS): SS defines the area of memory used for the stack.
4. Extra Segment (ES): ES is additional data segment that is used by some of
the string instructions to hold the destination data.
0