Available online at www.sciencedirect.com
Physics Procedia 33 (2012) 1849 – 1855
2012 International Conference on Medical Physics and Biomedical Engineering
A Bandgap Reference Circuit with 2nd Order Curvature
Correction
Wei Kui, Jianyang Zhou
Department of Electronic Engineering Xiamen University Xiamen, China
360902247@qq.com
Abstract
A second-order compensated bandgap reference (BGR) based on a temperature dependent resistor ratio was proposed,
and the temperature characteristic of the BGR was optimized. A simulation based on NEC 2 m BiCMOS process
library shows that a temperature coefficient (TC) of 7.14 ppm/oC with a range from 50 to 130 oC and a reference
output of 1.167V at 25 oC and 5V power supply were obtained. The power supply rejection ratio (PSRR) was 92 dB
at low frequency in this circuit With power supply varying between from 3 to 12 V, the variation of the reference
output was less than 2.4 mV.
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Keywords: Bandgap reference; Curvature compensation; Temperature coefficient
1. Introduction
The reference voltage is required to be stabilized over supply voltage and temperature variations.Since
introduced by Widlar[1], the BGR has been used extensively to make on-chip voltage references in A/D
and D/A converters, voltage regulators, and measurement systems for their high accuracy and temperature
independence. However, the BGR after a first-order temperature compensation[2], which exhibits a
temperature coefficient(TC) typically between 20 and 100 ppm/oC for a temperature range of -55 to
125°C [3-4], has a limitation to improve its TC due to the nonlinear TC in base-emitter voltage of the
bipolar junction transistor (BJT) used in the BGR. In order to overcome this drawback, a variety of multiorder temperature compensation methods have been developed, such as quadratic temperature
compensation[5-6], resistor with opposite TC[7], exponential temperature compensation[8], piecewise
linear curvature correction[9-10], and generating a nonlinear current to compensate the nonlinear VBE of
BJT [11]. Due to these techniques, the temperature stability of the BGRs has been optimized obliviously.
1875-3892 © 2012 Published by Elsevier B.V. Selection and/or peer review under responsibility of ICMPBE International Committee.
Open access under CC BY-NC-ND license. doi:10.1016/j.phpro.2012.05.294
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Wei Kui and Jianyang Zhou / Physics Procedia 33 (2012) 1849 – 1855
The above BGR structures, however, require precision matching of current mirror or complex
compensation circuit, and all these take up a large area of chips. In this paper, a curvature compensated
BGR based on temperature dependent resistor ratio was proposed by using a high TC well-resistor to
implement the 2nd-order temperature compensation. This BGR could provide a reference voltage of
1.167V in the temperature range from -50 oC to 130 oC and take up a small area in chip with a relatively
simple structure .
2. Principle of First-Order Compensated BGR
Conventionally, the BGR voltage is a weighted sum of a negative TC voltage and a positive TC
voltage. One is the base-emitter voltage VBE of the forward biased BJT with a TC of about -1.8 mV/oC,
which can be expressed as
VBE (T ) Vg 0 (1
T
T
kT
T0
) VBE 0 ( ) ( m 1)
ln( )
T0
T0
q
T
(1)
where Vg0 is the bandgap voltage of Silicon at 0 K, m is a temperature constant related to the process,
k is Boltzmann’s constant, q is the charge of an electron, and T0 is the reference temperature VBE0 is
VBE at reference temperature[12]. Therefore, VBE is a complex function of T, including a higher order
term such as TlnT. The other term is from thermal voltage VT (VT =kT/q), which is proportional to the
absolute temperature (PTAT) and a full linear function of T, and VT has a positive TC about +0.086
mV/oC. Therefore, the first-order temperature compensated BGR is a weighted sum of VBE and VT.
As we know, two BJTs operate at different current densities, and then the difference between their
base-emitter voltages is PTAT [1]. Two BJTs forward-biased with an emitter junction area ratio of n are
biased at identical collector currents IC I0, and the base currents is neglected. Then we have
VBE
VBE1 VBE 2
V BE
VT ln
I0
A JS
VT ln
I0
nA J S
VT ln n
(3)
where A and JS are the emitter area and saturation current density, respectively [13] Thus,
exhibits a positive TC,
VBE
T
(2)
k
ln n
q
VBE
(4)
In order to obtain a larger positive TC voltage, VBE must be scaled up by a weighted factor. We set
this factor to be a ratio of two resistors, i.e., R1/R2, and then the value of BGR is
Vref
VBE
R1
R2
VBE
(5)
In order to obtain a nominally zero TC of the BGR, we have to change the value of R1/R2 to adjust the
position of the zero TC point and get different values of the BGR voltage Vref. From Eq.(1), VBE as the
function of T includes the non-linear term TlnT, and the first-order compensation can only cancel the
linear term about T in VBE. Therefore, even in the optimal first-order compensation the linear term in
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Wei Kui and Jianyang Zhou / Physics Procedia 33 (2012) 1849 – 1855
VBE is fully cancelled. Then, we have
Vref
Vg 0
(m 1)
kT
T
ln( )
q
T0
(6)
Eq.(6) shows that the output of Vref will descend with temperature, and this is an inherent drawback.
Therefore, it is difficult to enhance the temperature stability of the first-order compensated BGR in large
scale.
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3. Proposed BGR with Temperature Compensation
The whole schematic of BGR proposed in this paper is shown in Fig.1.
3.1 BGR generated
Q1 and Q2 have an emitter area ratio of 10. We can obtain VBE from their bases, across R1, then
produces a PTAT current flowing through R2, R3 (R2= R3), R4, and R7. Here R2, R3 , and R4 are thin
film resistors with low TC, and they almost behave temperature independent, while R7 is a well diffused
resistor with a high TC up to 6500 ppm/oC. The voltage drop across R3 and R4 plus VBE1 make up of
Vref:
Vref
VBE1
VT ln10
2 R4
R1
R7
R3
(7)
3.2 Mirror current source
M1-M3 and M8-M10 make up of a current mirror (shown in Fig.1). It makes the collector currents of
Q3 and Q4 accurately equal, and thereby makes the voltages at node X and Y accurately equal and keep
the currents across R2 and R3 equal. The drain-source voltages(VDS) of M1 to M3, and M8 to M10 vary
with power supply in a range from 3 to 12 V, but their gate-source voltages (VGS) keep constant, so do
the currents across R2 and R3 . This enhances the power supply independence of the BGR’s output and
M4 and M5 can stabilize the output of the BGR.
3.3 Start up circuit
Q6, Q7, M6, M7, and R6 make up of the start up circuit (shown in Fig.1). Along with the increasing of
the power supply VDD Q6, Q7, M6, and M7 will be in operation. Since the initial potential of node B is
low enough, Q5 will be turned on. Then Q5 will immit a small current into nodes A and B, respectively,
to make the current mirror and BGR generated circuit turn on. As a result, the whole circuit turns on.
3.4 Temperature compensation
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Wei Kui and Jianyang Zhou / Physics Procedia 33 (2012) 1849 – 1855
As mentioned before, R7 is a temperature dependent resistor and its nominal values are modulated by
temperature deviations from 25oC:
R7
1
T
T0
R0
(8)
where
is the first-order TC of R7, T0 =25 oC, and R0 is the value of R7 at 25 oC.
The polynomial expansion of the term TlnT is approximate with a T2 term. When a non-linear resistor
with a positive TC is multiplied into a voltage by a PTAT current, the result is a function of T containing
T2 term. Thereby, cancelation of TlnT in VBE is achieved by adding a PTAT resistance in series with tail
VBE
resistor R4 to generate T2 term.
The generated T2 term will reduce the value of T increasing along with temperature, which is
caused by the nonlinear TlnT term in VBE, thus, the descendant trend of Vref is suppressed and this
bends the right-hand side bow upward.
Fig.1 Complete schematic of the proposed BGR
4. Simulation Result
The temperature behavior of the BGR output without curvature corrected (R7 is also a thin film resistor)
is shown in Fig.2. The effective TC is about 40.46 ppm/ oC.
The temperature behavior of the BGR output with curvature corrected is shown in Fig.3. The curve
compensated bends the right-hand side bow upward at about 80oC, and the effective TC is obviously
improved (only7.14ppm/oC), compared with the BGR without curvature compensation.
The relations between BGR output Vref and power supply VDD is shown in Fig.4. One can see that
the output of the BGR has a variation less than 2.4 mV with VDD in the range from 3 to 12 V.
Fig.5 shows the power supply rejection ratio (PSRR) characteristic of the BGR output with a frequency
range from 10 mHz to 1GHz. The PSRR is about 92 dB in low frequency and not less than 40 dB even in
high frequency.
Wei Kui and Jianyang Zhou / Physics Procedia 33 (2012) 1849 – 1855
Fig.2 BGR output (without curvature corrected) vs. temperature(oC)
Fig.3 BGR ourput (with curvature corrected) vs. temperature(oC)
Fig.4 BGR output vs. Power supply VDD (V)
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Fig.5 BGR output PSRR vs. frequency
5. Conclusion
A curvature compensated BGR based on temperature dependent resistor ratio is proposed in this paper.
This BGR provides a reference voltage of 1.167 V with the temperature range from -50oC to 130 oC. The
effective TC of the temperature behavior of the BGR output without curvature the BGR circuit is 7.14
ppm/oC at 5V power supply. The variation in the output voltage of the BGR is less than 2.4 mV with a
power supply range from 3 to 12V. The PSRR of BGR proposed is about 92 dB in low frequency and not
less than 40dB even in high frequency with a frequency range from 10 mHz to 1GHz.
The BGR proposed in this paper has a similar temperature range to that in [7]. The performance of
about 2 ppm/oC can be simulated in theory, but the real circuit devices in different process library limit
the actual performance of BGR to about 7 ppm/oC in this paper and makes the simulation result is inferior
to the TC of 5.3 ppm/oC in [7]. However, the BGR circuit in this paper has a relatively simple structure
and takes up smaller area of chips than the one in [7]. The only disadvantage is that the cost of high
resistive ploy resistor used in compensation is relatively higher.
References
[1]
Pease R A, “The design of band-gap reference circuits: trials and tribulations,”Proc. IEEE 1990 Bipolar Circuits and
[2]
Tsividis Y P, Ulmer R W, “A CMOS voltage reference,” IEEE J. Solid -State Circuits, vol. 13, Jan. 2003, pp. 774-778,
[3]
Rincon-Mora G A, “Voltage References: from diodes to precision high-order bandgap circuits,” IEEE Circuits and
[4]
Paul R, Patra A, “A temperature compensated bandgap voltage reference circuit for high precision applications,” Proc.
[5]
Song B S, Gray P R, “A precision curvature compensated CMOS bandgap reference ”IEEE International Journal of
[6]
Zhou Z K, Ming X, Zhang B, et al. “A high-order curvature-compensated CMOS bandgap reference,” Proc. ICCCAS
Technology Meeting, IEEE Press, Sept. 1990, pp. 214-218, doi: 10.1109/BIPOL.1990.171166
doi: 10.1109/JSSC.1978.1052049
Devices Magazine, vol 5, 2002, pp. 45-45, doi: 10.1109/MCD.2002.1035357.
Proceedings of the IEEE INDICON 2004, Dec. 2004, pp. 553–556, doi: 10.1109/INDICO.2004.1497820.
Solid-State Circuits, vol 6, Dec. 1983, pp. 634-643,doi: 10.1109/JSSC.1983.1052013 .
2009 International Conference on Communications, Circuits and System, Milpitas, CA.IEEE Press, July. 2009, pp. 652656,doi: 10.1109/ICCCAS.2009.5250436.
Wei Kui and Jianyang Zhou / Physics Procedia 33 (2012) 1849 – 1855
[7]
Leung K N, Mok P K T, Leung C Y, “A 2-V 23- A 5.3-ppm/°C 4th-order curvature-compensated CMOS bandgap
reference,” Proc. Proceedings of the IEEE CustomIntegrated Circuits Conference 2002, IEEE Press, May. 2002, pp. 457 –
460.
[8]
Lee I, Kim G, Kim W. “Exponential curvature compensated BiCMOS bandgap references,” IEEE J. Solid-State Circuits,
[9]
Gunawan M, Meijer G C M, Fonderie J, et al., “A curvature-corrected low-voltage bandgap voltage reference”. IEEE
vol 11, Nov, 1994, pp: 1396-1403.
J.Solid-State Circuits, vol 6, Jun, 1993, pp: 667–670.
[10] Rincon-Mora G A, Allen P E. “A 1.1-V current mode and piecewise linear curvature corrected bandgap reference,” IEEE
J. Solid-State Circuits, vol 10, Oct, 1998, pp: 1551-1554.
[11] Malcovati P, Maloberti F, Pruzzi M, et al. “Curvature compensated BICMOS bandgap with 1V supply voltage,” IEEE J.
Solid-State Circuits, vol 7, July, 2001, pp. 1076-1081.
[12] Brugler J S. “Silicon transistor biasing for linear collector current temperature dependence,” IEEE J. Solid-State Circuits,
vol 2, Jun, 1967, pp. 57-58.
[13] Razavi B. “Design of analog CMOS integrated circuits,” Translated by Chen G C. Xi’An Jiaotong University Press, 2002
(in Chinese).
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