Instructor’s Resource Manual
to accompany
Electronic Devices
Eighth Edition
Thomas L. Floyd
Upper Saddle River, New Jersey
Columbus, Ohio
i
__________________________________________________________________________________
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Instructors of classes using Floyd, Electronic Devices, Eighth Edition, may reproduce material from the instructor’s
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10 9 8 7 6 5 4 3 2 1
ii
ISBN-13: 978-0-13-242992-4
ISBN-10:
0-13-242992-6
Contents
Solutions for End-of-Chapter Problems
Chapter 1
Chapter 2
Chapter 3
Chapter 4
Chapter 5
Chapter 6
Chapter 7
Chapter 8
Chapter 9
Chapter 10
Chapter 11
Chapter 12
Chapter 13
Chapter 14
Chapter 15
Chapter 16
Chapter 17
Chapter 18
1
4
16
25
35
48
63
72
85
93
105
112
124
132
139
145
150
156
Application Activity Results
163
Summary of Multisim Circuit Files by Gary Snyder
185
Solutions Manual to Laboratory Exercises for Electronic Devices
205
Test Item File
275
iii
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iv
Chapter 1
Introduction to Semiconductors
Section 1-1 Atomic Structure
1.
An atom with an atomic number of 6 has 6 electrons and 6 protons.
2.
The third shell of an atom can have 2n2 = 2(3)2 = 18 electrons.
Section 1-2 Insulators, Conductors, and Semiconductors
3.
The materials represented in Figure 1−39 in the textbook are
(a)
insulator
(b)
semiconductor
4.
An atom with four valence electrons is a semiconductor.
5.
In a silicon crystal, each atom forms four covalent bonds.
(c)
conductor
Section 1-3 Current in Semiconductors
6.
When heat is added to silicon, more free electrons and holes are produced.
7.
Current is produced in silicon at the conduction band and the valence band.
Section 1-4 N-Type and P-Type Semiconductors
8.
Doping is the carefully controlled addition of trivalent or pentavalent atoms to pure (intrinsic)
semiconductor material for the purpose of increasing the number of majority carriers (free
electrons or holes).
9.
Antimony is a pentavalent (donor) material used for doping to increase free electrons. Boron
is a trivalent (acceptor) material used for doping to increase the holes.
Section 1-5 The Diode
10.
The electric field across the pn junction of a diode is created by donor atoms in the n region
losing free electrons to acceptor atoms in the p region. This creates positive ions in the
n region near the junction and negative ions in the p region near the junction. A field is then
established between the ions.
11.
The barrier potential of a diode represents an energy gradient that must be overcome by
conduction electrons and produces a voltage drop, not a source of energy.
1
Chapter 1
Section 1-6 Biasing a Diode
12.
To forward-bias a diode, the positive terminal of a voltage source must be connected to the
p region.
13.
A series resistor is needed to limit the current through a forward-biased diode to a value that
will not damage the diode because the diode itself has very little resistance.
Section 1-7 Voltage-Current Characteristic of a Diode
14.
To generate the forward bias portion of the characteristic curve, connect a voltage source
across the diode for forward bias and place an ammeter in series with the diode and a
voltmeter across the diode. Slowly increase the voltage from zero and plot the forward
voltage versus the current.
15.
A temperature increase would cause the barrier potential of a silicon diode to decrease from
0.7 V to 0.6 V.
Section 1-8 Diode Models
16.
(a) The diode is reverse-biased.
(c) The diode is forward-biased.
17.
(a)
(b)
(c)
(d)
VR = 5 V − 8 V = −3 V
VF = 0.7 V
VF = 0.7 V
VF = 0.7 V
18.
(a)
(b)
(c)
(d)
VR = 5 V − 8 V = −3 V
VF = 0 V
VF = 0 V
VF = 0 V
19.
Ignoring rR′ :
(a) VR ≅ 5 V − 8 V = −3 V
(b) The diode is forward-biased.
(d) The diode is forward-biased.
100 V − 0.7 V
= 174 mA
560 Ω + 10 Ω
VF = IF rd′ + VB = (174 mA)(10 Ω) + 0.7 V = 2.44 V
(b) IF =
B
30 V
30 V
=
= 6.19 mA
4.85 kΩ
Rtot
6.19 mA
IF =
= 3.1 mA
2
VF = IF rd′ + 0.7 V = (3.1 mA)(10 Ω) + 0.7 V = 0.731 V
(c) Itot =
2
Chapter 1
(d) Approximately all of the current from the 20 V source is through the diode. No current
from the 10 V source is through the diode.
20 V − 0.7 V
IF =
= 1.92 mA
10 kΩ + 10 Ω
VF = (1.92 mA)(10 Ω) + 0.7 V = 0.719 V
Section 1-9 Testing a Diode
Since VD = 25 V = 0.5VS, the diode is open.
The diode is forward-biased but since VD = 15 V = VS, the diode is open.
The diode is reverse-biased but since VR = 2.5 V = 0.5VS, the diode is shorted.
The diode is reverse-biased and VR = 0 V. The diode is operating properly.
20.
(a)
(b)
(c)
(d)
21.
VA = VS1 = +25 V
VB = VS1 − 0.7 V = 25 V − 0.7 V = +24.3 V
VC = VS2 + 0.7 V = 8 V + 0.7 V = +8.7 V
VD = VS2 = +8.0 V
B
Multisim Troubleshooting Problems
The solutions showing instrument connections for problems 22 through 30 are available from the
Instructor Resource Center. The faults in the circuit files may be accessed using the password book
(all lowercase).
To access supplementary materials online, instructors need to request an instructor access code. Go to
www.prenhall.com, click the Instructor Resource Center link, and then click Register Today for
an instructor access code. Within 48 hours after registering, you will receive a confirming e-mail that
includes an instructor access code. Once you have received your code, go to the site and log on for
full instructions on downloading the materials you wish to use.
22.
Diode shorted
23.
Diode open
24.
Diode open
25.
Diode shorted
26.
No fault
27.
Diode shorted
28.
Diode leaky
29.
Diode open
30.
Diode shorted
3
Chapter 2
Diode Applications
Section 2-1 Half-Wave Rectifiers
1.
See Figure 2-1.
Figure 2-1
2.
(a) PIV = V p = 5 V
3.
VAVG =
4.
(a) I F =
Vp
=
π
(b) I F =
200 V
π
(b) PIV = V p = 50 V
= 63.7 V
V( p )in − 0.7 V
R
V( p )in − 0.7 V
R
=
5 V − 0.7 V 4.3 V
=
= 91.5 mA
47 Ω
47 Ω
=
50 V − 0.7 V 49.3 V
=
= 14.9 mA
3.3 kΩ
3.3 kΩ
5.
Vsec = nV pri = (0.2)120 V = 24 V rms
6.
Vsec = nV pri = (0.5)120 V = 60 V rms
Vp(sec) = 1.414(60 V) = 84.8 V
V p ( sec ) 84.8 V
Vavg ( sec ) =
=
= 27.0 V
PL ( p )
(V
=
PL ( avg )
π
p ( sec )
π
− 0.7 V )
RL
(V
=
avg ( sec )
RL
)
2
=
2
=
(84.1 V) 2
= 32.1 W
220 Ω
(27.0 V) 2
= 3.31 W
220 Ω
4
Chapter 2
Section 2-2 Full-Wave Rectifiers
7.
(a) VAVG =
Vp
(b) VAVG =
(c) VAVG =
(d) VAVG =
8.
=
π
2V p
π
2V p
π
2V p
π
5V
π
=
= 1.59 V
2(100 V)
π
= 63.7 V
+ 10 V =
2(10 V)
π
+ 10 V = 16.4 V
− 15 V =
2( 40 V)
− 15 V = 10.5 V
π
(a) Center-tapped full-wave rectifier
(b) Vp(sec) = (0.25)(1.414)120 V = 42.4 V
V p ( sec ) 42.4 V
=
(c)
= 21.2 V
2
2
(d) See Figure 2-2. VRL = 21.2 V − 0.7 V = 20.5 V
Figure 2-2
V p ( sec )
− 0.7 V
2
(e) IF =
RL
=
20.5 V
= 20.5 mA
1.0 kΩ
(f) PIV = 21.2 V + 20.5 V = 41.7 V
9.
VAVG =
VAVG =
120 V
= 60 V for each half
2
Vp
π
Vp = πVAVG = π(60 V) = 186 V
10.
See Figure 2-3.
Figure 2-3
5
Chapter 2
π VAVG ( out )
=
π (50 V)
11.
PIV = Vp =
12.
PIV = Vp(out) = 1.414(20 V) = 28.3 V
13.
See Figure 2-4.
2
2
= 78.5 V
Figure 2-4
Section 2-3 Power Supply Filters and Regulators
14.
Vr(pp) = 0.5 V
Vr ( pp ) 0.5 V
=
= 0.00667
r=
VDC
75 V
15.
Vr(pp) =
V p (in )
fR L C
=
30 V
= 8.33 V pp
(120 Hz)(600 Ω)(50 μF)
⎛
⎛
⎞
1 ⎞
1
⎟⎟V p (in ) = ⎜⎜1 −
⎟⎟30 V = 25.8 V
VDC = ⎜⎜1 −
⎝ (240 Hz)(600 Ω)(50 μF) ⎠
⎝ 2 fRLC ⎠
16.
17.
⎛ Vr ( pp ) ⎞
8.33 V ⎞
⎟100 = ⎛⎜
%r = ⎜⎜
⎟100 = 32.3%
⎟
⎝ 25.8 V ⎠
⎝ VDC ⎠
Vr(pp) = (0.01)(18 V) = 180 mV
⎛ 1 ⎞
⎟⎟V p (in )
Vr(pp) = ⎜⎜
⎝ fRLC ⎠
⎛ 1
C = ⎜⎜
⎝ fRLVr
18.
Vr ( pp ) =
⎞
⎛
⎞
1
⎟⎟V p (in ) = ⎜⎜
⎟⎟18 V = 556 μF
⎝ (120 Hz)(1.5 kΩ)(180 mV) ⎠
⎠
V p (in )
fRL C
=
80 V
= 6.67 V
(120 Hz)(10 kΩ)(10 μF)
⎛
⎛
⎞
1 ⎞
1
⎟⎟V p (in ) = ⎜⎜1 −
⎟⎟80 V = 76.7 V
VDC = ⎜⎜1 −
⎝ (240 Hz)(10 kΩ)(10 μF) ⎠
⎝ 2 fRLC ⎠
Vr ( pp ) 6.67 V
=
= 0.087
r=
VDC
76.7 V
6
Chapter 2
19.
V p (sec ) = (1.414)(36 V) = 50.9 V
Vr(rect) = Vp(sec) − 1.4 V = 50.9 V − 1.4 V = 49.5 V
⎛ 1 ⎞
⎛
⎞
1
Neglecting Rsurge, Vr(pp) = ⎜
⎟V p ( rect ) = ⎜
⎟ 49.5 V = 1.25 V
⎝ (120 Hz)(3.3 kΩ)(100 μ F) ⎠
⎝ fRL C ⎠
V
⎛
1 ⎞
⎟⎟V p ( rect ) = V p ( rect ) − r ( pp ) = 49.5 V − 0.625 V = 48.9 V
VDC = ⎜⎜1 −
2
⎝ 2 fRLC ⎠
20.
Vp(sec) = 1.414(36 V) = 50.9 V
See Figure 2-5.
Figure 2-5
21.
⎛ V − VFL ⎞
⎛ 15.5 V − 14.9 V ⎞
⎟⎟100% = ⎜
Load regulation = ⎜⎜ NL
⎟100% = 4%
14.9 V
⎝
⎠
⎝ VFL ⎠
22.
VFL = VNL − (0.005)VNL = 12 V − (0.005)12 V = 11.94 V
Section 2-4 Diode Limiting and Clamping Circuits
23.
See Figure 2-6.
Figure 2-6
7
Chapter 2
24.
Apply Kirchhoff’s law at the peak of the positive half cycle:
(b) 25 V = VR1 + VR2 + 0.7 V
2VR = 24.3 V
24.3 V
VR =
= 12.15 V
2
Vout = VR + 0.7 V = 12.15 V + 0.7 V = 12.85 V
See Figure 2-7(a).
11.3 V
= 5.65 V
2
Vout = VR + 0.7 V = 5.65 V + 0.7 V = 6.35 V
See Figure 2-7(b).
(c) VR =
4.3 V
= 2.15 V
2
Vout = VR + 0.7 V = 2.15 V + 0.7 V = 2.85 V
See Figure 2-7(c).
(d) VR =
Figure 2-7
8
Chapter 2
25.
See Figure 2-8.
Figure 2-8
26.
See Figure 2-9.
Figure 2-9
27.
See Figure 2-10.
Figure 2-10
28.
30 V − 0.7 V
= 13.3 mA
2.2 kΩ
(b) Same as (a).
(a) I p =
9
Chapter 2
30 V − (12 V + 0.7 V)
= 7.86 mA
2.2 kΩ
30 V − (12 V − 0.7 V)
(b) I p =
= 8.5 mA
2.2 kΩ
30 V − (−11.3 V)
= 18.8 mA
(c) I p =
2.2 kΩ
30 V − (−12.7 V)
(d) I p =
= 19.4 mA
2.2 kΩ
29.
(a) I p =
30.
See Figure 2-11.
Figure 2-11
31.
(a) A sine wave with a positive peak at 0.7 V, a negative peak at −7.3 V, and a dc value of
−3.3 V.
(b) A sine wave with a positive peak at 29.3 V, a negative peak at −0.7 V, and a dc value of
+14.3 V.
(c) A square wave varying from +0.7 V to −15.3 V with a dc value of −7.3 V.
(d) A square wave varying from +1.3 V to −0.7 V with a dc value of +0.3 V.
32.
(a)
(b)
(c)
(d)
A sine wave varying from −0.7 V to +7.3 V with a dc value of +3.3 V.
A sine wave varying from −29.3 V to +7.3 V with a dc value of +14.3 V.
A square wave varying from −0.7 V to +15.3 V with a dc value of +7.3 V.
A square wave varying from −1.3 V to +0.7 V with a dc value of −0.3 V.
Section 2-5 Voltage Multipliers
33.
VOUT = 2Vp(in) = 2(1.414)(20 V) = 56.6 V
See Figure 2-12.
Figure 2-12
10
Chapter 2
34.
VOUT(trip) = 3Vp(in) = 3(1.414)(20 V) = 84.8 V
VOUT(quad) = 4Vp(in) = 4(1.414)(20 V) = 113 V
See Figure 2-13.
Figure 2-13
Section 2-6 The Diode Datasheet
35.
The PIV is specified as the peak repetitive reverse voltage = 100 V.
36.
The PIV is specified as the peak repetitive reverse voltage = 1000 V.
37.
IF(AVG) = 1.0 A
50 V
RL(min) =
= 50 Ω
1.0 A
Section 2-7 Troubleshooting
38.
If a bridge rectifier diode opens, the output becomes a half-wave voltage resulting in an
increased ripple at 60 Hz.
39.
Vavg =
2V p
π
=
2(115 V)(1.414)
π
≅ 104 V
The output of the bridge is correct. However, the 0 V output from the filter indicates that the
surge resistor is open or that the capacitor is shorted.
40.
(a)
(b)
(c)
(d)
Correct
Incorrect. Open diode.
Correct
Incorrect. Open diode.
11
Chapter 2
41.
120 V
= 24 V rms
5
Vp(sec) = 1.414(24 V) = 33.9 V
The peak voltage for each half of the secondary is
V p ( sec ) 33.9 V
= 17 V
=
2
2
The peak inverse voltage for each diode is PIV = 2(17 V) + 0.7 V = 34.7 V
The peak current through each diode is
V p ( sec )
− 0.7 V
17.0 V − 0.7 V
Ip = 2
= 49.4 mA
=
RL
330 Ω
The diode ratings exceed the actual PIV and peak current.
The circuit should not fail.
Vsec =
Application Activity Problems
42.
(a)
(b)
(c)
(d)
(e)
(f)
Not plugged into ac outlet or no ac available at outlet. Check plug and/or breaker.
Open transformer winding or open fuse. Check transformer and/or fuse.
Incorrect transformer installed. Replace.
Leaky filter capacitor. Replace.
Rectifier faulty. Replace.
Rectifier faulty. Replace.
43.
The rectifier must be connected backwards.
44.
−16 V with 60 Hz ripple
Advanced Problems
45.
46.
⎛ 1 ⎞
⎟⎟V p (in )
Vr = ⎜⎜
⎝ fRLC ⎠
⎛ 1 ⎞
⎞
⎛
1
⎟⎟V p (in ) = ⎜⎜
⎟⎟35 V = 177 μF
C = ⎜⎜
⎝ (120 Hz)(3.3 kΩ)(0.5 V) ⎠
⎝ fRLVr ⎠
⎛
1 ⎞
⎟⎟V p (in )
VDC = ⎜⎜1 −
⎝ 2 fRLC ⎠
⎛
VDC
1 ⎞
⎟
= ⎜⎜1 −
V p (in ) ⎝ 2 fRLC ⎟⎠
1
V
= 1 − DC
2 fRLC
V p (in )
1
⎛
V ⎞
2 fRL ⎜1 − DC ⎟
⎜ V p (in ) ⎟
⎝
⎠
=C
12
Chapter 2
1
1
=
= 62.2 μF
(240 Hz)(1.0 kΩ)(1 − 0.933) (240 Hz)(1.0 kΩ)(0.067)
Then
⎛ 1 ⎞
⎛
⎞
1
Vr = ⎜
⎟V p ( in ) = ⎜
⎟15 V = 2 V
⎝ (120 Hz)(1.0 kΩ)(62.2 μ F) ⎠
⎝ fRL C ⎠
C=
47.
The capacitor input voltage is
Vp(in) = (1.414)(24 V) − 1.4 V = 32.5 V
V p (in ) 32.5 V
Rsurge =
=
= 651 mΩ
I surge
50 A
The nearest standard value is 680 mΩ.
48.
See Figure 2-14.
The voltage at point A with respect to ground is
VA = 1.414(9 V) = 12.7 V
Therefore,
VB = 12.7 V − 0.7 V = 12 V
Vr = 0.05VB = 0.05(12 V) = 0.6 V peak to peak
⎛ 1 ⎞
⎛
⎞
1
⎟⎟VB = ⎜⎜
⎟⎟12 V = 245 μF
C = ⎜⎜
⎝ (120 Hz)(680 Ω)(0.6 V) ⎠
⎝ fRLVr ⎠
B
B
The nearest standard value is 270 μF.
Let Rsurge = 1.0 Ω.
12 V
Isurge(max) =
= 12 A
1.0 Ω
12 V
= 17.6 mA
IF(AV) =
680 Ω
PIV = 2Vp(out) + 0.7 V = 24.7 V
Figure 2-14
13
Chapter 2
49.
See Figure 2-15.
IL(max) = 100 mA
9V
RL =
= 90 Ω
100 mA
Vr = 1.414(0.25 V) = 0.354 V
Vr = 2(0.35 V) = 0.71 V peak to peak
⎞
⎛
1
⎟⎟9 V
Vr = ⎜⎜
⎝ (120 Hz)(90 Ω)C ⎠
9V
= 1174 μF
(120 Hz)(90 Ω)(0.71 V)
Use C = 1200 μF.
Each half of the supply uses identical components. 1N4001 diodes are feasible since the
average current is (0.318)(100 mA) = 31.8 mA.
Rsurge = 1.0 Ω will limit the surge current to an acceptable value.
C=
Figure 2-15
50.
See Figure 2-16.
Figure 2-16
51.
VC1 = (1.414)(120 V) − 0.7 V = 170 V
VC2 = 2(1.414)(120 V) − 2(0.7 V) = 338 V
14
Chapter 2
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 52 through 60 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
52.
Diode shorted
53.
Diode leaky
54.
Diode open
55.
Bottom diode open
56.
Reduced transformer turns ratio
57.
Open filter capacitor
58.
Diode leaky
59.
D1 open
60.
Load resistor open
15
Chapter 3
Special-Purpose Diodes
Section 3-1 The Zener Diode
1.
See Figure 3-1.
Figure 3-1
2.
IZK ≅ 3 mA
VZ ≅ −9 V
3.
ZZ =
4.
ΔIZ = 50 mA − 25 mA = 25 mA
ΔVZ = ΔIZZZ = (+25 mA)(15 Ω) = +0.375 V
VZ = VZ + ΔVZ = 4.7 V + 0.375 V = 5.08 V
5.
ΔT = 70°C − 25°C = 45°C
(6.8 V)(0.0004/ °C)
= 6.8 C + 0.12 V = 6.92 V
VZ = 6.8 V +
45°C
ΔVZ
5.65 V − 5.6 V
0.05 V
=5Ω
=
=
ΔI Z
30 mA − 20 mA 10 mA
Section 3-2 Zener Diode Applications
6.
VIN(min) = VZ + IZKR = 14 V + (1.5 mA)(560 Ω) = 14.8 V
7.
ΔVZ = (IZ − IZK)ZZ = (28.5 mA)(20 Ω) = 0.57 V
VOUT = VZ − ΔVZ = 14 V − 0.57 V = 13.43 V
VIN(min) = IZKR + VOUT = (1.5 mA)(560 Ω) + 13.43 V = 14.3 V
8.
ΔVZ = IZZZ = (40 mA − 30 mA)(30 Ω) = 0.3 V
VZ = 12 V + ΔVZ = 12 V + 0.3 V = 12.3 V
V −VZ 18 V − 12.3 V
= 143 Ω
R = IN
=
40 mA
40 mA
16
Chapter 3
9.
VZ ≅ 12 V + 0.3 V = 12.3 V
See Figure 3-2.
Figure 3-2
10.
VZ(min) = VZ − ΔIZZZ = 5.1 V − (49 mA − 1 mA)(7 Ω)
= 5.1 V − (48 mA)(7 Ω) = 5.1 V − 0.336 V = 4.76 V
VR = 8 V − 4.76 V = 3.24 V
V
3.24 V
= 147 mA
IT = R =
R
22 Ω
IL(max) = 147 mA − 1 mA = 146 mA
VZ(max) = 5.1 V + (70 mA − 49 mA)(7 Ω) = 5.1 V + 147 mV = 5.25 V
VR = 8 V − 5.25 V = 2.75 V
2.75 V
= 125 mA
IT =
22 Ω
IL(min) = 125 mA − 70 mA = 55 mA
11.
% Load regulation =
12.
With no load and VIN = 6 V:
V − VZ 6 V − 5.1 V
=
= 31 mA
IZ ≅ IN
29 Ω
R + ZZ
VOUT = VZ − ΔIZZZ = 5.1 V − (49 mA − 31 mA)(7 Ω) = 5.1 V − 0.126 V = 4.97 V
With no load and VIN = 12 V:
V − VZ 12 V − 5.1 V
=
= 238 mA
IZ ≅ IN
29 Ω
R + ZZ
VOUT = VZ + ΔIZZZ = 5.1 V + (238 mA − 49 mA)(7 Ω) = 5.1 V + 1.32 V = 6.42 V
ΔVOUT
6.42 V − 4.97 V
× 100% =
% Line regulation =
× 100% = 24.2%
12 V − 6 V
ΔVIN
13.
% Load regulation =
VNL − VFL
8.23 V − 7.98 V
× 100% =
× 100% = 3.13%
VFL
7.98 V
14.
% Line regulation =
ΔVOUT
0.2 V
× 100% =
× 100% = 4%
ΔVIN
10 V − 5 V
15.
% Load regulation =
VNL − VFL
3.6 V − 3.4 V
× 100% = 5.88%
× 100% =
VFL
3.4 V
VZ(max) − VZ(min)
VZ(min)
× 100% =
17
5.25 V − 4.76 V
× 100% = 10.3%
4.76 V
Chapter 3
Section 3-3 The Varactor Diode
16.
At 5 V, C = 20 pF
At 20 V, C = 10 pF
ΔC = 20 pF − 10 pF = 10 pF (decrease)
17.
From the graph, VR = 3 V @ 25 pF
18.
fr =
1
2π LCT
1
1
= 12.7 pF
=
2
2
4π Lf r
4π ( 2 mH)(1 MHz)2
Since they are in series, each varactor must have a capacitance of 2CT = 25.4 pF
CT =
19.
2
Each varactor has a capacitance of 25.4 pF. Therefore, from the graph, VR must be slightly
less than 3 V.
Section 3-4 Optical Diodes
24 V
= 35.3 mA
680 Ω
From the graph, the radiant power is approximately 80 mW.
20.
IF =
21.
See Figure 3-3.
5 V − 2.1 V
R=
= 97 Ω
30 mA
The nearest standard 1% value is 97.6 Ω or the nearest standard 5% value is 91 Ω.
Figure 3-3
18
Chapter 3
22.
VF ≅ 2.2 V for IF = 20 mA
Maximum LEDs/branch =
9V
≅ 4
2.2 V
Select 3 LEDs/branch:
48
= 16
3
9 V − 3(2.2 V)
= 120 Ω
RLIMIT =
20 mA
Use sixteen 120 Ω resistors.
Number of branches =
23.
VF ≅ 2.5 V for IF = 30 mA
Maximum LEDs/branch =
24 V
≅ 9.6
2.5 V
Select 5 LEDs/branch:
100
= 20
5
24 V − 5(2.5 V)
RLIMIT =
= 383 Ω
30 mA
See Figure 3-4.
Number of branches =
Figure 3-4
24.
IR =
10 V
= 50 μA
200 kΩ
19
Chapter 3
25.
26.
(a) R =
VS
3V
=
= 30 kΩ
I 100 μA
(b) R =
3V
VS
=
= 8.57 kΩ
350 μA
I
(c) R =
3V
VS
=
= 5.88 kΩ
510 μA
I
The microammeter reading will increase.
Section 3-5 Other Types of Diodes
ΔV
125 mV − 200 mV
− 75 mV
=
=
= −750 Ω
ΔI
0.25 mA − 0.15 mA 0.10 mA
27.
R=
28.
Tunnel diodes are used in oscillators.
29.
The reflective ends cause the light to bounce back and forth, thus increasing the intensity of
the light. The partially reflective end allows a portion of the reflected light to be emitted.
Section 3-6 Troubleshooting
30.
(a)
(b)
(c)
(d)
(e)
All voltages are correct.
V3 should be 12 V. Zener is open.
V1 should be 120 V. Fuse is open.
Capacitor C1 is open.
R is open or D5 is shorted.
31.
(a)
(b)
(c)
(d)
(e)
(f)
(g)
(h)
With D5 open, VOUT ≅ 30 V.
With R open, VOUT = 0 V.
With C leaky, VOUT has excessive 120 Hz ripple limited to 12 V.
With C open, VOUT is full wave rectified voltage limited to 12 V.
With D3 open, VOUT has 60 Hz ripple limited to 12 V.
With D2 open, VOUT has 60 Hz ripple limited to 12 V.
With T open, VOUT = 0 V.
With F open, VOUT = 0 V.
Application Activity Problems
32.
(a) Faulty regulator
33.
Incorrect transformer secondary voltage
34.
LED open, limiting resistor open, faulty regulator, faulty bridge rectifier
35.
IL =
12 V
= 12 mA; Vreg = 16 V − 12 V = 4 V
1 kΩ
Preg = (4 V)(12 mA) = 48 mW
20
Chapter 3
Datasheet Problems
36.
From the datasheet of textbook Figure 3-7:
(a) @ 25°C: PD(max) = 1.0 W for a 1N4738A
(b) For a 1N4751A:
@ 70°C; PD(max) = 1.0 W − (6.67 mW/°C)(20°C) = 1.0 W − 133 mW = 867 mW
@ 100°C; PD(max) = 1.0 W − (6.67 mW/°C)(50°C) = 1.0 W − 333 mW = 667 mW
(c) IZK = 0.5 mA for a 1N4738A
(d) @ 25°C: IZM = 1 W/27 V = 37.0 mA for a 1N4750A
(e) ΔZZ = 700 Ω − 7.0 Ω = 693 Ω for a 1N4740A
37.
From the datasheet of textbook Figure 3-24:
(a) IF(max) = 200 mA
(b) Cmax = 11 pF
C
100 pF
= 15.4 pF; range is 100 pF − 15.4 pF for an 836A.
(c) C20 = 2 =
CR
6.5
38.
From the datasheet of textbook 3-34:
(a) 9 V cannot be applied in reverse across a TSMF1000 because VR(max) = 5 V.
(b) When 5.1 V is used to forward-bias the TSMF1000 for IF = 20 mA, VF ≅ 1.3 V
5.1 V − 1.3 V 3.8 V
=
= 190 Ω
R=
20 mA
20 mA
(c) At 25°C maximum power dissipation is 190 mW.
If VF = 1.5 V and IF = 50 mA, PD = 75 mW. The power rating is not exceeded.
(d) For IF = 40 mA, radiant intensity is approximately 0.9 mW/sr.
(e) For IF = 100 mA and θ = 20°, radiant intensity is 40% of maximum or (0.4)(25 mW/sr)
= 10 mW/sr
39.
From the datasheet of textbook Figure 3-47:
(a) With no incident light and a 10 kΩ series resistor, the typical voltage across the resistor is
approximately VR = (1 nA)(1 kΩ) = 1 μV.
(b) Reverse current is greatest at about 940 nm.
(c) Sensitivity is maximum for λ ≅ 830 nm.
21
Chapter 3
Advanced Problems
40.
See Figure 3-5.
Figure 3-5
41.
VOUT(1) ≅ 6.8 V, VOUT(2) ≅ 24 V
42.
For a 10 kΩ load on each output:
V
6.8 V
IOUT(1) = OUT1 ≅
= 0.68 mA
R1
10 kΩ
V
24 V
IOUT(2) = OUT2 ≅
= 2.4 mA
10 kΩ
R2
VR1 ≅ 120 V − 6.8 V = 113.2 V
113.2 V
− 0.68 mA = 112.5 mA
IZ1 =
1 kΩ
VR2 ≅ 120 V − 24 V = 96 V
96 V
IZ2 =
− 2.4 mA = 93.6 mA
1 kΩ
IT = 0.68 mA + 2.4 mA + 112.5 mA + 93.6 mA = 209.2 mA
The fuse rating should be 250 mA or 1/4 A.
43.
See Figure 3-6.
Use a 1N4738A zener.
IT = 35 mA + 31 mA = 66 mA
24 V − 8.2 V
R=
= 239 Ω
66 mA
Figure 3-6
22
Chapter 3
1
1
= 2
= 103.4 pF
2
4π Lf min 4π (2 mH)(350 kHz) 2
1
1
= 2
Cmin =
= 17.5 pF
2
2
4π Lf max 4π (2 mH)(850 kHz) 2
To achieve this capacitance range, use an 826A varactor and change V2 to 30 V.
44.
Cmax =
45.
See Figure 3-7. From datasheet, VF = 2.1 V for red LED.
R=
2
VD 12 V − 2.1 V
=
= 495 Ω
I
20 mA
Use standard value of 510 Ω.
Figure 3-7
46.
See Figure 3-8.
Figure 3-8
23
Chapter 3
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 47 through 50 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
47.
Zener diode open
48.
Capacitor open
49.
Zener diode shorted
50.
Resistor open
24
Chapter 4
Bipolar Junction Transistors
Section 4-1 BJT Structure
1.
Majority carriers in the base region of an npn transistor are holes.
2.
Because of the narrow base region, the minority carriers invading the base region find a
limited number of partners for recombination and, therefore, move across the junction into
the collector region rather than out of the base lead.
Section 4-2 Basic BJT Operation
3.
The base is narrow and lightly doped so that a small recombination (base) current is
generated compared to the collector current.
4.
IB = 0.02IE = 0.02(30 mA) = 0.6 mA
IC = IE − IB = 30 mA − 0.6 mA = 29.4 mA
B
B
5.
The base must be negative with respect to the collector and positive with respect to the
emitter.
6.
IC = IE − IB = 5.34 mA − 475 μA = 4.87 mA
B
Section 4-3 BJT Characteristics and Parameters
7.
αDC =
I C 8.23 mA
=
= 0.947
I E 8.69 mA
8.
βDC =
25 mA
IC
=
= 125
I B 200 μA
9.
IB = IE − IC = 20.5 mA − 20.3 mA = 0.2 mA = 200 μA
I
20.3 mA
βDC = C =
= 101.5
I B 200 μ A
10.
IE = IC + IB = 5.35 mA + 50 μA = 5.40 mA
5.35 mA
I
αDC = C =
= 0.99
I E 5.40 mA
11.
IC = αDCIE = 0.96(9.35 mA) = 8.98 mA
B
B
25
Chapter 4
VRC
5V
= 5 mA
RC 1.0 kΩ
5 mA
I
βDC = C =
= 100
I B 50 μA
12.
IC =
13.
αDC =
14.
IB =
=
β DC
β DC + 1
=
100
= 0.99
101
VBB − VBE 3 V − 0.7 V
=
= 23 μA
RB
100 kΩ
IC = βDCIB = 200(23 μA) = 4.6 mA
IE = IC + IB = 4.6 mA + 23 μA = 4.62 mA
VCE = VCC − ICRC = 10 V − (4.6 mA)(1.0 kΩ) = 5.4 V
B
B
B
15.
IC = does not change.
For VCC = 10 V:
VCE = VCC = ICRC = 10 V − (4.6 mA)(1.0 kΩ) = 5.4 V
For VCC = 15 V:
VCE = 15 V − (4.6 mA)(1.0 kΩ) = 10.7 V
Δ VCE = 10.7 V − 5.4 V = 5.3 V increase
16.
IB =
VBB − VBE 4 V − 0.7 V
3.3 V
=
=
= 702 μA
RB
4.7 kΩ
4.7 kΩ
V − VCE 24 V − 8 V
=
IC = CC
= 34 mA
RC
470 Ω
IE = IC + IB = 34 mA + 702 μA = 34.7 mA
34 mA
I
βDC = C =
= 48.4
I B 702 μA
B
B
17.
(a) VBE = 0.7 V
V −V
4.3 V
IB = BB BE =
= 1.1 mA
RB
3.9 kΩ
IC = βDCIB = 50(1.1 mA) = 55 mA
VCE = VCC − ICRC = 15 V − (55 mA)(180 Ω) = 5.10 V
VCB = VCE − VBE = 5.10 V − 0.7 V = 4.40 V
B
B
(b) VBE = −0.7 V
V −V
− 3 V − (−0.7 V) − 2.3 V
=
IB = BB BE =
= −85.2 μA
RB
27 kΩ
27 kΩ
IC = βDCIB = 125(−85.2 μA) = −10.7 mA
VCE = VCC − ICRC = −8 V − (−10.7 mA)(390 Ω) = −3.83 V
VCB = VCE − VBE = −3.83 V − (−0.7 V) = −3.13 V
B
B
26
Chapter 4
18.
VCC
15 V
=
= 83.3 mA
RC 180 Ω
V −V
5 V − 0.7 V
IB = BB BE =
= 1.1 mA
RB
3.9 kΩ
IC = βDCIB = 50(1.1 mA) = 55 mA
IC < IC(sat)
Therefore, the transistor is not saturated.
(a) IC(sat) =
B
B
VCC
8V
=
= 20.5 mA
RC 390 Ω
V − VBE 3 V − 0.7 V
=
IB = BB
= 85.2 μA
RB
27 kΩ
IC = βDCIB = 125(85.2 μA) = 10.7 mA
IC < IC(sat)
Therefore, the transistor is not saturated.
(b) IC(sat) =
B
B
19.
VB = 2 V
VE = VB − VBE = 2 V − 0.7 V = 1.3 V
V
1.3 V
IE = E =
= 1.3 mA
RE 1.0 kΩ
IC = αDCIE = (0.98)(1.3 mA) = 1.27 mA
α DC
0.98
=
βDC =
= 49
1 − α DC 1 − 0.98
IB = IE − IC = 1.3 mA − 1.27 mA = 30 μA
B
B
B
20.
(a) VB = VBB = 10 V
VC = VCC = 20 V
VE = VB − VBE = 10 V − 0.7 V = 9.3 V
VCE = VC − VE = 20 V − 9.3 V = 10.7 V
VBE = 0.7 V
VCB = VC − VB = 20 V − 10 V = 10 V
B
B
B
(b) VB = VBB = −4 V
VC = VCC = −12 V
VE = VB − VBE = −4 V − (−0.7 V) = −3.3 V
VCE = VC − VE = −12 V − (−3.3) V = −8.7 V
VBE = −0.7 V
VCB = VC − VB = −12 V − (−4 V) = −8 V
B
B
B
27
Chapter 4
21.
For βDC = 100:
V − VBE 10 V − 0.7 V
=
IE = B
= 930 μA
RE
10 kΩ
100
β DC
=
αDC =
= 0.990
1 + β DC 101
IC = αDCIE = (0.990)(930 μA) = 921 μA
For βDC = 150:
IE = 930 μA
β DC
150
=
= 0.993
1 + β DC 151
IC = αDCIE = (0.993)(930 μA) = 924 μA
ΔIC = 924 μA − 0.921 μA = 3 μA
αDC =
22.
PD(max) = VCEIC
PD(max) 1.2 W
= 24 V
VCE(max) =
=
50 mA
IC
23.
PD(max) = 0.5 W − (75°C)(1 mW/°C) = 0.5 W − 75 mW = 425 mW
Section 4-4 The BJT as an Amplifier
24.
Vout = AvVin = 50(100 mV) = 5 V
25.
Av =
26.
27.
Vout
10 V
=
= 33.3
Vin
300 mV
RC 560 Ω
=
= 56
re′
10 Ω
Vc = Vout = AvVin = 56(50 mV) = 2.8 V
Av =
VBB − VBE 2.5 V − 0.7 V
=
= 18 μA
RB
100 kΩ
IC = βDC IB = 250(18 μA) = 4.5 mA
V − VCE 9 V − 4 V
=
RC = CC
= 1.1 kΩ
IC
4.5 mA
IB =
B
B
28.
(a) DC current gain = βDC = 50
(b) DC current gain = βDC = 125
28
Chapter 4
Section 4-5 The BJT as a Switch
29.
VCC
5V
=
= 500 μA
RC 10 kΩ
I C(sat) 500 μA
IB(min) =
=
= 3.33 μA
β DC
150
VIN(min) − 0.7 V
IB(min) =
RB
RBIB(min) = VIN(min) − 0.7 V
VIN(min) = RBIB(min) + 0.7 V = (3.33 μA)(1.0 MΩ) + 0.7 V = 4.03 V
IC(sat) =
B
B
30.
15 V
= 12.5 mA
1.2 kΩ
I C(sat) 12.5 mA
IB(min) =
=
= 250 μA
β DC
50
V − 0 .7 V
4.3 V
RB(min) = IN
=
= 17.2 kΩ
I B(min)
250 μA
VIN(cutoff) = 0 V
IC(sat) =
Section 4-6 The Phototransistor
31.
IC = βDCIλ = (200)(100 μA) = 20 mA
32.
Iλ = (50 lm/m2)(1 μA/lm/m2) = 50 μA
IE = βDCIλ = (100)(50 μA) = 5 mA
33.
Iout = (0.30)(100 mA) = 30 mA
34.
I OUT
= 0.6
I IN
I
10 mA
= 16.7 mA
IIN = OUT =
0.6
0.6
Section 4-7 Transistor Categories and Packaging
35.
See Figure 4-1.
36.
(a)
(b)
(c)
(d)
(e)
Figure 4-1
Small-signal
Power
Power
Small-signal
RF
29
Chapter 4
Section 4-8 Troubleshooting
37.
With the positive probe on the emitter and the negative probe on the base, the ohmmeter
indicates an open, since this reverse-biases the base-emitter junction. With the positive probe
on the base and the negative probe on the emitter, the ohmmeter indicates a very low
resistance, since this forward-biases the base-collector junction.
38.
(a)
(b)
(c)
(d)
39.
(a) IB =
Transistor’s collector junction or terminal is open.
Collector resistor is open.
Operating properly.
Transistor’s base junction or terminal open (no base or collector current).
5 V − 0.7 V
= 63.2 μA
68 kΩ
9 V − 3.2 V
IC =
= 1.76 mA
3.3 kΩ
1.76 mA
I
βDC = C =
= 27.8
I B 63.2 μA
B
4.5 V − 0.7 V
= 141 μA
27 kΩ
24 V − 16.8 V
= 15.3 mA
IC =
470 Ω
15.3 mA
I
βDC = C =
= 109
I B 141 μA
(b) IB =
B
Application Activity Problems
40.
Q1 OFF, Q2 ON
IR2 = 0, PR2 = 0 mW
IR1 = 0, PR2 = 0 mW
12 V − 0.7 V
IR3 = IR4 =
= 304 μA
1.2 kΩ + 36 kΩ
PR3 = (304 μA)2(1.2 kΩ) = 110 μW
PR4 = (304 μA)2(36 kΩ) = 3.3 mW
12 V − 0.176 V
= 19 mA
IR5 =
620 Ω
PR5 = (19 mA)2(620 Ω) = 224 mW
30
Chapter 4
Q1 ON, Q2 OFF
12 V − 0.7 V
IR2 =
= 151 μA
75 kΩ
PR2 = (151 μA)2(75 kΩ) = 1.7 mW
(0.7 V)2
PR1 =
= 0.49 μW
1.0 MΩ
12 V − 0.1 V
IR4 ≅
= 9.9 mA
1.2 kΩ
PR4 = (9.9 mA)2(1.2 kΩ) = 118 mW
IR3 ≅ 0, PR3 = 0 mW
IR5 = 0, PR5 = 0 mW
41.
IC(max) = 200 mA
V
12 V
= 60 Ω
RL(min) = CC =
I C(max) 200 mA
42.
See Figure 4-2.
Figure 4-2
Datasheet Problems
43.
From the datasheet of textbook Figure 4-20:
(a) For a 2N3904, VCEO(max) = 40 V
(b) For a 2N3904, IC(max) = 200 mA
(c) For a 2N3904 @ 25°C, PD(max) = 625 mW
(d) For a 2N3904 @ TC = 50°C, PD(max) = 625 mW − 5 mW/°C(25°C)
= 625 mW − 125 mW = 500 mW
(e) For a 2N3904 with IC = 1 mA, hFE(min) = 70
31
Chapter 4
44.
For an MMBT3904 with TA = 65°C:
PD(max) = 350 mW − (65°C − 25°C)(2.8 mW/°C)
= 350 mW − 40°C(2.8 mW/°C) = 350 mW − 112 mW = 238 mW
45.
For a PZT3904 with TC = 45°C:
PD(max) = 1 W − (45°C − 25°C)(8 mW/°C)
= 1 W − 20°C(8 mW/°C) = 1 W − 160 mW = 840 mW
46.
For the circuits of textbook Figure 4-66:
3 V − 0.7 V 2.3 V
=
(a) IB =
= 6.97 mA
330 Ω
330 Ω
Let hFE = 30
IC = 30(6.97 mA) = 209 mA
VCC − VCE(sat) 30 V − 0.2 V
IC(sat) =
= 110 mA
=
RC
270 Ω
The transistor is saturated since IC cannot exceed 110 mA.
PD = (0.2 V)(110 mA) = 22 mW
At 50°C, PD(max) = 350 mW − (50°C − 25°C)(2.8 mW/°C) = 280 mW
No parameter is exceeded.
B
(b) VCEO = 45 V which exceeds VCEO(max).
47.
For the circuits of textbook Figure 4-67:
5 V − 0.7 V 4.3 V
=
= 4.30 μA
(a) IB =
10 kΩ
10 kΩ
hFE(max) = 300
IC = 300(4.30 μA) = 129 mA
9V
= 9 mA
IC(sat) =
1.0 kΩ
The transistor is saturated.
B
3 V − 0.7 V
2.3 V
=
= 23 μA
100 kΩ
100 kΩ
hFE(max) = 300
IC = 300(23 μA) = 6.90 mA
12 V
= 21.4 mA
IC(sat) =
560 Ω
The transistor is not saturated.
(b) IB =
B
48.
IB(min) =
IB(max) =
IC
hFE(max)
IC
hFE(min)
=
10 mA
= 66.7 μA
150
=
10 mA
= 200 μA
50
32
Chapter 4
49.
For the circuits of textbook Figure 4-69:
8 V − 0.7 V 7.3 V
=
(a) IB =
= 107 μA
68 kΩ
68 kΩ
hFE = 150
IC = 150(107 μA) = 16.1 mA
VC = 15 V − (16.1 mA)(680 Ω) = 15 V − 10.95 V = 4.05 V
VCE = 4.05 V − 0.7 V = 3.35 V
PD = (3.35 V)(16.1 mA) = 53.9 mW
At 40°C, PD(max) = 360 mW − (40°C − 25°C)(2.06 mW/°C) = 329 mW
No parameters are exceeded.
B
5 V − 0.7 V
4.3 V
=
= 915 μA
4.7 kΩ
4.7 kΩ
hFE = 300
IC = 300(915 μA) = 274 mA
35 V − 0.3 V
= 73.8 mA
IC(sat) ≅
470 Ω
The transistor is in hard saturation. Assuming VCE(sat) = 0.3 V,
PD = (0.3 V)(73.8 mA) = 22.1 mW
No parameters are exceeded.
(b) IB =
B
Advanced Problems
α DC
1 − α DC
βDC − βDCαDC = αDC
βDC = αDC(1 + βDC)
β DC
αDC =
(1 + β DC )
50.
βDC =
51.
IC = 150(500 μA) = 75 mA
VCE = 15 V − (180 Ω)(75 mA) = 1.5 V
Since VCE(sat) = 0.3 V @ IC = 50 mA, the transistor comes out of saturation.
52.
From the datasheet, βDC(min) = 15 (for IC = 100 mA)
150 mA
IB(max) =
= 10 mA
15
3 V − 0.7 V
2.3 V
=
= 230 Ω
RB(min) =
10 mA
10 mA
Use the standard value of 240 Ω for RB.
To avoid saturation, the load resistance cannot exceed about
9 V −1 V
= 53.3 Ω
150 mA
See Figure 4-3.
B
Figure 4-3
33
Chapter 4
53.
Since IB = 10 mA for IC = 150 mA,
9 V − 0.7 V 8.3 V
=
RB(min) =
= 830 Ω
10 mA
10 mA
Use 910 Ω. The load cannot exceed 53.3 Ω.
See Figure 4-4.
B
Figure 4-4
54.
RC(min) = Av re′ = 50(8 Ω) = 400 Ω (Use 430 Ω)
12 V − 5 V
= 16.3 mA
IC =
430 Ω
Assuming hFE = 100,
16.3 mA
= 163 μA
IB =
100
4 V − 0.7 V
= 20.3 kΩ (Use 18 kΩ)
RB(max) =
163 μA
See Figure 4-5.
B
Figure 4-5
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 55 through 62 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
55.
RB shorted
56.
RC open
57.
Collector-emitter shorted
58.
Collector-emitter open
59.
RE leaky
60.
Collector-emitter shorted
61.
RB open
62.
RC open
B
B
34
Chapter 5
Transistor Bias Circuits
Section 5-1 The DC Operating Point
1.
The transistor is biased too close to saturation.
2.
IC = βDCIB = 75(150 μA) = 11.3 mA
VCE = VCC − ICRC = 18 V − (11.3 mA)(1.0 kΩ) = 18 V − 11.3 V = 6.75 V
Q-point: VCEQ = 6.75 V, ICQ = 11.3 mA
3.
IC(sat) ≅
4.
VCE(cutoff) = 18 V
5.
Horizontal intercept (cutoff):
VCE = VCC = 20 V
Vertical intercept (saturation):
V
20 V
IC(sat) = CC =
2 mA
RC 10 kΩ
6.
B
VCC
18 V
=
= 18 mA
RC 1.0 kΩ
VBB − 0.7 V
RB
VBB = IBRB + 0.7 V = (20 μA)(1.0 MΩ) + 0.7 V = 20.7 V
IC = βDCIB = 50(20 μA) = 1 mA
VCE = VCC − ICRC = 20 V − (1 mA)(10 kΩ) = 10 V
IB =
B
B
B
B
7.
See Figure 5-1.
VCE = VCC − ICRC
V − VCE 10 V − 4 V
=
RC = CC
= 1.2 kΩ
5 mA
IC
I
5 mA
= 0.05 mA
IB = C =
β DC
100
10 V − 0.7 V
= 186 kΩ
RB =
0.05 mA
PD(min) = VCEIC = (4 V)(5 mA) = 20 mW
B
B
Figure 5-1
35
Chapter 5
8.
VBB − VBE 1.5 V − 0.7 V
=
= 80 μA
RB
10 kΩ
V
8V
IC(sat) = CC =
= 20.5 mA
RC 390 Ω
IC = βDCIB = 75(80 μA) = 6 mA
The transistor is biased in the linear region because
0 < IC < IC(sat).
IB =
B
B
9.
(a) IC(sat) = 50 mA
(b) VCE(cutoff) = 10 V
(c) IB = 250 μA
IC = 25 mA
VCE = 5 V
B
10.
(a) IC ≅ 42 mA
(b) Interpolating between IB = 400 μA and IB = 500 μA
IB ≅ 450 μA
(c) VCE ≅ 1.5 V
See Figure 5-2.
B
B
B
Figure 5-2
Section 5-2 Voltage-Divider Bias
11.
βDC(min)RE = 10R2
10 R2
47 kΩ
βDC(min) =
=
= 69.1
RE
680 Ω
12.
IC(sat) =
VCC
15 V
=
= 6.88 mA
RC + RE 2.18 kΩ
VE(sat) = IC(sat)RE = (6.88 mA)(680 Ω) = 4.68 V
VB = VE(sat) + 0.7 V = 4.68 V + 0.7 V = 5.38 V
⎛ R2 β DC RE ⎞
⎜
⎟ 15 V = 5.38 V
⎜R +R β R ⎟
1
2
DC
E
⎝
⎠
B
36
Chapter 5
(R2
(R2
(R2
R2
β DC RE ) (15 V) = (5.38 V) (R1 + R2 β DC RE )
β DC RE ) (15 V) − (R2 β DC RE ) (5.38 V) = R1(5.38 V)
β DC RE ) (15 V − 5.38 V) = (22 kΩ)(5.38 V)
(22 kΩ)(5.38 V)
β DC RE =
= 12.3 kΩ
15 V − 5.38 V
1
1
+
=
β DC RE 12.3 kΩ
1
1
+
=
102 kΩ 12.3 kΩ
1
R2
1
R2
1
= 71.5 μS
R2
R2 = 14 kΩ
13.
14.
⎛ R2 ⎞
2 kΩ ⎞
⎟⎟VCC = ⎛⎜
VB = ⎜⎜
⎟ 15 V = 1.25 V
⎝ 24 kΩ ⎠
⎝ R1 + R2 ⎠
VE = 1.25 V − 0.7 V = 0.55 V
V
0.55 V
IE = E =
= 809 μA
RE 680 Ω
IC ≅ 809 μA
VCE = VCC − ICRC − VE = 15 V − (809 μA)(1.5 kΩ + 680 Ω) = 13.2 V
B
⎛ R2 β DC RE ⎞
⎛
⎞
15 kΩ (110)(1.0 kΩ)
⎟ VCC = ⎜
⎟9 V = 1.97 V
VB = ⎜
⎜R +R β R ⎟
⎜ 47 kΩ + 15 kΩ (110)(1.0 kΩ) ⎟
2
DC E ⎠
⎝ 1
⎝
⎠
VE = VB − 0.7 V = 1.97 V − 0.7 V = 1.27 V
V
1.27 V
IC ≅ IE = E =
= 1.27 mA
RE 1.0 kΩ
VC = VCC − ICRC = 9 V − (1.27 mA)(2.2 kΩ) = 6.21 V
B
B
15.
See Figure 5-3.
Figure 5-3
16.
(a) RIN(base) = βDCRE = 150(560 Ω) = 84 kΩ
⎛
⎞
5.6 kΩ 84 kΩ
⎛ 5.25 kΩ ⎞
(−12 V) = ⎜
VB = ⎜
⎟ (−12 V) = −1.65 V
⎜ 33 kΩ + 5.6 kΩ 84 kΩ ⎟⎟
⎝ 38.25 kΩ ⎠
⎝
⎠
(b) RIN(base) = 50(560 Ω) = 28 kΩ
⎛
⎞
5.6 kΩ 28 kΩ
⎛ 4.67 kΩ ⎞
(−12 V) = ⎜
VB = ⎜
⎟ (−12 V) = −1.49 V
⎜ 33 kΩ + 56 kΩ 28 kΩ ⎟⎟
⎝ 37.7 kΩ ⎠
⎝
⎠
B
B
37
Chapter 5
17.
(a) VEQ = VB + 0.7 V = −1.49 V + 0.7 V = −0.79 V
V
−0.79 V
ICQ ≅ IE = E =
= −1.41 mA
RE
560 Ω
VCQ = VCC − ICRC = −12 V − (−1.41 mA)(1.8 kΩ) = −9.46 V
VCEQ = VCQ − VEQ = −9.46 V − (−0.79 V) = −8.67 V
(b) PD(min) = ICQVCEQ = (−1.41 mA)(−8.67 V) = 12.2 mW
18.
VB = −1.65 V
B
I1 =
VCC − VB −12 V − (1.65 V)
= 314 μA
=
R1
33 kΩ
VB −1.65 V
= 295 μA
=
R2
5.6 kΩ
I B = I1 − I2 = 19 μA
I2 =
Section 5-3 Other Bias Methods
19.
Using Equation 5-7:
−VEE − VBE
4.3 V
−(−5 V) − 0.7 V
=
=
IE =
= 1.86 mA
RE + RB / β DC 2.2 kΩ + 10 kΩ /100 2.2 kΩ + 0.1 kΩ
IC ≅ IE = 1.86 mA
I
1.86 mA
IB = C ≅
= 18.6 μA
100
β
VB = −IBRB = (18.6 μA)(10 kΩ) = −0.186 V
VE = VB − 0.7 V = −0.186 − 0.7 V = −0.886 V
VC = VCC − ICRC = 5 V − (1.86 mA)(1.0 kΩ) = 3.14 V
B
B
B
B
B
20.
Assume VCE ≅ 0 V at saturation.
VE = −0.886 V
so VC(sat) = −0.886
VCC − VC(sat) 5 V − (−0.886 V)
IC(sat) =
= 5.89 mA
=
RC
1.0 kΩ
V
4.11 V
= 698 Ω
RE(min) = RE =
I C(sat) 5.89 mA
21.
At 100°C:
VBE = 0.7 V − (2.5 mV/°C)(75°C) = 0.513 V
−VEE − VBE
4.49 V
−(−5 V) − 0.513 V
=
=
IE =
= 1.95 mA
RE + RB / β DC 2.2 kΩ + 10 kΩ /100 2.3 kΩ
At 25°C:
I E = 1.86 mA (from problem 19)
ΔI E = 1.95 mA − 1.86 mA = 0.09 mA
38
Chapter 5
22.
A change in βDC does not affect the circuit when RE >>RB/βDC.
Since
VEE − VBE
IE =
RE + RB / β DC
In the equation, if RB/βDC is much smaller than RE, the effect of βDC is negligible.
B
B
23.
Assume βDC = 100.
VEE − VE
10 V − 0.7 V
=
= 16.3 mA
IC ≅ IE =
RE + RB / β 470 Ω + 10 kΩ /100
VCE = VEE − VCC − IC(RC + RE) = 20 V − 13.1 V = −6.95 V
24.
VB = 0.7 V
VCC − VBE
3 V − 0.7 V
=
IC =
= 1.06 mA
RC + RB / β DC 1.8 kΩ + 33 kΩ / 90
VC = VCC − ICRC = 3 V − (1.06 mA)(1.8 kΩ) = 1.09 V
25.
IC = 1.06 mA from Problem 24.
IC = 1.06 mA − (0.25)(1.06 mA) = 0.795 mA
VCC − VBE
IC =
RC + RB / β DC
V − VBE − I C RB / β DC 3 V − 0.7 V − (0.795 mA)(33 kΩ) / 90
=
= 2.53 kΩ
RC = CC
IC
0.795 mA
26.
IC = 0.795 mA from Problem 25.
VCE = VCC − ICRC = 3 V − (0.795 mA)(2.53 kΩ) = 0.989 V
PD(min) = VCEIC = (0.989 V)(0.795 mA) = 786 μW
27.
See Figure 5-4.
VCC − VBE
12 V − 0.7 V
=
= 7.87 mA
IC =
RC + RB / β DC 1.2 kΩ + 47 kΩ / 200
VC = VCC − ICRC = 12 V − (7.87 mA)(1.2 kΩ) = 2.56 V
B
Figure 5-4
28.
VBB = VCC; VE = 0 V
V − 0.7 V 12 V − 0.7 V 11.3 V
=
=
IB = CC
= 514 μA
RB
22 kΩ
22 kΩ
IC = βDCIB = 90(514 μA) = 46.3 mA
VCE = VCC − ICRC = 12 V − (46.3 mA)(100 Ω) = 7.37 V
B
B
39
Chapter 5
29.
ICQ = 180(514 μA) = 92.5 mA
VCEQ = 12 V − (92.5 mA)(100 Ω) = 2.75 V
30.
IC changes in the circuit with a common VCC and VBB supply because a change in VCC causes
IB to change which, in turn, changes IC.
B
31.
VBB − VBE 9 V − 0.7 V
=
= 553 μA
RB
15 kΩ
V
9V
= 90 mA
IC(sat) = CC =
RC 100 Ω
For βDC = 50:
IC = βDCIB = 50(553 μA) = 27.7 mA
VCE = VCC − ICRC = 9 V − (27.7 mA)(100 Ω) = 6.23 V
For βDC = 125:
IC = βDCIB = 125(553 μA) = 69.2 mA
VCE = VCC − ICRC = 9 V − (69.2 mA)(100 Ω) = 2.08 V
Since IC < IC(sat) for the range of βDC, the circuit remains biased in the linear region.
IB =
B
B
B
32.
IC(sat) =
VCC
9V
=
= 90 mA
RC 100 Ω
At 0°C:
βDC = 110 − 110(0.5) = 55
V − VBE 9 V − 0.7 V
=
IB = CC
= 553 μA
RB
15 kΩ
IC = βDCIB = 55(553 μA) = 30.4 mA
B
B
VCE = VCC − ICRC = 9 V − (30.4 mA)(100 Ω) = 5.96 V
At 70°C:
βDC = 110 + 110(0.75) = 193
IB = 553 μA
IC = βDCIB = 193(553 μA) = 107 mA
IC > IC(sat), therefore the transistor is in saturation at 70°C.
ΔIC = IC(sat) − IC(0°) = 90 mA − 30.4 mA = 59.6 mA
ΔVCE ≅ VCE(0°) − VCE(sat) = 5.96 V − 0 V = 5.96 V
B
B
Section 5-4 Troubleshooting
33.
The transistor is off; therefore, V1 = 0 V, V2 = 0 V, V3 = 8 V.
34.
V1 = 0.7 V,
V2 = 0 V
8 V − 0.7 V 0.7 V
−
IB =
= 221 μA − 70 μA = 151 μA
33 kΩ
10 kΩ
IC = 200(151 μA) = 30.2 mA
8V
= 3.64 mA, so VC ≅ VE = 0 V
IC(sat) =
2.2 kΩ
B
40
Chapter 5
If the problem is corrected,
10 kΩ
⎛
⎞
V1 = ⎜
⎟ 8 V = 1.86 V
⎝ 10 kΩ + 33 kΩ ⎠
V2 = VE = 1.86 V − 0.7 V = 1.16 V
1.16 V
= 1.16 mA
IE =
1.0 kΩ
V3 = VC = 8 V − (1.16 mA)(2.2 kΩ) = 5.45 V
35.
(a)
(b)
(c)
(d)
Open collector
No problems
Transistor shorted from collector-to-emitter
Open emitter
36.
For βDC = 35:
⎛ 4.5 kΩ ⎞
VB = ⎜
⎟(−10 V) = −3.1 V
⎝ 14.5 kΩ ⎠
For βDC = 100:
⎛ 5.17 kΩ ⎞
VB = ⎜
⎟(−10 V) = −3.4 V
⎝ 15.17 kΩ ⎠
The measured base voltage at point 4 is within the correct range.
VE = −3.1 V + 0.7 V = −2.4 V
− 2.4 V
= −3.53 mA
IC ≅ IE =
680 Ω
VC = −10 V − (−3.53 mA)(1.0 kΩ) = −6.47 V
Allowing for some variation in VBE and for resistor tolerances, the measured collector and
emitter voltages are correct.
B
B
37.
(a) The 680 Ω resistor is open:
Meter 1: 10 V
Meter 2: floating
⎛ 5.6 kΩ ⎞
Meter 3: VB = ⎜
⎟(−10 V) = −3.59 V
⎝ 15.6 kΩ ⎠
Meter 4: 10 V
B
(b) The 5.6 kΩ resistor is open.
9.3 V
IB =
= 275 μA
10 kΩ + 35(680 Ω)
IC = 35(275 μA) = 9.6 mA
10 V
IC(sat) =
= 5.95 mA
1680 Ω
The transistor is saturated.
Meter 1: 10 V
Meter 2: (5.95 mA)(680 Ω) = 4.05 V
Meter 3: 4.05 V + 0.7 V = 4.75 V
Meter 4: 10 V − (5.95 mA)(1.0 kΩ) = 4.05 V
B
41
Chapter 5
(c) The 10 kΩ resistor is open. The transistor is off.
Meter 1: 10 V
Meter 2: 0 V
Meter 3: 0 V
Meter 4: 10 V
(d) The 1.0 kΩ resistor is open. Collector current is zero.
Meter 1: 10 V
Meter 2: 1.27 V − 0.7 V = 0.57 V
⎛
⎞
5.6 kΩ 680 Ω
⎟ (10 V) + 0.7 V = 0.57 V + 0.7 V = 1.27 V
Meter 3: ⎜
⎜ 10 kΩ + 5.6 kΩ 680 Ω ⎟
⎝
⎠
Meter 4: floating
(e) A short from emitter to ground.
Meter 1: 10 V
Meter 2: 0 V
Meter 3: 0.7 V
(10 V − 0.7 V) 9.3 V
=
IB ≅
= 0.93 mA
10 kΩ
10 kΩ
IC(min) = 35(0.93 mA) = 32.6 mA
10 V
= 10 mA
IC(sat) =
1.0 kΩ
The transistor is saturated.
Meter 4: ≅ 0 V
B
(f) An open base-emitter junction. The transistor is off.
Meter 1: 10 V
Meter 2: 0 V
⎛ 5.6 kΩ ⎞
Meter 3: ⎜
⎟ (10 V) = 3.59 V
⎝ 15.6 kΩ ⎠
Meter 4: 10 V
42
Chapter 5
Application Activity Problems
38.
With R1 open:
VB = 0 V, VE = 0 V, VC = VCC = 9.1 V
B
39.
Faults that will cause the transistor of textbook Figure 5-30(a) to go into cutoff:
R1 open, R2 shorted, base lead or BE junction open.
40.
At 45°C: RTherm = 2.7 kΩ
⎛ RTherm ⎞
⎛ 2.7 kΩ ⎞
VB ⎜
9 V=⎜
⎟ 9 V = 3.28 V
⎜ R1 + RTherm ⎟⎟
⎝ 7.4 kΩ ⎠
⎝
⎠
VE = VB − 0.7 V = 2.58 V
V
2.58 V
= 5.49 mA
IE = IC = E =
R3 470 Ω
VC = VOUT = 9 V − (5.49 mA)(1 kΩ) = 3.51 V
B
At 48°C: RTherm = 1.78 kΩ
⎛ 1.78 kΩ ⎞
VB = ⎜
⎟ 9 V = 2.47 V
⎝ 6.48 kΩ ⎠
VE = 2.47 V − 0.7 V = 1.77 V
1.77 V
= 3.77 mA
IE = IC =
470 Ω
VC = VOUT = 9 V − (3.77 mA)(1 kΩ) = 5.23 V
B
At 53°C: RTherm = 1.28 kΩ
⎛ 1.28 kΩ ⎞
VB = ⎜
⎟ 9 V = 1.93 V
⎝ 5.98 kΩ ⎠
VE = 1.93 V − 0.7 V = 1.23 V
1.23 V
= 2.62 mA
IE = IC =
470 Ω
VC = VOUT = 9 V − (2.62 mA)(1 kΩ) = 6.38 V
B
41.
The following measurements would indicate an open CB junction:
VC = VCC = +9.1 V
VB normal
VE ≅ 0 V
B
Datasheet Problems
42.
For T = 45°C and R2 = 2.7 kΩ
RIN(base) = 2.7 kΩ (30)(470 Ω) = 2.7 kΩ 14.1 kΩ = 2.27 kΩ min
RIN(base) = 2.7 kΩ (300)(470 Ω) = 2.7 kΩ 141 kΩ = 2.65 kΩ max
2.27 kΩ
⎛
⎞
⎛ 2.27 kΩ ⎞
VB(min) = ⎜
⎟9.1 V = ⎜
⎟9.1 V = 2.62 V
⎝ 2.27 kΩ + 5.6 kΩ ⎠
⎝ 7.87 ⎠
VE(min) = 2.62 V − 0.7 V = 1.92 V
43
Chapter 5
1.92 V
= 4.09 mA
470 Ω
VC(max) = 9.1 V − (4.09 mA)(1.0 kΩ) = 5.01 V
2.65 kΩ
⎛
⎞
⎛ 2.65 kΩ ⎞
VB(max) = ⎜
⎟9.1 V = ⎜
⎟9.1 V = 2.92 V
⎝ 2.65 kΩ + 5.6 kΩ ⎠
⎝ 8.25 kΩ ⎠
VE(max) = 2.92 V − 0.7 V = 2.22 V
2.22 V
= 4.73 mA
So, IC ≅ IE =
470 Ω
VC(min) = 9.1 V − (4.73 mA)(1.0 kΩ) = 4.37 V
So, IC ≅ IE =
For T = 55°C and R2 = 1.24 kΩ:
RIN(base) = 1.24 kΩ (30)(470 Ω) = 1.24 kΩ 14.1 kΩ = 1.14 kΩ min
RIN(base) = 1.24 kΩ (300)(470 Ω) = 1.24 kΩ 141 kΩ = 1.23 kΩ max
1.14 kΩ
⎛
⎞
⎛ 1.14 kΩ ⎞
VB(min) = ⎜
⎟9.1 V = ⎜
⎟9.1 V = 1.54 V
⎝ 1.14 kΩ + 5.6 kΩ ⎠
⎝ 6.74 kΩ ⎠
VE(min) = 1.54 V − 0.7 V = 0.839 V
0.839 V
= 1.78 mA
So, IC ≅ IE =
470 Ω
VC(max) = 9.1 V − (1.78 mA)(1.0 kΩ) = 7.32 V
1.23 kΩ
⎛
⎞
⎛ 1.23 kΩ ⎞
VB(max) = ⎜
⎟9.1 V = ⎜
⎟9.1 V = 1.64 V
⎝ 1.23 kΩ + 5.6 kΩ ⎠
⎝ 6.83 kΩ ⎠
VE(max) = 1.64 V − 0.7 V = 0.938 V
0.938 V
= 2.0 mA
So, IC ≅ IE =
470 Ω
VC(min) = 9.1 V − (2.0 mA)(1.0 kΩ) = 7.10 V
43.
At T = 45°C for minimum βDC:
PD(max) = (5.01 V − 1.92 V)(4.09 mA) = (3.09 V)(4.09 mA) = 12.6 mW
At T = 55°C for minimum βDC:
PD(max) = (7.32 V − 0.839 V)(1.78 mA) = (6.48 V)(1.78 mA) = 11.5 mW
For maximum beta values, the results are comparable and nowhere near the maximum.
PD(max) = 625 mW − (5.0 m/°C)(30°C) = 475 mW
No ratings are exceeded.
44.
For the datasheet of Figure 5-50 in the textbook:
(a) For a 2N2222A, IC(max) = 1 A continuous
(b) For a 2N2118A, VEB(max) = 6.0 V
45.
For a 2N2222A @ T = 100°C:
PD(max) = 0.8 W − (4.57 mW/°C)(100°C − 25°C) = 0.8 W − 343 mW = 457 mW
46.
If IC changes from 1 mA to 500 mA in a 2N2219A, the percentage change in βDC is
⎛ 30 − 50 ⎞
ΔβDC = ⎜
⎟100% = −40%
⎝ 50 ⎠
44
Chapter 5
Advanced Problems
47.
See Figure 5-5.
V − VCEQ 15 V − 5 V
RC = CC
= 2 kΩ
=
5 mA
I CQ
Assume βDC = 100.
I
5 mA
= 50 μA
IBQ = CQ =
β DC
100
V − VBE 15 V − 0.7 V
=
RB = CC
= 286 kΩ
I BQ
50 μA
B
48.
Figure 5-5
See Figure 5-6.
Assume βDC = 200.
I
10 mA
IBQ = CQ =
= 50 μA
β DC
200
Let RB = 1.0 kΩ
12 V − (50 μA)(1.0 kΩ) − 0.7 V 11.3 V
=
RE =
= 1.13 kΩ
10 mA
10 mA
12 V − (−12 V + 11.3 V + 4 V) 8.7 V
=
= 870 Ω
RC =
10 mA
10 mA
870 Ω and 1.13 kΩ are not standard values. RC = 820 Ω and
RE = 1.2 kΩ give ICQ ≅ 9.38 mA, VCEQ ≅ 5.05 V.
B
Figure 5-6
49.
See Figure 5-7.
βDC(min) ≅ 70. Let RE = 1.0 kΩ.
VE = IERE = 1.5 mA(1.0 kΩ) = 1.5 V
VB = 1.5 V + 0.7 V = 2.2 V
V − VCEQ − VE 9 V − 1.5 V − 3 V
RC = CC
= 3 kΩ
=
1.5 mA
I CQ
B
R1 + R2 =
VCC
9V
= 2.57 kΩ min
=
I CC(max) − I CQ 5 mA − 1.5 mA
Asssume βDCRE>>R2. The ratio of bias resistors equals
the ratio of the voltages as follows.
R1 6.8 V
=
= 3.09
R2 2.2 V
R1 = 3.09R2
R1 + R2 = R2 + 3.09R2 = 2.57 kΩ
4.09R2 = 2.57 kΩ
2.57 kΩ
R2 =
= 628 Ω
4.09
Figure 5-7
45
Chapter 5
So, R2 ≅ 620 Ω and R1 = 1.92 kΩ ≅ 2 kΩ.
From this,
RIN(base) = 70(1.0 kΩ) = 70 kΩ >> R2
⎛ 620 Ω ⎞
so, VB = ⎜
⎟ 9 V = 2.13 V
⎝ 2.62 kΩ ⎠
VE = 2.13 V − 0.7 V = 1.43 V
1.43 V
ICQ ≅ IE =
= 1.43 mA
1.0 kΩ
VCEQ = 9 V − (1.43 mA)(1.0 kΩ + 3 kΩ) = 3.28 V
B
50.
See Figure 5-8.
βDC ≅ 75.
10 mA
= 133 μA
IBQ =
75
V − VCE 5 V − 1.5 V
=
= 350 Ω (use 360 Ω)
RC = CC
I CQ
10 mA
RB =
B
VCE − 0.7 V 1.55 V − 0.7 V
=
= 6 kΩ (use 6.2 kΩ)
I BQ
133 μA
5 V − 0.7 V
= 9.71 mA
360 Ω + 6.2 kΩ / 75
VCEQ = VC = 5 V − (9.71 mA)(360 Ω) = 1.50 V
ICQ =
Figure 5-8
51.
The 2N3904 in textbook Figure 5-48 can be replaced with a 2N2222A and maintain the
same voltage range from 45°C to 55°C because the voltage-divider circuit is essentially β
independent and the βDC parameters of the two transistors are comparable.
52.
For the 2N2222A using the datasheet in textbook Figure 5-51 at IC = 150 mA
and VCE = 1.0 V:
At T = −55°C, hFE(min) = (0.45)(50) = 22.5
At T = 25°C, hFE(min) = (0.63)(50) = 31.5
At T = 175°C, hFE(min) = (0.53)(50) = 26.6
53.
If the valve interface circuit loading of the temperature conversion circuit changes from
100 kΩ to 10 kΩ, the Q-point will have a reduced VCEQ because the current through RC will
consist of the same IC and a larger IL. ICQ is unaffected in the sense that the transistor
collector current is the same, although the collector resistance current is larger. The transistor
saturates sooner so that lower temperatures do not register as well, if at all.
54.
It is not feasible to operate the circuit from a 5.1 V dc supply and maintain the same range of
output voltages because the output voltage at 60°C must be 6.478 V.
46
Chapter 5
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 55 through 60 are available from the
Instructor’s Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
55.
RC open
56.
RB open
57.
R2 open
58.
Collector-emitter shorted
59.
RC shorted
60.
Base-emitter open
B
47
Chapter 6
BJT Amplifiers
Section 6-1 Amplifier Operation
1.
Slightly greater than 1 mA minimum
2.
From the graph of Figure 6-4, the highest value of dc collector current is about 6 mA.
Section 6-2 Transistor AC Models
25 mV 25 mV
=
= 8.33 Ω
IE
3 mA
3.
re′ =
4.
βac = hfe = 200
5.
IC = βDCIB = 130(10 μA) = 1.3 mA
1.3 mA
I
IE = C =
= 1.31 mA
α DC
0.99
25 mV
25 mV
re′ =
=
= 19 Ω
1.31 mA
IE
6.
βDC =
B
I C 2 mA
=
= 133
I B 15 μA
0.35 mA
ΔI
βac = C =
= 117
3 μA
ΔI B
Section 6-3 The Common-Emitter Amplifier
7.
See Figure 6-1.
Figure 6-1
48
Chapter 6
8.
⎛ R2 ⎞
⎛ 4.7 kΩ ⎞
(a) VB = ⎜
⎟15 V = 2.64 V
⎟VCC = ⎜
⎝ 26.7 kΩ ⎠
⎝ R1 + R2 ⎠
(b) VE = VB − 0.7 V = 2.64 − 0.7 V = 1.94 V
V
1.94 V
(c) IE = E =
= 1.94 mA
RE 1.0 kΩ
(d) IC ≅ IE = 1.94 mA
(e) VC = VCC − ICRC = 15 V − (1.94 mA)(2.2 kΩ) = 11.6 V
B
B
9.
10.
ICC = IBIAS + IC
V
2.64 V
IBIAS = B =
= 562 μA
R2 4.7 kΩ
ICC = 562 μA + 1.94 mA = 2.50 mA
P = ICCVCC = (2.5 mA)(15 V) = 37.5 mW
4.7 kΩ
⎛
⎞
(a) VB = ⎜
⎟15 V = 2.64 V
⎝ 4.7 kΩ + 22 kΩ ⎠
VE = 2.64 V − 0.7 V = 1.94 V
1.94 V
= 1.94 mA
IE =
1.0 kΩ
25 mV
25 mV
re′ ≅
=
= 12.9 Ω
IE
1.94 mA
Rin(base) = β ac (re′ + RE ) = 100(1012.9 Ω) ≅ 101 kΩ
B
(b) Rin = Rin(base)
(c) Av =
11.
R1
R2 = 101 kΩ 22 kΩ 4.7 kΩ = 3.73 kΩ
RC
2.2 kΩ
=
= 2.17
′
RE + re 12.02 Ω
(a) Rin(base) = β ac re′ = 100(12.9 Ω) = 1.29 kΩ
(b) Rin = 1.29 kΩ 22 kΩ 4.7 kΩ = 968 Ω
(c) Av =
12.
RC 2.2 kΩ
=
= 171
re′ 12.9 Ω
(a) Rin(base) = β ac re′ = 100(12.9 Ω) = 1.29 kΩ
(b) Rin = 1.29 kΩ 22 kΩ 4.7 kΩ = 968 Ω
(c) Av =
Rc RC RL 2.2 kΩ 10 kΩ
=
=
= 140
re′
re′
12.9 Ω
49
Chapter 6
13.
⎛ R2 β DC RE ⎞
⎛
⎞
12 kΩ 75(1.0 kΩ)
⎟V = ⎜
⎟18 V = 3.25 V
(a) VB = ⎜
⎜ R + R β R ⎟ CC ⎜ 47 kΩ + 12 kΩ 75(1.0 kΩ) ⎟
2
DC E ⎠
⎝ 1
⎝
⎠
(b) VE = VB − 0.7 V = 2.55 V
V
2.55 V
(c) IE = E =
= 2.55 mA
RE 1.0 kΩ
(d) IC ≅ IE = 2.55 mA
(e) VC = VCC − ICRC = 18 V − (2.55 mA)(3.3 kΩ) = 9.59 V
(f) VCE = VC − VE = 9.59 V − 2.55 V = 7.04 V
B
B
14.
From Problem 13, IE = 2.55 mA
⎛ 25 mV ⎞
⎛ 25 mV ⎞
⎟⎟ = 70⎜
(a) Rin(base) = β ac re′ ≅ β ac ⎜⎜
⎟ = 686 Ω
⎝ 2.55 mA ⎠
⎝ IE ⎠
(b) Rin = R1 R2 Rin (base ) = 47 kΩ 12 kΩ 686 Ω = 640 Ω
(c) Av =
RC RL 3.3 kΩ 10 kΩ
=
= 253
re′
9.8 Ω
(d) Ai = βac = 70
(e) Ap = AvAi = (253)(70) = 17,710
15.
⎛ Rin ⎞
⎛
⎞
640 Ω
⎟Vin = ⎜⎜
⎟⎟12 μV
Vb = ⎜⎜
⎟
⎝ 640 Ω + 600 Ω ⎠
⎝ Rin + Rs ⎠
Attenuation of the input network is
⎛ Rin ⎞ ⎛
⎞
640 Ω
⎜
⎟
⎜ R + R ⎟ = ⎜⎜ 640 Ω + 600 Ω ⎟⎟ = 0.516
⎝
⎠
s ⎠
⎝ in
Av′ = 0.516 Av = 0.516(253) = 131
θ = 180°
16.
⎛ R2 β DC RE ⎞
⎛
⎞
3.3 kΩ 150(100 Ω)
⎟V = ⎜
⎟ 8 V = 1.47 V
VB = ⎜
⎜ R + R β R ⎟ CC ⎜ 12 kΩ + 3.3 kΩ 150(100 Ω) ⎟
2
DC E ⎠
⎝ 1
⎝
⎠
V − 0.7 V 1.47 V − 0.7 V
=
= 7.7 mA
IE = B
RE
100 Ω
25 mV 25 mV
re′ =
=
= 3.25 Ω
IE
7.7 mA
330 Ω
RC
=
= 3.2
Av(min) =
′
RE + re 100 Ω + 3.25 Ω
R
330 Ω
= 102
Av(max) = C =
′
re
3.25 Ω
B
50
Chapter 6
17.
Maximum gain is at Re = 0 Ω.
RIN(base) = βDCRE = 150(100 Ω) = 15 kΩ
⎛ R2 RIN(base) ⎞
⎞
3.3 kΩ 15 kΩ)
⎟V = ⎛⎜
⎟ 8 V = 1.47 V
VB = ⎜
CC
⎜ 12 kΩ + 3.3 kΩ 15 kΩ) ⎟
⎜R +R R
⎟
1
2
IN(base)
⎝
⎠
⎝
⎠
V − VBE 1.47 V − 0.7 V
=
= 7.7 mA
IE = B
RE
100 Ω
25 mV
re′ ≅
= 3.25 Ω
7.7 mA
R RL 330 Ω 600 Ω
Av(max) = C
= 65.5
=
re′
3.25 Ω
B
Minimum gain is at Re = 100 Ω.
R RL
212.9 Ω
=
= 2.06
Av(min) = C
RE + re′ 103.25 Ω
18.
Rin = R1 R2 β ac re′ = 3.3 kΩ 12 kΩ 150(3.25 Ω) = 410 Ω
Attenuation of the input network is
Rin
410 Ω
=
= 0.578
Rin + Rs 410 Ω + 300 Ω
Rc 330 Ω 1.0 kΩ
= 76.3
=
re′
3.25 Ω
Av′ = 0.5777 Av = 0.578(76.3) = 44.1
Av =
19.
See Figure 6-2.
25 mV
re′ ≅
= 9.8 Ω
2.55 mA
Re ≥ 10re′
Set Re = 100 Ω.
The gain is reduced to
RC
3.3 kΩ
=
Av =
= 30.1
Re + re′ 109.8 Ω
Figure 6-2
51
Chapter 6
Section 6-4 The Common-Collector Amplifier
20.
21.
⎛ R2 ⎞
4.7 kΩ ⎞
⎟⎟VCC = ⎛⎜
VB = ⎜⎜
⎟ 5.5 V = 1.76 V
⎝ 14.7 kΩ ⎠
⎝ R1 + R2 ⎠
V − 0.7 V 1.76 V − 0.7 V
=
IE = B
= 1.06 mA
RE
1.0 kΩ
25 mV
re′ ≅
= 23.6 Ω
1.06 mA
1.0 kΩ
RE
=
Av =
= 0.977
RE + re′ 1.0 kΩ + 23.6 Ω
B
Rin = R1 R2 β ac (re′ + RE ) ≅ R1 R2 β ac RE = 10 kΩ 4.7 kΩ 100 kΩ = 3.1 kΩ
⎛ R2 ⎞
⎛ 4.7 kΩ ⎞
⎟⎟VCC − 0.7 V = ⎜
VOUT = VB − 0.7 V = ⎜⎜
⎟ 5.5 V − 0.7 V = 1.06 V
⎝ 14.7 kΩ ⎠
⎝ R1 + R2 ⎠
B
22.
23.
The voltage gain is reduced because Av =
Re
.
Re + re′
⎛ R2 ⎞
⎛ 4.7 kΩ ⎞
⎟⎟VCC = ⎜
VB = ⎜⎜
⎟ 5.5 V = 1.76 V
⎝ 14.7 kΩ ⎠
⎝ R1 + R2 ⎠
V − VBE 1.76 V − 0.7 V
=
IE = B
= 1.06 mA
RE
1.0 kΩ
25 mV
25 mV
=
re′ ≅
= 23.6 Ω
IE
1.06 mA
B
Av =
RE
re′ + RE
Av (re′ + RE
RE
(RE
(RE
RL
RL
RL ) = RE
RL − Av (RE
RL
RL ) = Av re′
RL )(1 − Av ) = Av re′
Av re′
0.9(23.6 Ω)
RL ) =
=
= 212.4 Ω
(1 − Av )
1 − 0.9
RLRE = 212.4RL + 212.4RE
RLRE − 212.4RL = 212.4RE
212.4 RE
(212.4 Ω)(1000 Ω)
RL =
= 270 Ω
=
RE − 212.4 1000 Ω − 212.4 Ω
52
Chapter 6
24.
(a) VC1 = 10 V
⎛ R2 ⎞
⎛ 22 kΩ ⎞
⎟⎟VCC = ⎜
VB1 = ⎜⎜
⎟ 10 V = 4 V
⎝ 55 kΩ ⎠
⎝ R1 + R2 ⎠
VE1 = VB1 − 0.7 V = 4 V − 0.7 V = 3.3 V
VC2 = 10 V
VB2 = VE1 = 3.3 V
VE2 = VB2 − 0.7 V = 3.3 V − 0.7 V = 2.6 V
′ = βDC1βDC2 = (150)(100) = 15,000
(b) β DC
VE1 − 0.7 V
2.6 V
=
= 17.3 μA
100(1.5 kΩ)
β DC2 RE
25 mV 25 mV
re′1 ≅
=
= 1.45 kΩ
I E1
17.3 μ A
V
2.6 V
IE2 = E2 =
= 1.73 mA
RE 1.5 kΩ
25 mV
25 mV
re′2 ≅
=
= 14.5 Ω
I E2
1.73 mV
(c) IE1 =
(d) Rin = R1 R2 Rin (base1)
Rin(base1) = βac1βac2RE = (150)(100)(1.5 kΩ) = 22.5 MΩ
Rin = 33 kΩ 22 kΩ 22.5 MΩ = 13.2 kΩ
25.
Rin(base) = βac1βac2RE = (150)(100)(1.5 kΩ) = 22.5 MΩ
Rin = R2 R1 Rin (base ) = 22 kΩ 33 kΩ 22.5 MΩ = 13.2 kΩ
Vin
1V
=
= 75.8 μA
Rin 13.2 kΩ
Vin
1V
=
Iin(base1) =
= 44.4 nA
Rin (base1) 22.5 MΩ
Iin =
Ie ≅ βac1βac2Iin(base1) = (150)(100)(44.4 nA) = 667 μA
I
667 μA
Ai′ = e =
= 8.8
I in 75.8 μA
Section 6-5 The Common-Base Amplifier
26.
The main disadvantage of a common-base amplifier is low input impedance. Another
disadvantage is unity current gain.
53
Chapter 6
27.
28.
⎛ R2 ⎞
⎛ 10 kΩ ⎞
⎟⎟ VCC − VBE = ⎜
VE = ⎜⎜
⎟ 24 V − 0.7 V = 6.8 V
⎝ 32 kΩ ⎠
⎝ R1 + R2 ⎠
6.8 V
= 10.97 mA
IE =
620 Ω
25 mV
25 mA
=
Rin(emitter) = re′ ≅
= 2.28 Ω
IE
10.97 mA
R
1.2 kΩ
Av = C =
= 526
re′ 2.28 Ω
Ai ≅ 1
Ap = AiAv ≅ 526
(a) Common-base
(b) Common-emitter
(c) Common-collector
Section 6-6 Multistage Amplifiers
29.
Av′ = Av1Av2 = (20)(20) = 400
30.
Av′ ( dB) = 10 dB + 10 dB + 10 dB = 30 dB
20 log Av′ = 30 dB
30
= 1.5
log Av′ =
20
Av′ = 31.6
31.
⎛ R2 ⎞
8.2 kΩ
⎛
⎞
⎟⎟ VCC − VBE = ⎜
(a) VE ⎜⎜
⎟ 15 V − 0.7 V = 2.29 V
⎝ 33 kΩ + 8.2 kΩ ⎠
⎝ R1 + R2 ⎠
V
2.29 V
IE = E =
= 2.29 mA
RE 1.0 kΩ
25 mV
25 mV
re′ ≅
=
= 10.9 Ω
IE
2.29 mA
Rin(2) = R6 R5 β ac re′ = 8.2 kΩ 33 kΩ 175(10.9 Ω) = 1.48 kΩ
Av1 =
RC Rin ( 2 )
=
3.3 kΩ 1.48 kΩ
re′
10.9 Ω
R
3.3 kΩ
Av2 = C =
= 303
re′ 10.9 Ω
= 93.6
(b) Av′ = Av1Av2 = (93.6)(303) = 28,361
(c) Av1(dB) = 20 log(93.6) = 39.4 dB
Av2(dB) = 20 log(303) = 49.6 dB
Av′ ( dB) = 20 log(28,361) = 89.1 dB
54
Chapter 6
32.
(a) Av1 =
Av2 =
RC Rin ( 2 )
re′
=
3.3 kΩ 1.48 kΩ
10.9 Ω
= 93.6
RC R L 3.3 kΩ 18 kΩ
= 256
=
re′
10.9 Ω
(b) Rin(1) = R1 R2 β ac re′ = 33 kΩ 8.2 kΩ 175(10.9 Ω) = 1.48 kΩ
Attenuation of the input network is
Rin (1)
1.48 kΩ
= 0.95
=
Rin (1) + R s 1.48 kΩ + 75 Ω
Av′ = (0.95)Av1Av2 = (0.95)(93.6)(256) = 22,764
(c) Av1(dB) = 20 log(93.6) = 39.4 dB
Av2(dB) = 20 log(256) = 48.2 dB
Av′ ( dB) = 20 log(22,764) = 87.1 dB
33.
⎛ R2 ⎞
⎛ 22 kΩ ⎞
⎟⎟ VCC = ⎜
VB1 = ⎜⎜
⎟12 V = 2.16 V
⎝ 122 kΩ ⎠
⎝ R1 + R2 ⎠
VE1 = VB1 − 0.7 V = 1.46 V
V
1.46 V
= 0.311 mA
IC1 ≅ IE1 = E1 =
R4 4.7 kΩ
VC1 = VCC − IC1R3 = 12 V − (0.311 mA)(22 kΩ) = 5.16 V
VB2 = VC1 = 5.16 V
VE2 = VB2 − 0.7 V = 5.16 V − 0.7 V = 4.46 V
V
4.46 V
= 0.446 mA
IC2 ≅ IE2 = E2 =
R6
10 kΩ
VC2 = VCC − IC2R5 = 12 V − (0.446 mA)(10 kΩ) = 7.54 V
25 mV
25 mV
=
re′2 ≅
= 56 Ω
0.446 mA
IE2
Rin(2) = β ac re′2 = (125)(56 Ω) = 7 kΩ
25 mV
25 mV
=
re′1 ≅
= 80.4 Ω
0.311 mA
I E1
R3 Rin (2)
=
22 kΩ 7 kΩ
= 66
80.4 Ω
re′1
R
10 kΩ
Av2 = 5 =
= 179
′
re 2
56 Ω
Av′ = Av1Av2 = (66)(179) = 11,814
Av1 =
34.
(a)
(b)
(c)
(d)
20 log(12) = 21.6 dB
20 log(50) = 34.0 dB
20 log(100) = 40.0 dB
20 log(2500) = 68.0 dB
55
Chapter 6
35.
⎛V ⎞
(a) 20 log ⎜⎜ 2 ⎟⎟ = 3 dB
⎝ V1 ⎠
⎛V ⎞ 3
= 0.15
log ⎜⎜ 2 ⎟⎟ =
⎝ V1 ⎠ 20
⎛V ⎞
(b) 20 log ⎜⎜ 2 ⎟⎟ = 6 dB
⎝ V1 ⎠
⎛V ⎞ 6
log ⎜ 2 ⎟ =
= 0.3
⎝ V1 ⎠ 20
V2
= 1.41
V1
V2
=2
V1
⎛V ⎞
(d) 20 log ⎜⎜ 2 ⎟⎟ = 20 dB
⎝ V1 ⎠
⎛ V ⎞ 20
log ⎜⎜ 2 ⎟⎟ =
=1
⎝ V1 ⎠ 20
⎛V ⎞
(e) 20 log ⎜⎜ 2 ⎟⎟ = 40 dB
⎝ V1 ⎠
⎛ V ⎞ 40
log ⎜⎜ 2 ⎟⎟ =
=2
⎝ V1 ⎠ 20
V2
= 10
V1
V2
= 100
V1
Section 6-7 The Differential Amplifier
36.
Determine IE for each transistor:
VR
14.3 V
I RE = E =
= 6.5 mA
RE 2.2 kΩ
I E(Q1) = I E(Q 2) =
I RE
2
= 3.25 mA
Determine IC for each transistor:
I C(Q1) = α1 I E(Q1) = 0.980(3.25 mA) = 3.185 mA
I C(Q 2) = α 2 I E(Q 2) = 0.975(3.25 mA) = 3.169 mA
Calculate the collector voltages:
VC(Q1) = 15 V − (3.185 mA)(3.3 kΩ) = 4.49 V
VC(Q 2) = 15 V − (3.169 mA)(3.3 kΩ) = 4.54 V
The differential output voltage is:
VOUT = VC(Q 2) − VC(Q1) = 4.54 V − 4.49 V = 0.05 V = 50 mV
37.
V1 measures the differential output voltage.
V2 measures the noninverting input voltage.
V3 measures the single-ended output voltage.
V4 measures the differential input voltage.
I1 measures the bias current.
56
⎛V ⎞
(c) 20 log ⎜⎜ 2 ⎟⎟ = 10 dB
⎝ V1 ⎠
⎛ V ⎞ 10
log ⎜⎜ 2 ⎟⎟ =
= 0.5
⎝ V1 ⎠ 20
V2
= 3.16
V1
Chapter 6
38.
Calculate the voltage across each collector resistor:
VRC1 = (1.35 mA)(5.1 kΩ) = 6.89 V
VRC2 = (1.29 mA)(5.1 kΩ) = 6.58 V
The differential output voltage is:
VOUT = VC(Q 2) − VC(Q1) = (VCC − VRC2 ) − (VCC − VRC1 ) = VRC1 − VRC2
= 6.89 V − 6.58 V = 0.31 V = 310 mV
39.
(a) Single-ended differential input, differential output
(b) Single-ended, differential input, single-ended output
(c) Double-ended differential input, single-ended output
(d) Double-ended differential input, differential output
Section 6-8 Troubleshooting
40.
⎛ R1 ⎞
⎛ 10 kΩ ⎞
⎟⎟10 V − 0.7 V = ⎜
VE = ⎜⎜
⎟10 V − 0.7 V = 1.05 V
⎝ 57 kΩ ⎠
⎝ R1 + R2 ⎠
V
1.05 V
= 1.05 mA
IE = E =
R4 1.0 kΩ
VC = 10 V − (1.05 mA)(4.7 kΩ) = 5.07 V
VCE = 5.07 V − 1.05 V = 4.02 V
4.02 V
V
′ ≅ CE =
rCE
= 3.83 kΩ
1.05 mA
IE
With C2 shorted:
RIN(2) = R6 β DC R8 = 10 kΩ 125(1.0 kΩ) = 9.26 kΩ
Looking from the collector of Q1:
( rCE′ + R4 ) RIN(2) = (3.83 kΩ + 1.0 kΩ) 9.26 kΩ = 3.17 kΩ
3.17 kΩ
⎛
⎞
VC1 = ⎜
⎟10 V = 4.03 V
⎝ 3.17 kΩ + 4.7 kΩ ⎠
41.
Q1 is in cutoff. IC = 0 A, so VC2 = 10 V.
42.
(a)
(b)
(c)
(d)
(e)
(f)
Reduced gain
No output signal
Reduced gain
Bias levels of first stage will change. IC will increase and Q1 will go into saturation.
No signal at the Q1 collector
Signal at the Q2 base. No output signal.
57
Chapter 6
43.
re′ = 10.9 Ω
Av1 = 93.6
Rin = 1.48 kΩ
Av2 = 302
Test Point
Input
DC Volts
0V
Q1 base
Q1 emitter
Q1 collector
Q2 base
Q2 emitter
Q2 collector
Output
2.99 V
2.29 V
7.44 V
2.99 V
2.29 V
7.44 V
0V
AC Volts (rms)
25 μA
20.8 μV
0V
1.95 mV
1.95 mV
0V
589 mV
589 mV
Application Activity Problems
44.
For the block diagram of textbook Figure 6-46 with no output from the power amplifier or
preamplifier and only one faulty block, the power amplifier must be ok because the fault must
be one that affects the preamplifier's output prior to the power amplifier. Check the input to
the preamplifier.
45.
(a)
(b)
(c)
(d)
(e)
(f)
46.
R7 = 220 Ω will bias Q2 off.
47.
(a) Q1 is in cutoff.
(b) VC1 = VEE
(c) VC2 is unchanged and at 5.87 V.
No output signal
Reduced output signal
No output signal
Reduced output signal
No output signal
Increased output signal (perhaps with distortion)
58
Chapter 6
Datasheet Problems
48.
From the datasheet in textbook Figure 6-63:
(a) for a 2N3947, βac(min) = hfe(min) = 100
(b) For a 2N3947, re′( min) cannot be determined since hre(min) is not given.
(c) For a 2N3947, rc′( min) cannot be determined since hre(min) is not given.
49.
From the 2N3947 datasheet in Figure 6-63:
(a) For a 2N3947, βac(max) = 700
h
20 × 10−4
= 40 Ω
(b) For a 2N3947, re′( max) = re =
hoe
50 μS
(c) For a 2N3947, rc′( max) =
50.
hre + 1 20 × 10−4 + 1
=
= 20 kΩ
hoe
50 μS
For maximum current gain, a 2N3947 should be used.
Advanced Problems
51.
In the circuit of textbook Figure 6-62, a leaky coupling capacitor would affect the biasing of
the transistors, attenuate the ac signal, and decrease the frequency response.
52.
See Figure 6-3.
Figure 6-3
59
Chapter 6
53.
For the 2nd stage:
30 V
30 V
=
IR6-7 =
= 435 μA
R6 + R7 69 kΩ
VB2 = VCC − IR6-7R6 = 15 V − (435μA)(47 kΩ)
= 15 V − 20.5 V = −5.5 V
VE2
−5.5 V − 0.7 V
=
= −1.21 mA
IE2 =
R9 + R10
5.13 kΩ
25 mV
re′2 =
= 20.7 Ω
1.21 mA
With R10 = 0 Ω for max gain:
R8
6.8 kΩ
=
Av(2) =
= 45.1 (unloaded)
R9 + re′2 150.7 Ω
With a 10 kΩ load:
R & RL 6.8 kΩ & 10 kΩ 4.05 kΩ
= 26.9
Av(2) = 8
=
=
150.7 Ω
150.7 Ω
R9 + re′2
To keep unloaded gain:
4.05 kΩ
= 45.1
R9 + 20.7 Ω
4.05 kΩ = 45.1(R9 + 20.7 Ω) = 45.1R9 + 934 Ω
4.05 kΩ − 934 Ω
= 69.1 Ω
R9 =
45.1
54.
RC > (100)(330 Ω) = 33 kΩ
To prevent cutoff, VC must be no greater than
12 V − (100)(1.414)(25 mV) = 8.46 V
In addition, VC must fall no lower than 8.46 V − 3.54 V = 4.93 V to prevent saturation.
RC = 100(RE + re′ )
25 mV
IE
12 V − ICRC = 8.46 V
ICRC = 3.54 V
I C (100( RE + re′) ) = 3.54 V
re′ =
⎛ ⎛
25 mV ⎞ ⎞⎟
⎟ ≅ 3.54 V
I C ⎜100⎜⎜ 330 Ω +
⎟⎟
⎜
I
C
⎠⎠
⎝ ⎝
(33 kΩ)IC + 2.5 V = 3.54 V
IC = 31.4 μA
25 mV
= 797 Ω
31.4 μA
RC = 100(330 Ω + 797 Ω) = 113 kΩ
Let RC = 120 kΩ.
VC = 12 V − (31.4 μA)(120 kΩ) = 8.23 V
VC(sat) = 8.23 V − 3.54 V = 4.69 V
re′ ≅
60
Chapter 6
RE(tot)
RC
RE(tot)
4.69 V
7.31 V
= (0.642)(120 kΩ) = 77 kΩ. Let RE = 68 kΩ.
=
VE = (31.4 μA)(68 kΩ) = 2.14 V
VB = 2.14 V + 0.7 V = 2.84 V
R2 2.84 V
=
= 0.310
R1 9.16 V
R2 = 0.310R1. If R1 = 20 kΩ, R2 = 6.2 kΩ.
B
The amplifier circuit is shown in Figure 6-4.
From the design:
⎛ 6 .2 k Ω ⎞
VB = ⎜
⎟12 V = 2.84 V
⎝ 26.2 kΩ ⎠
VE = 2.14 V
2.14 V
IC ≅ IE =
= 31.3 μA
68.3 kΩ
25 mV
re′ =
= 798 Ω
31.3 μA
120 kΩ
= 106 or 40.5 dB
Av =
795 Ω + 330 Ω
VC = 12 V − (31.3 μA)(120 kΩ) = 8.24 V
The design is a close fit.
B
55.
Figure 6-4
See Figure 6-5.
Rin = 120 kΩ 120 kΩ (100)(5.1 kΩ) = 53.6 kΩ minimum
Figure 6-5
56.
Figure 6-6
See Figure 6-6.
61
Chapter 6
57.
See Figure 6-7.
6 V − 0 .7 V
= 10 mA
IC =
510 Ω + 2 kΩ/100
25 mV
re′ =
= 2.5 Ω
10 mA
180 Ω
Av =
= 72.4
2.5 Ω
This is reasonably close (≈3.3% off) and can
be made closer by putting a 7.5 Ω resistor in
series with the 180 Ω collector resistor.
Figure 6-7
58.
Assuming βac = 200,
1
1
=
C1 =
2π f c R 2π (100 Hz)(330 kΩ & 330 kΩ & (200 × 34 kΩ))
1
=
= 0.01 μF
2π (100 Hz)(161 kΩ)
1
1
C2 =
=
2π f c R 2π (100 Hz)(22 kΩ + 47 kΩ & 22 kΩ & (200 × 5.13 kΩ))
1
=
= 0.043 μF
2π (100 Hz)(36.98 kΩ)
59.
IC ≅ IE
VRC
R
RC
RC
R I
Av = C ≅
= 40VRC
≅
= C C =
re′ 25 mV/I E 25 mV/I C 25 mV 25 mV
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 60 through 65 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
60.
C2 open
61.
C2 shorted
62.
RE leaky
63.
C1 open
64.
C2 open
65.
C3 open
62
Chapter 7
Power Amplifiers
Section 7-1 The Class A Power Amplifier
1.
⎛ R2 ⎞
330 Ω
⎞
⎟⎟VCC = ⎛⎜
(a) VB = ⎜⎜
⎟15 V = 3.72 V
⎝ 1.0 kΩ + 330 kΩ ⎠
⎝ R1 + R2 ⎠
VE = VB − VBE = 3.72 − 0.7 V = 3.02 V
VE
3.02 V
=
ICQ ≅ IE =
= 68.4 mA
RE1 + RE2 8.2 Ω + 36 Ω
VCEQ = VCC − (IC)(RE1 + RE2 + RL)
= 15 V − (68.4 mA)(8.2 Ω + 36 Ω + 100 Ω) = 5.14 V
B
B
(b) Av =
100 Ω
RL
=
= 11.7
RE1 + re′ 8.2 Ω + 0.37 Ω
Rin = βac(RE1 + re′ )
R1 R2
= 100 (8.2 Ω + 0.37 Ω)
330 Ω 1.0 kΩ = 192 Ω
⎛R ⎞
⎛ 192 Ω ⎞
⎟⎟ = 263
Ap = Av2 ⎜⎜ in ⎟⎟ = 11.7 2 ⎜⎜
⎝ 100 Ω ⎠
⎝ RL ⎠
The computed voltage and power gains are slightly higher if re′ is ignored.
2.
(a) If RL is removed, there is no collector current; hence, the power dissipated in the
transistor is zero.
(b) Power is dissipated only in the bias resistors plus a small amount in RE1 and RE2. Since
the load resistor has been removed, the base voltage is altered. The base voltage can be
found from the Thevenin equivalent drawn for the bias circuit in Figure 7-1.
Figure 7-1
Applying the voltage-divider rule and including the base-emitter diode drop of 0.7 V
result in a base voltage of 1.2 V. The power supply current is then computed as
ICC =
VCC − 1.2 V 15 V − 1.2 V
=
= 13.8 mA
1.0 kΩ
R1
63
Chapter 7
Power from the supply is then computed as
PT = ICCVCC = (13.8 mA)(15 V) = 207 mW
(c) Av = 11.7 (see problem 1(b)). Vin = 500 mVpp = 177 mVrms.
Vout = AvVin = (11.7)(177 mV) = 2.07 V
V2
2.07 V 2
= 42.8 mW
Pout = out =
RL
100 Ω
3.
The changes are shown in Figure 7-2. The advantage of this arrangement is that the load
resistor is referenced to ground.
Figure 7-2
4.
A CC amplifier has a voltage gain of approximately 1. Therefore,
R
2.2 kΩ
Ap = in =
= 44
Rout
50 Ω
5.
(a) Stiff voltage divider:
⎛ R2 ⎞
⎛ 510 Ω ⎞
VB = ⎜
⎟VCC = ⎜
⎟ 12 V = 5.14 V
⎝ 1190 Ω ⎠
⎝ R1 + R2 ⎠
VE = VB − 0.7 V = 4.44 V
VE
4.44 V
=
IE =
= 55.7 mA
RE1 + RE2 79.7 Ω
IC ≅ IE = 55.7 mA
VC = VCC − ICRC = 12 V − (55.7 mA)(100 Ω) = 6.43 V
VCE = VC − VE = 6.43 V − 4.44 V = 1.99 V
B
B
(b) Not stiff voltage divider:
RIN(BASE) = βDC(RE1 + RE2) = 120(144 Ω) = 17.0 kΩ
⎛ R2 & RIN(BASE) ⎞
4.7 kΩ & 17.0 kΩ
⎛
⎞
V =
12 V
VB = ⎜
⎜ R1 + R2 & RIN(BASE) ⎟⎟ CC ⎜⎝ 12 kΩ + 4.7 kΩ & 17.0 kΩ ⎟⎠
⎝
⎠
B
⎛ 3.68 kΩ ⎞
=⎜
⎟12 V = 2.8 V
⎝ 15.7 kΩ ⎠
64
Chapter 7
VE = VB − 0.7 V = 2.1 V
VE
2.1 V
=
IE =
= 14.6 mA
RE1 + RE2 144 Ω
IC ≅ IE = 14.6 mA
VC = VCC − ICRC = 12 V − (14.6 mA)(470 Ω) = 5.14 V
VCE = VC − VE = 5.14 V − 2.1 V = 3.04 V
B
6.
The Q-point does not change because RL is capacitively coupled and does not affect the DC
values.
7.
For the circuit in Figure 7-43(a):
RIN(BASE) = βDC(RE1 + RE2) = (125)(79.7 ) = 9.96 kΩ
Since RIN(BASE) > 10R2, it can be neglected.
⎛ R2 ⎞
⎛
⎞
⎛ 510 Ω ⎞
510 Ω
VB = ⎜
⎟VCC = ⎜
⎟12 V = 5.14 V
⎟12 V = ⎜
⎝ 680 Ω + 510 Ω ⎠
⎝ 1190 Ω ⎠
⎝ R1 + R2 ⎠
B
VE = VB − 0.7 V = 5.14 V − 0.7 V = 4.44 V
V
4.44 V
ICQ ≅ IE = E =
= 55.7 mA
RE 79.7 Ω
VCQ = VCC − ICQRC = 12 V − (55.7 mA)(100 Ω) = 6.43 V
VCEQ = VC − VE = 6.43 V − 4.44 V = 1.99 V
Rc = RC RL = 100 Ω 100 Ω = 50 Ω
B
Vce(cutoff) = VCEQ + ICQRc = 1.99 V + 55.7 mA(50 Ω) = 4.78 V
Since VCEQ is closer to saturation, Ic is limited to
V
1.99 V
= 39.8 mA
Ic(p) = CEQ =
Rc
50 Ω
Vout is limited to
Vout(p) = VCEQ = 1.99 V
For the circuit in 7-43(b):
RIN(BASE) = βDC(RE1 + RE2) = (120)(142 Ω) = 17 kΩ
Since RIN(BASE) < 10R2, it is taken into account.
⎛ R2 RIN(BASE) ⎞
⎛
⎞
4.7 kΩ 17 kΩ
⎛ 3.68 kΩ ⎞
⎟VCC = ⎜
VB = ⎜
⎟⎟12 V = ⎜
⎟12 V = 2.82 V
⎜
⎜ R1 + R2 RIN(BASE) ⎟
12 kΩ + 4.7 kΩ 17 kΩ ⎠
15.68 kΩ ⎠
⎝
⎝
⎝
⎠
VE = VB − 0.7 V = 2.82 V − 0.7 V = 2.12 V
ICQ ≅ IE = VE/RE = 2.12 V/142 Ω = 14.9 mA
VCQ = VCC − ICQRC = 12 V − (14.9 mA)(470 Ω) = 5.0 V
VCEQ = VCQ − VE = 5.0 V − 2.12 V = 2.88 V
Rc = RC RL = 470 Ω 470 Ω = 235 Ω
B
B
Vce(cutoff) = VCEQ + ICQRc = 2.88 V + 14.9 mA(235 Ω) = 6.38 V
Since VCEQ is closer to saturation, Ic is limited to
V
2.88 V
= 12.3 mA
Ic(p) = CEQ =
235 Ω
Rc
Vout is limited to Vout(p) = VCEQ = 2.88 V
65
Chapter 7
8.
⎛R ⎞
(a) Ap = Av2 ⎜⎜ in ⎟⎟
⎝ RL ⎠
R RL 100 Ω 100 Ω 50 Ω
R
= 10.6
Av ≅ c = C
=
=
RE1
RE1
4 .7 Ω
4.7 Ω
Rin = R1 R2 Rin (base) = R1 R2 β ac RE1
Rin = 680 Ω 510 Ω (125)(4.7 Ω) = 680 Ω 510 Ω 588 Ω = 195 Ω
⎛ 195 Ω ⎞
⎟⎟ = 219
Ap = (10.6)2 ⎜⎜
100
Ω
⎝
⎠
Av ≅
(b)
R RL 470 Ω 470 Ω 235 Ω
Rc
= 10.7
= C
=
=
RE1
RE1
22 Ω
22 Ω
Rin = 12 kΩ 4.7 kΩ (120)(22 Ω) = 12 kΩ 4.7 kΩ 2.64 kΩ = 1.48 kΩ
⎛ 1.48 kΩ ⎞
⎟⎟ = 361
Ap = (10.7)2 ⎜⎜
⎝ 470 Ω ⎠
9.
RIN(BASE) = βDCRE = 90(130 Ω) = 11.7 kΩ
R2 RIN(BASE) = 1.0 kΩ 11.7 kΩ = 921 Ω
⎛ R2 RIN(BASE) ⎞
⎛ 921 Ω ⎞
⎟V =
24 V = 3.93 V
VB = ⎜
⎜ R1 + R2 RIN(BASE) ⎟ CC ⎜⎝ 5.62 kΩ ⎟⎠
⎝
⎠
VE = VB − 0.7 V = 3.93 V − 0.7 V = 3.23 V
V
3.23 V
= 24.8 mA
ICQ ≅ IE = E =
130 Ω
RE
VC = VCC − ICQRC = 24 V − (24.8 mA)(560 Ω) = 10.1 V
VCEQ = VC − VE = 10.1 V − 3.23 V = 6.87 V
PD(min) = PDQ = ICQVCEQ = (24.8 mA)(6.87 V) = 170 mW
B
B
10.
From Problem 9: ICQ = 24.8 mA and VCEQ = 6.87 V
Vce(cutoff) = VCEQ + ICQRc = 6.87 V + (24.8 mA)(264 Ω) = 13.4 V
2
Rc = 0.5(24.8 mA)2(264 Ω) = 81.2 mW
Pout = 0.5I CQ
η =
81.2 mW
Pout
Pout
Pout
=
=
=
= 0.136
PDC VCC I CC VCC I CQ (24 V)(24.8 mA)
66
Chapter 7
Section 7-2 The Class B and Class AB Push-Pull Amplifiers
11.
(a) VB(Q1) = 0 V + 0.7 V = 0.7 V
VB(Q2) = 0 V − 0.7 V = −0.7 V
VE = 0 V
V − (−VCC ) − 1.4 V 9 V − (−9 V) − 1.4 V
=
ICQ = CC
= 8.3 mA
R1 + R2
1.0 kΩ + 1.0 kΩ
VCEQ(Q1) = 9 V
VCEQ(Q2) = −9 V
(b) Vout = Vin = 5.0 V rms
(V ) 2 5.0 V 2
Pout = out =
= 0.5 W
RL
50 Ω
12.
VCC 9.0 V
=
= 180 mA
RL
50 Ω
Vce(cutoff) = 9 V
Ic(sat) =
These points define the ac load line as shown
in Figure 7-3. The Q-point is at a collector
current of 8.3 mA (see problem 11) and the dc
load line rises vertically through this point.
Figure 7-3
13.
Rin = β ac ( re′ + RL ) & R1 & R2
From Problem 11,
ICQ = 8.3 mA
so, IE ≅ 8.3 mA
25 mV
re′ =
=3Ω
8.3 mA
Rin = 100(53 Ω) & 1.0 kΩ & 1.0 kΩ
= 5300 Ω & 1.0 kΩ & 1.0 kΩ = 457 Ω
14.
The DC voltage at the output becomes negative instead of 0 V.
15.
(a) VB(Q1) = 7.5 V + 0.7 V = 8.2 V
VB(Q2) = 7.5 V − 0.7 V = 6.8 V
15 V
VE =
= 7.5 V
2
V − 1.4 V
15 V − 1.4 V
=
= 6.8 mA
ICQ = CC
R1 + R2
1.0 kΩ + 1.0 kΩ
VCEQ(Q1) = 15 V − 7.5 V = 7.5 V
VCEQ(Q2) = 0 V − 7.5 V = −7.5 V
67
Chapter 7
(b) Vin = Vout = 10 Vpp = 3.54 V rms
(V ) 2 (3.54 V) 2
PL = L =
= 167 mW
RL
75 Ω
16.
(a) Maximum peak voltage = 7.5 Vp.
7.5 Vp = 5.30 V rms
2
2
(V )
(5.30 V)
PL(max) = L =
= 375 mW
RL
75 Ω
(b) Maximum peak voltage = 12 Vp.
12 Vp = 8.48 V rms
(VL ) 2 (8.48 V) 2
= 960 mW
PL(max) =
=
RL
75 Ω
17.
(a)
(b)
(c)
(d)
C2 open or Q2 open
power supply off, open R1, Q1 base shorted to ground
Q1 has collector-to-emitter short
one or both diodes shorted
18.
Rin = β ac (re′ + RL ) & R1 & R2
From Problem 15:
ICQ = 6.8 mA
so, IE ≅ 6.8 mA
25 mV 25 mV
re′ =
=
= 3.68 Ω
6.8 mA
IE
Rin = 200(78.7 Ω) & 1 kΩ & 1 kΩ = 485 Ω
485 Ω
⎞
⎛
Vb = ⎜
⎟1 V = 0.91 V rms
⎝ 485 Ω + 50 Ω ⎠
Section 7-3 The Class C Amplifier
19.
⎛t ⎞
PD(avg) = ⎜ on ⎟VCE(sat) I C(sat) = (0.1)(0.18 V)(25 mA) = 450 μW
⎝T ⎠
20.
fr =
21.
Vout(pp) = 2VCC = 2(12 V) = 24 V
22.
Pout =
1
2π LC
=
1
2π (10 mH)(0.001 μF)
= 50.3 kHz
2
0.5VCC
0.5(15 V) 2
= 2.25 W
=
Rc
50 Ω
⎛t ⎞
PD(avg) = ⎜ on ⎟VCE(sat) I C(sat) = (0.1)(0.18 V)(25 mA) = 0.45 mW
⎝T ⎠
Pout
2.25 W
=
η=
= 0.9998
Pout + PD(avg) 2.25 W + 0.45 mW
68
Chapter 7
Section 7-4 Troubleshooting
23.
With C1 open, only the negative half of the input signal appears across RL.
24.
One of the transistors is open between the collector and emitter or a coupling capacitor is
open.
25.
(a)
(b)
(c)
(d)
No dc supply voltage or R1 open
Diode D2 open
Circuit is OK
Q1 shorted from collector to emitter
Application Activity Problems
26.
For the block diagram of textbook Figure 7-34 with no signal from the power amplifier or
preamplifier, but with the microphone working, the problem is in the power amplifier or
preamplifier. It must be assumed that the preamp is faulty, causing the power amp to have no
signal.
27.
For the circuit of Figure 7-35 with the base-emitter junction of Q2 open, the dc output will be
approximately −15 V with a signal output approximately equal to the input.
28.
For the circuit of Figure 7-35 with the collector-emitter junction of Q5 open, the dc output
will be approximately +15 V with a signal output approximately equal to the input (some
distortion possible).
29.
On the circuit board of Figure 7-49, the vertically oriented diode has been installed
backwards.
Datasheet Problems
30.
From the BD135 datasheet of textbook Figure 7-50:
(a) βDC(min) = 40 @ IC = 150 mA, VCE = 2 V
βDC(min) = 25 @ IC = 5 mA, VCE = 2 V
(b) For a BD135, VCE(max) = VCEO = 45 V
(c) PD(max) = 12.5 W @ TC = 25°C
(d) IC(max) = 1.5 A
31.
PD = 10 W @ 50°C from graph in Figure 7-50.
32.
PD = 1 W @ 50°C. Extrapolating from the case temperature graph in Figure 7-50, since
PD = 1.25 W @ 25°C ambient. This derating gives 1 W.
33.
As IC increases from 10 mA to approximately 125 mA, the dc current gain increases. As IC
increases above approximately 125 mA, the dc current gain decreases.
34.
hFE ≅ 89 @ IC = 20 mA
69
Chapter 7
Advanced Problems
35.
36.
TC is much closer to the actual junction temperature than TA. In a given operating
environment, TA is always less than TC.
24 V
24 V
=
= 55.8 mA
330 Ω + 100 Ω 430 Ω
VCE(cutoff) = 24 V
1.0 kΩ
⎛
⎞
VBQ = ⎜
⎟ 24 V = 4.21 V
Ω
+
Ω
1
.
0
k
4
.
7
k
⎝
⎠
VEQ = 4.21 V − 0.7 V = 3.51 V
3.51 V
= 35.1 mA
IEQ ≅ ICQ =
100 Ω
Rc = 330 Ω 330 Ω = 165 Ω
IC(sat) =
VCQ = 24 V − (35.1 mA)(330 Ω) = 12.4 V
VCEQ = 12.4 V − 3.51 V = 8.90 V
8.90 V
= 89.1 mA
Ic(sat) = 35.1 mA +
165 Ω
Vce(cutoff) = 8.90 V + (35.1 mA)(165 Ω) = 14.7 V
See Figure 7-4.
Figure 7-4
37.
See Figure 7-5.
15 V
= 174 mA
IR1 ≅ IR2 =
86 Ω
⎛ 18 Ω ⎞
⎟⎟ 15 V = 3.14 V
VB ≅ ⎜⎜
⎝ 86 Ω ⎠
B
VE = 3.14 V − 0.7 V = 2.44 V
2.44 V
IE ≅ IC =
= 503 mA
4.85 Ω
VC = 15 V − (10 Ω)(503 mA) = 9.97 V
VCE = 7.53 V
25 mV
re′ =
= 0.05 Ω
503 mA
The ac resistance affecting the load line is
Rc + Re + re′ = 10 Ω
βac = βDC ≥ 100
7.53 V
Ic(sat) = 503 mA +
= 1.24 A
10.2 Ω
Vce(cutoff) = 7.53 V + (503 mA)(10.2 Ω) = 12.7 V
The Q-point is closer to cutoff so
Pout = (0.5)(503 mA)2(10.2 Ω) = 1.29 W
As loading occurs, the Q-point will still be closer
to cutoff. The circuit will have
Pout ≥ 1 W for RL ≥ 37.7 Ω. (39 Ω standard)
70
Figure 7-5
Chapter 7
38.
Preamp quiescent current:
30 V
= 45 μA
I1 = I2 =
660 kΩ
15 V − 0.7 V
I3 = I4 = I5 =
= 421 μA
34 kΩ
30 V
I6 = I7 =
= 435 μA
69 kΩ
VB2 = 15 V − (435 μA)(47 kΩ) = −5.45 V
−15 V − (−5.45 V − 0.7 V)
= 1.73 mA
I8 = I9 = I10 =
5.13 kΩ
Itot = 45 μA + 421 μA + 435 μA + 1.73 mA = 2.63 mA
Power amp quiescent current:
I11 ≅ 0
15.7 V − 3(0.7 V) 13.6 V
=
I12 =
= 13.6 mA
1.0 kΩ
1.0 kΩ
−15 V − (−0.7 V) −14.3 V
=
I13 =
= 65 mA
220 Ω
220 Ω
Itot = 13.6 mA + 65 mA = 78.6 mA
Signal current to load:
Scope shows ≈ 9.8 V peak output.
0.707(9.8 V)
= 866 mA
IL =
8Ω
Itot(sys) = 2.63 mA + 78.6 mA + 866 mA = 947 mA
Amp. × hrs = 947 mA × 4 hrs = 3.79 Ah
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 39 through 43 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
39.
Cin open
40.
RE2 open
41.
Q1 collector-emitter open
42.
D2 shorted
43.
Q2 drain-source open
71
Chapter 8
Field-Effect Transistors (FETs)
Section 8-1 The JFET
1.
(a)
(b)
A greater VGS narrows the depletion region.
The channel resistance increases with increased VGS.
2.
The gate-to-source voltage of an n-channel JFET must be zero or negative in order to
maintain the required reverse-bias condition.
3.
See Figure 8-1.
Figure 8-1
4.
See Figure 8-2.
Figure 8-2
Section 8-2 JFET Characteristics and Parameters
5.
VDS = VP = 5 V at point where ID becomes constant.
6.
VGS(off) = −VP = −6 V
The device is on, because VGS = −2 V.
7.
By definition, ID = IDSS when VGS = 0 V for values of VDS > VP.
Therefore, ID = 10 mA.
8.
Since VGS > VGS(off), the JFET is off and ID = 0 A.
72
Chapter 8
9.
10.
VP = −VGS(off) = −(−4 V) = 4 V
The voltmeter reads VDS. As VDD is increased, VDS also increases. The point at which ID
reaches a constant value is VDS = VP = 4 V.
⎞
⎛
V
ID = I DSS ⎜1 − GS ⎟
⎜ VGS(off) ⎟
⎠
⎝
2
2
0V ⎞
⎛
ID = 5 mA⎜1 −
⎟ = 5 mA
⎝ −8V⎠
2
−1V ⎞
⎛
ID = 5 mA⎜1 −
⎟ = 3.83 mA
⎝ −8V ⎠
2
⎛ −2V⎞
ID = 5 mA⎜1 −
⎟ = 2.81 mA
⎝ −8V ⎠
2
⎛ −3V⎞
ID = 5 mA⎜1 −
⎟ = 1.95 mA
⎝ −8V ⎠
2
⎛ −4V⎞
ID = 5 mA⎜1 −
⎟ = 1.25 mA
⎝ −8V ⎠
2
⎛ −5V⎞
ID = 5 mA⎜1 −
⎟ = 0.703 mA
⎝ −8V ⎠
2
⎛ −6V⎞
ID = 5 mA⎜1 −
⎟ = 0.313 mA
⎝ −8V ⎠
2
⎛ −7V⎞
ID = 5 mA⎜1 −
⎟ = 0.078 mA
⎝ −8V ⎠
2
⎛ −8V ⎞
ID = 5 mA⎜1 −
⎟ = 0 mA
⎝ −8V ⎠
See Figure 8-3.
Figure 8-3
73
Chapter 8
11.
⎛
⎞
V
ID = I DSS ⎜1 − GS ⎟
⎜ VGS(off) ⎟
⎝
⎠
V
ID
1 − GS =
VGS(off)
I DSS
2
VGS
ID
= 1−
VGS(off)
I DSS
⎛
I D ⎞⎟
VGS = VGS(off) ⎜1 −
⎜
I DSS ⎟⎠
⎝
⎛
2.25 mA ⎞⎟
VGS = −8 V ⎜1 −
= −8 V(0.329) = −2.63 V
⎜
5 mA ⎟⎠
⎝
12.
13.
⎛
⎞
⎛ −4 V⎞
V
⎟⎟ = 1600 μS
gm = g m 0 ⎜1 − GS ⎟ = 3200 μS⎜⎜1 −
⎜ VGS(off) ⎟
8
V
−
⎝
⎠
⎝
⎠
⎛
⎞
⎛ −2 V⎞
V
⎟⎟ = 1429 μS
gm = g m 0 ⎜1 − GS ⎟ = 2000 μS⎜⎜1 −
⎜ VGS(off) ⎟
7
V
−
⎝
⎠
⎝
⎠
gfs = gm = 1429 μS
VGS 10 V
=
= 2000 MΩ
I GSS 5 nA
14.
RIN =
15.
⎞
⎛
V
VGS = 0 V: ID = I DSS ⎜1 − GS ⎟ = 8 mA(1 − 0)2 = 8 mA
⎜ VGS(off) ⎟
⎠
⎝
2
2
−1V ⎞
⎛
2
2
VGS = −1 V: ID = 8 mA⎜1 −
⎟ = 8 mA(1 − 0.2) = 8 mA(0.8) = 5.12 mA
−
5
V
⎝
⎠
2
⎛ −2V⎞
2
2
VGS = −2 V: ID = 8 mA⎜1 −
⎟ = 8 mA(1 − 0.4) = 8 mA(0.6) = 2.88 mA
⎝ −5V⎠
2
⎛ −3V ⎞
2
2
VGS = −3 V: ID = 8 mA⎜1 −
⎟ = 8 mA(1 − 0.6) = 8 mA(0.4) = 1.28 mA
−
5
V
⎝
⎠
2
⎛ −4V⎞
2
2
VGS = −4 V: ID = 8 mA⎜1 −
⎟ = 8 mA(1 − 0.8) = 8 mA(0.2) = 0.320 mA
⎝ −5V⎠
2
⎛ −5V⎞
2
2
VGS = −5 V: ID = 8 mA⎜1 −
⎟ = 8 mA(1 − 1) = 8 mA(0) = 0 mA
⎝ −5V⎠
Section 8-3 JFET Biasing
16.
VGS = −IDRS = −(12 mA)(100 Ω) = −1.2 V
74
Chapter 8
17.
RS =
VGS
−4V
=
= 800 Ω
ID
5 mA
18.
RS =
VGS
−3V
=
= 1.2 kΩ
2.5 mA
ID
19.
(a) ID = IDSS = 20 mA
(b) ID = 0 A
(c) ID increases
20.
(a) VS = (1 mA)(1.0 kΩ) = 1 V
VD = 12 V − (1 mA)(4.7 kΩ) = 7.3 V
VG = 0 V
VGS = VG − VS = 0 V − 1 V = −1 V
VDS = 7.3 V − 1 V = 6.3 V
(b)
VS = (5 mA)(100 Ω) = 0.5 V
VD = 9 V − (5 mA)(470 Ω) = 6.65 V
VG = 0 V
VGS = VG − VS = 0 V − 0.5 V = −0.5 V
VDS = 6.65 V − 0.5 V = 6.15 V
(c) VS = (−3 mA)(470 Ω) = −1.41 V
VD = −15 V − (3 mA)(2.2 kΩ) = −8.4 V
VG = 0 V
VGS = VG − VS = 0 V − (−1.41 V) = 1.41 V
VDS = −8.4 V − (−1.41 V) = −6.99 V
21.
From the graph, VGS ≅ −2 V at ID = 9.5 mA.
V
−2V
= 211 Ω
RS = GS =
ID
9.5 mA
22.
ID =
I DSS 14 mA
=
= 7 mA
2
2
VGS(off) − 10 V
=
VGS =
= −2.93 V
3.414
3.414
V
2.93 V
= 419 Ω (The nearest standard value is 430 Ω.)
RS = GS =
ID
7 mA
VDD − VD 24 V − 12 V
=
= 1.7 kΩ (The nearest standard value is 1.8 kΩ.)
ID
7 mA
Select RG = 1.0 MΩ. See Figure 8-4.
RD =
Figure 8-4
75
Chapter 8
23.
RIN(total) = RG
RIN =
RIN
VGS
− 10 V
=
= 500 MΩ
I GSS
20 nA
RIN(total) = 10 MΩ 500 MΩ = 9.8 MΩ
24.
For ID = 0,
VGS = −IDRS = (0)(330 Ω) = 0 V
For ID = IDSS = 5 mA
VGS = −IDRS = −(5 mA)(330 Ω) = −1.65 V
From the graph in Figure 8-69 in the textbook, the Q-point is
VGS ≅ −0.95 V and ID ≅ 2.9 mA
25.
For ID = 0,
VGS = 0 V
For ID = IDSS = 10 mA,
VGS = −IDRS = (10 mA)(390 Ω) = 3.9 V
From the graph in Figure 8-70 in the textbook, the Q-point is
VGS ≅ 2.1 V and ID ≅ 5.3 mA
26.
Since VRD = 9 V − 5 V = 4 V,
VRD
4V
= 0.85 mA
RD
4.7 kΩ
VS = IDRS = (0.85 mA)(3.3 kΩ) = 2.81 V
⎛ R2 ⎞
2.2 MΩ ⎞
⎟⎟VDD = ⎛⎜
VG = ⎜⎜
⎟ 9 V = 1.62 V
⎝ 12.2 MΩ ⎠
⎝ R1 + R2 ⎠
ID =
=
VGS = VG − VS = 1.62 V − 2.81 V = −1.19 V
Q-point: ID = 0.85 mA, VGS = −1.19 V
27.
For ID = 0,
⎛ R2 ⎞
2.2 MΩ ⎞
⎟⎟VDD = ⎛⎜
VGS = VG = ⎜⎜
⎟12 V = 4.8 V
⎝ 5.5 MΩ ⎠
⎝ R1 + R2 ⎠
For VGS = 0 V, VS = 4.8 V
V − VGS
V
4 .8 V
ID = S = G
= 1.45 mA
=
RS
RS
3.3 kΩ
The Q-point is taken from the graph in Figure 8-72 in the textbook.
ID ≅ 1.9 mA, VGS = −1.5 V
Section 8-4 The Ohmic Region
28.
RDS =
VDS
0.8 V
=
= 4 kΩ
I D 0.20 mA
76
Chapter 8
29.
30.
31.
0.4 V
= 2.67 kΩ
0.15 mA
0.6 V
= 1.33 kΩ
RDS2 =
0.45 mA
Δ RDS = 2.67 kΩ − 1.33 kΩ = 1.34 kΩ
RDS1 =
⎛
⎞
V
−1 V ⎞
⎛
gm = g m 0 ⎜1 − GS ⎟ = 1.5 mS ⎜1 −
⎟
⎜
⎟
⎝ −3.5 V ⎠
⎝ VGS(off) ⎠
= 1.5 mS(0.714) = 1.07 mS
rds =
1
1
=
= 935 Ω
g m 1.07 mS
Section 8-5 The MOSFET
32.
See Figure 8-5.
Figure 8-5
33.
An n-channel D-MOSFET with a positive VGS is operating in the enhancement mode.
34.
An E-MOSFET has no physical channel or depletion mode. A D-MOSFET has a physical
channel and can be operated in either depletion or enhancement modes.
35.
MOSFETs have a very high input resistance because the gate is insulated from the channel by
an SiO2 layer.
Section 8-6 MOSFET Characteristics and Parameters
36.
K=
I D(on)
(VGS − VGS(th) )
2
=
10 mA
= 0.12 mA/V2
2
(−12 V + 3 V)
ID = K(VGS − VGS(off))2 = (0.12 mA/V2)(−6 V + 3 V)2 = 1.08 mA
2
37.
⎞
⎛
V
ID = I DSS ⎜1 − GS ⎟
⎜ VGS(off) ⎟
⎠
⎝
ID
3 mA
= 4.69 mA
IDSS =
=
2
2
−2V ⎞
⎛
⎞
⎛
V
⎜1 − GS ⎟
⎜1 −
⎟
⎜ VGS(off) ⎟
⎝ − 10 V ⎠
⎝
⎠
77
Chapter 8
38.
(a)
n channel
(b)
⎞
⎛
V
ID = I DSS ⎜1 − GS ⎟
⎜ VGS(off) ⎟
⎠
⎝
2
⎛ −5V⎞
ID = 8 mA⎜1 −
⎟ = 0 mA
⎝ −5V⎠
2
⎛ −3V ⎞
ID = 8 mA⎜1 −
⎟ = 1.28 mA
⎝ −5V⎠
2
−1V ⎞
⎛
ID = 8 mA⎜1 −
⎟ = 5.12 mA
⎝ −5V⎠
2
1V ⎞
⎛
ID = 8 mA⎜1 −
⎟ = 11.5 mA
⎝ −5V⎠
2
3V ⎞
⎛
ID = 8 mA⎜1 −
⎟ = 20.5 mA
−
5V⎠
⎝
2
5V ⎞
⎛
ID = 8 mA⎜1 −
⎟ = 32 mA
⎝ −5V⎠
2
⎛ −4V⎞
ID = 8 mA⎜1 −
⎟ = 0.32 mA
⎝ −5V⎠
⎛ −2V⎞
ID = 8 mA⎜1 −
⎟ = 2.88 mA
⎝ −5V ⎠
2
2
0V ⎞
⎛
ID = 8 mA⎜1 −
⎟ = 8 mA
⎝ −5V⎠
2V ⎞
⎛
ID = 8 mA⎜1 −
⎟ = 15.7 mA
−
5V⎠
⎝
4V ⎞
⎛
ID = 8 mA⎜1 −
⎟ = 25.9 mA
⎝ −5V⎠
(c)
2
See Figure 8-6.
Figure 8-6
78
2
2
Chapter 8
Section 8-7 MOSFET Biasing
39.
40.
(a)
(b)
(c)
(d)
Depletion
Enhancement
Zero bias
Depletion
⎛ 10 MΩ ⎞
(a) VGS = ⎜
⎟ 10 V = 6.8 V
⎝ 14.7 MΩ ⎠
⎛ 1.0 MΩ ⎞
(b) VGS = ⎜
⎟ (−25 V) = −2.27 V
⎝ 11 MΩ ⎠
This MOSFET is on.
This MOSFET is off.
41.
Since VGS = 0 V for each circuit, ID = IDSS = 8 mA.
(a) VDS = VDD − IDRD = 12 V − (8 mA)(1.0 kΩ) = 4 V
(b) VDS = VDD − IDRD = 15 V − (8 mA)(1.2 kΩ) = 5.4 V
(c) VDS = VDD − IDRD = −9 V − (−8 mA)(560 Ω) = −4.52 V
42.
(a) ID(on) = 3 mA @ 4 V, VGS(th) = 2 V
⎛ R2 ⎞
4.7 MΩ ⎞
⎟⎟VDD = ⎛⎜
VGS = ⎜⎜
⎟ 10 V = 3.2 V
⎝ 14.7 MΩ ⎠
⎝ R1 + R2 ⎠
K=
I D(on)
(VGS − VGS(th) )
2
=
3 mA
3 mA
=
= 0.75 mA/V2
2
(4 V − 2 V)
(2 V)2
ID = K(VGS − VGS(th))2 = (0.75 mA/V2)(3.2 V − 2 V)2 = 1.08 mA
VDS = VDD − IDRD = 10 V − (1.08 mA)(1.0 kΩ) = 10 V − 1.08 V = 8.92 V
(b) ID(on) = 2 mA @ 3 V, VGS(th) = 1.5 V
⎛ R2 ⎞
10 MΩ ⎞
⎟⎟VDD = ⎛⎜
VGS = ⎜⎜
⎟ 5 V = 2.5 V
⎝ 20 MΩ ⎠
⎝ R1 + R2 ⎠
K=
I D(on)
(VGS − VGS(th) )
2
=
2 mA
2 mA
=
= 0.89 mA/V2
2
2
(3 V − 1.5 V)
(1.5 V)
ID = K(VGS − VGS(th))2 = (0.89 mA/V2)(2.5 V − 1.5 V)2 = 0.89 mA
VDS = VDD − IDRD = 5 V − (0.89 mA)(1.5 kΩ) = 5 V − 1.34 V = 3.66 V
43.
(a) VDS = VGS = 5 V
V −V
12 V − 5 V
ID = DD DS =
= 3.18 mA
RD
2.2 kΩ
(b) VDS = VGS = 3.2 V
V −V
8 V − 3.2 V
= 1.02 mA
ID = DD DS =
RD
4.7 kΩ
44.
VDS = VDD − IDRD = 15 V − (1 mA)(8.2 kΩ) = 6.8 V
VGS = VDS − IGRG = 6.8 V − (50 pA)(22 MΩ) = 6.799 V
79
Chapter 8
Section 8-8 The IGBT
45.
The input resistance of an IGBT is very high because of the insulated gate structure.
46.
With excessive collector current, the parasitic transistor turns on and the IGBT acts as a
thyristor.
Section 8-9 Troubleshooting
47.
When ID goes to zero, the possible faults are:
RD or RS open, JFET drain-to-source open, no supply voltage, or ground connection open.
48.
If ID goes to 16 mA, the possible faults are:
The JFET is shorted from drain-to-source or VDD has increased.
49.
If VDD is changed to −20 V, ID will change very little or none because the device is operating
in the constant-current region of the characteristic curve.
50.
The device is off. The gate bias voltage must be less than VGS(th). The gate could be shorted
or partially shorted to ground.
51.
The device is saturated, so there is very little voltage from drain-to-source. This indicates
that VGS is too high. The 1.0 MΩ bias resistor is probably open.
Application Activity Problems
−500 mV
−200 mV
0 mV
400 mV
52.
(a)
(b)
(c)
(d)
53.
At VG2S = 6 V, ID ≅ 10 mA
At VG2S = 1 V, ID ≅ 5 mA
54.
VGS1 = Vsensor = −400 mV
VOUT = 9.048 V
V − VOUT 12 V − 9.048 V
=
= 2.64 mA
ID = DD
R3 + R4
1120 Ω
VGS1 = Vsensor = −300 mV
VOUT = 7.574 V
12 V − 7.574 V
= 3.95 mA
ID =
1120 Ω
VGS1 = Vsensor = −200 mV
VOUT = 5.930 V
12 V − 5.930 V
= 5.42 mA
ID =
1120 Ω
80
Chapter 8
VGS1 = Vsensor = −100 mV
VOUT = 4.890 V
12 V − 4.890 V
ID =
= 6.35 mA
1120 Ω
VGS1 = Vsensor = 0 mV
VOUT = 4.197 V
12 V − 4.197 V
= 6.97 mA
ID =
1120 Ω
VGS1 = Vsensor = 100 mV
VOUT = 3.562 V
12 V − 3.562 V
= 7.53 mA
ID =
1120 Ω
VGS1 = Vsensor = 200 mV
VOUT = 2.960 V
12 V − 2.960 V
ID =
= 8.07 mA
1120 Ω
VGS1 = Vsensor = 300 mV
VOUT = 2.382 V
12 V − 2.382 V
= 8.59 mA
ID =
1120 Ω
See Figure 8-7.
Figure 8-7
55.
⎛ R2 ⎞
⎛ 50 kΩ ⎞
VGS2 = ⎜
⎟VDD = ⎜
⎟12 V = 4 V
⎝ 150 kΩ ⎠
⎝ R1 + R2 ⎠
From the graph in Figure 8-79 in the textbook for VG1S = 0 and VG2S = 4 V:
ID ≅ 8 mA
VOUT = 12 V − (8 mA)(1120 Ω) = 3.04 V
81
Chapter 8
Datasheet Problems
56.
The 2N5457 is an n-channel JFET.
57.
From the datasheet in textbook Figure 8-14:
(a)
For a 2N5457, VGS(off) = −0.5 V minimum
(b)
For a 2N5457, VDS(max) = 25 V
(c)
For a 2N5458 @ 25°C, PD(max) = 310 mW
(d)
For a 2N5459, VGS(rev) = −25 V maximum
58.
PD(max) = 310 mW − (2.82 mW/°C)(65°C − 25°C) = 310 mW − 113 mW = 197 mW
59.
gm0(min) = gfs = 2000 μS
60.
Typical ID = IDSS = 9 mA
61.
From the datasheet graph in textbook Figure 8-80:
ID ≅ 1.4 mA at VGS = 0
62.
For a 2N3796 with VGS = 6 V, ID = 15 mA
63.
From the datasheet graph in textbook Figure 8-80:
At VGS = +3 V, ID ≅ 13 mA
At VGS = −2 V, ID ≅ 0.4 mA
64.
yfs = 1500 μS at f = 1 kHz and at f = 1 MHz for both the 2N3796 and 2N3797.
There is no change in gfs over the frequency range.
65.
For a 2N3796, VGS(off) = −3.0 V typical
Advanced Problems
66.
For the circuit of textbook Figure 8-81:
2
⎛
⎞
V
ID = I DSS ⎜1 − GS ⎟ where VGS = IDRS
⎜ VGS(off) ⎟
⎝
⎠
From the 2N5457 datasheet:
IDSS(min) = 1.0 mA and VGS(off) = −0.5 V minimum
ID = 66.3 μA
VGS = −(66.3 μA)(5.6 kΩ) = −0.371 V
VDS = 12 V − (66.3 μA)(10 kΩ + 5.6 kΩ) = 11.0 V
82
Chapter 8
67.
For the circuit of textbook Figure 8-82:
⎛ 3.3 kΩ ⎞
VC = ⎜
⎟ 9 V = (0.248)(9 V) = 2.23 V
⎝ 13.3 kΩ ⎠
From the equation,
2
⎛ VGS ⎞
⎟ where VGS = VG − IDRS
ID = I DSS ⎜
⎜ 1 − VGS(off) ⎟
⎝
⎠
ID is maximum for IDSS(max) and VGS(off) max, so that
IDSS = 16 mA and VGS(off) = −8.0 V
ID = 3.58 mA
VGS = 2.23 V − (3.58 mA)(1.8 kΩ) = 2.23 V − 6.45 V = −4.21 V
68.
From the 2N5457 datasheet:
IDSS(min) = 1.0 mA and VGS(off) = −0.5 minimum
ID(min) = 66.3 μA
VDS(max) = 12 V − (66.3 μA)(15.6 kΩ) = 11.0 V
and
IDSS(max) = 5.0 mA and VGS(off) = −6.0 maximum
ID(max) = 677 μA
VDS(min) = 12 V − (677 μA)(15.6 kΩ) = 1.4 V
69.
VpH = +300 mV
ID = (2.9 mA)(1 + 0.3 V/5.0 V)2 = (2.9 mA)(1.06)2 = 3.26 mA
VDS = 15 V − (3.26 mA)(2.76 kΩ) = 15 V − 8.99 V = +6.01 V
70.
⎛ (1 mA)RS ⎞
⎟
1 mA = I DSS ⎜1 −
⎜
⎟
V
GS(off)
⎝
⎠
2
⎛ (1 mA) RS ⎞
1 mA = 2.9 mA⎜1 −
⎟
− 0.5 V ⎠
⎝
2
2
⎛ (1 mA) RS ⎞
0.345 = ⎜1 −
⎟
− 0 .5 V ⎠
⎝
(1 mA)RS
0.587 = 1 −
− 0.5 V
(1 mA)RS
0.413 =
− 0.5 V
RS = 2.06 kΩ
Use RS = 2.2 kΩ.
Then ID = 963 μA
VGS = VS = (963 μA)(2.2 kΩ) = 2.19 V
So, VD = 2.19 V + 4.5 V = 6.62 V
9 V − 6.62 V
RD =
= 2.47 kΩ
963 μ A
Use RD = 2.4 kΩ.
So, VDS = 9 V −(963 μA)(4.6 kΩ) = 4.57 V
83
Chapter 8
71.
Let ID = 20 mA.
4V
= 200 Ω
RD =
20 mA
Let VS = 2 V.
2V
RS =
= 100 Ω
20 mA
I D(on)
500 mA
=
K=
= 6.17 mA/V2
2
(VGS(on) − VGS(th) )
(10 V − 1 V)2
Let ID = 20 mA.
20 V
= 3.24
6.17 mA/V 2
VGS − 1 V = 1.8 V
VGS = 2.8 V
VG = VS + 2.8 V = 4.8 V
For the voltage divider:
R1 7.2 V
=
= 1.5
R2 4.8 V
Let R2 = 10 kΩ.
R1 = (1.5)(10 kΩ) = 15 kΩ
See Figure 8-8.
(VGS − 1 V)2 =
Figure 8-8
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 72 through 80 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
72.
RS shorted
73.
RD shorted
74.
RG shorted
75.
R1 open
76.
Drain-source open
77.
RD open
78.
R2 shorted
79.
Drain-source shorted
80.
R1 shorted
84
Chapter 9
FET Amplifiers and
Switching Circuits
Section 9-1 The Common-Source Amplifier
Id = gmVgs = (6000 μS)(10 mV) = 60 μA
Id = gmVgs = (6000 μS)(150 mV) = 900 μA
Id = gmVgs = (6000 μS)(0.6 V) = 3.6 mA
Id = gmVgs = (6000 μS)(1 V) = 6 mA
1.
(a)
(b)
(c)
(d)
2.
Av = gmRd
A
20
Rd = v =
= 5.71 kΩ
gm
3500 μS
3.
4.
⎛ R r′ ⎞
⎛ (4.7 kΩ)(12 kΩ) ⎞
Av = ⎜⎜ D ds ⎟⎟ g m = ⎜
⎟ 4.2 mS = 14.2
16.7 kΩ
⎝
⎠
⎝ RD + rds′ ⎠
Rd = RD rds′ = 4.7 kΩ 12 kΩ = 3.38 kΩ
Av =
5.
g m Rd
(4.2 mS)(3.38 kΩ)
=
= 2.73
1 + g m Rs 1 + (4.2 mS)(1.0 kΩ)
(a) N-channel D-MOSFET with zero-bias.
VGS = 0 V.
(b) P-channel JFET with self-bias.
VGS = −IDRS = (−3 mA)(330 Ω) = −0.99 V
(c) N-channel E-MOSFET with voltage-divider bias.
⎛ R2 ⎞
4.7 kΩ ⎞
⎟⎟VDD = ⎛⎜
VGS = ⎜⎜
⎟12 V = 3.84 V
⎝ 14.7 kΩ ⎠
⎝ R1 + R2 ⎠
6.
(a) VG = 0 V, VS = 0 V
VD = VDD − IDRD = 15 V − (8 mA)(1.0 kΩ) = 7 V
(b) VG = 0 V
VS = −IDRD = −(3 mA)(330 Ω) = −0.99 V
VD = −VDD + IDRD = −10 V + (3 mA)(1.5 kΩ) = −5.5 V
⎛ R2 ⎞
4.7 kΩ ⎞
⎟⎟VDD = ⎛⎜
(c) VG = ⎜⎜
⎟12 V = 3.84 V
⎝ 14.7 kΩ ⎠
⎝ R1 + R2 ⎠
VS = 0 V
VD = VDD − IDRD = 12 V − (6 mA)(1.0 kΩ) = 6 V
85
Chapter 9
7.
(a) n-channel D-MOSFET
(b) n-channel JFET
(c) p-channel E-MOSFET
8.
From the curve in Figure 9-16(a) in the textbook:
Id(pp) ≅ 3.9 mA − 1.3 mA = 2.6 mA
9.
From the curve in Figure 9-16(b) in the textbook:
Id(pp) ≅ 6 mA − 2 mA = 4 mA
From the curve in Figure 9-16(c) in the textbook:
Id(pp) ≅ 4.5 mA − 1.3 mA = 3.2 mA
10.
VD = VDD − IDRD = 12 V − (2.83 mA)(1.5 kΩ) = 7.76 V
VS = IDRS = (2.83 mA)(1.0 kΩ) = 2.83 V
VDS = VD − VS = 7.76 V − 2.83 V = 4.93 V
VGS = VG − VS = 0 V − 2.83 V = −2.83 V
11.
12.
Av = gmRd = g m (RD RL ) = 5000 μS(1.5 kΩ 10 kΩ ) = 6.52
Vpp(out) = (2.828)(50 mV)(6.52) = 920 mV
Av = gmRd
Rd = 1.5 kΩ 1.5 kΩ = 750 Ω
Av = (5000 μS)(750 Ω) = 3.75
Vout = AvVin = (3.75)(50 mV) = 188 mV rms
13.
(a) Av = gmRd = g m (RD RL ) = 3.8 mS(1.2 kΩ 22 kΩ ) = 3.8 mS(1138 Ω) = 4.32
14.
See Figure 9-1.
(b) Av = gmRd = g m (RD RL ) = 5.5 mS(2.2 kΩ 10 kΩ ) = 5.5 mS(1.8 kΩ) = 9.92
Figure 9-1
15.
ID =
I DSS 15 mA
=
= 7.5 mA
2
2
86
Chapter 9
16.
VGS = (7.5 mA)(220 Ω) = 1.65 V
2 I DSS
2(15 mA)
=
= 7.5 mS
gm0 =
4V
VGS(off)
gm = (7.5 mS)(1 − 1.65 V/4 V) = 4.41 mS
(4.41 mS)(820 Ω 3.3 kΩ) (4.41 mS)(657 Ω)
g m Rd
= 1.47
Av =
=
=
1 + g m RS
1 + (4.41 mS)(220 Ω)
1 + 0.97
17.
18.
19.
20.
Av = gmRd = (4.41 mS)(820 Ω 3.3 kΩ 4.7 kΩ) = (4.41 mS)(576 Ω) = 2.54
I DSS 9 mA
=
= 4.5 mA
2
2
VGS = −IDRS = −(4.5 mA)(330 Ω) = −1.49 V
VDS = VDD − ID(RD + RS) = 9 V − (4.5 mA)(1.33 kΩ) = 3 V
ID =
Av = gmRd = g m (RD RL ) = 3700 μS(1.0 kΩ 10 kΩ ) = 3700 μS(909 Ω) = 3.36
Vout = AvVin = (3.36)(10 mV) = 33.6 mV rms
⎛ R2 ⎞
6.8 kΩ ⎞
⎟⎟VDD = ⎛⎜
VGS = ⎜⎜
⎟ 20 V = 5.48 V
⎝ 24.8 kΩ ⎠
⎝ R1 + R2 ⎠
I D(on)
18 mA
=
K=
= 0.32 mA/V2
2
2
(VGS − VGS(th) )
(10 V − 2.5 V)
ID = K(VGS − VGS(th))2 = 0.32 mA/V2(5.48 V − 2.5 V)2 = 2.84 mA
VDS = VDD − IDRD = 20 V − (2.84 mA)(1.0 kΩ) = 17.2 V
21.
RIN =
VGS
− 15 V
=
= 600 MΩ
I GSS
25 nA
Rin = 10 MΩ 600 MΩ = 9.84 MΩ
22.
Av = gmRd = 48 mS(1.0 kΩ 10 MΩ ) ≅ 4.8
Vout = AvVin = 4.8(10 mV) = 48 mV rms
ID = IDSS = 15 mA
VD = 24 V − (15 mA)(1.0 kΩ) = 9 V
See Figure 9-2.
Figure 9-2
87
Chapter 9
23.
⎛ R2 ⎞
47 kΩ ⎞
⎟⎟VDD = ⎛⎜
VGS = ⎜⎜
⎟18 V = 9 V
⎝ 94 kΩ ⎠
⎝ R1 + R2 ⎠
I D(on)
8 mA
=
K=
= 0.125 mA/V2
2
(VGS − VGS(th) )
(12 V − 4 V)2
ID(on) = K(VGS − VGS(th))2 = 0.125 mA/V2(9 V − 4 V)2 = 3.13 mA
VDS = VDD − IDRD = 18 V − (3.125 mA)(1.5 kΩ) = 13.3 V
Av = gmRD = 4500 μS(1.5 kΩ) = 6.75
Vds = AvVin = 6.75(100 mV) = 675 mV rms
Section 9-2 The Common-Drain Amplifier
24.
Rs = 1.2 kΩ 1 kΩ ≅ 545 Ω
Av =
RIN =
g m Rs
(5500 μS)(545 Ω)
=
= 0.750
1 + g m Rs 1 + (5500 μS)(545 Ω)
VGS
− 15 V
=
= 3 × 1011 Ω
I GSS
50 pA
Rin = 10 MΩ 3 × 1011 Ω ≅ 10 MΩ
25.
Rs = 1.2 kΩ 1 kΩ ≅ 545 Ω
Av =
RIN =
g m Rs
(3000 μS)(545 Ω)
=
= 0.620
1 + g m Rs 1 + (3000 μS)(545 Ω)
VGS
− 15 V
=
= 3 × 1011 Ω
I GSS
50 pA
Rin = 10 MΩ 3 × 1011 Ω ≅ 10 MΩ
26.
(a) Rs = 4.7 kΩ 47 kΩ = 4.27 kΩ
Av =
g m Rs
(3000 μS)(4.27 kΩ)
=
= 0.928
1 + g m Rs 1 + (3000 μS)(4.27 kΩ)
(b) Rs = 1.0 kΩ 100 Ω = 90.9 Ω
Av =
27.
g m Rs
(4300 μS)(90.9 Ω)
=
= 0.281
1 + g m Rs 1 + (4300 μS)(90.9 Ω)
(a) Rs = 4.7 kΩ 10 kΩ = 3.2 kΩ
Av =
g m Rs
(3000 μS)(3.2 kΩ)
=
= 0.906
1 + g m Rs 1 + (3000 μS)(3.2 kΩ)
(b) Rs = 100 Ω 10 kΩ = 99 Ω
Av =
g m Rs
(4300 μS)(99 Ω)
=
= 0.299
1 + g m Rs 1 + (4300 μS)(99 Ω)
88
Chapter 9
Section 9-3 The Common-Gate Amplifier
28.
Av = gmRd = 4000μS(1.5 kΩ) = 6.0
29.
Rin(source) =
30.
Av = gmRd = 3500μS(10 kΩ) = 35
⎛ 1 ⎞
⎛
⎞
1
⎟ = 2.2 kΩ ⎜⎜
⎟⎟ = 253 Ω
Rin = RS ⎜⎜
⎟
⎝ 3500 μS ⎠
⎝ gm ⎠
31.
XL = 2πfL = 2π(100 MHz)(1.5 mH) = 943 kΩ
Av = gm(CG)XL = (2800 μS)(943 kΩ) = 2640
⎛V ⎞
⎛ 15 V ⎞
Rin = R3 & ⎜ GS ⎟ = 15 MΩ & ⎜
⎟
⎝ 2 nA ⎠
⎝ I GSS ⎠
1
1
=
= 250 Ω
g m 4000 μS
= 15 MΩ & 500 MΩ = 14.6 MΩ
Section 9-4 The Class D Amplifier
2(9 V) 18 V
=
= 3600
5 mV 5 mV
32.
Av =
33.
Pout = (12 V)(0.35 A)= 4.2 W
Pint = (0.25 V)(0.35 A) + 140 mW
= 87.5 mW + 140 mW = 227.5 mW
Pout
4.2 W
η=
=
= 0.95
Pout + Pint 4.2 W + 227.5 mW
Section 9-5 MOSFET Analog Switching
34.
VG − Vp(out) = VGS(Th)
Vp(out) = VG − VGS(Th) = 8 V − 4 V = 4 V
Vpp(in) = 2 Vp(out) = 2 × 4 V = 8 V
35.
fmin = 2 × 15 kHz = 30 kHz
36.
37.
1
fC
1
1
=
f=
= 10 MHz
RC (10 kΩ)(10 pF)
R=
R=
1
1
=
= 40 kΩ
fC (25 kHz)(0.001 μ F)
89
Chapter 9
Section 9-6 MOSFET Digital Switching
38.
Vout = + 5 V when Vin = 0
Vout = 0 V when Vin = + 5 V
39.
(a) Vout = 3.3 V
(c) Vout = 3.3 V
(b)
(d)
Vout = 3.3 V
Vout = 0 V
40.
(a) Vout = 3.3 V
(c) Vout = 0 V
(b)
(d)
Vout = 0 V
Vout = 0 V
41.
The MOSFET has lower on-state resistance and can turn off faster.
Section 9-7 Troubleshooting
42.
(a)
(b)
(c)
(d)
(e)
VD1 = VDD; No signal at Q1 drain; No output signal
VD1 ≅ 0 V (floating); No signal at Q1 drain; No output signal
VGS1 = 0 V; VS = 0 V; VD1 less than normal; Clipped output signal
Correct signal at Q1 drain; No signal at Q2 gate; No output signal
VD2 = VDD; Correct signal at Q2 gate; No Q2 drain signal or output signal
43.
(a) Vout = 0 V if C1 is open.
(b) Av1 = gmRd = 5000 μS(1.5 kΩ) = 7.5
g m Rd
7.5
=
= 2.24
Av2 =
1 + g m Rs 1 + (5000 μS)(470 Ω)
Av = Av1Av2 = (7.5)(2.24) = 16.8
Vout = AvVin = (16.8)(10 mV) = 168 mV
(c) VGS for Q2 is 0 V, so ID = IDSS. The output is clipped.
(d) No Vout because there is no signal at the Q2 gate.
Datasheet Problems
44.
The 2N3796 FET is an n-channel D-MOSFET.
45.
(a)
(b)
(c)
(d)
46.
PD = 200 mW − (1.14 mW/°C)(55°C − 25°C) = 166 mW
47.
For a 2N3796 with f = 1 kHz, gm0 = 900 μS minimum
48.
At VGS = 3.5 V and VDS = 10 V,
ID(min) = 9.0 mA, ID(typ) = 14 mA, ID(max) = 18 mA
49.
For a zero-biased 2N3796, ID(typ) = 1.5 mA
For a 2N3796, the typical VGS(off) = −3.0 V
For a 2N3797, VDS(max) = 20 V
At TA = 25°C, PD(max) = 200 mW
For a 2N3797, VGS(max) = ±10 V
90
Chapter 9
50.
Av(max) = (1800 μS)(2.2 kΩ) = 3.96
Advanced Problems
51.
Rd(min) = 1.0 kΩ 4 kΩ = 800 Ω
Av(min) = (2.5 mS)(800 Ω) = 2.0
Rd(max) = 1.0 kΩ 10 kΩ = 909 Ω
Av(min) = (7.5 mS)(909 Ω) = 6.82
52.
IDSS(typ) = 2.9 mA
12 V
RD + RS =
= 4.14 kΩ
2.9 mA
1
1
=
= 435 Ω
g m 2300 μS
If RS = 0 Ω, then RD ≅ 4 kΩ (3.9 kΩ standard)
Av = (2300 μS)(3.9 kΩ) = 8.97
VDS = 24 V − (2.9 mA)(3.9 kΩ) = 24 V − 11.3 V = 12.7 V
The circuit is a common-source zero-biased amplifier with a drain resistor of 3.9 kΩ.
53.
To maintain VDS = 12 V for the range of IDSS values:
For IDSS(min) = 2 mA
12 V
RD =
= 6 kΩ
2 mA
For IDSS(max) = 6 mA
12 V
= 2 kΩ
RD =
6 mA
To maintain Av = 9 for the range of gm(yfs) values:
For gm(min) = 1500 μS
9
RD =
= 6 kΩ
1500 μS
For gm(max) = 3000 μS
9
RD =
= 3 kΩ
3000 μS
A drain resistance consisting of a 2.2 kΩ fixed resistor
in series with a 5 kΩ variable resistor will provide
more than sufficient range to maintain a gain of 9 over
the specified range of gm values. The dc voltage at the
drain will vary with adjustment and depends on IDSS.
The circuit cannot be modified to maintain both VDS =
12 V and Av = 9 over the full range of transistor
parameter values. See Figure 9-3.
Figure 9-3
91
Chapter 9
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 54 through 62 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
54.
Drain-source shorted
55.
C2 open
56.
C1 open
57.
RS shorted
58.
Drain-source open
59.
R1 open
60.
RD open
61.
R2 open
62.
C2 open
92
Chapter 10
Amplifier Frequency Response
Section 10-1 Basic Concepts
1.
If C1 = C2, the critical frequencies are equal, and they will both cause the gain to decrease at
40 dB/decade below fc.
2.
At sufficiently high frequencies, the reactances of the coupling capacitors become very small
and the capacitors appear effectively as shorts; thus, negligible signal voltage is dropped
across them.
3.
BJT: Cbe, Cbc, and Cce
FET: Cgs, Cgd, and Cds
4.
Low-frequency response: C1, C2, and C3
High-frequency response: Cbc, Cbe, and Cce
5.
6.
7.
⎛ R2 ⎞
⎛ 4.7 kΩ ⎞
⎟⎟VCC − 0.7 V = ⎜
VE ≅ ⎜⎜
⎟ 20 V − 0.7 V = 1.79 V
⎝ 37.7 kΩ ⎠
⎝ R1 + R2 ⎠
V
1.79 V
= 3.2 mA
IE = E =
RE 560 Ω
25 mV
re′ =
= 7.8 Ω
3.2 mA
2.2 kΩ 5.6 kΩ
R
Av = c =
= 202
re′
7.8 Ω
Cin(miller) = Cbc(Av + 1) = 4 pF(202 + 1) = 812 pF
⎛ A +1⎞
203 ⎞
⎟ = 4 pF⎛⎜
Cout(miller) = Cbc ⎜⎜ v
⎟ = 4 pF
⎟
⎝ 202 ⎠
⎝ Av ⎠
ID = 3.36 mA using Eq. 9−2 and a programmable calculator.
VGS = −(3.36 mA)(1.0 kΩ) = −3.36 V
2(10 mA)
= 2.5 mS
gm0 =
8V
⎛ 3.36 V ⎞
gm = (2.5 mS) ⎜1 −
⎟ = 1.45 mS
8V ⎠
⎝
Av = gmRd = (1.45 mS) (1.0 kΩ 10 kΩ) = 1.32
Cgd = Crss = 3 pF
Cin(miller) = Cgd(Av + 1) = 3 pF(2.32) = 6.95 pF
⎛ A +1⎞
2.32 ⎞
⎟ = 3 pF⎛⎜
Cout(miller) = C gd ⎜⎜ v
⎟ = 5.28 pF
⎟
⎝ 1.32 ⎠
⎝ Av ⎠
93
Chapter 10
Section 10-2 The Decibel
8.
Ap =
Pout
5W
=
= 10
Pin
0.5 W
⎛P
Ap(dB) = 10 log⎜⎜ out
⎝ Pin
⎞
⎟ = 10 log 10 = 10 dB
⎟
⎠
Vout 1.2 V
= 24 mV rms
=
Av
50
Av(dB) = 20 log(Av) = 20 log 50 = 34.0 dB
9.
Vin =
10.
⎛ 25 ⎞
The gain reduction is 20 log⎜ ⎟ = −8.3 dB
⎝ 65 ⎠
11.
12.
⎛ 2 mW ⎞
(a) 10 log⎜
⎟ = 3.01 dBm
⎝ 1 mW ⎠
⎛ 1 mW ⎞
(b) 10 log⎜
⎟ = 0 dBm
⎝ 1 mW ⎠
⎛ 4 mW ⎞
(c) 10 log⎜
⎟ = 6.02 dBm
⎝ 1 mW ⎠
⎛ 0.25 mW ⎞
(d) 10 log⎜
⎟ = −6.02 dBm
⎝ 1 mW ⎠
⎛ 4.7 kΩ ⎞
VB = ⎜
⎟ 20 V = 1.79 V
⎝ 37.7 kΩ ⎠
1.79 V
= 3.20 mA
IE =
560 Ω
25 mV
re′ =
= 7.81 Ω
3.2 mA
5.6 kΩ 2.2 kΩ
= 202
Av =
7.81 Ω
Av(dB) = 20 log(202) = 46.1 dB
At the critical frequencies,
Av(dB) = 46.1 dB − 3 dB = 43.1 dB
B
Section 10-3 Low-Frequency Amplifier Response
13.
1
1
=
= 318 Hz
2πRC 2π (100 Ω)(5 μF)
1
1
=
(b) fc =
= 1.59 kHz
2πRC 2π (1.0 kΩ)(0.1 μF)
(a) fc =
94
Chapter 10
14.
RIN(BASE) = βDCRE = 12.5 kΩ
⎛ R2 RIN(BASE) ⎞
⎛
⎞
4.7 kΩ 12.5 kΩ
⎟ 9 V − 0.7 V = ⎜
VE = ⎜
⎟ 9 V − 0.7 V = 1.3 V
⎜
⎜ R1 + R2 RIN(BASE) ⎟
12 kΩ + 4.7 kΩ 12.5 kΩ ⎟⎠
⎝
⎝
⎠
VE
1.3 V
=
IE =
= 13 mA
RE 100 Ω
25 mV
re′ =
= 1.92 Ω
13 mA
Rin(base) = β ac re′ = (125)(1.92 Ω) = 240 Ω
Rin = 50 Ω + Rin(base) R1 R2 = 50 Ω + 240 Ω 12 kΩ 4.7 kΩ = 274 Ω
For the input circuit:
1
1
=
fc =
= 581 Hz
2πRinC1 2π ( 274 Ω)(1 μF)
For the output circuit:
1
1
=
= 177 Hz
fc =
2π ( RC + RL )C3 2π (900 Ω)(1 μF)
For the bypass circuit:
RTH = R1 R2 Rs = 12 kΩ 4.7 kΩ 50 Ω ≅ 49.3 Ω
fc =
1
2π (re′ + RTH / β DC
RC
RL
=
RE )C2
=
1
= 6.89 kHz
2π (2.31 Ω)(10 μF)
220 Ω 680 Ω
= 86.6
re′
1.92 Ω
Av(dB) = 20 log(86.6) = 38.8 dB
The bypass circuit produces the dominant low critical frequency. See Figure 10-1.
Av =
Figure 10-1
95
Chapter 10
15.
From Problem 14:
Av(mid) = 86.6
Av(mid) (dB) = 38.8 dB
For the input RC circuit: fc = 578 Hz
For the output RC circuit: fc = 177 Hz
For the bypass RC circuit: fc = 6.89 kHz
The fc of the bypass circuit is the dominant low critical frequency.
At f = fc = 6.89 kHz:
Av = Av(mid) − 3 dB = 38.8 dB − 3 dB = 35.8 dB
At f = 0.1fc:
Av = 38.8 dB − 20 dB = 18.8 dB
At 10fc (neglecting any high frequency effects):
Av = Av(mid) = 38.8 dB
16.
At f = fc = XC = R
⎛X ⎞
θ = tan −1 ⎜ C ⎟ = tan −1 (1) = 45°
⎝ R ⎠
At f = 0.1fc, XC = 10R.
θ = tan−1(10) = 84.3°
At f = 10fc, XC = 0.1R.
θ = tan−1(0.1) = 5.7°
17.
Rin(gate) =
Rin = RG
VGS
− 10 V
=
= 200 MΩ
I GSS
50 nA
Rin ( gate ) = 10 MΩ 200 MΩ = 9.52 MΩ
For the input circuit:
1
1
=
fc =
= 3.34 Hz
2πRinC1 2π (9.52 MΩ)(0.005 μF)
For the output circuit:
1
1
=
= 3.01 kHz
fc =
2π ( RD + RL )C2 2π (560 Ω + 10 kΩ)(0.005 μF)
The output circuit is dominant. See Figure 10-2. (Av is determined in Problem 18.)
Figure 10-2
96
Chapter 10
18.
2(15 mA)
= 5 mS
6V
Av(mid) = g m ( RD RL ) = 5 mS(560 Ω 10 kΩ) = 2.65
Av(mid) (dB) = 8.47 dB
At fc:
Av = 8.47 dB − 3 dB = 5.47 dB
At 0.1fc:
Av = 8.47 dB − 20 dB = −11.5 dB
At 10fc:
Av = Av(mid) = 8.47 dB (if 10fc is still in midrange)
gm = gm0 =
Section 10-4 High-Frequency Amplifier Response
19.
From Problems 14 and 15:
re′ = 1.92 Ω and Av(mid) = 86.6
Input circuit:
Cin(miller) = Cbc(Av + 1) = 10 pF(87.6) = 876 pF
Ctot = Cbe + Cin ( miller ) = 25 pF + 876 pF = 901 pF
fc =
2π ( Rs
R1
1
R2
β ac re′) Ctot
=
1
= 4.32 MHz
2π ( 50 Ω 12 kΩ 4.7 kΩ 240 Ω ) 901 pF
Output circuit:
⎛ A + 1⎞
87.6 ⎞
⎟ = 10 pF⎛⎜
Cout(miller) = Cbc ⎜⎜ v
⎟ = 10.1 pF
⎟
⎝ 86.6 ⎠
⎝ Av ⎠
1
1
= 94.9 MHz
fc =
=
2πRcCout ( miller ) 2π (166 Ω)(10.1 pF)
Therefore, the dominant high critical frequency is determined by the input circuit:
fc = 4.32 MHz. See Figure 10-3.
Figure 10-3
97
Chapter 10
20.
At f = 0.1fc = 458 kHz:
Av = Av(mid) = 38.8 dB
At f = fc = 4.58 MHz:
Av = Av(mid) − 3 dB = 38.8 dB − 3 dB = 35.8 dB
At f = 10fc = 45.8 MHz:
Av = Av(mid) − 20 dB = 38.8 dB − 20 dB = 18.8 dB
At f = 100fc = 458 MHz:
The roll-off rate changes to −40 dB/decade at f = 94.6 MHz. So, for frequencies from
45.8 MHz to 94.6 MHz, the roll-off rate is −20 dB/decade and above 94.6 MHz it is
−40 dB/decade.
The change in frequency from 45.8 MHz to 94.6 MHz represents
94.6 MHz − 45.8 MHz
× 100% = 11.8%
458 MHz − 45.8 MHz
So, for 11.8% of the decade from 45.8 MHz to 458 MHz, the roll-off rate is −20 dB/decade
and for the remaining 88.2% of the decade, the roll-off rate is −40 dB/ decade.
Av = 18.8 dB − (0.118)(20 dB) − (0.882)(40 dB) = 18.8 dB − 2.36 dB − 35.3 dB = −18.9 dB
21.
Cgd = Crss = 4 pF
Cgs = Ciss − Crss = 10 pF − 4 pF = 6 pF
Input circuit:
Cin(miller) = Cgd(Av + 1) = 4 pF(2.65 + 1) = 14.6 pF
Ctot = C gs + Cin ( miller ) = 6 pF + 14.6 pF = 20.6 pF
1
1
=
= 12.9 MHz
2π Rs Ctot 2π (600 Ω)(20.6 pF)
Output circuit:
⎛ A + 1⎞
2.65 + 1 ⎞
⎟ = 4 pF⎛⎜
Cout(miller) = C gd ⎜⎜ v
⎟ = 5.51 pF
⎟
⎝ 2.65 ⎠
⎝ Av ⎠
1
1
=
fc =
= 54.5 MHz
2πRd C out ( miller ) 2π (530 Ω)(5.51 pF)
The input circuit is dominant.
fc =
22.
From Problem 21: For the input circuit, fc = 12.9 MHz and
for the output circuit, fc = 54.5 MHz.
The dominant critical frequency is 12.9 MHz.
At f = 0.1fc = 1.29 MHz: Av = Av(mid) = 8.47 dB, θ = 0°
At f = fc = 12.9 MHz: Av = Av(mid) − 3 dB = 8.47 dB − 3 dB = 5.47 dB, θ = tan−1(1) = 45°
At f = 10fc = 129 MHz:
From 12.9 MHz to 54.5 MHz the roll-off is −20 dB/decade. From 54.5 MHz to 129 MHz the
roll-off is −40 dB/decade.
The change in frequency from 12.9 MHz to 54.5 MHz represents
54.5 MHz − 12.9 MHz
× 100% = 35.8%
129 MHz − 12.9 MHz
So, for 35.8% of the decade, the roll-off rate is −20 dB/decade and for 64.2% of the decade,
the rate is −40 dB/decade.
Av = 5.47 dB − (0.358)(20 dB) − (0.642)(40 dB) = −27.4 dB
At f = 100fc = 1290 MHz: Av = −27.4 dB − 40 dB = −67.4 dB
98
Chapter 10
Section 10-5 Total Amplifier Frequency Response
23.
fcl = 136 Hz
fcu = 8 kHz
24.
From Problems 14 and 19:
fcu = 4.32 MHz and fcl = 6.89 kHz
BW = fcu − fcl = 4.32 MHz − 6.89 kHz = 4.313 MHz
25.
ftot = (BW)Av(mid)
f tot
200 MHz
=
BW =
= 5.26 MHz
Av ( mid )
38
Therefore, fcu ≅ BW = 5.26 MHz
26.
6 dB/octave roll-off:
At 2fcu: Av = 50 dB − 6 dB = 44 dB
At 4fcu: Av = 50 dB − 12 dB = 38 dB
20 dB/decade roll-off:
At 10fcu: Av = 50 dB − 20 dB = 30 dB
Section 10-6 Frequency Response of Multistage Amplifiers
27.
Dominant f cl′ = 230 Hz
Dominant f cu′ = 1.2 MHz
28.
BW = 1.2 MHz − 230 Hz ≅ 1.2 MHz
29.
f cl′ =
400 Hz
21/2 − 1
=
400 Hz
= 622 Hz
0.643
f cu′ = (800 kHz) 21/2 − 1 = 0.643(800 kHz) = 515 kHz
BW = 515 kHz − 622 Hz ≅ 514 kHz
30.
31.
f cl′ =
50 Hz
f cl′ =
125 Hz
1/3
2
−1
=
50 Hz
= 98.1 Hz
0.510
=
125 Hz
= 194 Hz
0.643
21/2 − 1
f cu′ 2.5 MHz
BW = 2.5 MHz − 194 Hz ≅ 2.5 MHz
99
Chapter 10
Section 10-7 Frequency Response Measurements
32.
fcl =
0.35 0.35
=
= 350 Hz
tf
1 ms
fcu =
0.35 0.35
=
= 17.5 MHz
tr
20 ns
33.
Increase the frequency until the output voltage drops to 3.54 V (3 dB below the midrange
output voltage). This is the upper critical frequency.
34.
tr ≅ 3 div × 5 μs/div = 15 μs
tf ≅ 6 div × 0.1 ms/div = 600 μs
0.35
0.35
=
= 583 Hz
fcl =
tf
600 μs
0.35 0.35
=
= 23.3 kHz
tr
15 μs
BW = 23.3 kHz − 583 Hz = 22.7 kHz
fcu =
Application Activity Problems
35.
Q1 stage:
1
1
=
= 1.77 Hz
2π ( R1 & R2 & β ac R4 )C1 2π (90 kΩ)1 μ F
1
1
=
= 15.9 Hz
fcl(bypass) =
2π R4 C2 2π (1 kΩ)10 μ F
1
1
=
fcl(output) =
= 4.42 Hz
2π ( R5 + R6 & R7 & β ac ( R9 + R10 )C3 2π (36 kΩ)1 μ F
fcl(input) =
Q2 stage:
1
1
=
= 4.42 Hz
2π ( R5 & R6 & R7 & β ac ( R9 + R10 )C3 2π (36 kΩ)1 μ F
1
1
fcl(bypass) =
=
= 7.76 Hz
Ω
π
2
(205
)100 μ F
⎛
R6 & R7 ⎞
2π ⎜ R9 +
⎟C
β ac ⎠ 4
⎝
1
1
=
= 4.45 Hz
fcl(output) =
2π ( R8 + RL )C5 2π (35.8 kΩ)1 μ F
The dominant critical frequency of 15.9 Hz is set by the Q1 bypass circuit.
fcl(input) =
36.
Changing to 1 μF coupling capacitors does not significantly affect the overall bandwidth
because the upper critical frequency is much greater than the dominant lower critical
frequency.
100
Chapter 10
37.
Increasing the load resistance on the output of the second stage has no effect on the dominant
lower critical frequency because the critical frequency of the output circuit will decrease and
the critical frequency of the first stage input circuit will remain dominant.
38.
The Q1 stage bypass circuit set the dominant critical frequency.
1
1
=
= 15.9 Hz
fcl(bypass) =
2π R4 C2 2π (1 kΩ)10 μ F
This frequency is not dependent on βac and is not affected.
Datasheet Problems
39.
Cin(tot) = (25 + 1)4 pF + 8 pF = 112 pF
40.
BWmin =
41.
Cgd = Crss = 1.3 pF
Cgs = Ciss − Crss = 5 pF − 1.3 pF = 3.7 pF
Cds = Cd − Crss = 5 pF − 1.3 pF = 3.7 pF
fT
Av ( mid )
=
300 MHz
= 6 MHz
50
Advanced Problems
42.
From Problem 12: re′ = 7.81 Ω and IE = 3.2 mA
VC ≅ 20 V − (3.2 mA)(2.2 kΩ) = 13 V dc
The maximum peak output signal can be approximately 6 V.
The maximum allowable gain for the two stages is
6V
= 424
Av(max) =
1.414(10 mV)
For stage 1:
Rc = 2.2 kΩ 33 kΩ 4.7 kΩ (150)(7.81 Ω) = 645 Ω
Av1=
645 Ω
= 82.6
7.81 Ω
For stage 2:
Rc = 2.2 kΩ 5.6 kΩ = 1.58 kΩ
1.58 kΩ
= 202
7.81 Ω
Av(tot) = (82.6)(202) = 16,685
Av1=
The amplifier will not operate linearly with a 10 mV rms input signal.
The gains of both stages can be reduced or the gain of the second stage only can be reduced.
101
Chapter 10
One approach is leave the gain of the first stage as is and bypass a portion of the emitter
resistance in the second stage to achieve a gain of 424/82.6 = 5.13.
Rc
= 5.13
Re + re′
R − 5.13re′ 1.58 kΩ − 40.1 Ω
=
Re = c
= 300 Ω
5.13
5.13
Modification: Replace the 560 Ω emitter resistor in the second stage with an unbypassed
300 Ω resistor and a bypassed 260 Ω resistor (closest standard value is 270 Ω).
Av =
43.
From Problems 17, 18, and 21:
Ctot = C gs + Cin ( miller ) = 20.6 pF
⎛ 2.65 + 1 ⎞
Cout(miller) = 4 pF⎜
⎟ = 5.51 pF
⎝ 2.65 ⎠
Stage 1:
1
1
= 3.34 Hz
fcl(in) =
=
2πRin C1 2π (9.52 MΩ)(0.005 μF)
1
= 3.34 Hz since Rin(2) >> 560 Ω
fcl(out) =
2π (9.52 MΩ)(0.005 μF)
1
fcu(in) =
= 12.9 MHz
2π (600 Ω)(20.6 pF)
1
= 10.9 MHz
fcu(out) =
2π (560 Ω)(20.6 pF + 5.51 pF)
Stage 2:
1
1
= 3.34 Hz
fcl(in) =
=
2πRin C1 2π (9.52 MΩ)(0.005 μF)
1
= 3.01 kHz
fcl(out) =
2π (10.6 kΩ)(0.005 μF)
1
fcu(in) =
= 10.9 MHz
2π (560 Ω)(20.6 pF + 5.51 pF)
1
fcu(out) =
= 54.5 MHz
2π (560 Ω 10 kΩ)(5.51 pF)
Overall:
fcl(in) = 3.34 kHz and fcu(in) = 10.9 MHz
BW ≅ 10.9 MHz
102
Chapter 10
44.
Rin(1) = 22 kΩ (100)(320 Ω) = 13 kΩ
⎛ 13 kΩ ⎞
VB(1) = ⎜
⎟ 12 V = 1.38, VE(1) = 0.681 V
⎝ 113 kΩ ⎠
0.681 V
= 2.13 mA, re′ = 11.7 Ω
IE(1) =
320 Ω
Rc(1) = 4.7 kΩ 33 kΩ 22 kΩ (100)(100 Ω) = 2.57 kΩ
Av(1) =
2.57 kΩ
= 23
112 Ω
Rin(2) = 22 kΩ (100)(1010 Ω) = 18 kΩ
⎛ 18 kΩ ⎞
VB(2) = ⎜
⎟ 12 V = 4.24, VE(1) = 3.54 V
⎝ 51 kΩ ⎠
3.54 V
= 3.51 mA, re′ = 7.13 Ω
IE(2) =
1.01 kΩ
Rc(2) = 3 kΩ 10 kΩ = 2.31 kΩ
2.31 kΩ
= 24 maximum
107.13 Ω
2.31 kΩ
Av(2) =
= 2.27 minimum
101 kΩ + 7.13 Ω
Av(2) =
Av(tot) = (23)(24) = 552 maximum
Av(tot) = (23)(2.27) = 52.3 minimum
This is a bit high, so adjust Rc(1) to 3 kΩ, then
3 kΩ 22 kΩ 33 kΩ 101 kΩ
Av(1) =
= 21.4
112 Ω
Now,
Av(tot) = (21.3)(24) = 513 maximum
Av(tot) = (21.3)(2.27) = 48.5 minimum
Thus, Av is within 3% of the desired specifications.
Frequency response for stage 1:
Rin = 22 kΩ 100 kΩ 32 kΩ = 11.5 kΩ
fcl(in) =
1
= 1.38 Hz
2π (11.5 kΩ)(10 μF)
Remitter = 220 Ω (100 Ω + 11.7 Ω + (22 kΩ 100 kΩ /100) = 125 Ω
fcl(bypass) =
1
= 12.7 Hz
2π (125 Ω)(100 μF)
Rout = 3 kΩ + (33 kΩ 22 kΩ (100)(107 Ω)) = 8.91 kΩ
fcl(out) =
1
= 1.79 Hz
2π (8.91 kΩ)(10 μF)
103
Chapter 10
Frequency response for stage 2:
fcl(in) = 1.79 Hz (same as fcl(out) for stage 1)
Rout = 3 kΩ + 10 kΩ = 13 kΩ
1
fcl(out) =
= 1.22 Hz
2π (13 kΩ)(10 μF)
This means that CE(2) is the frequency limiting capacitance.
Remitter 910 Ω (100 Ω + 7 Ω + (22 kΩ 33 kΩ 3 kΩ) / 100) = 115 Ω
For f cl′ = 1 kHz:
1
= 1.38 μF
2π (115 Ω)(1 kHz)
1.5 μF is the closest standard value and gives
1
fcl(bypass) =
= 922 Hz
2π (115 Ω)(1.5 μF)
This value can be moved closer to 1 kHz by using additional parallel bypass capacitors in
stage 2 to fine-tune the response.
CE(2) =
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 45 through 48 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
45.
RC open
46.
Output capacitor open
47.
R2 open
48.
Drain-source shorted
104
Chapter 11
Thyristors
Section 11-1 The Four-Layer Diode
1.
VA = VBE + VCE(sat) = 0.7 V + 0.2 V = 0.9 V
V RS = VBIAS − VA = 25 V − 0.9 V = 24.1 V
IA =
2.
VRS
RS
=
24.1 V
= 24.1 mA
1.0 kΩ
VAK 15 V
=
= 15 MΩ
I A 1 μA
(b) From 15 V to 50 V for an increase of 35 V.
(a) RAK =
Section 11-2 The Silicon-Controlled Rectifier (SCR)
3.
See Section 11-2 in the textbook.
4.
Neglecting the SCR voltage drop,
30 V − 0.7 V
Rmax =
= 2.93 kΩ
10 mA
5.
When the switch is closed, the battery V2 causes illumination of the lamp. The light energy
causes the LASCR to conduct and thus energize the relay. When the relay is energized, the
contacts close and 115 V ac are applied to the motor.
6.
See Figure 11-1.
Figure 11-1
105
Chapter 11
Section 11-3 SCR Applications
7.
Add a transistor to provide inversion of the negative half-cycle in order to obtain a positive
gate trigger.
8.
D1 and D2 are full-wave rectifier diodes.
9.
See Figure 11-2.
Figure 11-2
Section 11-4 The Diac and Triac
10.
Vin(p) = 1.414Vin(rms) = 1.414(25 V) = 35.4 V
35.35 V
Ip = Vin(p) =
= 35.4 mA
1.0 kΩ
20 V
= 20 mA
Current at breakover =
1 .0 k Ω
See Figure 11-3.
Figure 11-3
106
Chapter 11
11.
15 V
= 3.19 mA
4.7 kΩ
See Figure 11-4.
Ip =
Figure 11-4
Section 11-5 The Silicon-Controlled Switch (SCS)
12.
See Section 11-5 in the text.
13.
Anode, cathode, anode gate, and cathode gate
Section 11-6 The Unijunction Transistor (UJT)
rB′1
2 .5 k Ω
=
= 0.385
′
′
rB1 + rB 2
2 .5 k Ω + 4 k Ω
14.
η=
15.
Vp = ηVBB + Vpn = 0.385(15 V) + 0.7 V = 6.48 V
16.
VBB − Vv
V − VP
< R1 < BB
Iv
Ip
12 V − 0.8 V
12 V − 10 V
< R1 <
15 mA
10 μA
747 Ω < R1 < 200 kΩ
Section 11-7 The Programmable UJT (PUT)
17.
⎛ R3
(a) VA = ⎜⎜
⎝ R 2 + R3
⎛ R3
(b) VA = ⎜⎜
⎝ R 2 + R3
⎞
10 kΩ ⎞
⎟⎟VB + 0.7 V = ⎛⎜
⎟ 20 V + 0.7 V = 9.79 V
⎝ 22 kΩ ⎠
⎠
⎞
47 kΩ ⎞
⎟⎟VB + 0.7 V = ⎛⎜
⎟ 9 V + 0.7 V = 5.2 V
94
⎝ kΩ ⎠
⎠
107
Chapter 11
18.
(a) From Problem 17(a), VA = 9.79 V at turn on.
9.79 V
= 20.8 mA at turn on
I=
470 Ω
10 V
Ip =
= 21.3 mA
470 Ω
See Figure 11-5.
Figure 11-5
(b) From Problem 17(b), VA = 5.2 V at turn on.
5.2 V
I =
= 15.8 mA at turn on
330 Ω
10 V
= 30.3 mA
Ip =
330 Ω
See Figure 11-6.
Figure 11-6
108
Chapter 11
19.
⎛ R3 ⎞
10 kΩ ⎞
⎟⎟ 6 V + 0.7 V = ⎛⎜
VA = ⎜⎜
⎟ 6 V + 0.7 V = 3.7 V at turn on
⎝ 20 kΩ ⎠
⎝ R 2 + R3 ⎠
VR1 ≅ VA = 3.7 V at turn on.
See Figure 11-7.
Figure 11-7
20.
⎛ 15 kΩ ⎞
VA = ⎜
⎟ 6 V + 0.7 V
⎝ 25 kΩ ⎠
= 4.3 V at turn on
VR1 ≅ VA = 4.3 V
See Figure 11-8.
Figure 11-8
Application Activity Problems
21.
The motor runs fastest at 0 V for the motor speed control circuit.
22.
If the rheostat resistance decreases, the SCR turns on earlier in the ac cycle.
23.
As the PUT gate voltage increases in the circuit, the PUT triggers on later in the ac cycle
causing the SCR to fire later in the cycle, conduct for a shorter time, and decrease the power
to the motor.
109
Chapter 11
Advanced Problems
24.
D1:
R1:
R2:
Q1:
R3:
15 V zener (1N4744)
100 Ω, 1 W
100 Ω, 1 W
Any SCR with a 1 A minimum rating (1.5 A would be better)
150 Ω, 1 W
25.
See Figure 11-9.
Figure 11-9
26.
Vp = ηVBB + Vpn = (0.75)(12 V) + 0.7 V = 9.7 V
Iv = 10 mA and Ip = 20 μA
12 V − 9.7 V
= 115 kΩ
R1 <
20 μA
12 V − 1 V
R1 >
= 1.1 kΩ
10 mA
Select R1 = 51 kΩ as an intermediate value.
During the charging cycle:
V(t) = VF − (VF − V0 )e − t1 / R1C
9.7 V = 12 V − (12 V − 1 V)e −t1 / R1C
−
t1
⎛ 2 .3 V ⎞
= ln⎜
⎟
R1C
⎝ 11 V ⎠
⎛ 2.3 V ⎞
3
t1 = − R1C ln⎜
⎟ = 1.56R1C = 79.8 × 10 C
⎝ 11 V ⎠
110
Chapter 11
During the discharging cycle (assuming R2 >> RB1):
V(t) = VF − (VF − V0 )e −t 2 / R 2 C
1 V = 0 V − (0 V − 9.3 V)e −t 2 / R2C
−
t2
⎛ 1V ⎞
= ln⎜
⎟
R2 C
⎝ 9.3 V ⎠
⎛ 1V ⎞
t2 = − R2 C ln⎜
⎟ = 2.23R2C
⎝ 9.3 V ⎠
Let R2 = 100 kΩ, so t2 = 223 × 103C.
Since f = 2.5 kHz, T = 400 μs
T = t1 + t2 = 79.8 × 103C + 223 × 103C = 303 × 103C = 400 μs
400 μs
= 0.0013 μF
C=
303 × 10 3
See Figure 11-10.
Figure 11-10
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 27 through 29 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
27.
Cathode-anode shorted
28.
Gate-cathode open
29.
R1 shorted
111
Chapter 12
The Operational Amplifier
Section 12-1 Introduction to Operational Amplifiers
1.
Practical op-amp: High open-loop gain, high input impedance. low output impedance, and
high CMRR.
Ideal op-amp: Infinite open-loop gain, infinite input impedance, zero output impedance, and
infinite CMRR.
2.
Op amp 2 is more desirable because it has a higher input impedance, a lower output
impedance, and a higher open-loop gain.
Section 12-2 Op-Amp Input Modes and Parameters
3.
(a) Single-ended differential input
(b) Double-ended differential input
(c) Common-mode
4.
CMRR (dB) = 20 log(250,000) = 108 dB
5.
⎛A
CMRR (dB) = 20 log⎜⎜ ol
⎝ Acm
6.
CMRR =
Acm =
⎞
175,000 ⎞
⎟⎟ = 20 log⎛⎜
⎟ = 120 dB
⎝ 0.18 ⎠
⎠
Aol
Acm
Aol
90,000
= 0.3
=
CMRR 300,000
8.3 μ A + 7.9 μ A
= 8.1 μA
2
7.
IBIAS =
8.
Input bias current is the average of the two input currents. Input offset current is the
difference between the two input currents.
IOS = 8.3 μA − 7.9 μA = 400 nA
9.
Slew rate =
10.
Δt =
24 V
= 1.6 V/μ s
15 μs
ΔVout
20 V
=
= 40 μ s
slew rate 0.5 V/μs
112
Chapter 12
Section 12-4 Op-Amps with Negative Feedback
11.
(a) Voltage-follower
(b) Noninverting
(c) Inverting
12.
B=
Ri
1.0 kΩ
= 9.90 × 10−3
=
Ri + R f 101 kΩ
Vf = BVout = (9.90 × 10−3)5 V = 0.0495 V = 49.5 mV
1
1
=
= 374
B 1.5 kΩ / 561.5 kΩ
(b) Vout = Acl(NI)Vin = (374)(10 mV) = 3.74 V rms
⎛ 1.5 kΩ ⎞
(c) Vf = ⎜
⎟ 3.74 V = 9.99 mV rms
⎝ 561.5 kΩ ⎠
13.
(a) Acl(NI) =
14.
(a) Acl(NI) =
15.
(a) 1 +
16.
(a) Acl(VF) = 1
⎛ Rf
(b) Acl(I) = − ⎜⎜
⎝ Ri
1
B
1
(b) Acl(NI) =
B
1
(c) Acl(NI) =
B
1
(d) Acl(NI) =
B
1
= 11
4.7 kΩ / 51.7 kΩ
1
=
= 101
10 kΩ / 1.01 MΩ
1
=
= 47.8
4.7 kΩ / 224.7 kΩ
1
=
= 23
1.0 kΩ / 23 kΩ
=
Rf
= Acl(NI)
Ri
Rf = Ri(Acl(NI) − 1) = 1.0 kΩ(50 − 1) = 49 kΩ
Rf
(b)
= Acl(I)
Ri
Rf = −Ri(Acl(I)) = −10 kΩ(−300) = 3 MΩ
(c) Rf = Ri(Acl(NI) − 1) = 12 kΩ(7) = 84 kΩ
(d) Rf = −Ri(Acl(I)) = −2.2 kΩ(−75) = 165 kΩ
⎞
100 kΩ ⎞
⎟ = −⎛⎜
⎟ = −1
⎟
⎝ 100 kΩ ⎠
⎠
1
1
=
(c) Acl(NI) =
= 22
47 kΩ
⎞
⎛ Ri ⎞ ⎛
⎟ ⎜
⎟
⎜
⎜ Ri + R f ⎟ ⎝ 47 kΩ + 1.0 MΩ ⎠
⎠
⎝
⎛ Rf ⎞
330 kΩ ⎞
⎟ = −⎛⎜
(d) Acl(I) = − ⎜⎜
⎟ = −10
⎟
⎝ 33 kΩ ⎠
⎝ Ri ⎠
113
Chapter 12
17.
(a) Vout ≅ Vin = 10 mV, in phase
⎛ Rf ⎞
⎟Vin = −(1)(10 mV) = −10 mV, 180° out of phase
(b) Vout = AclVin = − ⎜⎜
⎟
⎝ Ri ⎠
1
1
(c) Vout = Vin =
Vin =
10 mV = 223 mV, in phase
47
kΩ ⎞
⎛ R1 ⎞
⎛
⎜
⎟
⎜⎜
⎟⎟
⎝ 1047 kΩ ⎠
⎝ Ri + R f ⎠
⎛ Rf ⎞
330 kΩ ⎞
⎟ Vin = −⎛⎜
(d) Vout = − ⎜⎜
⎟ 10 mV = −100 mV, 180° out of phase
⎟
⎝ 33 kΩ ⎠
⎝ Ri ⎠
18.
Vin
1V
=
= 455 μA
Rin 2.2 kΩ
(b) If ≅ Iin = 455 μA
(c) Vout = −IfRf = −(455 μA)(22 kΩ) = −10 V
⎛ Rf ⎞
22 kΩ ⎞
⎟ = −⎛⎜
(d) Acl(I) = − ⎜⎜
⎟ = −10
⎟
⎝ 2 .2 k Ω ⎠
⎝ Ri ⎠
(a) Iin =
Section 12-5 Effects of Negative Feedback on Op-Amp Impedances
19.
2.7 kΩ
= 0.0048
562.5 kΩ
Zin(NI) = (1 + Aol)Zin = [1 + (175,000)(0.0048)]10 MΩ = 8.41 GΩ
Z out
75 Ω
=
Zout(NI) =
= 89.2 mΩ
1 + Aol B 1 + (175,000)(0.0048)
(a) B =
1.5 kΩ
= 0.031
48.5 kΩ
Zin(NI) = (1 + AolB)Zin = [1 + (200,000)(0.031)]1 MΩ = 6.20 GΩ
Z out
25 Ω
=
= 4.04 mΩ
Zout(NI) =
1 + Aol B 1 + (200,000)(0.031)
(b) B =
56 kΩ
= 0.053
1.056 MΩ
Zin(NI) = (1 + AolB)Zin = [1 + (50,000)(0.053)]2 MΩ = 5.30 GΩ
Z out
50 Ω
=
Zout(NI) =
= 19.0 mΩ
1 + Aol B 1 + (50,000)(0.053)
(c) B =
114
Chapter 12
20.
(a) Zin(VF) = (1 + Aol)Zin = (1 + 220,000)6 MΩ = 1.32 × 1012 Ω = 1.32 TΩ
Z out
100 Ω
=
= 455 μ Ω
Zout(VF) =
1 + Aol 1 + 220,000
(b) Zin(VF) = (1 + Aol)Zin = (1 + 100,000)5 MΩ = 5 × 1011 Ω = 500 GΩ
Z out
60 Ω
=
Zout(VF) =
= 600 μ Ω
1 + Aol 1 + 100,000
(c) Zin(VF) = (1 + Aol)Zin = (1 + 50,000)800 kΩ = 40 GΩ
Z out
75 Ω
=
= 1.5 mΩ
Zout(VF) =
1 + Aol 1 + 500,000
21.
(a) Zin(I) ≅ Ri = 10 kΩ
Ri
10 kΩ
=
B=
= 0.0625
Ri + R f 160 kΩ
Zout(I) =
Z out
40 Ω
=
= 5.12 mΩ
1 + Aol B 1 + (125,000)(0.0625)
(b) Zin(I) ≅ Ri = 100 kΩ
100 kΩ
= 0.091
B=
1.1 MΩ
Z out
50 Ω
=
= 7.32 mΩ
Zout(I) =
+
+
1 Aol B 1 (75,000)(0.91)
(c) Zin(I) ≅ Ri = 470 Ω
470 Ω
B=
= 0.045
10,470 Ω
Z out
70 Ω
=
Zout(I) =
= 6.22 mΩ
1 + Aol B 1 + (250,000)(0.045)
Section 12-6 Bias Current and Offset Voltage
22.
(a) Rcomp = Rin = 75 Ω placed in the feedback path.
IOS = 42 μA − 40 μA = 2 μA
(b) VOUT(error) = AvIOSRin = (1)(2 μA)(75 Ω) = 150 μV
23.
(a) Rc = Ri R f = 2.7 kΩ 560 kΩ = 2.69 kΩ
(b) Rc = Ri R f = 1.5 kΩ 47 kΩ = 1.45 kΩ
(c) Rc = Ri R f = 56 kΩ 1.0 MΩ = 53 kΩ
See Figure 12-1.
Figure 12-1
115
Chapter 12
24.
VOUT(error) = AvVIO = (1)(2 nV) = 2 nV
25.
VOUT(error) = (1 + Aol)VIO
VOUT(error)
35 mV
VIO =
= 175 nV
=
Aol
200,000
Section 12-7 Open-Loop Response
26.
Acl = 120 dB − 50 dB = 70 dB
27.
The gain is ideally 175,000 at 200 Hz. The midrange dB gain is
20 log(175,000) = 105 dB
The actual gain at 200 Hz is
Av (dB) = 105 dB − 3 dB = 102 dB
⎛ 102 ⎞
Av = log −1 ⎜
⎟ = 125,892
⎝ 20 ⎠
BWol = 200 Hz
28.
29.
fc X C
=
f
R
Rf c (1.0 kΩ)(5 kHz)
=
= 1.67 kΩ
XC =
f
3 kHz
(a)
(b)
(c)
(d)
(e)
Vout
=
Vin
Vout
=
Vin
Vout
=
Vin
Vout
=
Vin
Vout
=
Vin
1
⎞
⎟⎟
⎠
2
⎞
⎟⎟
⎠
2
⎞
⎟⎟
⎠
2
⎞
⎟⎟
⎠
2
⎛ f ⎞
1 + ⎜⎜ ⎟⎟
⎝ fc ⎠
2
⎛ f
1 + ⎜⎜
⎝ fc
1
⎛ f
1 + ⎜⎜
⎝ fc
1
⎛ f
1 + ⎜⎜
⎝ fc
1
⎛ f
1 + ⎜⎜
⎝ fc
1
=
1
⎛ 1 kHz ⎞
1+ ⎜
⎟
⎝ 12 kHz ⎠
=
1
⎛ 5 kHz ⎞
1+ ⎜
⎟
⎝ 12 kHz ⎠
=
= 0.707
2
1
⎛ 20 kHz ⎞
1+ ⎜
⎟
⎝ 12 kHz ⎠
=
= 0.923
2
1
⎛ 12 kHz ⎞
1+ ⎜
⎟
⎝ 12 kHz ⎠
=
= 0.997
2
= 0.515
2
1
⎛ 100 kHz ⎞
1+ ⎜
⎟
⎝ 12 kHz ⎠
2
116
= 0.119
Chapter 12
30.
(a) Aol =
(b) Aol =
(c) Aol =
(d) Aol =
Aol ( mid )
⎞
⎟
⎟
⎠
2
⎛ f
1+ ⎜
⎜ f c ( ol )
⎝
Aol ( mid )
⎞
⎟
⎟
⎠
2
⎛ f
1+ ⎜
⎜ f c ( ol )
⎝
Aol ( mid )
⎞
⎟
⎟
⎠
⎛ f
1+ ⎜
⎜ f c ( ol )
⎝
Aol ( mid )
⎛ f
1+ ⎜
⎜ f c ( ol )
⎝
31.
2
80,000
⎛ 100 Hz ⎞
1+ ⎜
⎟
⎝ 1 kHz ⎠
=
80,000
⎛ 1 kHz ⎞
1+ ⎜
⎟
⎝ 1 kHz ⎠
=
= 56,569
2
80,000
⎛ 10 kHz ⎞
1+ ⎜
⎟
⎝ 1 kHz ⎠
=
= 79,603
2
80,000
⎛ 1 MHz ⎞
1+ ⎜
⎟
⎝ 1 kHz ⎠
= 7960
2
2
= 80
⎛ f ⎞
1
1
⎛ 2 kHz ⎞
=
= 1.59 kHz; θ = tan −1 ⎜⎜ ⎟⎟ = tan −1 ⎜
⎟ = −51.5°
2πRC 2π (10 kΩ)(0.01 μF)
⎝ 1.59 kHz ⎠
⎝ fc ⎠
⎛ f ⎞
1
1
⎛ 2 kHz ⎞
=
(b) fc =
= 15.9 kHz; θ = tan −1 ⎜⎜ ⎟⎟ = tan −1 ⎜
⎟ = −7.17°
2πRC 2π (1.0 kΩ)(0.01 μF)
f
⎝ 15.9 kHz ⎠
⎝ c⎠
(a) fc =
(c) fc =
32.
⎞
⎟
⎟
⎠
2
=
⎛ f ⎞
1
1
⎛ 2 kHz ⎞
=
= 159 Hz; θ = tan −1 ⎜⎜ ⎟⎟ = tan −1 ⎜
⎟ = −85.5°
2πRC 2π (100 kΩ)(0.01 μF)
⎝ 159 Hz ⎠
⎝ fc ⎠
⎛ f ⎞
⎛ 100 Hz ⎞
(a) θ = tan −1 ⎜⎜ ⎟⎟ = tan −1 ⎜
⎟
⎝ 8.5 kHz ⎠
⎝ fc ⎠
⎛ f ⎞
⎛ 400 Hz ⎞
(b) θ = tan −1 ⎜⎜ ⎟⎟ = tan −1 ⎜
⎟
⎝ 8.5 kHz ⎠
⎝ fc ⎠
⎛ f ⎞
⎛ 850 Hz ⎞
(c) θ = tan −1 ⎜⎜ ⎟⎟ = tan −1 ⎜
⎟
⎝ 8.5 kHz ⎠
⎝ fc ⎠
⎛ f ⎞
⎛ 8.5 kHz ⎞
(d) θ = tan −1 ⎜⎜ ⎟⎟ = tan −1 ⎜
⎟
⎝ 8.5 kHz ⎠
⎝ fc ⎠
= −0.674°
= −2.69°
= −5.71°
= −45.0°
⎛ f ⎞
⎛ 25 kHz ⎞
(e) θ = tan −1 ⎜⎜ ⎟⎟ = tan −1 ⎜
⎟ = −71.2°
f
⎝ 8.5 kHz ⎠
⎝ c⎠
⎛ f ⎞
⎛ 85 kHz ⎞
(f) θ = tan −1 ⎜⎜ ⎟⎟ = tan −1 ⎜
⎟ = −84.3°
⎝ 8.5 kHz ⎠
⎝ fc ⎠
See Figure 12-2.
117
Chapter 12
Figure 12-2
33.
(a) Aol(mid) = 30 dB + 40 dB + 20 dB = 90 dB
⎛ f ⎞
⎛ 10 kHz ⎞
(b) θ1 = − tan −1 ⎜⎜ ⎟⎟ = − tan −1 ⎜
⎟ = −86.6°
f
⎝ 600 Hz ⎠
⎝ c⎠
⎛ f ⎞
⎛ 10 kHz ⎞
θ2 = − tan −1 ⎜⎜ ⎟⎟ = − tan −1 ⎜
⎟ = −11.3°
⎝ 50 kHz ⎠
⎝ fc ⎠
⎛ f ⎞
⎛ 10 kHz ⎞
θ3 = − tan −1 ⎜⎜ ⎟⎟ = − tan −1 ⎜
⎟ = −2.86°
⎝ 200 kHz ⎠
⎝ fc ⎠
θtot = −86.6° − 11.3° − 2.86° − 180° = −281°
34.
(a)
(b)
(c)
(d)
0 dB/decade
−20 dB/decade
−40 dB/decade
−60 dB/decade
Section 12-8 Closed-Loop Frequency Response
35.
⎛ Rf ⎞
68 kΩ ⎞
⎟ = −⎛⎜
(a) Acl(I) = − ⎜⎜
⎟ = −30.9;
⎟
⎝ 2 .2 k Ω ⎠
⎝ Ri ⎠
1
1
(b) Acl(NI) = =
= 15.7;
B 15 kΩ / 235 kΩ
Acl(I) (dB) = 20 log(30.9) = 29.8 dB
Acl(NI) (dB) = 20 log(15.7) = 23.9 dB
(c) Acl(VF) = 1; Acl(VF)(dB) = 20 log(1) = 0 dB
These are all closed-loop gains.
36.
BWcl = BWol(1 + BAol(mid)) = 1500 Hz[1 + (0.015)(180,000)] = 4.05 MHz
118
Chapter 12
37.
Aol (dB) = 89 dB
Aol = 28,184
Aclfc(cl) = Aolfc(ol)
Aol f c ( ol ) (28,184)(750 Hz)
=
Acl =
= 3843
f c ( cl )
5.5 kHz
Acl (dB) = 20 log(3843) = 71.7 dB
38.
39.
Aol f c ( ol )
(28,184)(750 Hz)
= 3843
f c ( cl )
5.5 kHz
fT = Aclfc(cl) = (3843)(5.5 kHz) = 21.1 MHz
Acl =
=
(a) Acl(VF) = 1
BW = fc(cl) =
fT 28 MHz
=
= 2.8 MHz
1
Acl
100 kΩ
= −45.5
2.2 kΩ
2.8 MHz
BW =
= 61.6 kHz
45.5
(b) Acl(I) = −
12 kΩ
= 13
1.0 kΩ
2.8 MHz
BW =
= 215 kHz
13
(c) Acl(NI) = 1 +
1 MΩ
= −179
5.6 kΩ
2.8 MHz
= 15.7 kHz
BW =
179
(d) Acl(I) = −
40.
150 kΩ
= 6.8
22 kΩ
Aol f c ( ol ) (120,000)(150 Hz)
fc(cl) =
= 2.65 MHz
=
Acl
6.8
BW = fc(cl) = 2.65 MHz
(a) Acl =
1.0 MΩ
= 100
10 kΩ
Aol f c ( ol ) (195,000)(50 Hz)
fc(cl) =
= 97.5 kHz
=
Acl
100
BW = fc(cl) = 97.5 kHz
(b) Acl =
119
Chapter 12
Section 12-9 Troubleshooting
41.
(a) Faulty op-amp or open R1
(b) R2 open, forcing open-loop operation
42.
(a)
(b)
(c)
(d)
43.
The gain becomes a fixed −100 with no effect as the potentiometer is adjusted.
Circuit becomes a voltage-follower and the output replicates the input.
Output will saturate.
No effect on the ac; may add or subtract a small dc voltage to the output.
The voltage gain will change from 10 to 0.1.
Application Activity Problems
44.
The push-pull stage will operate nonlinearly if a diode is shorted, a transistor is faulty, or the opamp stage has excessive gain.
45.
If a 100 kΩ resistor is used for R2, the gain of the op amp will be reduced by a factor of 100.
46.
If D1 opens, the positive half of the signal will appear on the output through Q3 and Q4. The
negative half is missing due to the open diode.
Datasheet Problems
47.
From the datasheet of textbook Figure 12-77:
470 Ω
B=
= 0.0099
47 kΩ + 470 Ω
Aol = 200,000 (typical)
Zin = 2.0 MΩ (typical)
Zin(NI) = (1 + 0.0099)(200,000)(2 MΩ) = (1 + 1980)2 MΩ = 3.96 GΩ
48.
From the datasheet in Figure 12-77:
R f 100 kΩ
Zin(I) = Ri =
= 1 kΩ
=
Acl
100
49.
Aol = 50 V/mV =
50.
Slew rate = 0.5 V/μs
ΔV = 8 V − (−8 V) = 16 V
16 V
Δt =
= 32 μ s
0.5 V/μs
50 V 50,000 V
=
= 50,000
1 mV
1V
120
Chapter 12
Advanced Problems
51.
Using available standard values of Rf = 150 kΩ and Ri = 1.0 kΩ,
150 kΩ
= 151
Av = 1 +
1.0 kΩ
1.0 kΩ
B=
= 6.62 × 10−3
151 kΩ
Zin(NI) = (1 + (6.62 × 10−3)(50,000))300 kΩ = 99.6 MΩ
The compensating resistor is
Rc = Ri R f = 150 kΩ 1.0 kΩ = 993 Ω
See Figure 12-3.
Figure 12-3
52.
See Figure 12-4. 2% tolerance resistors are used to achieve a 5% gain tolerance.
Figure 12-4
53.
From textbook Figure 12-78:
fc = 10 kHz at Av = 40 dB = 100
In this circuit
33 kΩ
Av = 1 +
= 100.1 ≅ 100
333 Ω
The compensating resistor is
Rc = 33 kΩ 333 Ω = 330 Ω
See Figure 12-5.
Figure 12-5
121
Chapter 12
54.
From textbook Figure 12-79:
For a ±10 V output swing minimum, the load must be 600 Ω for a ±10 V and ≈ 620 Ω for
−10 V. So, the minimum load is 620 Ω.
55.
For the amplifier,
100 kΩ
= −50
Av = −
2 kΩ
The compensating resistor is
Rc = 100 kΩ 2 kΩ = 1.96 kΩ ≅ 2 kΩ
See Figure 12-6.
Figure 12-6
56.
From textbook Figure 12-78 the maximum 741 closed loop gain with BW = 5 kHz is
approximately 60 dB − (20 dB)log(5 kHz/1 kHz) = 60 dB − (20 dB)(0.7) = 46 dB
Av(dB) = 20 log Av
⎛ Av ( dB) ⎞
46
⎟ = log −1 ⎛⎜ ⎞⎟ = 200
Av = log −1 ⎜⎜
⎟
⎝ 20 ⎠
⎝ 20 ⎠
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 57 through 72 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
57.
Rf open
58.
Ri open
59.
Rf leaky
60.
Ri shorted
61.
Rf shorted
62.
Op-amp input to output open
63.
Rf leaky
122
Chapter 12
64.
Ri leaky
65.
Ri shorted
66.
Ri open
67.
Rf open
68.
Rf leaky
69.
Rf open
70.
Rf shorted
71.
Ri open
72.
Ri leaky
123
Chapter 13
Basic Op-Amp Circuits
Section 13-1 Comparators
1.
Vout(p) = AolVin = (80,000)(0.15 mV)(1.414) = 17 V
Since 12 V is the peak limit, the op-amp saturates.
Vout(pp) = 24 V with distortion due to clipping.
2.
(a) Maximum negative
(b) Maximum positive
(c) Maximum negative
3.
⎛ R2 ⎞
⎛ 18 kΩ ⎞
⎟⎟(+ 10 V) = ⎜
VUTP = ⎜⎜
⎟ 10 V = 2.77 V
⎝ 65 kΩ ⎠
⎝ R1 + R2 ⎠
⎛ R2 ⎞
⎛ 18 kΩ ⎞
⎟⎟(− 10 V) = ⎜
VLTP = ⎜⎜
⎟ (−10 V) = −2.77 V
⎝ 65 kΩ ⎠
⎝ R1 + R2 ⎠
4.
VHYS = VUTP − VLTP = 2.77 V − (−2.77 V) = 5.54 V
5.
See Figure 13-1.
Figure 13-1
124
Chapter 13
6.
⎛ R2 ⎞
⎛ 18 kΩ ⎞
⎟⎟ + Vout ( max ) = ⎜
(a) VUTP = ⎜⎜
⎟ 11 V = 3.88 V
⎝ 51 kΩ ⎠
⎝ R1 + R2 ⎠
VLTP = −3.88 V
VHYS = VUTP − VLTP = 3.88 V − (−3.88 V) = 7.76 V
(
)
⎛ R2 ⎞
⎛ 68 kΩ ⎞
⎟⎟ + Vout ( max ) = ⎜
(b) VUTP = ⎜⎜
⎟ 11 V = 3.43 V
⎝ 218 kΩ ⎠
⎝ R1 + R2 ⎠
VLTP = −3.43 V
VHYS = VUTP − VLTP = 3.43 V − (−3.43 V) = 6.86 V
(
7.
)
When the zener is forward-biased:
18 kΩ
⎛
⎞
Vout = ⎜
⎟ Vout − 0.7 V
⎝ 18 kΩ + 47 kΩ ⎠
Vout = (0.277)Vout − 0.7 V
Vout(1 − 0.277) = −0.7 V
− 0.7 V
= −0.968 V
Vout =
1 − 0.277
When the zener is reverse-biased:
18 kΩ
⎛
⎞
Vout = ⎜
⎟ Vout + 6.2 V
⎝ 18 kΩ + 47 kΩ ⎠
Vout = (0.277)Vout + 6.2 V
Vout(1 − 0.277) = +6.2 V
+ 6.2 V
Vout =
= +8.57 V
1 − 0.277
8.
10 kΩ
⎛
⎞
Vout = ⎜
⎟ Vout ± (4.7 V + 0.7 V)
⎝ 10 kΩ + 47 kΩ ⎠
Vout = (0.175)Vout ± 5.4 V
± 5 .4 V
Vout =
= ±6.55 V
1 − 0.175
VUTP = (0.175)(+6.55 V) = +1.15 V
VLTP = (0.175)(−6.55 V) = −1.15 V
See Figure 13-2.
Figure 13-2
125
Chapter 13
Section 13-2 Summing Amplifiers
9.
(a) VOUT = −
(b) VOUT = −
10.
Rf
Ri
Rf
Ri
(+1 V + 1.5 V) = −1(1 V + 1.5 V) = −2.5 V
(0.1 V + 1 V + 0.5 V) = −
22 kΩ
(1.6 V) = −3.52 V
10 kΩ
(a) VR1 = 1 V
VR2 = 1.8 V
1V
= 45.5 μA
22 kΩ
1.8 V
IR2 =
= 81.8 μA
22 kΩ
If = IR1 + IR2 = 45.5 μA + 81.8 μA = 127 μA
(b) IR1 =
(c) VOUT = −IfRf = −(127 μA)(22 kΩ) = −2.8 V
11.
12.
⎛ Rf ⎞
⎟Vin
5Vin = ⎜⎜
⎟
⎝ R ⎠
Rf
=5
R
Rf = 5R = 5(22 kΩ) = 110 kΩ
See Figure 13-3.
Figure 13-3
13.
⎡⎛ R f
VOUT = − ⎢⎜⎜
⎣⎢⎝ R1
⎞
⎛R ⎞
⎛R ⎞
⎛R ⎞ ⎤
⎟V1 + ⎜ f ⎟V2 + ⎜ f ⎟V3 + ⎜ f ⎟V4 ⎥
⎟
⎜R ⎟
⎜R ⎟
⎜R ⎟
⎝ 4 ⎠ ⎦⎥
⎠
⎝ 2⎠
⎝ 3⎠
⎡⎛ 10 kΩ ⎞
⎛ 10 kΩ ⎞ ⎤
⎛ 10 kΩ ⎞
⎛ 10 kΩ ⎞
= − ⎢⎜
⎟6 V ⎥
⎟3 V + ⎜
⎟3 V + ⎜
⎟2 V + ⎜
⎝ 180 kΩ ⎠ ⎦
⎝ 91 kΩ ⎠
⎝ 33 kΩ ⎠
⎣⎝ 10 kΩ ⎠
= −(2 V + 0.91 V + 0.33 V + 0.33 V) = −3.57 V
If =
VOUT 3.57 V
=
= 357 μA
Rf
10 kΩ
126
Chapter 13
14.
Rf = 100 kΩ
Input resistors: R1 = 100 kΩ, R2 = 50 kΩ, R3 = 25 kΩ, R4 = 12.5 kΩ,
R5 = 6.25 kΩ, R6 = 3.125 kΩ
Section 13-3 Integrators and Differentiators
15.
dVout
V
5V
= − IN = −
= −4.06 mV/μs
(56 kΩ)(0.022 μ F)
dt
RC
16.
See Figure 13-4.
Figure 13-4
17.
18.
I=
CV pp
T /2
=
(0.001 μF)(5 V)
= 1 mA
10 μs / 2
⎛ V pp ⎞
⎛ 2V ⎞
Vout = ± RC ⎜
⎟ = ± (15 kΩ)(0.047 μ F) ⎜
⎟ = ±2.82 V
⎝ 0.5 ms ⎠
⎝T /2⎠
See Figure 13-5.
Figure 13-5
127
Chapter 13
19.
For the 10 ms interval when the switch is in position 2:
V
ΔVout
5V
5V
= − IN = −
=−
= −50 V/s = −50 mV/ms
RC
(10 kΩ)(10 μF)
0.1 s
Δt
ΔVout = (−50 mV/ms)(10 ms) = −500 mV = −0.5 V
For the 10 ms interval when the switch is in position 1:
ΔVout
V
−5V
−5V
= − IN = −
=−
= +50 V/s = +50 mV/ms
Δt
RC
(10 kΩ)(10 μF)
0.1 s
ΔVout = (+50 mV/ms)(10 ms) = +500 mV = +0.5 V
See Figure 13-6.
Figure 13-6
Section 13-4 Troubleshooting
20.
21.
⎛ R2 ⎞
⎟⎟Vout ± (V Z + 0.7 V)
VB = ⎜⎜
⎝ R1 + R2 ⎠
± (V Z + 0.7 V)
VB =
⎛ R2 ⎞
⎟⎟
1 − ⎜⎜
⎝ R1 + R2 ⎠
Normally, VB should be
± (4.3 V + 0.7 V)
= ±10 V
VB =
1 − 0.5
Since the negative portion of VB is only −1.4 V, zener D2 must be shorted:
− (0 V + 0.7 V)
= 1.4 V
VB =
1 − 0.5
The output should be as shown in Figure 13-7. V2 has no effect on the output. This indicates
that R2 is open.
Figure 13-7
128
Chapter 13
22.
Av =
2 .5 k Ω
= 0.25
10 kΩ
The output should be as shown in Figure 13-8. An open R2 (V2 is missing) will produce the
observed output, which is incorrect.
Figure 13-8
23.
The D2 input is missing (acts as a constant 0). This indicates an open 50 kΩ resistor.
Application Activity Problems
24.
The first thing that you should always do is visually inspect the circuit for bad contacts or
loose connections, shorts from solder splashes or wire clippings, incorrect components, and
incorrectly installed components. After careful inspection, you have found nothing wrong.
Measurements are now necessary to isolate a component’s fault.
25.
An open decoupling capacitor can make the circuit more susceptible to power line noise.
26.
If a 1.0 kΩ resistor is used for R1, the inverting input would be increased, causing the pulse
width to narrow for a given setting of the potentiometer.
Advanced Problems
27.
24 V
= 39.2 μA
612 kΩ
Minimum setting of R2:
VINV = 12 V − (39.2 μA)(56 kΩ) = 9.8 V
v = Vp sin θ
v 9.8 V
sin θ =
=
= 0.98
V p 10 V
IR1-2-3 =
⎛ v ⎞
= sin −1 (0.98) = 78.5° (on positive half cycle)
⎜ V p ⎟⎟
⎝ ⎠
Angle from 78.5° to 90°
Δθ = 90° − 78.5° = 11.5°
Angle from 90° to next point at which v = 9.8 V:
Δθ = 11.5°
Angle from first point at which v = 9.8 V to second point at which v = 9.8 V on sine wave is
θ = 11.5° + 11.5° = 23°
θ = sin−1 ⎜
129
Chapter 13
⎛ 23° ⎞
min. duty cycle = ⎜
⎟100 = 6.39%
⎝ 360° ⎠
See Figure 13.9(a).
Maximum setting of R2:
VINV = 12 V − (39.2 μA)(556 kΩ) = −9.8 V
v −9.8 V
=
= −78.5° (on negative half cycle)
sin θ =
10 V
Vp
⎛ 360° − 23° ⎞
max. duty cycle = ⎜
⎟100 = 93.6%
⎝ 360° ⎠
See Figure 13-9(b).
(a)
(b)
Figure 13-9
28.
Let VINV = 4.8 V
Let I1 = 39.2 μA
VINV = 12 V − I1R1
−I1R1 = 4.8 V − 12 V
I1R1 = 7.2 V
7.2 V
R1 =
= 184 kΩ
39.2 μ A
Change R1 and R3 to 184 kΩ.
130
Chapter 13
29.
100 mV/μs = 5 V/RiC
5V
RiC =
= 50 μs
100 mV/μs
For C = 3300 pF:
50 μs
Ri =
= 15.15 kΩ = 15 kΩ + 150 Ω
3300 pF
For a 5 V peak-peak triangle waveform:
5V
tramp up = tramp down =
= 50 μs
100 mV/μs
τ = 2(50 μs) = 100 μs
fin = 1/100 μs = 100 kHz
See Figure 13-10.
Figure 13-10
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 30 through 39 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
30.
R1 open
31.
Op-amp inputs shorted together
32.
Op-amp + input to output shorted
33.
D1 shorted
34.
Top 10 kΩ resistor open
35.
Middle 10 kΩ resistor shorted
36.
Rf leaky
37.
Rf open
38.
C leaky
39.
C open
131
Chapter 14
Special-Purpose Op-Amp Circuits
Section 14-1 Instrumentation Amplifiers
R1
100 kΩ
=1+
= 101
1.0 kΩ
RG
R
100 kΩ
Av(2) = 1 + 2 = 1 +
= 101
RG
1 .0 k Ω
1.
Av(1) = 1 +
2.
Acl = 1 +
3.
Vout = Acl (Vin ( 2 ) − Vin (1) ) = 202(10 mV − 5 mV) = 1.005 V
4.
Av = 1 +
2R
200 kΩ
= 201
=1+
RG
1.0 kΩ
2R
RG
2R
= Av − 1
RG
2(100 kΩ) 200 kΩ
2R
=
=
= 200.2 Ω ≅ 200 Ω
RG =
Av − 1 1000 − 1
999
50.5 kΩ
Av − 1
50.5 kΩ
Av =
+ 1 = 51.5
1.0 kΩ
5.
RG =
6.
Using the graph in textbook Figure 14-6,
BW ≅ 300 kHz
7.
Change RG to
50.5 kΩ 50.5 kΩ
=
≅ 2.2 kΩ
RG =
Av − 1
24 − 1
8.
RG =
50.5 kΩ 50.5 kΩ
≅ 2.7 kΩ
=
Av − 1
20 − 1
132
Chapter 14
Section 14-2 Isolation Amplifiers
9.
Av(total) = (30)(10) = 300
10.
(a) Av1 =
Rf1
Ri1
Rf 2
+1=
18 kΩ
+ 1 = 3.2
8 .2 k Ω
150 kΩ
+ 1 = 11
15 kΩ
Ri 2
Av(tot) = Av1Av2 = (3.2)(11) = 35.2
Av2 =
(b) Av1 =
Rf1
Ri1
Rf 2
+1 =
+1=
330 kΩ
+ 1 = 331
1.0 kΩ
47 kΩ
+ 1 = 4.13
Ri 2
15 kΩ
Av(tot) = Av1Av2 = (331)(4.13) = 1,367
Av2 =
11.
+1 =
Av2 = 11 (from Problem 10(a))
Av1Av2 = 100
Rf 1
100
+ 1 = Av1 =
= 9.09
11
Ri1
Rf1 = (9.09 − 1)Ri1 = (8.09)(8.2 kΩ) = 66 kΩ
Change Rf (18 kΩ) to 66 kΩ.
Use 68 kΩ ± 1% standard value resistor.
12.
Av1 = 331 (from Problem 10(b))
Av1Av2 = 440
Rf 2
440
= 1.33
+ 1 = Av 2 =
Ri 2
331
Change Rf (47 kΩ) to 3.3 kΩ.
Change Ri (15 kΩ) to 10 kΩ.
13.
Connect pin 6 to pin 10 and pin 14 to pin 15. Make Rf = 0.
Section 14-3 Operational Transconductance Amplifiers (OTAs)
I out 10 μA
= 1 mS
=
Vin 10 mV
14.
gm =
15.
Iout = gmVin = (5000 μS)(100 mV) = 500 μA
Vout = IoutRL = (500 μA)(10 kΩ) = 5 V
133
Chapter 14
16.
17.
I out
Vin
Iout = gmVin = (4000 μS)(100 mV) = 400 μA
V
3.5 V
= 8.75 kΩ
RL = out =
I out 400 μA
+ 12 V − (−12 V) − 0.7 V + 12 V − (−12 V) − 0.7 V 23.3 V
=
=
IBIAS =
= 106 μA
220 kΩ
220 kΩ
RBIAS
From the graph in Figure 14-57:
gm = KIBIAS ≅ (16 μS/μA)(106 μA) = 1.70 mS
V
I R
Av = out = out L = gmRL = (1.70 mS)(6.8 kΩ) = 11.6
Vin
Vin
gm =
18.
The maximum voltage gain occurs when the 10 kΩ potentiometer is set to 0 Ω and was
determined in Problem 17.
Av(max) = 11.6
The minimum voltage gain occurs when the 10 kΩ potentiometer is set to 10 kΩ.
+ 12 V − (−12 V) − 0.7 V 23.3 V
=
= 101 μA
IBIAS =
220 kΩ + 10 kΩ
230 kΩ
gm ≅ (16 μS/μA)(101 μA) = 1.62 mS
Av(min) = gmRL = (1.62 mS)(6.8 kΩ) = 11.0
19.
The VMOD waveform is applied to the bias input.
The gain and output voltage for each value of VMOD is determined as follows using
K = 16 μS/μA. The output waveform is shown in Figure 14-1.
For VMOD = +8 V:
+ 8 V − (−9 V) − 0.7 V 16.3 V
=
= 418 μA
IBIAS =
39 kΩ
39 kΩ
gm = KIBIAS ≅ (16 μS/μA)(418 μA) = 6.69 mS
V
I R
Av = out = out L = gmRL = (6.69 mS)(10 kΩ) = 66.9
Vin
Vin
Vout = AvVin = (66.9)(100 mV) = 6.69 V
For VMOD = +6 V:
+ 6 V − ( −9 V) − 0.7 V 14.3 V
= 367 μA
IBIAS =
=
39 kΩ
39 kΩ
gm = KIBIAS ≅ (16 μS/μA)(367 μA) = 5.87 mS
V
I R
Av = out = out L = gmRL = (5.87 mS)(10 kΩ) = 58.7
Vin
Vin
Vout = AvVin = (58.7)(100 mV) = 5.87 V
134
Chapter 14
For VMOD = +4 V:
+ 4 V − (−9 V) − 0.7 V 12.3 V
=
= 315 μA
IBIAS =
39 kΩ
39 kΩ
gm = KIBIAS ≅ (16 μS/μA)(315 μA) = 5.04 mS
V
I R
Av = out = out L = gmRL = (5.04 mS)(10 kΩ) = 50.4
Vin
Vin
Vout = AvVin = (50.4)(100 mV) = 5.04 V
For VMOD = +2 V:
+ 2 V − (−9 V) − 0.7 V 10.3 V
=
= 264 μA
IBIAS =
39 kΩ
39 kΩ
gm = KIBIAS ≅ (16 μS/μA)(264 μA) = 4.22 mS
V
I R
Av = out = out L = gmRL = (4.22 mS)(10 kΩ) = 42.2
Vin
Vin
Vout = AvVin = (42.2)(100 mV) = 4.22 V
For VMOD = +1 V:
+ 1 V − (−9 V) − 0.7 V 9.3 V
=
= 238 μA
IBIAS =
39 kΩ
39 kΩ
gm = KIBIAS ≅ (16 μS/μA)(238 μA) = 3.81 mS
V
I R
Av = out = out L = gmRL = (3.81 mS)(10 kΩ) = 38.1
Vin
Vin
Vout = AvVin = (38.1)(100 mV) = 3.81 V
Figure 14-1
20.
+ 9V − (−9 V) − 0.7 V 17.3 V
=
= 444 μA
39 kΩ
39 kΩ
VTRIG(+) = IBIASR1 = (444 μA)(10 kΩ) = +4.44 V
VTRIG(−) = −IBIASR1 = (−444 μA)(10 kΩ) = −4.44 V
IBIAS =
135
Chapter 14
21.
See Figure 14-2.
Figure 14-2
Section 14-4 Log and Antilog Amplifiers
22.
(a)
(b)
(c)
(d)
ln(0.5) = −0.693
ln(2) = 0.693
ln(50) = 3.91
ln(130) = 4.87
23.
(a)
(b)
(c)
(d)
log10(0.5) = −0.301
log10(2) = 0.301
log10(50) = 1.70
log10(130) = 2.11
24.
Antilog x = 10x or ex, depending on the base used.
INV ln = e1.6 = 4.95
INV log = 101.6 = 39.8
25.
The output of a log amplifier is limited to 0.7 V because the output voltage is limited to the
barrier potential of the transistor’s pn junction.
26.
27.
⎛ V ⎞
Vout ≅ − (0.025 V)ln⎜⎜ in ⎟⎟
⎝ I s Rin ⎠
⎛
⎞
3V
⎟⎟ = −(0.025 V)ln(365.9) = −148 mV
= − (0.025 V)ln⎜⎜
⎝ (100 nA)(82 kΩ) ⎠
⎛ Vin ⎞
⎟⎟
Vout ≅ − (0.025 V)ln⎜⎜
I
R
EBO
in
⎠
⎝
⎛
⎞
1.5 V
⎟⎟ = −(0.025 V)ln(531.9) = −157 mV
= − (0.025 V)ln⎜⎜
⎝ (60 nA)(47 kΩ) ⎠
136
Chapter 14
⎛ Vin
28.
Vout = −(10 kΩ)(60 nA) e
29.
⎞
⎜
⎟
⎞
⎛ V
Vout = −Rf IEBO antilog⎜ in ⎟ = − R f I EBO e ⎝ 25 mV ⎠
⎝ 25 mV ⎠
⎛ 0.225 V ⎞
⎜
⎟
⎝ 25 mV ⎠
= −(10 kΩ)(60 nA)e9 = −(10 kΩ)(60 nA)(8103) = −4.86 V
⎛ Vin ⎞
⎞
⎛
1V
⎟⎟ = −(0.025 V) ln⎜⎜
⎟⎟
Vout(max) ≅ − (0.025 V) ln⎜⎜
⎝ (60 nA)(47 kΩ) ⎠
⎝ I EBO Rin ⎠
= −(0.025 V)ln(354.6) = −147 mV
⎛ Vin ⎞
⎞
⎛
100 mV
⎟⎟ = −(0.025 V) ln⎜⎜
⎟⎟
Vout(min) ≅ − (0.025 V) ln⎜⎜
⎝ (60 nA)(47 kΩ) ⎠
⎝ I EBO Rin ⎠
= −(0.025 V) ln(35.5) = −89.2 mV
The signal compression allows larger signals to be reduced without causing smaller
amplitudes to be lost (in this case, the 1 V peak is reduced 85% but the 100 mV peak is
reduced only 10%).
Section 14-5 Converters and Other Op-Amp Circuits
30.
(a) VIN = VZ = 4.7 V
V
4.7 V
IL = IN =
= 4.7 mA
Ri 1.0 kΩ
⎛ 10 kΩ ⎞
(b) VIN = ⎜
⎟12 V = 6 V
⎝ 20 kΩ ⎠
Ri = 10 kΩ 10 kΩ + 100 Ω = 5.1 kΩ
IL =
31.
VIN
6V
=
= 1.18 mA
Ri
5.1 kΩ
See Figure 14-3.
Figure 14-3
137
Chapter 14
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 32 through 36 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
32.
RG leaky
33.
R open
34.
Rf open
35.
Zener diode open
36.
Lower 10 kΩ resistor open
138
Chapter 15
Active Filters
Section 15-1 Basic Filter Responses
1.
(a)
(b)
(c)
(d)
2.
BW = fc = 800 Hz
3.
fc =
4.
The roll-off is 20 dB/decade because this is a single-pole filter.
5.
BW = fc2 − fc1 = 3.9 kHz − 3.2 kHz = 0.7 kHz = 700 Hz
f0 = f c1 f c 2 = (3.2 kHz)(3.9 kHz) = 3.53 kHz
1
1
= 48.2 Hz
=
2πRC 2π (2.2 kΩ)(0.0015 μF)
No, the upper response roll-off due to internal device capacitances is unknown.
Q=
6.
Band-pass
High-pass
Low-pass
Band-stop
f0
3.53 kHz
=
= 5.04
700 Hz
BW
f0
BW
f0 = Q(BW) = 15(1 kHz) = 15 kHz
Q=
Section 15-2 Filter Response Characteristics
7.
(a) 2nd order, 1 stage
R
1.2 kΩ
=2−1=1
DF = 2 − 3 = 2 −
1.2 kΩ
R4
Not Butterworth
(b) 2nd order, 1 stage
R
560 Ω
= 2 − 0.56 = 1.44
DF = 2 − 3 = 2 −
1.0 kΩ
R4
(c) 3rd order, 2 stages, 1st stage (2 poles):
R
330 Ω
= 1.67
DF = 2 − 3 = 2 −
1.0 kΩ
R4
2nd stage (1 pole):
R
DF = 2 − 6 = 1.67
Not Butterworth
R7
139
Approximately Butterworth
Chapter 15
8.
(a) From Table 15-1 in the textbook, the damping factor must be 1.414; therefore,
R3
= 0.586
R4
R3 = 0.586R4 = 0.586(1.2 kΩ) = 703 Ω
Nearest standard value: 720 Ω
(b)
R3
= 0.56
R4
This is an approximate Butterworth response
(as close as you can get using standard 5% resistors).
(c) From Table 15-1, the damping factor of both stages must be 1, therefore
R3
=1
R4
R3 = R4 = R6 = R7 = 1 kΩ (for both stages)
9.
(a)
(b)
(c)
(d)
Chebyshev
Butterworth
Bessel
Butterworth
Section 15-3 Active Low-Pass Filters
10.
High Pass
1st stage:
DF = 2 −
R3
1.0 kΩ
=2−
= 1.85
6 .8 k Ω
R4
2nd stage:
R7
6 .8 k Ω
=2−
= 0.786
5.6 kΩ
R8
From Table 15-1 in the textbook:
1st stage DF = 1.848 and 2nd stage DF = 0.765
Therefore, this filter is approximately Butterworth.
Roll-off rate = 80 dB/decade
DF = 2 −
1
=
1
=
1
11.
fc =
12.
R = R1 = R2 = R5 = R6 and C = C1 = C2 = C3 = C4
Let C = 0.22 μF (for both stages).
1
1
=
fc =
2 2
2πRC
2π R C
1
1
=
= 3.81 kΩ
R=
2πf c C 2π (190 Hz)(0.22 μF)
Choose R = 3.9 kΩ (for both stages)
2π R1 R2 C1C 2
2π R5 R6 C 3 C 4
2π ( 4.7 kΩ)(6.8 kΩ)(0.22 μF)(0.1 μF)
140
= 190 Hz
Chapter 15
13.
See Figure 15-1.
Figure 15-1
14.
See Figure 15-2.
Figure 15-2
Section 15-4 Active High-Pass Filters
15.
Exchange the positions of the resistors and the capacitors. See Figure 15-3.
Figure 15-3
141
Chapter 15
16.
17.
1
2πRC
190 Hz
= 95 Hz
f0 =
2
1
1
R=
=
= 7615 Ω
2πf c C 2π (95 Hz)(0.22 μF)
Let R = 7.5 kΩ. Change R1, R2, R5 and R6 to 7.5 kΩ.
fc =
(a) Decrease R1 and R2 or C1 and C2.
(b) Increase R3 or decrease R4.
Section 15-5 Active Band-Pass Filters
18.
(a) Cascaded high-pass/low-pass filters
(b) Multiple feedback
(c) State variable
19.
(a) 1st stage:
1
1
=
= 3.39 kHz
fc1 =
2πRC 2π (1.0 kΩ)(0.047 μF)
2nd stage:
1
1
fc2 =
= 7.23 kHz
=
2πRC 2π (1.0 kΩ)(0.022 μF)
f0 =
f c1 f c 2 = (3.39 kHz)(7.23 kHz) = 4.95 kHz
BW = 7.23 kHz − 3.39 Hz = 3.84 kHz
(b) f0 =
1
2π C
R1 + R3
1
47 kΩ + 1.8 kΩ
= 449 Hz
=
R1 R3 R2 2π (0.022 μ F) (47 kΩ)(1.8 kΩ)(150 kΩ)
Q = πf0CR2 = π(449 Hz)(0.022 μF)(150 kΩ) = 4.66
f
449 Hz
= 96.4 Hz
BW = 0 =
Q
4.66
(c) For each integrator:
1
1
=
= 15.9 kHz
fc =
2πRC 2π (10 kΩ)(0.001 μF)
f0 = fc = 15.9 kHz
⎞ 1 ⎛ 560 kΩ
1⎛ R
⎞ 1
Q = ⎜⎜ 5 + 1⎟⎟ = ⎜
+ 1⎟ = (56 + 1) = 19
3 ⎝ R6
⎠ 3
⎠ 3 ⎝ 10 kΩ
f
15.9 kHz
= 838 Hz
BW = 0 =
Q
19
142
Chapter 15
20.
⎞
1 ⎛ R5
⎜⎜
+ 1⎟⎟
3 ⎝ R6
⎠
Select R6 = 10 kΩ.
R
1 R + R6
Q= 5 + = 5
3R6 3
3R6
3R6Q = R5 + R6
R5 = 3R6Q − R6 = 3(10 kΩ)(50) − 10 kΩ = 1500 kΩ − 10 kΩ = 1490 kΩ
1
= 1.33 kHz
f0 =
2π (12 kΩ)(0.01 μF)
f
1.33 kHz
= 26.6 Hz
BW = 0 =
50
Q
Q=
Section 15-6 Active Band-Stop Filters
21.
See Figure 15-4.
Figure 15-4
22.
1
2πRC
Let C remain 0.01 μF.
1
1
=
= 133 kΩ
R=
2πf 0 C 2π (120 Hz)(0.01 μF)
Change R in the integrators from 12 kΩ to 133 kΩ.
f0 = fc =
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 23 through 31 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
23.
R4 shorted
24.
R3 open
25.
C3 shorted
26.
R5 open
143
Chapter 15
27.
R1 open
28.
R2 shorted
29.
R1 open
30.
C2 open
31.
R7 open
144
Chapter 16
Oscillators
Section 16-1 The Oscillator
1.
An oscillator requires no input other than the dc supply voltage.
2.
Amplifier and positive feedback circuit
Section 16-2 Feedback Oscillator Principles
3.
Unity gain around the closed loop is required for sustained oscillation.
Acl = AvB = 1
1
1
=
B=
= 0.0133
Av 75
4.
To ensure startup:
Acl > 1
since Av = 75, B must be greater than 1/75 in order to produce the condition
AvB > 1.
For example, if B = 1/50,
⎛ 1 ⎞
AvB = 75⎜ ⎟ = 1.5
⎝ 50 ⎠
Section 16-3 Oscillators with RC Feedback Circuits
5.
Vout 1
=
Vin 3
2.2 V
⎛1⎞
Vout = ⎜ ⎟Vin =
= 733 mV
3
⎝3⎠
1
1
=
= 1.28 kHz
2πRC 2π (6.2 kΩ)(0.02 μF)
6.
fr =
7.
R1 = 2R2
R 100 kΩ
R2 = 1 =
= 50 kΩ
2
2
8.
When dc power is first applied, both zener diodes appear as opens because there is
insufficient output voltage. This places R3 in series with R1, thus increasing the closed-loop
gain to a value greater than unity to assure that oscillation will begin.
9.
Rf = (Av − 1)(R3 + rds′ ) = (3 − 1)(820 Ω + 350 Ω) = 2.34 kΩ
145
Chapter 16
10.
fr =
11.
B=
1
= 10.6 kHz
2π (1.0 kΩ)(0.015 μF)
1
29
1
Acl =
= 29
B
Rf
Acl =
Ri
Rf = AclRi = 29(4.7 kΩ) = 136 kΩ
1
= 628 Hz
fr =
2π 6(4.7 kΩ)(0.022 μ F)
Section 16-4 Oscillators with LC Feedback Circuits
12.
(a) Colpitts: C1 and C3 are the feedback capacitors.
1
fr =
2π L1CT
C1C 3
(100 μF)(1000 pF)
=
= 90.9 pF
CT =
C1 + C 3
1100 pF
1
= 236 kHz
fr =
2π (5 mH)(90.9 pF)
(b) Hartley:
fr =
1
2π LT C 2
LT = L1 + L2 = 1.5 mH + 10 mH = 11.5 mH
1
fr =
= 68.5 kHz
2π (11.5 mH)(470 pF)
13.
47 pF
= 0.1
470 pF
The condition for sustained oscillation is
1
1
Av = =
= 10
B 0.1
B=
Section 16-5 Relaxation Oscillators
14.
Triangular waveform.
1 ⎛ R2 ⎞
1
⎛ 56 kΩ ⎞
⎜
⎟=
f=
⎟ = 1.61 kHz
⎜
4 R1C ⎜⎝ R3 ⎟⎠ 4(22 kΩ)(0.022 μF) ⎝ 18 kΩ ⎠
146
Chapter 16
15.
Change f to 10 kHz by changing R1:
1 ⎛ R2 ⎞
⎜
⎟
f=
4 R1C ⎜⎝ R3 ⎟⎠
R1 =
16.
T=
1 ⎛ R2
⎜
4 fC ⎜⎝ R3
⎞
1
⎛ 56 kΩ ⎞
⎟⎟ =
⎜
⎟ = 3.54 kΩ
⎠ 4(10 kHz)(0.022 μF) ⎝ 18 kΩ ⎠
V p − VF
⎛ VIN ⎞
⎟
⎜
⎜ RC ⎟
⎠
⎝
⎛ R5
Vp = ⎜⎜
⎝ R 4 + R5
⎞
47 kΩ ⎞
⎟⎟12 V = ⎛⎜
⎟12 V = 3.84 V
⎝ 147 kΩ ⎠
⎠
PUT triggers at about +3.84 V (ignoring the 0.7 V drop)
Amplitude = +3.84 V − 1 V = 2.84 V
⎛ R2 ⎞
⎛ 22 kΩ ⎞
⎟⎟(−12 V) = ⎜
VIN = ⎜⎜
⎟( −12 V) = −2.16 V
⎝ 122 kΩ ⎠
⎝ R1 + R2 ⎠
3.84 V − 1 V
T=
= 289 μs
⎛
⎞
2.16 V
⎜
⎟
⎝ (100 kΩ)(0.0022 μ F) ⎠
f=
1
1
=
= 3.46 kHz
T 289 μ s
See Figure 16-1.
Figure 16-1
147
Chapter 16
17.
18.
VG = 5 V. Assume VAK = 1 V.
R5 = 47 kΩ
⎛ R5 ⎞
⎟⎟ 12 V
VG = ⎜⎜
⎝ R 4 + R5 ⎠
Change R4 to get VG = 5 V.
5 V(R4 + 47 kΩ) = (47 kΩ)12 V
R4(5 V) = (47 kΩ)12 V − (47 kΩ)5 V
(12 V − 5 V)47 kΩ
R4 =
= 65.8 kΩ
5V
V p − VF
T=
⎛ VIN ⎞
⎜
⎟
⎝ RC ⎠
⎛
⎞
3V
⎛V ⎞
⎟⎟10 μs + 1 V = 7.38 V
Vp = ⎜ IN ⎟T + VF = ⎜⎜
⎝ RC ⎠
⎝ (4.7 kΩ)(0.001 μF) ⎠
Vpp(out) = Vp − VF = 7.38 V − 1 V = 6.38 V
Section 16-6 The 555 Timer as an Oscillator
19.
1
1
VCC = (10 V) = 3.33 V
3
3
2
2
VCC = (10 V) = 6.67 V
3
3
20.
f=
21.
f=
22.
1.44
1.44
=
= 4.03 kHz
( R1 + 2 R2 )C ext (1.0 kΩ + 6.6 kΩ)(0.047 μF)
1.44
( R1 + 2 R2 )C ext
1.44
1.44
=
Cext =
= 0.0076 μF
( R1 + 2 R2 ) f (1.0 kΩ + 6.6 kΩ)(25 kHz)
R1 + R2
× 100%
R1 + 2R2
dc(R1 + 2R2) = (R1 + R2)100
75(3.3 kΩ + 2R2) = (3.3 kΩ + R2)100
75(3.3 kΩ) + 150R2 = 100(3.3 kΩ) + 100R2
150R2 − 100R2 = 100(3.3 kΩ) − 75(3.3 kΩ)
50R2 = 25(3.3 kΩ)
25(3.3 kΩ)
R2 =
= 1.65 kΩ
50
Duty cycle (dc) =
148
Chapter 16
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 23 through 28 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
23.
Drain-to-source shorted
24.
C3 open
25.
Collector-to-emitter shorted
26.
R1 open
27.
R2 open
28.
R1 leaky
149
Chapter 17
Voltage Regulators
Section 17-1 Voltage Regulation
1.
⎛ ΔV
Percent line regulation = ⎜⎜ OUT
⎝ ΔVIN
2.
⎛ ΔV
/V
Percent line regulation = ⎜⎜ OUT OUT
ΔVIN
⎝
3.
⎛V /V
Percent load regulation = ⎜⎜ NL FL
⎝ ΔVFL
4.
⎞
2 mV ⎞
⎟⎟100% = ⎛⎜
⎟100% = 0.0333%
⎝ 6V ⎠
⎠
⎞
2 mV/8 V ⎞
⎟⎟100% = ⎛⎜
⎟100% = 0.00417%/V
⎝ 6V ⎠
⎠
⎞
⎛ 10 V − 9.90 V ⎞
⎟⎟100% = ⎜
⎟100% = 1.01%
9.90 V
⎠
⎝
⎠
From Problem 3, the percent load regulation is 1.01%. For a full load current of 250 mA, this
can be expressed as
1.01%
= 0.00404%/mA
250 mA
Section 17-2 Basic Linear Series Regulators
5.
See Figure 17-1.
Figure 17-1
6.
⎛
R ⎞
⎛ 33 kΩ ⎞
VOUT = ⎜⎜1 + 2 ⎟⎟VREF = ⎜1 +
⎟ 2.4 V = 10.3 V
R3 ⎠
⎝ 10 kΩ ⎠
⎝
7.
⎛
R ⎞
5.6 kΩ ⎞
⎛
VOUT = ⎜⎜1 + 2 ⎟⎟VREF = ⎜1 +
⎟ 2.4 V = 8.51 V
2.2 kΩ ⎠
R3 ⎠
⎝
⎝
150
Chapter 17
8.
9.
10.
For R3 = 2.2 kΩ:
⎛
R ⎞
5.6 kΩ ⎞
⎛
VOUT = ⎜⎜1 + 2 ⎟⎟VREF = ⎜1 +
⎟ 2.4 V = 8.5 V
R3 ⎠
2.2 kΩ ⎠
⎝
⎝
For R3 = 4.7 kΩ:
⎛
R ⎞
5.6 kΩ ⎞
⎛
VOUT = ⎜⎜1 + 2 ⎟⎟VREF = ⎜1 +
⎟ 2.4 V = 5.26 V
R3 ⎠
4.7 kΩ ⎠
⎝
⎝
The output voltage decreases by 3.24 V when R3 is changed from 2.2 kΩ to 4.7 kΩ.
⎛
R ⎞
5.6 kΩ ⎞
⎛
VOUT = ⎜⎜1 + 2 ⎟⎟VREF = ⎜1 +
⎟ 2.7 V = 9.57 V
R
2.2 kΩ ⎠
⎝
3 ⎠
⎝
0.7 V
R4
0.7 V 0.7 mA
=
= 2.8 Ω
R4 =
I L (max) 250 mA
IL(max) =
2
P = I L(max)
R4 = (250 mA)22.8 Ω = 0.175 W, Use a 0.25 W.
11.
2 .8 Ω
= 1.4 Ω
2
0.7 V 0.7 V
= 500 mA
IL(max) =
=
R4
1.4 Ω
R4 =
Section 17-3 Basic Linear Shunt Regulators
12.
Q1 conducts more when the load current increases, assuming that the output voltage attempts
to increase. When the output voltage tries to increase due to a change in load current, the
attempted increase is sensed by R3 and R4 and a proportional voltage is applied to the opamp’s noninverting input. The resulting difference voltage increases the op-amp output,
driving Q1 more and thus increasing its collector current.
13.
ΔIC =
14.
ΔV R1
1V
= 10 mA
=
R1
100 Ω
⎛
R ⎞
10 kΩ ⎞
⎛
VOUT = ⎜⎜1 + 3 ⎟⎟VREF = ⎜1 +
⎟ 5.1 V = 18.2 V
R
3
.9 kΩ ⎠
⎝
4 ⎠
⎝
V
18.2 V
IL1 = OUT =
= 18.2 mA
RL1
1 kΩ
V
18.2 V
IL2 = OUT =
= 15.2 mA
RL2 1.2 kΩ
ΔIL = 15.2 mA − 18.2 mA = −3.0 mA
ΔIS = −ΔIL = 3.0 mA
151
Chapter 17
15.
IL(max) =
VIN
25 V
=
= 250 mA
R1 100 Ω
2
PR1 = I L(max)
R1 = (250 mA)2100 Ω = 6.25 W
Section 17-4 Basic Switching Regulators
16.
⎛t ⎞
VOUT = ⎜ on ⎟VIN
⎝T ⎠
ton = T − toff
1
1
T=
=
= 0.01 s = 10 ms
f 100 Hz
⎛ 4 ms ⎞
VOUT = ⎜
⎟ 12 V = 4.8 V
⎝ 10 ms ⎠
17.
f = 100 Hz, toff = 6 ms
1
1
T= =
= 10 ms
f 100 Hz
ton = T − toff = 10 ms − 6 ms = 4 ms
t
4 ms
= 0.4
duty cycle = on =
T 10 ms
percent duty cycle = 0.4 × 100% = 40%
18.
The diode D1 becomes forward-biased when Q1 turns off.
19.
The output voltage decreases.
Section 17-5 Integrated Circuit Voltage Regulators
20.
21.
(a)
(b)
(c)
(d)
7806: +6 V
7905.2: −5.2 V
7818: +18 V
7924: −24 V
⎛
R ⎞
10 kΩ ⎞
⎛
VOUT = ⎜⎜1 + 2 ⎟⎟VREF + I ADJ R2 = ⎜1 +
⎟ 1.25 V + (50 μA)(10 kΩ)
R1 ⎠
⎝ 1.0 kΩ ⎠
⎝
= 13.7 V + 0.5 V = 14.3 V
152
Chapter 17
22.
⎡⎛
⎤
R2(min) ⎞
⎟VREF + I ADJ R2( min ) ⎥
VOUT(min) = − ⎢⎜⎜1 +
⎟
R1 ⎠
⎣⎢⎝
⎦⎥
R2(min) = 0 Ω
VOUT(min) = − (1.25 V(1 + 0) + 0) = −1.25 V
⎡⎛
⎤
R2(max) ⎞
⎡
⎤
10 kΩ ⎞
⎟VREF + I ADJ R2( max ) ⎥ = − ⎢1.25 V⎛⎜1 +
VOUT(max) = − ⎢⎜⎜1 +
⎟ + (50 μA)(10 kΩ)⎥
⎟
470 Ω ⎠
R1 ⎠
⎝
⎣
⎦
⎣⎢⎝
⎦⎥
= − (1.25 V(22.28) + 0.5 V ) = −28.4 V
23.
The regulator current equals the current through R1 + R2.
VOUT
14.3 V
IREG ≅
= 1.3 mA
=
R1 + R2 11 kΩ
24.
VIN = 18 V, VOUT = 12 V
IREG(max) = 2 mA, VREF = 1.25 V
V
1.25 V
R1 = REF =
= 625 Ω
I REG
2 mA
Neglecting IADJ:
VR2 = 12 V − 1.25 V = 10.8 V
V
10.8 V
R2 = R 2 =
= 5.4 kΩ
I REG
2 mA
For R1 use 620 Ω and for R2 use either 5600 Ω or a 10 kΩ potentiometer for precise
adjustment to 12 V.
Section 17-6 Applications of IC Voltage Regulators
25.
VRext(min) = 0.7 V
0 .7 V
0.7 V
=
Rext =
= 2.8 Ω
I max
250 mA
26.
VOUT = +12 V
12 V
IL =
= 1200 mA = 1.2 A
10 Ω
Iext = IL − Imax = 1.2 A − 0.5 A = 0.7 A
Pext = Iext(VIN − VOUT) = 0.7 A(15 V − 12 V) = 0.7 A(3 V) = 2.1 W
27.
VRlim(min) = 0.7 V
0.7 V 0.7 V
Rlim(min) =
=
= 0.35 Ω
I ext
2A
See Figure 17-2.
Figure 17-2
153
Chapter 17
28.
1.25 V
= 2.5 Ω
500 mA
See Figure 17-3.
R=
Figure 17-3
29.
I = 500 mA
8V
= 16 Ω
R=
500 mA
See Figure 17-4.
Figure 17-4
30.
VREF = 1.25 V
The voltage divider must reduce the output voltage (12 V) down to the reference voltage
(1.25 V). See Figure 17-38 in the text.
⎛ R1 ⎞
⎟⎟VOUT
VREF = ⎜⎜
⎝ R1 + R2 ⎠
R1
V
= REF
R1 + R2 VOUT
R1 = R1(VREF/VOUT) + R2(VREF/VOUT)
R − R1 (VREF / VOUT ) R1 (1 + VREF / VOUT )
R2 = 1
=
(VREF / VOUT )
(VREF / VOUT )
Let R1 = 10 kΩ.
10 kΩ(1 − 1.25 V/12 V)
R2 =
= 86 kΩ
(1.25 V/12 V)
154
Chapter 17
Multisim Troubleshooting Problems
The solutions showing instrument connections for Problems 31 through 34 are available from the
Instructor Resource Center. See Chapter 1 for instructions. The faults in the circuit files may be
accessed using the password book (all lowercase).
31.
R2 leaky
32.
Zener diode open
33.
Q2 collector-to-emitter open
34.
R1 open
155
Chapter 18
Communications
Section 18-1 Basic Receivers
1.
See Figure 18-1.
Figure 18-1
2.
See Figure 18-2.
Figure 18-2
3.
fLO = 680 kHz + 455 kHz = 1135 kHz
4.
fLO = 97.2 MHz + 10.7 MHz = 107.9 MHz
5.
fRF = 101.9 MHz − 10.7 MHz = 91.2 MHz
fIF = 10.7 MHz (always)
156
Chapter 18
Section 18-2 The Linear Multiplier
Vout ≅ −2.5 V
Vout ≅ −1.6 V
Vout ≅ +1.0 V
Vout ≅ +10 V
6.
(a)
(b)
(c)
(d)
7.
Vout = KVXVY = 0.125(+3.5 V)(−2.9 V) = −1.27 V
8.
Connect the two inputs together.
9.
(a) Vout = KV1V2 = (0.1)(+2 V)(+1.4 V) = +0.28 V
(b) Vout = KV1V2 = KV12 (0.1)(−3.2 V) 2 = +1.024 V
− V1 − (6.2 V)
(c) Vout =
=
= +2.07 V
−3V
V2
(d) Vout = V1 = 6.2 V = +2.49 V
Section 18-3 Amplitude Modulation
10.
fdiff = f1 − f2 = 100 kHz − 30 kHz = 70 kHz
fsum = f1 + f2 = 100 kHz + 30 kHz = 130 kHz
11.
f1 =
12.
fc = 1000 kHz
fdiff = 1000 kHz − 3 kHz = 997 kHz
fsum = 1000 kHz + 3 kHz = 1003 kHz
13.
f1 =
14.
fc = 1.2 MHz by inspection
fm = fc − fdiff = 1.2 MHz − 1.1955 MHz = 4.5 kHz
9 cycles
= 9000 cycles/s = 9 kHz
1 ms
1 cycle
= 1000 cycles/s = 1 kHz
f2 =
1 ms
fdiff = f1 − f2 = 9 kHz − 1 kHz = 8 kHz
fsum = f1 + f2 = 9 kHz + 1 kHz = 10 kHz
18 cycles
= 1.8 MHz
10 μs
1 cycle
f2 =
= 100 kHz
10 μs
fdiff = f1 − f2 = 1.8 MHz − 100 kHz = 1.7 MHz
fsum = f1 + f2 = 1.8 MHz + 100 kHz = 1.9 MHz
fc = 1.8 MHz
157
Chapter 18
f diff + f sum
8.47 kHz + 853 KHz
= 850 kHz
2
2
fm = fc − fdiff = 850 kHz − 847 kHz = 3 kHz
=
15.
fc =
16.
fdiff(min) = 600 kHz − 3 kHz = 597 kHz
fdiff(max) = 600 kHz − 300 Hz = 599.7 kHz
fsum(min) = 600 kHz + 300 kHz = 600.3 kHz
fsum(max) = 600 kHz + 3 kHz = 603 kHz
See Figure 18-3.
Figure 18-3
Section 18-4 The Mixer
1
[cos( A − B ) − cos( A + B )]
2
Vin(1) = 0.2 V sin [2π(2200 kHz)t]
Vin(2) = 0.15 V sin [2π(3300 kHz)t]
Vin(1)Vin(2) = (0.2 V)(0.15 V) sin [2π(2200 kHz)t] sin [2π(3300 kHz)t]
(0.2 V)(0.15 V)
Vout =
[cos 2π(3300 kHz − 2200 kHz)t − cos 2π (3300 kHz + 2200 kHz)t]
2
Vout = 15 mV cos [2π(1100 kHz)t] − 15 mV cos [2π(5500 kHz)t]
17.
(sin A)(sin B) =
18.
fIF = fLO − fc = 986.4 kHz − 980 kHz = 6.4 kHz
158
Chapter 18
Section 18-5 AM Demodulation
19.
See Figure 18-4.
Figure 18-4
20.
See Figure 18-5.
21.
See Figure 18-6.
Figure 18-5
Figure 18-6
Section 18-6 IF and Audio Amplifiers
22.
fc − fm = 1.2 MHz − 8.5 kHz = 1.1915 MHz
fc + fm = 1.2 MHz + 8.5 kHz = 1.2085 MHz
fc = 1.2 MHz
fLO − fm = 455 kHz − 8.5 kHz = 446.5 kHz
fLO + fm = 455 kHz + 8.5 kHz = 463.5 kHz
fLO = 455 kHz
23.
The IF amplifier has a 450 kHz to 460 kHz passband.
The audio/power amplifiers have a 10 Hz to 5 kHz bandpass.
159
Chapter 18
24.
C4 between pins 1 and 8 makes the gain 200.
With R1 set for minimum input, Vin = 0 V.
Vout(min) = AvVin(min) = 200(0 V) = 0 V
With R1 set for maximum input, Vin = 10 mV rms.
Vout(max) = AvVin(max) = 200(10 mV) = 2 V rms
Section 18-7 Frequency Modulation
25.
The modulating input signal is applied to the control voltage terminal of the VCO. As the
input signal amplitude varies, the output frequency of the VCO varies proportionately.
26.
An FM signal differs from an AM signal in that the information is contained in frequency
variations of the carrier rather than amplitude variations.
27.
Varactor
Section 18-8 The Phase-Locked Loop (PLL)
28.
See Figure 18-7.
Figure 18-7
29.
(a) The VCO signal is locked onto the incoming signal and therefore its frequency is equal to
the incoming frequency of 10 MHz.
(b) Vc =
Vi V o
(250 mV)(400 mV)
cos θ e
cos(30° − 15°) = (0.050)(0.966) = 48.3 mV
2
2
30.
Δfo = +3.6 kHz,
ΔVc = +0.5 V
Δf o + 3.6 kHz
K=
= 7.2 kHz/V
=
ΔV c
+ 0.5 V
31.
K = 1.5 kHz/V,
ΔVc = +0.67 V
Δf o
K=
ΔV c
Δfo = KΔVc = (1.5 kHz/V)(+0.67 V) = 1005 Hz
160
Chapter 18
32.
For a PLL to acquire lock the following conditions are needed:
(1) The difference frequency, f0 − fi must fall within the filter’s bandwidth.
(2) The maximum frequency deviation of the VCO frequency, Δfmax, must be sufficient
to permit f0 to change to equal fi.
33.
The free-running frequency:
1 .2
1 .2
fo =
= 233 kHz
=
4 R1C1 4(3.9 kΩ)(330 pF)
The lock range:
8f
8( 233 kHz)
1.864 MHz
flock = ± o = ±
=±
= ±104 kHz
VCC
18 V
18 V
The capture range:
fcap = ±
1
2π
⎛ 2πf lock
⎜⎜
⎝ 3600 × C 2
= ±
1
2π
⎛ 2π (103.6 kHz) ⎞
1
⎜⎜
⎟⎟ = ±
2π
⎝ 3600 × 0.22 μF ⎠
⎞
⎟⎟
⎠
⎛ 650.9 kHz ⎞
⎟⎟ = ±4.56 kHz
⎜⎜
⎝ 792 μF ⎠
Section 18-9 Fiber Optics
34.
The light ray will be reflected because the angle of incidence (30°) is greater than the critical
angle (15°).
35.
θC = cos−1(n2/n1) = cos−1(1.25/1.55) = 36.2°
There are no Multisim Troubleshooting Problems in this chapter.
161
Application Activity
Results
Chapter 2
1.
A comparison of Equations 2-5 and 2-7 shows that the output voltage of a bridge rectifier is
nearly twice that of a center-tapped rectifier. Also, two diode drops contribute to the bridge
output voltage, but only one diode drop contributes to the center-tapped output voltage.
2.
A comparison of Equations 2-6 and 2-8 shows that the PIV of a bridge rectifier is nearly half
that of a center-tapped rectifier.
3.
V p ( out ) = V p ( sec ) − 1.4 V
V p ( sec ) = V p ( out ) + 1.4 V = 16 V + 1.4 V = 17.4 V peak = 12.3 V rms
4.
Minimum VA = (12.3 V)(250 mA) = 3.075 VA
Use the 12 V CT rated at 6 VA.
The 12 V rms secondary voltage is within 10% of the specified 12.3 V determined in 3.
5.
The primary current is determined as follows:
I p ( pri ) Vsec
=
I p ( sec ) V pri
⎛V ⎞
⎛ 12 V ⎞
I p ( pri ) = ⎜ sec ⎟ I p ( sec ) = ⎜
⎟ 354 mA = 35.4 mA
⎜ V pri ⎟
⎝ 120 V ⎠
⎝
⎠
The fuse rating should be at least 20% greater than I p ( pri ) .
6.
7.
8.
r=
Vr ( pp )
VDC
Vr ( pp ) = rVDC = 0.03(16 V) = 480 mV
⎛ 1 ⎞
Vr ( pp ) = ⎜
⎟V p ( rectified )
⎝ f RL C ⎠
⎛
⎞
⎛
⎞
1
1
C= ⎜
V p ( rectified ) = ⎜
⎟17 V = 0.004612 F
⎟
⎜
⎟
⎜
⎟
⎝ f RLVr ( pp ) ⎠
⎝ (120 Hz)(64 Ω)(480 mV) ⎠
Use 4700 μF.
PL = VLIL = (16 V)(258 mA) = 4.13 W
The rating should be at least 5 W.
163
Application Activity Results
Troubleshooting
(a)
Open capacitor. Circuit is operating as full-wave rectifier with no filter.
(b)
No fault
(c)
Rectifier diode open. Circuit is operating as a half-wave rectifier.
(d)
Diode and filter capacitor open. Circuit is operating as a half-wave rectifier with no filter.
Chapter 3
1.
VOUT(max) = 12 V + 120 mV = 12.12 V (typical)
2.
ΔVOUT = 5 mV
3.
VF = 1.9 V
12 V − 1.9 V
Rlimit =
= 505 W
20 mA
P = (10.1 V)20 mA = 202 mW. Use 0.25 W rating.
4.
⎛V ⎞
⎛ 12.6 V ⎞
Ipri = ⎜ sec ⎟ I sec = ⎜
⎟ 250 mA = 26.3 mA
⎜ V pri ⎟
⎝ 120 V ⎠
⎝
⎠
Use the next highest standard fuse rating.
(12 V) 2
= 3.06 W
47 Ω
5.
PL =
6.
The printed circuit board and the schematic agree.
7.
Ireg = ILED + IL = 20 mA + 250 mA = 270 mA
Preg = (16 V − 12 V)270 mA = 1.08 W
Chapter 4
1.
From the datasheet, VCE(sat) = 0.3 V.
VCC − VCE(sat) 12 V − 0.3 V
R3 =
= 1170 Ω (use std. 1.2 kΩ)
=
10 mA
I C1
2.
From the datasheet, β DC(min) = hFE(min) = 75.
IB1 =
3.
R1 =
I C1
β DC(min)
=
10 mA
= 133 μA
75
Vsensor − VBE 12 V − 0.7 V
=
= 85 Ω (use std. 75 Ω)
I B1
133 μ A
164
Application Activity Results
4.
IC2 =
IB2 =
VCC − VCE(sat)
RL
I C2
β DC(min)
12 V − 0.3 V
= 18.9 mA
620 Ω
18.9 mA
=
= 252 μA
75
=
VCC − VBE
R3 + R4
V − VBE 12 V − 0.7 V
R3 + R4 = CC
=
= 44.8 kΩ
I B2
252 μ A
R4 = 44.8 kΩ − 1.2 kΩ = 43.6 kΩ (use lower std. value 39 kΩ or even 36 kΩ to ensure
saturation)
IB2 =
5.
The value of VCE(sat) in the simulation is 0.126 V. The datasheet shows a value of 0.3 V at
150 mA. The simulated value is less because the collector current is much less than the
current at which the datasheet value of 0.3 V is specified.
6.
Each circuit on the printed circuit board is in agreement with the schematic. See Figure AA-1
for the component identification.
Figure AA-1 Each of the four circuits is identical.
7.
The resistor values are in close agreement.
8.
See Figure AA-1 for pin labels.
165
Application Activity Results
9.
Connect VCC and ground. Apply +12V to input 1. Check output 1 for +12 V. Apply 0 V to
input 1. Check output 1 for approximately 0 V (VCE(sat0). Repeat for each of the four circuits
using the inputs 2-4 and outputs 2-4.
10.
Add a second circuit board with only two circuits installed for zones 5 and 6. The outputs are
externally connected to the circuit outputs of the other board to form a single output to the alarm.
Chapter 5
1.
See Figure AA-2.
Figure AA-2
2.
RIN(BASE) = βDCRE = 300(470 Ω) = 141 kΩ
The voltage divider is stiff for all values of RTherm.
At 60°C:
At 65°C:
At 70°C:
⎛ RTherm ⎞
⎛ 1.256 kΩ ⎞
VB = ⎜
⎟VCC = ⎜
⎟ 9 V = 1.9 V
+
R
R
⎝ 5.965 kΩ ⎠
Therm ⎠
⎝ 1
V − VBE 1.9 V − 0.7 V
IE = B
=
= 2.6 mA
RE
470 Ω
IC = IE = 2.6 mA
⎛ RTherm ⎞
⎛ 1.481 kΩ ⎞
VB = ⎜
⎟VCC = ⎜
⎟ 9 V = 2.16 V
⎝ 6.181 kΩ ⎠
⎝ R1 + RTherm ⎠
V − VBE 2.16 V − 0.7 V
=
IE = B
= 3.1 mA
RE
470 Ω
IC = IE = 3.1 mA
⎛ RTherm ⎞
⎛ 1.753 kΩ ⎞
VB = ⎜
⎟VCC = ⎜
⎟ 9 V = 2.44 V
⎝ 6.453 kΩ ⎠
⎝ R1 + RTherm ⎠
V − VBE 2.44 V − 0.7 V
IE = B
=
= 3.7 mA
RE
470 Ω
IC = IE = 3.7 mA
166
Application Activity Results
At 75°C:
At 80°C:
⎛ RTherm ⎞
⎛ 2.084 kΩ ⎞
VB = ⎜
⎟VCC = ⎜
⎟ 9 V = 2.76 V
⎝ 6.784 kΩ ⎠
⎝ R1 + RTherm ⎠
V − VBE 2.76 V − 0.7 V
=
IE = B
= 4.4 mA
RE
470 Ω
IC = IE = 4.4 mA
⎛ RTherm ⎞
⎛ 2.490 kΩ ⎞
VB = ⎜
⎟VCC = ⎜
⎟ 9 V = 3.12 V
⎝ 7.19 kΩ ⎠
⎝ R1 + RTherm ⎠
V − VBE 3.12 V − 0.7 V
=
IE = B
= 5.1 mA
RE
470 Ω
IC = IE = 5.1 mA
VOUT = VCC − ICR2 = 9 V − (2.6 mA)(1.0 kΩ) = 6.4 V
VOUT = VCC − ICR2 = 9 V − (3.1 mA)(1.0 kΩ) = 5.9 V
VOUT = VCC − ICR2 = 9 V − (3.7 mA)(1.0 kΩ) = 5.3 V
VOUT = VCC − ICR2 = 9 V − (4.4 mA)(1.0 kΩ) = 4.6 V
VOUT = VCC − ICR2 = 9 V − (5.1 mA)(1.0 kΩ) = 3.9 V
3.
At 60°C:
At 65°C:
At 70°C:
At 75°C:
At 80°C:
4.
The calculated values agree reasonably well with the values measured in the simulation.
Chapter 6
1.
Second stage is set for maximum gain when R10 is completely bypassed and equal to 0 Ω.
Rc1 = R5 & R6 & R7 & β DC R9 = 22 kΩ & 47 kΩ & 22 kΩ & 200(130 Ω) = 6.6 kΩ
R
6.6 kΩ
Av1 = c1 =
= 6.6
R4 1.0 kΩ
R8 6.8 kΩ
=
= 52.3
R9 130 Ω
2.
Av2 =
3.
Av(tot) = Av1Av2 = (6.6)(52.3) = 345 (This exceeds the specified maximum gain)
4.
I1 = I2 =
30 V
= 45.5 μA
660 kΩ
14.3 V
IE1 = IC1 =
= 421 μA
34 kΩ
30 V
I6 = I7 =
= 435 μA
69 kΩ
VB2 = VCC − I6R6 = 15 V − 20.4 V = −5.4 V
−15 V − (−5.4 V − 0.7 V)
IE2 = IC2 =
= 1.7 mA
130 Ω + 5 kΩ
ITOT = 45.5 μA + 421 μA + 435 μA + 1.7 mA = 2.6 mA
PD = 30 V (2.6 mA) = 78 mW
167
Application Activity Results
5.
Vin(p) = 45 mV
From the scope display, Vout(p) = 5.5 V.
5.5 V
Av =
= 122
45 mV
6.
The calculated maximum voltage gain is 345. The amplifier is not adjusted for maximum
gain, but the value of 122 is within the specified range (90 to 170).
7.
The pc board agrees with the schematic.
8.
See Figure AA-3.
Figure AA-3
9.
There is a 400 mV peak signal at the collector of Q1 and the same signal appears at the base
of Q2. There is no output signal. Either Q2 is faulty or C5 (the output coupling capacitor) is
open.
10.
There is a 50 mV peak signal at the base of Q1 and a 300 mV peak signal at the collector of
Q1. There is no signal at the base of Q2. The coupling capacitor C3 is open.
Chapter 7
1.
Assuming βDC for Q5 is 200,
RIN(BASE) = βDCR4 = 200(220 Ω) = 44 kΩ
RIN = RIN(BASE) = 44 kΩ
2.
Av =
R3 1.0 kΩ
=
= 4.5
R4 220 Ω
168
Application Activity Results
3.
The output waveform has a peak of approximately 10 V.
Vout(rms) = 0.707(10 V) = 7.07 V
2
Vout
(7.07 V) 2
( rms )
=
= 6.1 W
Pout =
RL
8.2 Ω
10.5 V
= 4.2
2.5
4.
Av =
5.
The calculated gain is 4.5 and the measured gain is 4.2. They are close within less than 10%.
6.
The scope display shows the peak output of the power amplifier is approximately 9.8 V.
2
Vout
(6.93 V) 2
( rms )
Pout =
=
= 5.86 W
8.2 Ω
RL
7.
From the scope display, Vin(peak) = 2 V and Vout(peak) = 9.8 V.
9.8 V
Av =
= 4.9
2V
8.
Av =
9.
The pc board agrees with the schematic.
10.
See Figure AA-4.
9.8 V
= 245
40 mV
Figure AA-4
169
Application Activity Results
11.
An output transistor is faulty.
12.
The interconnections are correct.
Chapter 8
1.
From the graph, Vsensor = 100 mV for a pH of 8.
2.
From the graph, Vsensor = −400 mV for a pH of 3.
3.
From the datasheet y21s = gfs = 24 mS
4.
The maximum drain current is specified to be 30 mA regardless of VDS.
5.
From the datasheet graph, with VG2S = 1 V and VG1S = 0 V, ID is approximately 4.5 mA.
6.
For VOUT = 7 V, Vsensor is between −200 mV and −300 mV so the pH is between 4 and 5,
making the solution acidic.
7.
See Figure AA-5.
Figure AA-5
8.
The pc board agrees with the schematic.
170
Application Activity Results
9.
See Figure AA-6.
Figure AA-6
10.
See Figure AA-6.
Chapter 9
1.
Channel 7: 174-180 MHz
Channel 8: 180-186 MHz
Channel 9: 186-192 MHz
Channel 10: 192-198 MHz
Channel 11: 198-204 MHz
Channel 12: 204-210 MHz
Channel 13: 210-216 MHz
2.
824-896 MHz and 1850-1990 MHz
3.
C2 provides an ac ground for the gate of Q1 (common gate).
4.
RIN(gate) =
5.
Rin = R3 & RIN(gate) = 10 MΩ & 20 × 109 Ω = 10 MΩ
6.
From the datasheet, gfs = 3000 μmhos = 3000 μS
7.
88 MHz is the lower end of the FM band.
VGS 20 V
=
= 20 × 109 Ω
I GSS 1 nA
171
Application Activity Results
8.
(b)
Vout(rms) = 0.707Vout(p) = 0.707(21 mV) = 14.8 mV
21 mV
= 2100
Av =
10 μ V
Vout(rms) = 0.707Vout(p) = 0.707(100 mV) = 70.7 mV
70.7 mV
Av =
= 7070
10 μ V
(c)
9.
The pc board agrees with the schematic.
10.
It is a decoupling capacitor connected to the dc supply line for noise elimination.
11.
See Figure AA-7.
Figure AA-7
Chapter 10
1.
For stage 1 input circuit:
1
fcl(input) =
2π ( R1 & R2 & β ac R4 )C1
1
1
C1 =
=
= 13.2 nF
2π ( R1 & R2 & β ac R4 ) f cl ( input ) 2π (330 kΩ & 330 kΩ & 100(1.0 kΩ)193 Hz
2.
For stage 2 input circuit:
fcl(input) =
C3 =
1
2π ( R5 + R6 & R7 & β ac ( R9 + R10 ) ) C3
1
2π ( R5 + R6 & R7 & β ac ( R9 + R10 ) ) f cl ( input )
172
=
1
= 23.4 nF
2π (35.2 kΩ)193 Hz
Application Activity Results
3.
Midrange gain is 33.4 dB. Gain at 60 Hz is 9.7 dB.
33.4 dB − 9.7 dB = 23.7 dB
4.
At 5 kHz from scope display: Vout = 0.707(2.6 V) = 1.84 V
5.
At 60 Hz from scope display: Vout = 0.707(240 mV) = 170 mV
6.
At 300 Hz: Vout = 0.707(1.84 V) = 1.30 V
7.
Av =
8.
Av =
2.6 V
= 57.8
45 mV
Av (dB) = 20 log Av = 20 log(57.8) = 35.2 dB
170 mV
= 3.78
45 mV
Av (dB) = 20 log Av = 20 log(3.78) = 11.6 dB
Chapter 11
1.
From the datasheet, VPRM = 400 V for the 2N6397.
2.
From the datasheet, the maximum on-state rms current is 12 A.
3.
Von(max) = 1.5 V
IF = 50 mA
Pmax = Von(max)IF = (1.5 V)(50 mA) = 750 mW
4.
The SCR conducts during the flat portion of the waveform.
5.
The SCR will conduct more it the control voltage is reduced.
6.
The motor speed will increase when the SCR conducts more as a result of a reduced control
voltage.
7.
The pc board agrees with the schematic.
173
Application Activity Results
8.
See Figure AA-8.
Figure AA-8
9.
(a)
(b)
(c)
Test of board 1: Working properly
Test of board 2: SCR is not triggering on.
Test of board 3: SCR continuously on
10.
(a)
(b)
(c)
No problem
PUT faulty or SCR gate open
SCR shorted
Chapter 12
1.
The op-amp configuration is a noninverting amplifier.
2.
The maximum and minimum gains of the op-amp stage are
Av = 1 +
Rf
Ri
150 kΩ
= 151
1 kΩ
150 kΩ
=1+
= 75
2 kΩ
Av (max) = 1 +
Av (min)
3.
Maximum output voltage of the op-amp stage is
Vout(max)⇒ = Av(max)Vin = (150)(50 mV) = 7.5 V
174
Application Activity Results
4.
The ideal maximum power to the speaker is
Vout ( rms ) = 7.5 V
Pmax =
2
Vout
( rms )
Rspeaker
=
(7.5 V) 2
= 7.03 W
8Ω
5.
Noninverting input: pin 3; inverting input: pin 2; output: pin 6; ±15 V: pin 7; −15 V pin 4.
6.
From the datasheet: Maximum power consumption @ +15 V is 85 mW.
7.
From the datasheet, the typical output voltage swing is +14 V.
8.
V1(rms) = 50 mV input voltage
V2(rms) = 0.707(10 V) = 7.07 V output of op-amp
V3(rms) = 0.707(9 V) = 6.36 V voltage across the load
9.
Voltage gain of op-amp stage:
10.
Av =
Vout V2 7.07 V
=
=
= 141.4
Vin V1 50 mV
Av =
Vout V3 6.36 V
= =
= 127.2
Vin V1 50 mV
Overall voltage gain:
11.
The pc board agrees with the schematic.
12.
See Figure AA-9.
Figure AA-9
175
Application Activity Results
13.
(a)
(b)
(c)
(d)
Working properly
No signal at C1.
Top half of output clipped.
Bottom half of output clipped.
14.
(a)
(b)
(c)
(d)
No problem
Op-amp or C1 faulty.
Q3 or Q4 faulty.
Q1 or Q2 faulty.
Chapter 13
1.
R1, R2, and R3 determine the reference voltage.
2.
IR1 = IR2 = IR3 =
3.
VR2/R3 = IR3(R2 + R3) = 39 μA(556 kΩ) = 21.7 V
VREF(max) = −12 V + 21.7 V = +9.7 V
4.
The output pulse amplitude is limited to +5 V and 0 V by the +5V supply voltage.
5.
As R2 is adjusted, the reference voltage at which the comparator is triggered is varied from a
maximum of +9.82 V to a minimum of −9.7 V. This changes the point on the input sine wave
where the comparator changes state. The higher up on the sine wave that the trigger point
occurs, the smaller the duty cycle.
6.
Noninverting input: pin 2; inverting input: pin 3; output: pin 7; +12 V: pin 8; −12 V: pin 4.
7.
Vp = 10 V
Vrms = 0.707(10 V) = 7.07 V
8.
Vpulse = 5 V
9.
T = (2 div)(50 μs/div) = 100 μs
1
1
f= =
= 10 kHz
T 100 μ s
10.
(a)
24 V
24 V
=
= 39 μA
R1 + R2 + R3 612 kΩ
VR3 = IR3R3 = 39 μA(56 kΩ) = 2.18 V
VREF(min) = −12 V + VR3 = −12 V + 2.18 V = −9.82 V
Each small division = 40 μs
Pulse width = 1.5(40 μs) = 60 μs
Period = 5 div(200 μs/div) = 1000 μs
⎛ 60 μ s ⎞
% Duty cycle = ⎜
⎟100 = 6% (exceeds specs)
⎝ 1000 μ s ⎠
176
Application Activity Results
(b)
Pulse width = 4.6 div(200 μs) = 920 μs
Period = 5 div(200 μs/div) = 1000 μs
⎛ 920 μ s ⎞
% Duty cycle = ⎜
⎟100 = 92% (exceeds spec)
⎝ 1000 μ s ⎠
(c)
Each small division = 4 μs
Pulse width = 2(4 μs) = 8 μs
Period = 5 div(20 μs/div) = 100 μs
⎛ 8 μs ⎞
% Duty cycle = ⎜
⎟100 = 8% (exceeds spec)
⎝ 100 μ s ⎠
(d)
Pulse width = 4.6(20 μs) = 92 μs
Period = 5 div(20 μs/div) = 100 μs
⎛ 92 μ s ⎞
% Duty cycle ⎜
⎟100 = 92% (exceeds spec)
⎝ 100 μ s ⎠
11.
The pc board agrees with the schematic.
12.
See Figure AA-10.
Figure AA-10
13.
The connections are correct.
Chapter 14
1.
Pin 3 is connected to pin 11. From Table 1 on the on-line datasheet, the gain is 500.
177
Application Activity Results
2.
Table 1 in the on-line datasheet shows pin connections for various fixed gains. Also, the
formula can be applied for pins 3 and 16, as shown in Figure AA-11.
Figure AA-11 Operating connections for G = 20.
3.
From the scope, Vout(pp) = (2.9 div)(50 mV/div) = 145 mV
⎛ 145 mV ⎞
Vout(rms) = 0.707 ⎜
⎟ = 52.1 mV
2
⎝
⎠
Vout ( rms )
51.2 mV
Av =
=
= 512
100 μ V
Vin ( rms )
The gain indicated by the pin connections is 500.
4.
The hysteresis is approximately 50 mV.
5.
The shield-guard driver output on the scope display is approximately 100 mV rms. This is the
same as the common-mode signal.
6.
The pc board agrees with the schematic.
178
Application Activity Results
7.
See Figure AA-12.
Figure AA-12
Chapter 15
1.
RFID systems are used for tracking and identification of objects.
2.
The basic RFID system components are tag, reader, and processor.
3.
The tag stores an identification code and other information which it transmits to a reader in
the form of a modulated signal.
4.
The reader receives the transmitted information from the tag and converts it to digital form.
5.
The band-pass filter eliminates frequencies other than the frequency transmitted by the tag.
6.
The low-pass filter eliminates the carrier frequency and passes only the modulating signal
frequency.
7.
Gain of amplifier U2 and U3:
Av = 1 +
8.
fo =
R5
R
100 kΩ
= 46.5
=1+ 7 = 1 +
2.2 kΩ
R6
R8
1
=
2π C
R1 + R3
1
15 kΩ + 1 kΩ
=
= 132 kHz
R1 R2 R3 2π (200 pF) (15 kΩ)(39 kΩ)(1 kΩ)
This is within 6% of the measured center frequency.
179
Application Activity Results
9.
10.
11.
The low-pass filter is set for an approximate Butterworth response since the damping factor is
⎛R ⎞
⎛ 560 Ω ⎞
DF = 2 − ⎜ 12 ⎟ = 2 − ⎜
⎟ = 1.44
⎝ 1000 Ω ⎠
⎝ R11 ⎠
fc =
1
1
=
= 15.9 kHz
2π RC 2π (1 kΩ)(10 nF)
⎛ R15 ⎞
⎛ 15 kΩ ⎞
VREF = ⎜
⎟VCC = ⎜
⎟15 V = 1.96 V
⎝ 115 kΩ ⎠
⎝ R14 + R15 ⎠
A positive reference is required because the output of the LP filter is a positive signal.
12.
The pc board agrees with the schematic.
13.
See Figure AA-13.
Figure AA-13
180
Application Activity Results
Chapter 16
1.
Av =
C1 C4 100 nF
=
=
= 10
C2 C5 10 nF
2.
CT =
C4C5
(100 nF)(10 nF)
=
= 9.1 nF
110 nF
C4 + C5
fr =
1
1
=
= 136 kHz
2π L1CT 2π (150 μ H)(9.1nF)
This calculated frequency is within 10% of the 125 kHz measured frequency.
3.
fr =
1.44
1.44
=
= 11.6 kHz
( R7 + R8 )C3 (6.2 kΩ + 6.2 kΩ)10 nF
The measured frequency is 10 kHz. The calculated value differs by 16%.
4.
The forward resistance of the diode is a possible factor in the difference between the
calculated and measured values in 2 and 3.
5.
Q2 operates as an analog switch that turns the carrier signal (125 kHz) on and off.
6.
First waveform: Output of ASK generator containing bursts of the 125 kHz carrier signal at
10 kHz.
Second waveform: output of the RFID rectifier.
Third waveform: The rectified signal after filtering out the 125 kHz carrier.
Fourth waveform: Pulse output of the RFID reader.
7.
The pc board agrees with the schematic of the ASK test generator.
181
Application Activity Results
8.
See Figure AA-14.
Figure AA-14
Chapter 17
1.
From the datasheet, VO(min) = 8.65 V and VO(max) = 9.35 V.
2.
From the datasheet, the output voltage can change a maximum of 180 mV.
3.
IL(max) =
4.
5.
VO(max)
9.4 V
= 28.3 mA
330 Ω
R1
PD(max) = (28.3 mA)2330 Ω = 265 mW
=
⎛ 1 kΩ ⎞
VR2(max) = ⎜
⎟ 9.4 V = 7.07 V
⎝ 1330 Ω ⎠
(7.07 V) 2
= 50 mW
PD(max) =
1 kΩ
I pri
I sec
=
Vsec
V pri
⎛ (0.707)(34 V) ⎞
I pri = ⎜
⎟100 mA = 20 mA
120 V
⎝
⎠
Fuse rating should exceed 20 mA.
182
Application Activity Results
6.
The pc board agrees with the schematic.
7.
PD = (32.6 V − 9 V)100 mA = 2.36 W
8.
PD = (32.6 V − 30 V)100 mA = 236 mW
183
Summary of MultiSIM Circuit Files
Chapter 1:
Circuit
E01-01
F01-40a
F01-40b
F01-40c
F01-40d
F01-41a
F01-41b
F01-41c
F01-41d
F01-42
TSP01-22
TSP01-23
TSP01-24
TSP01-25
TSP01-26
TSP01-27
TSP01-28
TSP01-29
TSP01-30
MultiSIM
VR(1) = 9.29 V
VD(1) = 0.713 V
VR(2) = 4.99 V
VD(2) = 4.99 V
VR = 0.020 nV
VR = 99.151 V
VR = 14.01 V
VD = 0.651 V
VD = 25.000 V
VD = 15.000 V
VD = 2.500 V
VR = 11.285 nV
VA = 25.00 V
VB = 24.255 V
VC = 8.746 V
VD = 8.000 V
VR = 3.000 V
VD = 99.994 V
VD = 32.434
VD = -1.000 pV
VD = 0.668 V
VD = 0.192 nV
VD = 2.577 V
VD = 11.994 V
VA = 25.00 V
VB = 24.253 V
VC = 8.000 V
VD = 8.000 V
Chapter 2:
Circuit
E02-02a
E02-02b
E02-03
E02-05
E02-06
E02-07
E02-09
MultiSIM
Half-wave VP = 4.3 V
Half-wave VP = 99.2 V
Half-wave VP = 84.2 V
Full-wave VP = 24.3 V
Full-wave VP = 15.74 V
VL(max) = 14.7 V
VL(min) = 13.8 V
Half-wave
VP(max) = 9.1 V
VP(min) = 779.1 mV
185
Summary of MultiSIM Files
Circuit
E02-10
E02-11
E02-12
F02-73a
F02-73b
F02-74
F02-76
F02-77
F02-78
F02-79
F02-83a
F02-83b
F02-86
F02-88
TSE02-01
TSE02-02
TSE02-03
TSP02-52
TSP02-53
TSP02-54
TSP02-55
TSP02-56
TSP02-57
TSP02-58
TSP02-59
MultiSIM
Clipped
VP(max) = 5.7 V
VP(min) = -5.7 V
Negative Clamp
VP(max) = 9.0 V
VP(min) = -18.0 V
Clipped
VP(max) = 729 mV
VP(min) = -45.5 V
Half-wave VP = 4.2 V
Half-wave VP = -49.3 V
Half-wave VP = 83.964 V
Full-wave VP = 20.476 V
Full-wave VP = 32.296 V
VL(max) = 47.6 V
VL(min) = 46.6 V
Half-wave
VP(max) = 712.7 mV
VP(min) = -10.0 V
Clipped
VP(max) = 721.9 mV
VP(min) = -722.0 mV
Clipped
VP(max) = 722.0 mV
VP(min) = -722.0 mV
VSEC = 119.812 VAC
VREC = 0.2 V
VL = 59.1 V
Full-wave VP = 16.211 V
VFUSE = 0 V
VSURGE = 0 V
Not implemented
Unrectified AC 10.0 VPP
VL(max) = 38.4 V
VL(min) = -49.3 V
VL = 0 V
Half-wave VP = 19.6 V
Clipped Full-wave
VP(max) = 59.8 V
VP(min) = 1.6 V
Full-wave
VP(max) = 49.1 V
VP(min) = 784.1 mV
Positive Clipped
VP(max) = 679.1 mV
VP(min) = -909.1 mV
Half-wave VP(min) = -30.0 V
186
Summary of MultiSIM Files
Circuit
TSP02-60
MultiSIM
Half-wave
VP(max) = 16.0 V
VP(min) = 480.1 mV
Chapter 3:
Circuit
E03-05
E03-06
E03-08
F03-70
F03-73
F03-77
TSE03-01
TSE03-02
TSE03-03
TSE03-04
TSP03-47
TSP03-48
TSP03-49
TSP03-50
MultiSIM
ID(1) = 4.749 µA
VD(1) = 4.860 V
ID(2) = 206 mA
VD(2) = 5.137 V
ID = 1.330 mA
VR = 0.024 A
VD = 11.930 V
Clipped
VP(max)(1) = 5.6 V
VP (min)(1) = -3.8 V
VP(max)(2) = 6.7 V
VP (min)(1) = -15.5 V
IR(1) = 150 mA
VR(1) = 4.692 V
IR(2) = 40 mA
VR(2) = 5.116 V
ID = 34 mA
VOUT = 11.002 V
VOUT = 10.439 V
VC = 0 VDC
VOUT = 0.000 VDC
VD = 15.0 VDC with ripple
VOUT = 15.0 VDC
VD = 0 V
Blown fuse
VOUT = 8.000 VDC
Spikey output
VOUT = 12.0 V
VSPIKE = 9.0 V
VR > 26 VDC
VOUT = 0.079 nVDC
VR = 22.243 V
Chapter 4:
Circuit
E04-02
MultiSIM
IB = 412 µA
IC = 62 mA
IE = 62 mA
VCB = 2.94 V
VCE = 3.821 V
187
Summary of MultiSIM Files
Circuit
E04-04
E04-11
F04-54
F04-55a
F04-55b
F04-56
F04-57
F04-58
F04-59
TSE04-01
TSE04-02
TSE04-03
TSP04-55
TSP04-56
TSP04-57
TSP04-58
TSP04-59
TSP04-60
TSP04-61
TSP04-62
MultiSIM
IB = 217 µA
IC = 9.838 mA
IC(1) = 16 mA
VCE(1) = 2.952 V
IC(2) = 13 mA
VCE(2) = 3.709 V
IB = 667 µA
IC = 32 mA
IE = 33 mA
VBC = -4.608 V
VBE = 877 mV
VCE = 5.458 V
VBC = 3.254 V
VBE = -0.834 V
VCE = -4.088 V
IB = 24 µA
IC = 1.197 mA
IE = 1.221 mA
VB(1) = 10.000 V
VC(1) = 20.000 V
VE(1) = 9.228 V
VB(2) = -4.000 V
VC(2) = -12.000 V
VE(2) = -3.216 V
VC = 222 mV
VB = 0.798 V
VC = 0.389 V
VB = 0.716V
VC = 5.172 V
VB = 0.598 V
VC = 0.022 V
VB = 2.998 V
VC = 9.000 V
VRB = 2.471 V
VRC = 14.982 V
VCE = -0.021 nV
VCE = 10.0 V
VB = 10.00 V
VC = 20.00 V
IC = 91 mA
IC = 5.456 mA
IB = 0.444 pA
VC = 4.999 V
IB = 4.350 µA
IC = -0.021 pA
188
Summary of MultiSIM Files
Chapter 5:
Circuit
E05-01
E05-02
E05-04
E05-08a
E05-08b
E05-10
F05-34
F05-35
F05-38
F05-39
F05-41
F05-42
TSE05-01
TSE05-02
TSE05-03
TSE05-04
MultiSIM
VBE = 869 mV
VCE = 7.187 V
IC = 39 mA
VBE = 814 mV
VCE = 2.775 V
IC = 4.615 mA
VBE = -794 mV
VCE = -3.082 V
IC = 2.155 mA
VBE = 0.802 V
VCE = 10.385 V
IC = 2.884 mA
VBE = 0.806 V
VCE = 10.101 V
IC = 3.391 mA
VBE = 0.767 V
VCE = 2.366 V
IC = 763 µA
VCE = 10.771 V
IC = 923 µA
VCE = 6.001 V
IC = 5.126 mA
VB = 2.047 V
VC = 6.237 V
VE = 1.267 V
VB = -1.666 V
VC = -9.197 V
VE = -0.881 V
VBE = -0.846 V
VCE = -7.182 V
IC = 16 mA
VBE = 0.774 V
VCE = 1.169 V
IC = 1.017 mA
VB = 0.047 µV
VC = 10.000 V
VE = 4.700 nV
VB = 3.197 V
VC = 10.000 V
VE = 0.000 V
VB = 3.145 V
VC = 5.061 V
VE = 2.329 V
VB = 3.197 µV
VC = 10.000 V
VE = 2.695 V
189
Summary of MultiSIM Files
Circuit
TSP05-55
TSP05-56
TSP05-57
TSP05-58
TSP05-59
TSP05-60
MultiSIM
VB = 669 mV
VC = 18 mV
IB = -0.444 pA
VB = 3.664 V
VC = -2.846 V
VC = -10.000 V
VE = 2.438 V
VB = 2.999 V
Chapter 6:
Circuit
E06-08
E06-09
E06-11
F06-51
F06-52
F06-53
F06-54
F06-57
F06-62
MultiSIM
VC = 5.530 VDC
Vb = 26.1 mVPP
Vc = 221.9 mVPP
DC values off, gain is OK
Vb = 2.8 VPP
Vc = 2.8 VPP
DC values off, gain is OK
Vb = 14.0 mVPP
Vc = 930.5 mVPP
VB = 2.570 VDC
Vb = 99 mVAC
VOUT ≈ 0 VDC
Vout = 216 mVAC
VB = 1.593 VDC
Vb = 100 mVAC
VOUT = 7.990 mVDC
Vout = 395 mVAC
VB = 1.593 VDC
Vb = 100 mVAC
VOUT = 7.990 mVDC
Vout = 395 mVAC
VB = 1.741 VDC
Vb = 1.01 VAC
VOUT = 88 mVDC
Vout = 881 mVAC
VC1 = 7.097 VDC
VB1 = 2.859 VDC
Vb1 = 0.051 VAC
VE1 = 2.106 VDC
VC2 = 6.204 VDC
VB2 = 1.657 VDC
VOUT2 = -1.862 VDC
Vout2 = 5.949 VAC
Vin = 0.100 V
Vout = 3.28 V
190
Summary of MultiSIM Files
Circuit
TSE06-01
TSE06-02
TSE06-03
MultiSIM
VB(1) = 1.680 VDC
VC(1) = 5.772 VDC
VE(1) = 908 mVDC
Vb(1) = 0.100 VAC
Vc(1) = 5.117 mVAC
Ve(1) = 0.473 µVAC
VB(2) = 1.680 VDC
VC(2) = 5.732 VDC
VE(2) = 908 mVDC
Vb(2) = 5.132 VAC
Vc(2) = 832 mVAC
Ve(2) = 908 mVAC
VOUT = -0.040 VDC
Vout = 832 mVAC
VB(1) = 1.680 VDC
VC(1) = 5.772 VDC
VE(1) = 908 mVDC
Vb(1) = 0.100 VAC
Vc(1) = 0.016 VAC
Ve(1) = 0.469 µVAC
VB(2) = 1.680 VDC
VC(2) = 5.772 VDC
VE(2) = 908 mVDC
Vb(2) = 0.010 pVAC
Vc(2) = 0.047 pVAC
Ve(2) = 0.000 VAC
VOUT = 1.721 pVDC
Vout = 2.658 pVAC
VB(1) = 1.680 VDC
VC(1) = 5.772 VDC
VE(1) = 908 mVDC
Vb(1) = 0.100 VAC
Vc(1) = 5.117 mVAC
Ve(1) = 0.473 µVAC
VB(2) = 1.680 VDC
VC(2) = 5.772 VDC
VE(2) = 908 mVDC
Vb(2) = 0.010 VAC
Vc(2) = 0.046 mVAC
Ve(2) = 9.838 mVAC
VOUT = -0.097 mVDC
Vout = 0.046 VAC
191
Summary of MultiSIM Files
Circuit
TSE06-04
TSP06-60
TSP06-61
TSP06-62
TSP06-63
TSP06-64
TSP06-65
MultiSIM
VB(1) = 1.680 VDC
VC(1) = 5.772 VDC
VE(1) = 908 mVDC
Vb(1) = 0.100 VAC
Vc(1) = 0.010 VAC
Ve(1) = 0.473 µVAC
VB(2) = 1.754 VDC
VC(2) = 9.999 VDC
VE(2) = 0.000 VDC
Vb(2) = 0.010 VAC
Vc(2) = 0.041 pVAC
Ve(2) = 0.000 VAC
VOUT = 0.012 nVDC
Vout = 0.016 nVAC
Vb = 0.100 VAC
Vc = 0.215 VAC
Vout = 0.000 VAC
Vb = 0.099 VAC
IE = 0.000 ADC
Vb = 0.100 VAC
Vout = 0.926 VAC
Vin = 0.100 VAC
Vb = 0.090 pV
Vout = 0.000 V
Vb = 0.100 VAC
Vc = 0.114 VAC
Vc(1) = 2.764 VAC
Vb(2) = 0.013 pVAC
Chapter 7:
Circuit
E07-03
Lower than 40 VPP
E07-04
Lower than 20 VPP
F07-42
F07-44
F07-45
F07-46
TSE07-01
TSE07-02
TSE07-03
MultiSIM
Vout = 37.9 VPP
Vout = 13.733 VPP
VCE = 6.296 VDC
IC = 0.060 A
Vout = 6.295 VPP for
Vin = 100 mVrms
Vout = 13.641 VPP
Vout = 13.759 VPP
VB = 2.596 VPP with output
clipped on bottom
VB = 0.839 VDC
Vout(max) = 2.173 VP
Vout(min) = -1.816 VP
Vout = 2.043 VPP with
nonlinear distortion
192
Summary of MultiSIM Files
Circuit
TSP07-39
TSP07-40
TSP07-41
TSP07-42
TSP07-43
MultiSIM
IC = 0.060 ADC
VCE = 6.281 VDC
VB = 0.021 pVrms
VB = 4.204 VDC
VRE2 = 3.715 VDC
Vout is negative pulses
Vout = -6.820 VPP half-wave
output
VD2 = 6.885 pVDC
Vout = 13.060 VPP
VOUT is a 12.039 VP positive
half-wave output
Chapter 8:
Circuit
E08-06
E08-09
E08-12
F08-66a
F08-66b
F08-66c
F08-69
F08-70
F08-71
F08-72
F08-75a
F08-75b
F08-75c
MultiSIM
ID = 8.078 mADC
VD = 5.053VDC
VGS = -3.116 VDC
VS = 3.147 VDC
ID = 4.827 mADC
VD = 7.706VDC
VGS = -2.700 VDC
ID = 1.281 mADC
VD = 7.129VDC
VGS = -2.020 VDC
VGS = -0.997 VDC
VDS = 6.262VDC
ID = 1.007 mADC
VGS = -0.497 VDC
VDS = 6.139VDC
ID = 5.020 mADC
VGS = -1.408 VDC
VDS = 6.922VDC
ID = 3.025 mADC
ID = 2.854 mADC
VGS = -0.856 VDC
ID = 3.356 mADC
VGS = 1.190 VDC
ID = 0.857 mADC
VGS = -1.186 VDC
ID = 1.917 mADC
VGS = -1.508 VDC
IS = 8.000 mADC
VDS = 4.000 VDC
IS = 8.000 mADC
VDS = 5.400 VDC
IS = -8.000 mADC
VDS = -4.520 VDC
193
Summary of MultiSIM Files
Circuit
F08-76a
F08-76b
F08-81
TSE08-01
TSE08-02
TSE08-03
TSP08-72
TSP08-73
TSP08-74
TSP08-75
TSP08-76
TSP08-77
TSP08-78
TSP08-79
TSP08-80
MultiSIM
ID = 0.904 mADC
VGS = 3.098 VDC
ID = 5.316 mADC
VGS = 4.762 VDC
VDS = 10.940 VDC
VGS = -0.381 VDC
VGS = -0.080 VDC
VD = 14.631 VDC
VS = 0.081 VDC
ID = 0.368 mADC
VGS = 0.000 VDC
VD = 0.000VDC
VS = 0.000 VDC
ID = 0.000 ADC
VGS = -1.994 VDC
VD = 14.999 VDC
VS = 2.014 VDC
ID = -1.776 µADC
VD = 0.031 VDC
VS = 2.547 pVDC
VG = 0.345 µVDC
VD = 6.000 VDC
VS = 0.906 VDC
VG = 0.063 mVDC
VD = -2.988 VDC
VS = -1.303 VDC
VG = 0.000 VDC
VD = 7.166 VDC
VS = 1.287 VDC
VG = 0.018 mVDC
VD = 12.000 VDC
VS = 0.000 VDC
VG = 4.737 VDC
VD = 0.000 VDC
VG = 0.000 VDC
VD = 10.000 VDC
VG = 1.000 VDC
VD = 4.307 VDC
VS = 4.307 VDC
VG = 0.000 VDC
VD = 8.352 VDC
VS = 8.311 VDC
VG = 9.000 VDC
194
Summary of MultiSIM Files
Chapter 9:
Circuit
E09-08
E09-09
E09-10
F09-56
F09-57a
F09-57b
F09-58
F09-59
F09-60
F09-62
F09-65a
F09-65b
TSE09-01
MultiSIM
IS = 2.633 mADC
VD = 6.318 VDC
VRL = 1.712 Vrms
VGS = -0.623 VDC
Vin = 9.998 mVrms
Vout = 9.142 mVrms
Vin = 9.998 mVrms
Vout = 0.096 Vrms
ID = 2.834 mADC
VDS = 4.914 VDC
VS = 2.834 VDC
ID = 1.843 mADC
Vin = 0.050 Vrms
Vout = 0.215 Vrms
ID = 1.016 mADC
Vin = 0.050 Vrms
Vout = 0.496 Vrms
ID = 5.847 mADC
Vin = 0.050 Vrms
Vout = 0.141 Vrms
ID = 4.463 mADC
VDS = 3.065 VDC
VG = -1.458 VDC
VD = 17.151 VDC
VG = 5.484 VDC
IS = 2.849 mADC
IS = 0.015 mADC
VD = 9.000 VDC
Vd = 0.048 Vrms
Vin = 9.996 mVrms
ID = 0.279 mADC
Vin = 0.050 Vrms
Vout = 0.046 Vrms
ID = 6.615 mADC
Vin = 0.050 Vrms
Vout = 0.014 Vrms
Vin = 9.998 mVrms
ID(1) = 3.125 mADC
VD(1) = 7.313 VDC
VG(2) = -0.135 mVDC
Vg(2) = 0.075 Vrms
ID(2) = 3.135 mADC
Vout(2) = 0.562 Vrms
195
Summary of MultiSIM Files
Circuit
TSE09-02
TSE09-03
TSE09-04
TSP09-54
TSP09-55
TSP09-56
TSP09-57
TSP09-58
TSP09-59
TSP09-60
MultiSIM
Vin = 9.998 mVrms
ID(1) = 6.092 mADC
VD(1) = 2.863 VDC
VG(2) = 2.863 mVDC
Vg(2) = 0.433 Vrms
ID(2) = 6.115 mADC
Vout(2) = 0.128 mVrms
Vin = 9.997 mVrms
ID(1) = 1.776 µADC
VD(1) = 12.001 VDC
VG(2) = 0.067 mVDC
Vg(2) = 0.000 Vrms
ID(2) = 3.125 mADC
Vout(2) = 0.000 Vrms
Vin = 9.998 mVrms
ID(1) = 3.125 mADC
VD(1) = 7.313 VDC
VG(2) = -0.199 mVDC
Vg(2) = 0.075 Vrms
ID(2) = 0.000 ADC
Vout(2) = 0.026 nVrms
ID = 4.800 mADC
VDS = 4.801 pVDC
VS = 4.800 VDC
ID = 1.842 mADC
VS = 0.034 VDC
Vin = 0.050 Vrms
Vout = 0.069 Vrms
ID = 1.000 ADC
VG = 0.000 VDC
Vin = 0.050 Vrms
Vout = 6.203 pVrms
ID = 0.013 ADC
VGS = 0.080 mVDC
Vin = 0.050 Vrms
Vout = 0.208 Vrms
ID = 9.008 nADC
VDS = 9.000 VDC
VGS = -2.941 µVDC
VR1 = 20.000 VDC
VG = 0.136 mVDC
VD = 20.000 VDC
ID = 0.028 nADC
VRD = 24.00 VDC
Vin = 0.010 Vrms
IC = 0.240 µADC
VD = 0.050 mVDC
Vd = 0.080 µVrms
Vout = 0.080 µVrms
196
Summary of MultiSIM Files
Circuit
TSP09-61
TSP09-62
MultiSIM
ID = 9.876 mADC
VDS = 3.186 VDC
VGS = 17.991 VDC
Vout = 0.024 Vrms
ID = 0.279 mADC
Vs = 0.047 Vrms
Vin = 0.050 Vrms
Vout = 0.000 Vrms
Chapter 10:
Circuit
E10-03
E10-05
E10-06
E10-07
E10-08
E10-11
F10-56
F10-57
F10-60
TSP10-45
TSP10-46
TSP10-47
TSP10-48
MultiSIM
fC ≈ 209 Hz
fC ≈ 50 Hz
fC ≈ 30 Hz
fC ≈ 16 Hz
fC ≈ 17 Hz
fC ≈ 1.78 MHz
fC(1) ≈ 3.1 kHz
fC(2) ≈ 25.0 kHz
fC ≈ 93 kHz
fC ≈ 2.95 kHz
VRC = 19.765 VDC
Vd = 202 mVPP
Vout = 0.0 Vrms
VB = 2.589 VDC
VRD = 10.00 VDC
ID = 0.018 ADC
Chapter 11:
Circuit
E11-03
E11-04
F11-53
TSP11-27
TSP11-28
TSP11-29
MultiSIM
ISCR = 0.436 A
Expected SCR operation
Sine wave with missing piece
from 90° to 180° with RPOT =
82%
Expected SCR operation
Cathode-anode shorted
SCR never fires
VR1 = 0.074 nV
Vout is half-wave output
Chapter 12:
Circuit
E12-03
MultiSIM
Vin = 0.100 Vrms
Vout = 2.227 Vrms
197
Summary of MultiSIM Files
Circuit
E12-04
E12-05
E12-07
E12-12
F12-63
F12-64a
F12-64b
F12-64c
F12-64d
F12-66a
F12-66b
F12-66c
F12-66d
F12-67
F12-68a
F12-68b
F12-68c
F12-70a
MultiSIM
Vin = 0.100 Vrms
Vout = 9.997 Vrms
Vin = 0.100 Vrms
Vout = 2.299 Vrms
Vin = 0.010 Vrms
Vout = 9.997 Vrms
BW(1) ≈ 48.9 kHz
BW(2) ≈ 70.0 kHz
Vin = 10.000 mVrms
Vout = 3.742 Vrms
Vin = 10.000 mVrms
Vout = 0.110 Vrms
Vin = 10.000 mVrms
Vout = 1.010 Vrms
Vin = 10.000 mVrms
Vout = 0.478 Vrms
Vin = 10.000 mVrms
Vout = 10.003 Vrms
Vin = 1.000 Vrms
Vout = 1.000 Vrms
Vin = 1.000 Vrms
Vout = 1.000 Vrms
Vin = 1.000 Vrms
Vout = 0.223 Vrms
Vin = 10.000 mVrms
Vout = 9.998 Vrms
Vin = 10.000 mVrms
Is = 0.030 mArms
Vout = 10.004 Vrms
If = 0.030 mArms
Vin = 10.000 mVrms
Is = 0.100 nArms
Vout = 2.084 Vrms
If = 3.726 µArms
Vin = 10.000 mVrms
Is = 0.100 nArms
Vout = 0.323 Vrms
If = 6.685 µArms
Vin = 10.000 mVrms
Is = 0.100 nArms
Vout = 0.189 Vrms
If = 0.181 µArms
Vin = 10.000 mVrms
Is = 1.000 µArms
Vout = 0.150 Vrms
If = 1.001 µArms
198
Summary of MultiSIM Files
Circuit
F12-70b
F12-70c
TSE12-01
TSE12-02
TSE12-03
TSE12-04
TSP12-57
TSP12-58
TSO12-59
TSP12-60
TSP12-61
TSP12-62
TSP12-63
TSP12-64
TSP12-65
TSP12-66
TSP12-67
TSP12-68
TSP12-69
TSP12-70
TSP12-71
TSP12-72
MultiSIM
Vin = 10.000 mVrms
Is = 0.100 µArms
Vout = 1.000 Vrms
If = 0.110 µArms
Vin = 10.000 mVrms
Is = 0.021 mArms
Vout = 0.213 Vrms
If = 0.021 mArms
Vin = 0.100 Vrms
Vout = 2.227 Vrms
Vin = 0.047 µVrms
Vout is railed
Vin = 0.100 Vrms
Vout = 9.997 Vrms
Vin = 0.100 Vrms
Vout = 0.000 Vrms
Vin = 28.3 VPP
Vout is railed
Vin = 2.83 VPP
Vout = 2.83 VPP
Vin = 28.3 mVPP
Vout = 28.5 mVPP
Vout is railed
VRi ≈ 0 VPP
Vin = 28.3 mVPP
Vout = 28.3 mVPP
Vin = 2.83 VPP
Vout ≈ 0 VPP
Vin = 14.1 VPP
Vout = 14.1 mVPP
Vin = 2.83 VPP
Vout = 28.0 VPP
Vin = 2.83 mVPP
Vout is railed
Vin = 2.83 VPP
Vout ≈ 0 VPP
Vin = 2.83 VPP
Vout is railed
Vin = 2.83 VPP
Vout = 3.02 VPP
Vin = 28.3 VPP
Vout is railed
Vin = 2.83 VPP
Vout ≈ 0 VPP
Vin = 2.83 VPP
Vout ≈ 0 VPP
Vin = 28.3 mVPP
Vout = 3.43 VPP
199
Summary of MultiSIM Files
Chapter 13:
Circuit
E13-01
E13-02
E13-03
E13-05
E13-06
E13-07
E13-08
E13-10
F13-61
F13-63a
F13-63b
F13-64
F13-65a
F13-65b
F13-66
F13-67
F13-68
F13-69
TSE13-01
TSE13-02
TSE13-03
TSE13-04
TSE13-05
TSE13-06
TSE13-07
MultiSIM
VLTP = +1.627 V
VUTP = +1.627 V
VLTP = -2.551 V
VUTP = +2.468 V
VUTP = -2.391 V
VLTP = +2.391 V
Vout = -7.722 V, +7.684 V
VOUT = -12 V
VOUT = -7 V
VOUT = -2.5 V
V1 = 3.000 V
V2 = 2.000 V
V3 = 8.000 V
VOUT = -8.838 V
Integrator output
ΔV/Δt = -4.816 V/200 μs
VLTP = -2.637 V
VUTP = +2.574 V
VLTP = -3.848 V
VUTP = +3.817 V
VLTP = -3.628 V
VUTP = +3.411 V
VUTP = -1.206 V
VLTP = +1.206 V
Vout = -6.144 V, +6.142 V
VOUT = -2.500 V
VOUT = -3.520 V
VOUT = -14.00 V
VOUT = -3.572 V
Integrator output
ΔV/Δt = -4.058 V/1.0 ms
VOUT = 20 VPP square wave
V(-) = 2.000 V
VOUT is railed
VIN = 3 V, 2 V, 8 V
V(-) = 6.682 V
VOUT = 6.682 V
Vin = 0 V to 5 V square wave
Vout = 0 V
Vin = 10 VPP triangle wave
Vout = 0 V
Vout(min) = -898 mV
Vout(max) = 6.908 V
0 V output
VUTP = -4.589 V
VLTP = +4.589 V
Vout = -7.806 V, +7.804 V
200
Summary of MultiSIM Files
Circuit
TSE13-08
TSE13-09
TSP13-30
TSP13-31
TSP13-32
TSP13-33
TSP13-34
TSP13-35
TSP13-36
TSP13-37
TSP13-38
TSP13-39
MultiSIM
Vin = 1 V, 0.5 V, 0.2 V, 0.1 V
V(-) = 0.450 V
Vout is railed negative
Vin = 1 V, 0.5 V, 0.2 V, 0.1 V
V(-) = 0.500 V
Vout is railed negative
VLTP = -5.137 V
VUTP = +10.649 V
Vout is railed
VLTP = -6.135 V
VUTP = -9.472 V
Vout = ±10 VP square wave
Vin = 2.0 VP
Vout = 2.0 VP
Vout(min) = -711.0 mV
Vout(max) = +5.700 V
VOUT = -1.500 V
V(-) = 1.000 V
Vout is railed negative
VOUT = -0.013 V
V(-) = 2.432 V
Vout is railed negative
Vout = 2.804 V
Vout = 8.928 mVPP square
wave
Chapter 14:
Circuit
E14-08
F14-53
F14-60
F14-62a
F14-62b
TSP14-32
TSP14-33
TSP14-34
TSP14-35
TSP14-36
MultiSIM
VOUT = -153.926 mV
Vin(1) = 1.005 Vrms
Vin (2) = 1.005 Vrms
Vout = 2.010 Vrms
VOUT = -162.307 mV
IL = 4.659 mA
IL = 1.176 mA
Vout = 21.958 Vrms
IQ = 0 A
IQ = 27.756 nA
IL = 6 mA
IL = 594.058 µA
Chapter 15:
Circuit
E15-03
E15-06
MultiSIM
fC ≈ 7.1 kHz
fC(1) ≈ 634 Hz
fC(2) ≈ 854 Hz
201
Summary of MultiSIM Files
Circuit
E15-07
E15-08
F15-43a
F15-43b
F15-43c
F15-45
F15-46
F15-47a
F15-47b
F15-47c
F15-48
TSP15-23
TSP15-24
TSP15-25
TSP15-26
TSP15-27
TSP15-28
TSP15-29
TSP15-30
TSP15-31
MultiSIM
fC(1) ≈ 7.1 kHz
fC(2) ≈ 7.3 kHz
fC ≈ 60.1 Hz
fC ≈ 11.2 kHz
fC ≈ 162 kHz
fC ≈ 49 kHz
fC(1) ≈ 174 Hz
fC(2) ≈ 200 Hz
fC ≈ 1.27 kHz
f1 ≈ 116 Hz
f2 ≈ 218 Hz
fC ≈ 159 Hz
f1 ≈ 402 Hz
f2 ≈ 500 Hz
fC ≈ 445 Hz
f1 ≈ 15.7 kHz
f2 ≈ 16.2 kHz
fPEAK ≈ 15.8 kHz
f1 ≈ 1.3 kHz
f2 ≈ 1.75 kHz
fNOTCH ≈ 1.32 kHz
IR4 = 0.000 A
VR4 = 0.432 V
IR3 = 0 A
V+(2) = 1.321 pVrms
fC ≈ 270 Hz
fC ≈ 2.5 kHz
V+(1) = 2.950 pV
IR2 = 1.475 mA
VS = 0.100 Vrms
V on end of R1 = 0 V
VC2 = 0.100 Vrms
IC2 = 0.017 µArms
Vout(2) 36.7 mVPP
V-(3) = 0 V
Chapter 16:
Circuit
E16-01
E16-02
F16-58
F16-59
F16-60a
F16-60b
F16-62
MultiSIM
Vout = 2.2 VPP @ 1.6 kHz
Vout = 16.6 VPP @ 6.37 kHz
Vout = 2.2 VPP @ 9.81 kHz
Vout = 8.1 VPP @ 692 Hz
Vout = 386 mVPP @ 264 kHz
(Tank circuit is loaded)
Vout = 4.02 VPP @ 58.9 kHz
Vout = 11.7 VPP @ 1.56 kHz
202
Summary of MultiSIM Files
Circuit
F16-64
TSP16-23
TSP16-24
TSP16-25
TSP16-26
TSP16-27
TSP16-28
MultiSIM
tH = 139 µs
tL = 109 µs
fOSC = 4.02 kHz
RDS = 0 Ω
VC3 open from oscilloscope
trace
VCE ≈ 2.557 pV
VR1 = 661.758 mV
Resistance of R2 out of range
tH = 110.5 µs
tL = 110.5 µs
Chapter 17:
Circuit
E17-03
E17-05
F17-45
F17-46
F17-47
F17-48
TSP17-31
TSP17-32
TSP17-33
TSP17-34
MultiSIM
VOUT = 10.340 VDC
VOUT = 10.340 VDC
VOUT = 10.625 VDC
VOUT = 8.752 VDC
VR4 = 0.529 VDC
IR4 = 0.189 ADC
IQ2 = 0.191 mADC
IL = 0.188 ADC
VOUT = 9.419 VDC
IL = 0.037 A
VR3 = 2.496 VDC
VOUT = 2.471 VDC
VZ = 11.881 VDC
VOUT = 11.999 VDC
VR4 = 0.353 VDC
IR4 = 0.126 ADC
IQ2 < 2 µADC
IL = 0.126 ADC
VOUT = 9.419 VDC
VR1 = 24.99 VDC
IL = 0.019 mADC
203
Solutions Manual
Laboratory Exercises for
Electronic Devices
Eighth Edition
David M. Buchla
Steven Wetterling
205
Instructor note: The B experiments include useful notes regarding the Anadigm Signal
Processor (ASP) and the Programmable Analog Module (PAM). These are presented on
an “as needed” basis with the heading Instructor note:.
Experiment 1: The Diode Characteristic
Part 1: The Diode Characteristic Curve
Step 1: Answers depend on the meter. A meter with a diode test will typically show
about 0.6 V in one direction and an open in the other direction.
Table 1-1
Listed
Component Value
R1
330 Ω
R2
1.0 MΩ
Measured
Value
331 Ω
1.05 MΩ
Table 1-2
VF
0.45 V
0.50 V
0.55 V
0.60 V
0.65 V
0.70 V
0.75 V
Table 1-3
VS
(measured)
5.0 V
10.0 V
15.0 V
VR1
(measured)
IF
(computed)
3.8 mV
11 µA
16.3 mV
49 µA
83 mV
250 µA
230 mV
695 µA
690 mV
2.08 mA
1.85 V
5.59 mA
4.58 V
13.8 mA
VR2
(measured)
IR
(computed)
454 mV
0.43 µA
890 mV
0.85 µA
1.3 V
1.24 µA
206
Step 8: Plot of the diode curve:
14
12
Current (mA)
10
8.0
6.0
4.0
2.0
-15
0
Note Scale change
-10
-5.0
0.1
−2.0
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Voltage (V)
VI Curve for a 1N4001 Diode
Plot 1-1
Step 9: The semilog plot shows that logarithm of forward current is proportional to the
diode drop.
100
IF (mA)
10
1
0.1
0.01
0.4
0.45
0.5
0.55
0.6
0.65
0.7
0.75
0.8
VF (V)
Plot 1-2
Questions: Part 1
1. The input impedance is equal to the series 1 MΩ resistor, which can be seen from the
voltage: divider rule.
2.
The larger resistor is needed to develop enough voltage to be easily measured.
207
Part 2: Plotting Diode Curves with an Oscilloscope
Step 3: The barrier potential is reduced by the addition of heat, causing current to increase
for a given voltage.
Step 4: The threshold is about 1.5 V for a red LED.
Step 5: The threshold is about 1.8 V for a green LED.
Step 6: The zener forward voltage is about 0.7 V; the breakdown is at 5.0 V.
Questions: Part 2
1.
The dynamic resistance is measured by observing a small voltage change in the
characteristic curve at the point it is being measured and dividing by a corresponding
current change.
2.
The setup can be used to measure any two-terminal device because it enables a plot of
current versus voltage.
Experiment 2 Diode Applications
Part 1: Diode Rectifiers
Step 1: Waveforms:
20 V
20 V
Vsec
V out
-20 V
-20 V
2.0 ms/div
2.0 ms/div
Plot 2-1
Table 2-1 Half-wave rectifier.
Without Filter Capacitor
With Filter Capacitor
Computed
Measured
Compute
Measured
Vsec(rms)
Vsec(rms)
Vout(p)
Vout(p))
12.6 V ac 14.4 V rms 20.3 Vp
20.0 Vp
Measured
VOUT(DC)
19.1 V dc
Step 4: Waveforms:
10 V
10 V
Vsec
Vout
-10 V
-10 V
2.0 ms/div
2.0 ms/div
Plot 2-2
208
Vr(pp)
1.4 Vpp
Ripple
Frequency
60 Hz
Table 2-2 Full-wave rectifier circuit.
Without Filter Capacitor
With Filter Capacitor
Computed
Measured
Compute
Measured
Vsec(rms)
Vsec(rms)
Vout(p)
Vout(p))
6.3 V ac
7.3 Vrms
10.2 Vp
9.8 Vp
Measured
VOUT(DC)
9.5 V dc
Vr(pp)
0.35 Vpp
Ripple
Frequency
120 Hz
Step 7: A second parallel load resistor increases the load current and the ripple voltage.
Table 2-3 Bridge rectifier circuit.
Without Filter Capacitor
With Filter Capacitor
Computed
Measured
Computed
Measured
Vsec(rms)
Vsec(rms)
Vout(p)
Vout(p))
VOUT(DC)
12.6 V ac 14.5 Vrms 20.5 Vp
19.5 Vp
19.0 V dc
Measured
Vr(pp)
0.65 Vpp
Ripple
Frequency
120 Hz
Step 10: The output voltage drops; ripple voltage is doubled; ripple frequency is 60 Hz.
Questions: Part 1
1.
The scope ground connection, if common with the circuit, will short the secondary if
it is connected to one side, so two channels are necessary.
2.
An open diode will cause the ripple frequency to drop to 60 Hz (instead of 120 Hz).
Part 2: Diode Clipping Circuits
Step 1: R2 and RL form a voltage divider; the voltage across RL is only slightly less than
VS.
Step 2: Waveforms:
+3.0 V
Vs
0V
−3.0 V
+0.7 V
Vout 0 V
−2.5 V
+2.3 V
VR2
−0.5 V
0V
Vertical 2 V/div Horiz = 0.2 ms/div
Plot 2-3
209
Step 3: The load has a waveform with a minimum of -2.72 V and a maximum of 0.68 V
similar to the second waveform in Plot 2-3. The change in the lower part of the
waveform is due to loading effects.
Step 4: The positive clipping level follows changes in the power supply voltage. As the
supply is increased, the positive clipping level moves up from about 0.7 V to the peak
of the input waveform.
Step 5: The negative portion of the waveform is clipped. The power supply controls the
level, which varies from −0.7 V to the positive peak.
Step 6: Reversing the power supply voltage moves the clipping level to negative voltages.
Questions: Part 2
1.
The clipping level stays the same when the load is reduced but the lower level of the
waveform changes due to loading effects.
2.
At all times, the algebraic sum of the voltages around a closed path is zero. The
voltage across R2 can be found directly by subtracting the load voltage from the
source voltage.
Part 3: Diode Clamping Circuits
Step 1: The output is an ac waveform that varies from approximately −0.6 V to +5.4 V.
The output tracks changes in the input amplitude but the lower peak remains at −0.6
V (after a short delay for settling to the new level).
Step 2: The power supply voltage adds to the output. See Plot 2-4 for output waveform.
+7.26 V
Vo ut
+1.26 V
0V
2 V/div
Plot 2-4
Step 3: The circuit is now a negative clamping circuit. The peak is at approximately 0.6 V
when the dc supply is zero and the clamping point moves more negative as the dc
voltage increases.
Questions: Part 3
1.
The capacitor is polarized, so how it charges needs to be considered in placing it in
the circuit.
2.
The output will “settle” faster due to the decreased time constant. There is also a
small additional distortion on the bottom of the waveform when the diode conducts.
210
Experiment 3 Special-Purpose Diodes
Part 1: The Zener Diode and Regulator
Table 3-1
Resistor
R1
R2
RL
+10 mA
Listed
Value
220 Ω
1.0 kΩ
2.2 kΩ
Measured
Value
219 Ω
1.00 kΩ
0 mA
2.22 kΩ
−10 mA
−10 V
0V
+10 V
Plot 3-1
Table 3-2
Vs
Vout
(measured)
2.0 V
4.0 V
6.0 V
8.0 V
10.0 V
IL
(computed)
VR1
(computed)
Is (computed)
IZ (computed)
1.82 V
0.82 mA
0.18 V
0.82 mA
0.0 mA
3.60 V
1.62 mA
0.40 V
1.81 mA
0.19 mA
4.70 V
2.12 mA
1.30 V
5.90 mA
3.78 mA
5.07 V
2.28 mA
2.93 V
13.3 mA
11.0 mA
5.24 V
2.26 mA
4.76 V
21.6 mA
19.3 mA
Step 4: As shown in Table 3-2, zener current increases for increasing source voltage.
Table 3-3
RL
Vout
(measured)
1.0 kΩ
750 Ω
500 Ω
250 Ω
100 Ω
*
IL
(computed)
VR1
(computed)
Is (computed)
IZ (computed)
5.32 V
5.32 mA
6.68 V
30.4 mA
28.0 mA
5.31 V
7.08 mA
6.69 V
30.4 mA
28.0 mA
5.26 V
10.5 mA
6.72 V
30.5 mA
28.1 mA
5.08 V
20.3 mA
6.92 V
31.5 mA
29.2 mA
3.75 V
37.5 mA
8.25 V
37.5 mA
0.0 mA*
out of regulation with this load.
211
10
Voltage (V)
8
6
4
2
0
0
200
400
600
800
1000
Resistance (Ω )
Plot 3-2
Step 9: From the data taken, the zener was able to regulate as long as the load was at
least 250 Ω.
Step 11: The regulated output had approximately 1 mV of ripple. The ripple waveform
showed only the tip of the positive waveform. Noise level was less than 1 mV.
Although this circuit had the advantage of a larger filter capacitor, the ripple is
hundreds of times smaller than the unregulated supply in step 9 of Experiment 2 (see
Table 2-3 for a comparison.)
Questions: Part 1
1.
(a) The region between zener breakdown and 0.7 V is approximated by an open
circuit.
(b) Both the forward-bias region and the reverse-bias region are approximated by a
short.
ΔVout
5.24 V − 5.07 V
× 100% =
×100% = 8.5%
10 V − 8.0 V
ΔVin
2.
Percent line regulation =
3.
For the worst case (1 kΩ and 100 Ω loads) the percentage load regulation was
poor since the zener carried no current for the 100 Ω load.
Percent load regulation =
VNL – VFL 5.32 V – 3.75 V
=
× 100% = 42%
VFL
3.75 V
Part 2: The Varactor Diode
Step 1. Note: Measured resonant frequencies are shown in Table 3-4. Three varactor
diodes were tested, all from the same manufacturer, with consistently lower than
calculated resonant frequencies. The lower measured frequencies may be due to
stray capacitance acting to reduce the measured frequency. With no stray
capacitance, the calculated fr should be approximately 226 kHz with −4 V of
bias.
212
Table 3-4
Resonant
VBIAS Frequency, fr
130 kHz
0.0 V
146 kHz
1.0 V
158 kHz
2.0 V
168 kHz
4.0 V
180 kHz
8.0 V
15.0 V 195 kHz
190
180
fr (kHz)
170
160
150
140
130
0
2
4
6
8
10
VBIAS (V)
Table 3-5
Parameter
Resonant frequency, fr
Upper critical frequency, fcu
Lower critical frequency, fcl
Bandwidth, BW
Q
12
14
16
Measured Value
194.7 kHz
196.2 kHz
192.5 kHz
3.7 kHz
52
Questions: Part 2
1. Answers will vary. For the varactors tested, the resonant frequency was 168 kHz
at 4 V of bias. This implies the total capacitance is
1
1
C=
=
= 60 pF
2
2
( 2πf r ) L ( 2π (168 kHz ) ) 15 mH
Note: This is larger than the varactor capacitance alone. The reason is likely due
to stray capacitance as discussed in step 1. (Typical varactor capacitance is 33 pF
at −4 V).
213
2.
The higher resonant frequency that was observed with increasing bias implies a
smaller capacitance with increasing bias.
3.
(a) It would have very little effect on the resonant frequency because the resonant
frequency is primarily determined by the LC circuit.
(b) It will affect the Q because R1 acts as a resistive load on the resonant circuit.
Part 3: Light-Emitting Diode and Photodiode
Step 1: The red LED drops approximately 1.65 V when forward-biased (measured at 10
mA of current) and has the smallest ac resistance (approximately 50 Ω in the region
tested). The yellow LED drops approximately 1.9 V when forward-biased. The
green LED drops approximately 2.0 V and has the highest ac resistance
(approximately 100 Ω in the region tested).
Step 2: The reverse curve drops as light is increased. (Note: The optimum value of R1
depends on the diode and lighting conditions).
Step 4: Measured data for a green LED is shown in the table and plot.
Angle
−90˚
−75˚
−60˚
−45˚
−30˚
−15˚
0˚
+15˚
+30˚
+45˚
+60˚
+75˚
+90˚
Voltage
0.56 V
0.90 V
1.1 V
1.5 V
3.5 V
5.6 V
6.0 V
5.3 V
2.3 V
1.1 V
0.85 V
0.69 V
0.29 V
0
+15o
o
o
6V
+30
5V
o
4V
+45
−15 o
−30 o
−45
o
3V
o
+60
o
+75
o
+90
2V
−60 o
1V
−75 o
−90 o
Figure 3-9 Directional data for a green LED
Questions: Part 3
18.0 V − 2.0 V
18.0 V − 2.0 V
1.
(a) I =
= 533 Ω
= 23.5 mA (b) R =
680 Ω
30 mA
2.
Electrical: forward voltage drop at a specified forward current, reverse leakage
current IR, and reverse breakdown voltage V(BR)R.
Optical: peak emission wavelength (in nm), power output (in milliwatts or
microwatts) PO, and spectral output.
3.
The photodiode is a current source; a larger resistor develops more voltage for a
given current, making the circuit more sensitive to light.
214
Experiment 4: Bipolar Junction Transistors
Part 1: The BJT Characteristic Curve
Values shown are for a 2N3904 transistor:
Table 4-1
Resistor Listed
Value
33 kΩ
R1
Measured
Value
32.8 kΩ
100 Ω
R2
Table 4-2
VCE
(measured)
104 Ω
Base Current = 50 µA
Base Current = 100 µA
VR2 (measured) IC (computed)
2.0 V
4.0 V
6.0 V
8.0 V
Base Current = 150 µA
VR2 (measured) IC (computed) VR2 (measured) IC (computed)
0.900 V
8.65 mA
1.91 V
18.4 mA
2.93 V
28.2 mA
0.931 V
8.95 mA
2.01 V
19.3 mA
3.14 V
30.2 mA
0.955 V
9.18 mA
2.13 V
20.5 mA
3.38 V
32.5 mA
0.992 V
9.54 mA
2.23 V
21.4 mA
3.58 V
34.4 mA
Step 11: Plot of characteristic curves:
35
IB = 150 μA
30
25
IB = 100 μA
IC 20
(mA)
15
10
IB = 50 μA
5
0
0
1
2
3
4
5
6
7
VCE (V)
Plot 4-1
Table 4-3
VCE
3.0 V
5.0 V
Current Gain, ßDC
IB = 50 µA
IB = 100 µA IB = 150 µA
176
189
193
192
200
209
215
8
Questions: Part 1
1. For the test transistor, the ßdc was not constant at all points (see Plot 4-1). This
has an effect on linearity as the gain will change as the operating point changes.
2.
It would raise all of the curves.
3.
Answers vary. For the test transistor, maximum power dissipated was 8 V x 34 mA =
272 mW.
4.
(a)
IC
IB
IC
β dc
I
I
IB
α = I C = I +C I = I C
=
I
β dc + 1
E
C
B
IB + B IB
β=
(b) Answers vary. The alpha for the test transistor was approximately 0.995.
5.
VCE would equal VCC. Without base current, there would be no collector current
and the supply voltage would appear across the transistor.
Part 2: BJT Switching Circuits
Table 4-4
Resistor Listed
Value
10 kΩ
RB
1.0 kΩ
RC
10 kΩ
RC1
330 Ω
RE
Table 4-5
Quantity Computed
Value
VCE(cutoff)
12.0 V
VCE(sat)
0.1 V
VRC(sat)
9.9 V
Isat
9.9 mA
Measured
Value
9.88 kΩ
1.00 kΩ
9.86 kΩ
327 Ω
Measured
Value
10.45 V*
0.08 V
9.87 V
* The LED and transistor appear to be open; thus the
measurement is affected by meter loading. Answers
vary.
Table 4-6
Quantity
VIN (LED on)
VOUT (LED on)
VIN (threshold)
VOUT (threshold)
Table 4-7
Measured
Value
Quantity
VIN (LED on)
VOUT (LED on)
VIN (upper threshold)
VOUT (upper threshold)
VIN (lower threshold)
VOUT (lower threshold)
0.0 V
0.080 V
0.645 V
10.47 V*
216
Measured
Value
0.0 V
2.735 V
3.16 V
10.47 V
1.03 V
2.735 V
Step 8: Transfer curve:
16
14
VOUT
(V)
12
10
8
6
4
2
0
0
2
4
6
8
VIN (V)
Plot 4-2
Questions: Part 2
1. Some advantages of transistor switching circuits:
(1) Very fast
(2) Electrically controlled with a low voltage or current
(3) Reliable
(4) Low cost
(5) Can be adopted to interface high current loads with low current circuits.
2.
RB limits current to the base-emitter diode of Q1. Without it, current could destroy
the transistor when the potentiometer is set near maximum.
3.
Measure the voltage drop across RB and apply Ohm’s law.
4.
The collector resistances are different for the two transistors.
Experiment 5 Transistor Bias Circuits
Part 1: Three Bias Circuits
Table 5-1
Table 5-2
DC
Parameter
VRB
Resistor
RB
Listed
Value
1.0 MΩ
Measured
Value
994 kΩ
RC
2.0 kΩ
1.97 kΩ
IB
11.37 μA
RE
1.5 kΩ
1.47 kΩ
IC
2.27 mA
VRC
VC
217
Computed
Value
11.3 V
Measured Value
Q1
Q2
Q3
11.4 V
11.3 V
11.3 V
4.48 V
3.79 V
3.25 V
5.08 V
7.52 V
8.18 V
8.74 V
6.91 V
Table 5-3
DC
Parameter
VRB
Computed
Value
8.67 V
Measured Value
Q1
Q2
Q3
8.99
9.21
8.27
Table 5-4
Resistor
R1
Listed
Value
33 kΩ
Measured
Value
32.96 kΩ
R2
6.8 kΩ
6.70 kΩ
IB
8.73 μA
IC
1.75 mA
VRC
3.44 V
2.86
2.56
3.79
RE
680 Ω
676 Ω
VC
8.56 V
9.11
9.42
8.21
RC
2.0 kΩ
1.97 kΩ
Resistor
RB
Listed
Value
360 kΩ
Measured
Value
363 kΩ
RC
2.0 kΩ
1.97 kΩ
Table 5-5
DC
Computed
Measured Value
Parameter
Value
Q1
Q2
Q3
2.03 V
1.97 V 1.96 V 1.98 V
VB
VE
1.33 V
IE ≈IC
VRC
1.99 mA
3.97 V
3.86 V 3.74 V 3.88 V
VC
8.03 V
8.14 V 8.25 V 8.12 V
Table 5-7
DC
Parameter
IC
Computed
Value
1.33 V 1.29 V 1.34 V
Table 5-6
Measured Value
Q1
Q2
Q3
3.07 mA
VRC
6.13 V
5.73 V 5.23 V 6.27 V
VC
5.87 V
6.26 V 6.76 V 5.73 V
Questions: Part 1
1. The data for voltage-divider bias shows the least variation between the transistors.
2.
An emitter resistor will improve bias stability as it is a form of negative feedback.
Part 2: Emitter Bias and Two-Supply Voltage-Divider Bias
Table 5-8
Resistor
RB
RC
RE
R2
Listed
Value
4.7 kΩ
330 Ω
470 Ω
4.7 kΩ
Measured
Value
4.62 kΩ
329 Ω
477 Ω
4.60 kΩ
218
Table 5-9
Quantity
VE
IE ≈IC
VC
Computed
Value
−1 V
17.0 mA
3.39 V
Table 5-10
Quantity Computed
Value
VE
IE ≈IC
VC
Measured
Value
Q1
Q2
Q3
−1.33 V −1.10 V −1.24 V
3.74 V
3.57 V
3.67 V
−0.7 V
Measured
Value
Q1
Q2
Q3
−1.05V −0.93 V −1.02 V
17.7 mA
3.16 V
3.55 V
3.45V
3.52 V
Step 8: The LED fades out as the thermistor warms. The decrease in resistance as it
warms causes the base voltage to drop and the transistor stops conducting.
Questions: Part 2
1.
An advantage to emitter bias is great stability. A disadvantage is the requirement
for both a positive and negative supply voltage.
2.
For most troubleshooting work, it is valid to assume the emitter should be near
−1 V. For precise design work, it is better to apply KVL.
3.
The thermistor can be moved to the other side of the voltage-divider (in series
with R1). Alternatively, the thermistor could be changed for a positive temperature
coefficient type
219
Experiment 6 BJT Amplifiers
Part 1: The Common-Emitter Amplifier
Table 6-1
Resistor
R1
R2
RE1
100 Ω
100 Ω
RE2
330 Ω
333 Ω
RC
1.0 kΩ
1.00 kΩ
RL
10 kΩ
10.1 kΩ
Table 6-3
AC
Quantity
Vin = Vb
Ve
re
Vout = Vc
Av
Rin(tot)
βac
Table 6-2
DC
Computed
Quantity Value
VB
3.85 V
Listed Measured
Value Value
10 kΩ 9.87 kΩ
4.7 kΩ 4.66 kΩ
Computed
Value
Measured
Value
300 mVpp
300 mVpp
290 mVpp
280 mVpp
Measured
Value
3.74 V
VE
3.15 V
IE
7.02 mA
VC
4.98 V
4.87 V
VCE
1.83 V
1.93 V
3.04 V
3.6 Ω
8.8
8.43
2.63 Vpp
2.53 Vpp
2.9 kΩ*
2.89 kΩ
300 mVpp
300 mVpp
* Measured ßac of 300 used for calculation
Step 8: The gain drops to 2.2 when C2 is opened.
Step 9: The gain drops to 4.5 when RL is replaced with a 1.0 kΩ resistor.
Step 10: Transistor is cutoff since there is no path for base current. (Note that a
measurement of VCE could mislead student to thinking transistor is near
saturation; however, the power supply voltage is across the reverse-biased basecollector junction, not across RC).
Step 11: Transistor is saturated. VC and VE are nearly the same and current is limited
only by RC and RE. Maximum current is in the collector circuit.
Questions: Part 1
1. Monitoring the output voltage ensures that the amplifier is performing normally
during the test. If the output is clipped or distorted, the measurement is invalid.
2.
The load resistor has no effect on the input resistance because it is an isolated
transistor, which looks like a current source.
220
3.
The unbypassed emitter resistor is used for gain stability and makes gain much
less dependent on the particular transistor that is used. It also increases the input
resistance of the amplifier.
4.
The gain is inversely proportional to the ac emitter resistance. When the bypass
capacitor is open, the ac emitter resistance increases, and the gain goes down.
Part 2: The Common-Collector Amplifier
Table 6-4
Measured
Value
R1
Listed
Value
33 kΩ
32.5 kΩ
Table 6-6
AC
Quantity
Vb
R2
10 kΩ
9.98 kΩ
Ve
RE
1.0 kΩ
1.00 kΩ
re
RL
1.0 kΩ
1.01 kΩ
Av
0.99
0.99
Rin(tot)
6.63 kΩ
7.03 kΩ
Table 6-5
DC
Quantity
VB
VE
IE
VCE
Computed
Value
Measured
Value
2.82 V
3.08 V
3.52 V
3.77 V
Computed Measured
Value
Value
1.0 Vpp*
1.0 Vpp
298 mVpp 298 mVpp
3.0 Ω
Ap
6.5
6.9
8.48 mA
−3.52 V
−3.77 V
Step 6: There is no phase shift between the input and output signal.
Table 6-7
Trouble
DC Predictions
VB
VE
VCE
DC Measurements
VB
VE
VCE
Effect of Trouble o
Vout
R1 open
0.69 V
1.39 V
−1.39 V 0.66 V 1.37 V
−1.37 V
See note 1.
R2 open
12.0 V
12.0 V
−12.0 V 12. 0 V 12.0 V
−12.0 V
No output.
R1 shorted
12.0 V
12.0 V
−12.0 V 12. 0 V 12.0 V
−12.0 V
No output.
RE open
open collector
2.82 V
0.0 V
0.0 V
0.0 V
No output.
10.2 V
10.9 V
−10.9 V 10.3 V 11.0 V
−11.0 V
See note 2.
open emitter
2.82 V
12.0 V
−12.0 V 2.82 V 12.0 V
−12.0 V
No output.
12. 0 V
0.0 V
Note 1: Little effect. The dc conditions can be computed by assuming base bias; however, these
conditions change when an ac signal is applied due to clamping action of the transistor and input
coupling capacitor. The output ac signal is maintained as a result.
Note 2: Output reduced. The input impedance drops significantly when the collector is open.
Although the voltage gain drops slightly (to about 0.88), the power gain drops significantly
(measured = 0.38)
221
Step 8: Cutoff clipping is observed first.
Step 9: As the resistance increases, the clipping level is observed to rise.
Questions: Part 2
1.
In the equivalent npn circuit, positive clipping occurs when the transistor has
maximum conduction, hence it is saturation clipping.
2.
The output voltage is always smaller than the input voltage but the output current
is larger than the input current, hence there is power gain.
Part 3: Multistage Amplifiers
Table 6-8
Resistor
RA
RB
R1
R2
RE1
RE2
RC1
R3
R4
RE3
RE4
RC2
RL
Table 6-10
AC
Parameter
re′(Q1)
re′(Q2)
Rout(Q1)
Rin(Q2)
Av (NL)(Q1)
Av(NL)(Q2)
Listed
Value
100 kΩ
2.0 kΩ
330 kΩ
330 kΩ
33 kΩ
1.0 kΩ
22 kΩ
47 kΩ
22 kΩ
4.7 kΩ
220 Ω
6.8 kΩ
10 kΩ
Table 6-9
DC
Parameter
VB(Q1)
VE(Q1)
IE(Q1)
VC(Q1)
VCE(Q1)
VB(Q2)
VE(Q2)
IE(Q2)
VC(Q2)
VCE(Q2)
Measured
Value
100 kΩ
1.98 kΩ
322 kΩ
321 kΩ
32.5 kΩ
1.00 kΩ
21.8 kΩ
46.7 kΩ
21.6 kΩ
4.68 kΩ
Computed
Value
Measured
Value
0.0 V
0.46 V
0.70 V
1.10 V
0.43 mA
-5.69 V
-6.02 V
-6.39 V
-7.12 V
-5.43 V
-5.83 V
-6.13 V
-6.39 V
1.80 mA
2.74 V
3.31 V
8.87 V
9.70 V
219 Ω
6.71 kΩ
10.0 kΩ
Table 6-11
AC
Parameter
Av’
Rin(Q1)
Rout(Q2)
Vin(Q1)
Vout(Q2)
Computed
Value
58.1 Ω
13.9 Ω
21.8 kΩ
9.1 kΩ
20.4*
Computed
Value
78*
63.8 kΩ
Measured
Value
82
68.6 kΩ
6.71 kΩ
10 mV
6.71 kΩ
780 mVpp
820 mVpp
* calculated with 10 kΩ load resistor.
AV′ = 20.4 x (9.1 kΩ/39.9 kΩ) x 28.0 x (10 kΩ/16.7 kΩ) = 78
28.0*
222
Table 6-12
Generator
Setting
0.5 V
1.0 V
2.0 V
4.0 V
6.0 V
8.0 V
10.0 V
20.0 V
Vin
10 mV*
20 mV
40 mV
80 mV
120 mV
160 mV
200 mV
400 mV
Vout
Av
2.8 V
280
5.4 V
270
9.1 V
220
12.0 V
150
12.8 V
107
13.2 V
82.5
13.2 V
66
12.0 V
36
*Vin should be 2% of the generator setting. All voltages shown
are peak-to-peak values. Some distortion is observed on the
output for Vin = 20 V
400
300
Av
200
100
0
0
100
200
300
400
Vin (mVpp)
Plot 6-1
Questions: Part 3
1. The input and output impedances are ac quantities. The input impedance is
determined, in part, by re’, a quantity that can not be measured directly.
2.
Capacitors can be considered “shorts” to ac for frequencies for which the
reactance is small compared to the circuit impedance.
3.
“Looking” back from the load resistor, the circuit can be considered to be a
current source (the transistor) in parallel with the collector resistor. Assuming the
current source is an open, the ac and dc resistances are equivalent and are
represented by the collector resistor.
4.
(a) Base bias is formed by removing R4 and increasing the value of R3 (the base
resistor). To find the appropriate value, divide the emitter current (1.80 mA) by ß;
this is the desired base current and current in R3. Find the resistance value by
dividing the desired voltage across it (20.4 V) by the base current. For a ß of 100,
the computed base resistor is 1.1 MΩ.
(b) The disadvantage of this is that the amplifier would be sensitive to the ß of the
particular transistor that is used.
5.
Both stages are CE amplifiers, therefore they each change the phase by 180˚. The
result is that there is no phase shift to the output.
223
Experiment 7 Power Amplifiers
Part 1: The Class-A Power Amplifier
Table 7-1
Resistor
R1
R2
RE
Listed
Value
10 kΩ
22 kΩ
Measured
Value
22 Ω, 2 W
23 Ω
Table 7-3
Quantity
Table 7-2
CC
Amp (Q1,2)
9.9 kΩ
VB
VE
IE
VCE
re
Av(NL)
Av(FL)
21.9 kΩ
8Ω
Input resistance, Rin
6.81 kΩ
Output rms voltage, Vout 0.848 Vrms
Input rms voltage, Vin
Load power, PL
Input power, Pin
Power gain, Ap
Measured
Value
8.25 V
8.05 V
6.85 V
6.75 V
311 mA
5.15 V
5.25 V
1 Ω (est.)
0.99
0.98
0.98
0.96
Table 7-4
Quantity
Value
Load resistance, RL
Computed
Value
Value
Quiescent power, PQ
3.73 W
Load power, PL
Efficiency (percentage)
90 mW
2.4%
0.883 Vrms
90 mW
0.113 mW
796
Questions: Part 1
1. (a) The efficiency will be higher because there is no wasted power in the emitter
resistor. The disadvantage is that there is dc voltage across the speaker.
(b) The efficiency will be higher because a larger fraction of the input power will
become ac power to the load. Although both the dc and ac power will rise, the ac rises
in greater proportion. (This can be tested with the Multisim simulation that goes with
this experiment.)
2.
The Darlington arrangement isolates the load more and increases the input resistance
of the amplifier.
224
Part 2: The Class-B Power Amplifier
Table 7-5
Listed
Value
330 Ω
351 Ω
R1
10 kΩ
9.92 kΩ
R2
10 kΩ
9.90 kΩ
R3
R4
68 kΩ
2.7 kΩ
67.4 kΩ
Resistor
RL
Measured
Value
Vin
Vout
Horiz = 0.1 ms/div
Vertical = 5 V/div
2.68 kΩ
Plot 7-1
Table 7-6
DC
Computed
Parameter
Value
VE
0V
VB1
0.7 V
VB2
IR1 = ICQ
Table 7-8
DC
Parameter
VB3
−0.7 V
Table 7-7
AC
Parameter
Vp(out)
Measured
Value
0.015 V
Ip(out)
P(out)
0.64 V
−0.60 V
Computed
Value
7.5 Vp
Measured
Value
7.2 V
23.1 mAp
86.5 mW
830 µA
Table 7-9
AC
Parameter
Av′
Computed Measured
Value
Value
−6.11 V
−6.15 V
VE3
−6.81 V
ICQ3
811 µA
−6.78 V
Questions: Part 2
1. Open D2, bad Q2, no −9 V voltage.
2.
Half the signal will be missing.
3.
Bypass R4.
225
Computed
Value
3.21
Measured
Value
3.14
Experiment 8 Field-Effect Transistors
Part 1: JFET Characteristic Curve
Table 8-1
Resistor
R1
R2
Listed
Value
10 kΩ
Measured
Value
10.0 kΩ
100 Ω
100 Ω
Table 8-2
VG = 0 V
VR2
ID
VDS
VG = −0.5 V
VR2
ID
VG = −1.0 V
VR2
ID
VG = −1.5 V
VR2
ID
1.0 V
0.304 V 3.04 mA 0.248 V
2.48 mA 0.197 V
1.97 mA 0.152 V
1.52 mA
2.0 V
0.487 V 4.87 mA 0.388 V
3.88 mA 0.291 V
2.91 mA 0.201 V
2.01 mA
3.0 V
0.560 V 5.60 mA 0.443 V
4.43 mA 0.320 V
3.20 mA 0.214 V
2.14 mA
4.0 V
0.588 V 5.88 mA 0.458 V
4.58 mA 0.328 V
3.28 mA 0.218 V
2.18 mA
6.0 V
0.605 V 6.05 mA 0.469 V
4.69 mA 0.333 V
3.33 mA 0.222 V
2.22 mA
8.0 V
0.616 V 6.16 mA 0.469 V
4.69 mA 0.333 V
3.33 mA 0.223 V
2.23 mA
7
VG = 0 V
6
5
VG = −0.5 V
ID 4
(mA)
VG = −1.0 V
3
VG = −1.5 V
2
1
0
Table 8-3
Measured JFET Parameters
VGS(off) = −3.22 V
IDSS = 6.1 mA
0
1
2
3
4
5
VDS (V)
6
7
8
Plot 8-1
Step 12: At VDS = 3.22 V, the current for the test transistor reached 5.46 mA, 90% of IDSS.
Questions: Part 1
1. In the constant-current region, read ID for each value of VGS. Plot VGS on the negative
x-axis as a function of ID.
2.
(a) The transconductance is dependent on VGS.
(b) Each characteristic curve was drawn with the same increase in VGS, but the
corresponding drain currents do not follow a linear pattern.
226
Part 2:
JFET as a Voltage-Controlled Resistor
Table 8-4
Listed
Resistor
Value
R1
56 kΩ
Table 8-5
DC
Computed
Quantity Value
6.11 V
VB
Measured
Value
56.3 kΩ
R2
RE
39 kΩ
6.2 kΩ
38.7 kΩ
VE
5.41 V
6.24 kΩ
IE
0.867 mA
RC
3.9 kΩ
3.88 kΩ
R3
100 kΩ
100.4 kΩ
VC
VCE
Measured
Value
6.01 V
5.39 V
11.64 V
11.68 V
6.23 V
6.29 V
Table 8-6
Predicted
Gain
Maximum Gain VGG = 0 V
Measured
Vout
13.8
Measured
Gain
4.92 Vpp
12.3*
Gain with VGG = −0.5 V
4.24 Vpp
10.6
Gain with VGG = −1.0 V
3.56 Vpp
8.9
Gain with VGG = −1.5 V
2.84 Vpp
7.1
Gain with VGG = −2.0 V
2.00 Vpp
5.0
Gain with VGG = −2.5 V
0.98 Vpp
2.45
Gain with VGG = −3.0 V
Gain with VGG = −5.0 V
0.26 Vpp
0.65
0.24 Vpp
0.60
* Three FETs were tested. The smallest observed gain for 0 bias was 9.8 but all fell to a minimum of 0.6
Step 5: The output continues to drop as VGG is increased until VGS(off) is reached; then it
remains at a gain of about 0.60.
Table 8-7
Measured
Vout
Measured
Gain
Vin = 100 mVpp
1.06 Vpp
10.6
Vin = 400 mVpp
Vin = 800 mVpp
3.40 Vpp
8.5
3.56 Vpp
4.45
Vin = 1.2 Vpp
2.84 Vpp
2.37
Questions: Part 2
1. The ac signal is coupled through C3 and rectified by D1. Negative excursions charge
capacitor C4, which biases the FET. A larger signal produces a larger dc voltage on
the gate, thus increasing the emitter resistance of Q1 and reducing the gain.
2.
R4 and C4 maintain a dc voltage on the gate and determine how fast the gate voltage
can respond to an input signal change.
227
Part 3: JFET as a DC Amplifier
Table 8-8
Table 8-9
VIN
Resistor
R1
Listed
Value
5.6 kΩ
Measured
Value
5.63 kΩ
R2
620 Ω
614 Ω
200 mV
3.71 V
R3
1.0 MΩ
998 kΩ
100 mV
4.53 V
RS
RD
180 Ω
3.9 kΩ
177 Ω
3.91 kΩ
0V
5.36 V
−100 mV
−200 mV
6.21 V
7.03 V
−300 mV
7.81 V
−400 mV
8.80 V
300 mV
VD
(measured)
2.99 V
9
8
V D (V)
7
6
5
4
3
2
-400
-200
0
200
400
VIN (mV)
Plot 8-2
Questions: Part 3
1. The transfer curve in Plot 8-2 indicates the output is a linear function of the input
dc voltage.
2.
The bias is self-bias, with the voltage developed across RS making the source
more positive than the gate.
3.
An increase in the power supply voltage will increase the drain current, which is
partially offset by the self-bias. The drain voltage will increase, but should still
have a linear response.
228
Experiment 9 FET Amplifiers and Switching Circuits
Part 1: The Common-Source JFET Amplifier
Table 9-1
Resistor
RS
RD
Listed
Value
1.0 kΩ
3.3 kΩ
Measured
Value
Table 9-2 Parameters for CS Amplifier
Quantity
DC values AC values
1.02 kΩ
Gate voltage, VG
3.26 kΩ
Source voltage, VS
1.73 V
0V
RG
1.0 MΩ
1.01 MΩ
Drain voltage, VD
9.24 V
RL
10 kΩ
9.9 kΩ
Drain current, ID
Input voltage, Vin
1.77 mA
Output voltage, Vout
Voltage gain, Av
Phase difference
500 mVpp
2.26 Vpp
4.53
180˚
4.
The measured output voltage went from 2.26 Vpp to 2.44 Vpp when the 1.0 kΩ
source resistor was replaced with 510 Ω. The transconductance, gm, increases
because the bias current increases. Gain is Av = gmrd.
5.
When the load resistor was changed from 10 kΩ to 100 kΩ, the output voltage went
from 2.44 Vpp to 3.06 Vpp due to the increase in ac drain resistance, rd. As before,
gain is Av = gmrd.
Table 9-3
Fault
Observation
C2 is open
Source and drain reversed
No change to dc; gain drops to 1.6.
VDD drops to +12 V
Slight drop in gain (to 4.4).
RG open
Gate has small variations in dc level; ac ok
but can drop out completely.
No difference; gain remains at 4.5.
Questions: Part 1
1. There is no effect because the input impedance is controlled only by gate resistor.
2. The BJT will significantly load a 100 kΩ source; the FET will not, so it is better
suited for this application.
229
Part 2: The Common-Drain JFET Amplifier
Table 9-4 Parameters for CD Self-Biased Amplifier
Quantity
DC values
AC values
Gate voltage, VG
0V
Source voltage, VS
1.83 V
Drain voltage, VD
15.0 V
Drain current, ID
1.83 mA
Input voltage, Vin
2.0 Vpp
Output voltage, Vout
Voltage gain, Av
Phase difference
1.27 Vpp
0.64
0˚
Table 9-5 Parameters for CD Current-Source Biased Amplifier
Quantity
DC values
AC values
Q1 gate voltage, VG
Q1 source voltage, VS
Q1 drain voltage, VD
Q2 gate voltage, VG
Q2 source voltage, VS
Q2 drain voltage, VD
Drain current, ID
Input voltage, Vin
Output voltage, Vout
Voltage gain, Av
Phase difference
0V
1.72 V
15.0 V
−15.0 V
−13.3
0V
1.70 mA
2.01 Vpp
2.00 Vpp
0.996
0˚
Step 4: With a 10 kΩ load, the signal level drops to 1.74 Vpp (measured). When the signal
was increased, the output was observed to have a 20 Vpp signal with no clipping (the
limit of the signal generator).
Step 5: The dc offset remained very close to 0 V. Student answers may differ as the offset
will change if the transistors are not matched.
Questions: Part 2
1. The current source acts like a very high load impedance on the CD amplifier.
2.
The input resistance is equal to RG = 1.0 MΩ. The loading observed by the 10 kΩ
load resistor indicates that the output impedance is 1.5 kΩ.
230
Part 3: A Cascode Amplifier
Table 9-6
Listed
Value
5.6 kΩ
620 Ω
Measured
Value
5.63 kΩ
618 Ω
R3
1.0 MΩ
R4
Table 9-7
Parameter
VG(Q1)
VS(Q1)
Measured
Value
8.63 V
10.37 V
0.96 MΩ
VG(Q2)
0.001 V
1.5 MΩ
1.56 MΩ
VS(Q2)
0.215 V
RG
1.0 MΩ
1.02 MΩ
RS
100 Ω
99.8 Ω
Resistor
R1
R2
Table 9-8 (Data for 500 kHz)
Parameter Measured
Value
50 mVpp
Vin
Vout
Av(Q1/Q2)
Table 9-9 (Data for 50 kHz)
Parameter Measured
Value
50 mVpp
Vin
Vout
1.16 Vpp
Av(Q1/Q2)
23.2
2.68 Vpp
53.6
Step 6: The output drops. At 10 Vdc, the output at 50 kHz drops to 1.06 Vpp.
Questions: Part 3
1. The data shows that the source voltage is higher than the gate voltage for both FETs.
2.
Because the higher frequencies have less gain, a parallel capacitance path to ground is
suspected. This is likely caused by the capacitance of the protoboard.
231
Experiment 10 Amplifier Frequency Response
Part 1: Low-Frequency Response
Table 10-1
Table 10-2
Listed
Value
1.0 kΩ
Measured
Value
Computed
Value
Measured
Value
13.1 V
13.2 V
RB
R1
47 Ω
68 kΩ
617 Ω
13.8 V
13.8 V
9.91 kΩ
VE
IE
R2
10 kΩ
67.1 kΩ
VC
8.21 V
8.15 V
RE1
10 Ω
565 Ω
VCE
-5.59 V
-5.55 V
RE2
560 Ω
10 Ω
re
11.9 Ω
RC
3.9 kΩ
3.87 kΩ
Av
127
100
RL
10 kΩ
9.88 kΩ
Vout
1.27 V
1.00 V
Resistor
RA
Table 10-3
Capacitor
Req
3.5 kΩ*
C2
24 Ω
C3
13.9 kΩ
25 μF
5.58 kΩ
2.1 mA
Table 10-4
C1
Table 10-5
Computed
value of C2
Parameter
VB
Capacitor
C1
-- fcritical -Computed Measured
45 Hz
41 Hz
C2
66 Hz
70 Hz
C3
Overall
52 Hz
52 Hz
163 Hz
122 Hz
Measured low
frequency
f = 330 Hz
Calculated capacitance to raise low frequency to 300 Hz is 25 μF as follows:
C=
1
1
1
=
=
= 25 μF (use 22 μF)
2πfReq 2πf RE2 || ( RE1 + re' )
2π(300 Hz) ( 560 Ω|| (10 Ω + 11.9 Ω ) )
(
)
Questions: Part 1
1. C2 has the greatest effect because the RC time constant is lower than the others.
2.
Because all three responses are similar, capacitors that are 5X larger are the simplest
change to reduce the lower frequency cutoff by a factor of five.
232
Part 2: High-Frequency Response
Table 10-6
Parameter
VB
VE
Computed
Value
Measured
Value
1.91 V
1.80 V
1.22 V
1.13 V
IE
2.12 mA
VC
6.67 V
7.35 V
VCE
5.46 V
6.22 V
re
12.3 Ω
Av
Vout
124
111
2.48 Vpp
2.22 Vpp
Table 10-7
Step
4
Parameter
Cin
Computed
Value
Measured
Value
11.3 nF
5
Req(in)
44.8 Ω
6
fc(in)
314 kHz
7
Cout
201 pF
8
9
Rc
fc(out)
2.81 kΩ
10
fcu
148 kHz
281 kHz
159 kHz
Questions: Part 2
1. The unbypassed emitter resistor reduces the gain of the amplifier and increases the
upper frequency response. The Miller capacitance is directly proportional to the gain,
so the reduced gain increases the upper frequency cutoff as a result.
2.
(a) For a wide band amplifier, the upper critical frequency and the bandwidth are
essentially identical. Rise time is measured by using a fast-rising pulse at the input
and observing the (inverted) pulse on the output for an inverting amplifier. The time
required for the output to change from 90% to 10% is measured and substituted into
the equation.
(b) The calculated rise time (based on a measured value of 159 kHz) is 2.2 μs.
(Measured result was 2.12 μs).
233
Experiment 11 Thyristor
Part 1: The SCR
Table 11-1
Resistor
Listed
Value
R1
1.0 kΩ
R3
160 Ω
R4
1.0 kΩ
R5
10 kΩ
Table 11-2
Measured
Value
993 Ω
161 Ω
Transistor
Parameter
Latch
VAK(off state) 13.5 V
VAK(on state) 0.803 V
1.001 kΩ
VGate trigger
0.768 V
0.736 V
9.94 kΩ
VR4
3.42 V
3.83 V
IH(min)
3.42 mA
3.83 mA
SCR
13.5 V
0.769 V
Step 7: S1 turns on the SCR. S2 turns it off.
The firing point is controlled by R2.
20 V
Vr4
Drop out
0V
Lower portion of the positive
half of the sine-wave appears
across the LED.
20 V
VAK
0V
0
4.0
8.0
12
Time (ms)
16
20
Plot 11-1
Questions: Part 1
1. The voltage across R4 is proportional to the conduction current. The SCR is on for a
shorter time and the back of the SCR waveform will drop earlier.
2.
In the circuit in Figure 11-3, the capacitor is charged by the positive supply voltage so
that the right side is positive. Connecting it to ground through SW2 causes the anode
to be more negative than the cathode, dropping the SCR out of conduction.
234
Part 2: The Unijunction Transistor
15
Table 11-3
Resistor
R1
Listed
Value
47 Ω
10
Measured
Value
VE 5
(V)
0
R2
220 Ω
15
R3
15 kΩ
10
VB1 5
(V)
Table 11-4
Resistance
setting of R4
5.0 kΩ
Total
Measured
Resistance Frequency
0
15
10
VB2 5
25 kΩ
45 kΩ
(V) 0
Horiz = 0.5 ms/div (all views)
65 kΩ
Plot 11-2
85 kΩ
Frequency (Hz)
400
300
200
100
0
0
20
40 60 80
Resistance (kΩ )
100
Plot 11-3
4.
The frequency decreases in a nonlinear manner as the total resistance increases.
5.
The period of the RC charging waveform decreases as the total resistance decreases.
The amplitude is not changed.
6.
The frequency is unaffected. The amplitude varies directly with the power supply.
Questions: Part 2
1. 6.7 V
2.
The emitter voltage must be at least one diode drop (about 0.7 V) higher than VK, the
voltage established inside the device by the intrinsic standoff ratio.
235
Experiment 12-A Operational Amplifiers
Part 1: The Differential Amplifier
Table 12-1
Resistor
Listed
Value
RB1
100 kΩ
RB2
100 kΩ
RE1
100 Ω
Table 12-2
DC
Computed Measured
Parameter Value
Value
−1.1 V
–1 V
VA
1.4 mA
IT
Measured
Value
102 kΩ
102 kΩ
99 Ω
IE1 = IE2
0.7 mA
RE2
100 Ω
100 Ω
VC(Q1)
+15.0 V
+15.0 V
RT
10 kΩ
10.2 kΩ
VC(Q2)
+8.0 V
+8.35 V
RC2
10 kΩ
10.3 kΩ
Table 12-3
AC
Parameter
Vb(Q1)
Computed
Value
100 mVpp
Measured
Value
VA
50 mVpp
50 mVpp
re(Q1) = re(Q2)
100 mVpp
35.7 Ω
Av(d)
36.8
Vc(Q2)
Rin(tot)
3.68 Vpp
3.55 Vpp
35.1 kΩ
36.5 kΩ
Av(cm)
0.5
0.44
CMRR′
37.3
38.1
35.5
Step 9: The CMRR’ rises significantly due to a much smaller common mode gain. The
observed common-mode output was approximately 5 mVpp for a 7.7 Vpp input signal.
This translates to a measured CMRR’ of 95 dB. This result is better than expected
based on previous tests with this circuit; student answers will likely be lower.
Questions: Part 1
1. It assures that the measurement is made when the amplifier is operating in its linear
region.
2.
1.45 mA
236
Part 2: Op-Amp Specifications
Table 12-4
Specified Value
Step
Parameter
2d Input offset voltage, VOS
3d Input bias current, IBIAS
3e
Input offset current, IOS
4b
4c
4d
Differential gain, Av(d)
Common-mode gain, Acm
CMRR’
5
Slew rate
Table 12-5
Resistor Listed
Value
Rf
1.0 MΩ
Ri
10 kΩ
RC
10 kΩ
Minimum
Typical
Maximum
Measured
Value
2.0 mV
6.0 mV
0.66 mV
80 nA
500 nA
98 nA
20 nA
200 nA
1 nA
1000
0.032
70 dB
90 dB
89.9 dB
0.5 V/µs
0.8 V/µs
Table 12-6
Measured
Value
1.01 MΩ
Resistor
R1
10.2 kΩ
R2
Listed
Value
100 kΩ
Measured
Value
102 kΩ
100 kΩ
102 kΩ
10.2 kΩ
Table 12-7
Listed
Resistor
Value
RA
100 Ω
RB
100 Ω
RC
RD
100 kΩ
100 kΩ
Measured
Value
102 Ω
101 Ω
102 kΩ
102 kΩ
Questions: Part 2
1. The input bias current is the average of the input currents; the input offset current is
the difference between the input currents when the output voltage is 0 V.
2.
The advantage is the rejection of common-mode signals; these are undesired and
frequently represent cross-talk, or other form of interference.
237
Part 3: Basic Op-Amp Circuits
Table 12-8
Resistor
R1
Rf
Listed
Value
1.0 kΩ
10 kΩ
Measured
Value
1.02 kΩ
10.2 kΩ
Table 12-9
Table 12-10
Measured
Value
Acl(I)
Computed
Value
500 mVpp
−10
Vout
−5.0 Vpp
Parameter
Vin
Parameter
Vin
500 mVpp
Computed
Value
500 mVpp
Measured
Value
500 mVpp
Acl(NI)
11
−4.95 Vpp
Vout
5.5 Vpp
V(–)
0 Vpp
V(–)
5.5 Vpp
500 mVpp
Rin
1.0 kΩ
Rin
5 MΩ
Step 3: The observed gain at 1 kHz was 149.3. As the frequency is raised, the gain is
observed to go down. At 10 kHz, the measured gain was 98.6.
Questions: Part 3
1. Amplifier 1 gain = 20 log (11) = 20.8 dB
Amplifier 2 gain = 20 log (10) = 20.0 dB
2.
The voltage on the inverting terminal is not close to ground; it is nearly the same as
the input voltage.
3.
The RC low-pass filters within the op-amp cause the gain to roll-off as frequency
increases.
Experiment 12B: Programmable Analog Design
Part 1: Introduction to AnadigmDesigner2
Instructor note:
If lab time is critical and the students have laptops or other computer access to the
web, Part 1 can be done outside of the lab time.
Steps 1-10: These steps are tutorial in nature and do not require a response from
students.
Step 11: Observations: The traces are described in the procedure but are summarized as
follows: The largest trace (violet) is the 6 Vpp signal from the oscillator. In the
238
center of the screen is an inverted and attenuated 2 Vpp signal (green) that
represents the output of the amplifier. The output traces (yellow and blue) are at
the top of the display. They are offset by 2 V and have opposite phases and
represent the differential outputs from the Anadigm chip.
Time per division is 10 μs, volts per division is 1V with no offset for all signals.
Plot 12-1 Waveforms for 3 V 50 kHz sine wave amplified by −1/3.
Step 12: The file extension is .ad2.
Questions: Part 1
1. (a) 0.25 V
(b) −0.333
2.
A ground referenced sine wave is centered on 0 V, with each peak an equal
amount away from 0 V.
3.
The peaks of a 1 V peak sine are +1 V and –1 V from the reference. With a
reference of +2 V, the peaks are at +3 V and +1 V.
4.
(a) The differential signal is the difference between the two signals.
Mathematically, this can be expressed as OutputA – OutputB for the two outputs.
(b) The differential signal is the same.
5.
.ad2
239
Part 2: Downloading the Configuration File
Instructor note: There are +5 V and ground points located on the PAM board edge that
must not be shorted together. Explain to students to be careful when connecting a
probe to the board and make sure that the probe’s ground clip does not contact
any point except a marked ground terminal. The additional points are shown here
(but we chose not to show them in the student manual).
Input2P
Input1P
GND
+5V
GND
Signal, power, and ground points on the PAM board edge.
Step 3: The signal level is approximately 1 Vp, but depends on the setting of the gain
on the PAM output buffer. For the several PAM units tested the amplitude was
0.85 V to 1.05 V. More recently produced PAMs will show an output close to 1
V indicating an input-to-output system gain close to +1. For the board tested the
amplitude was 0.85 V. The output resembles the simulation waveform from the
inverting amplifier.
Time per division is 10 μs, volts per division is 500 mV
Plot 12-2 Measured waveform.
The output resembles the output of the gain stage shown on the internal simulation
but with slightly lower amplitude (see the green waveform in the simulation).
Step 4: The simulated waveform is 2.0 Vpp at 50 kHz referenced to ground. The observed
signal from the PAM is 1.67 Vpp at 50 kHz referenced to ground.
240
Instructor note: The Anadigm ASP and the PAM operate using a mixture of single-ended
signals and differential-signals which can be confusing. The lab manual explains this
through Experiments 12, 13 and 14 culminating in Figure 14-11 that shows the full
details of the input signal path, connections to the Anadigm ASP and the output signal
path. Here is a preview of the relevant facts (see Figure 14-11 as you read this):
1) The inputs and outputs of the PAM at the board edge (INPUT1, INPUT2, OUT1, OUT2)
are referenced to ground.
2) The input buffer and output buffer devices provided on the PAM board operate using +5 V
and −5 V power supplies to be able to deal with signals that are above and below ground.
3) The Anadigm ASP operates using only 0 V and +5 V power supplies so it can only
handle signals that are above ground level.
4) The designers of the Anadigm ASP decided to do all signal processing level shifted to
+2.0 V which they call the “mid-range reference level”.
5) The input buffers and output buffers on the PAM take care of level shifting between ground
referenced signals in the outside world and the +2.0 V mid-range referenced signals of the
Anadigm ASP. This is done so that the student will not need to worry about or even know
much about the level shifted signal processing that the Anadigm ASP performs.
6) The Anadigm ASP does all of its internal signal processing differentially, even though
the wires in the AD2 design space and the waveforms in the simulator are shown as if
they are signal-ended ground referenced signals.
7) The signal outputs of the Anadigm ASP are differential. The PAM provides output
buffers that do two things:
i) Convert the Anadigm ASP differential outputs to single-ended signals.
ii) Level shift the Anadigm ASP outputs from +2V to ground reference. This feature
allows the student to observe signals on the simulator display and at the OUT1 and
OUT2 terminals on the PAM without confusion regarding differential vs. singleended and +2.0 V referenced vs. ground referenced.
8) There are test points provided on the top surface of the PAM to observe the signals out of
the Anadigm ASP:
For the Anadigm ASP Output1, TP4 is the positive output and TP3 is the negative
output.
For the Anadigm ASP Output2, TP2 is the positive output and TP1 is the negative
output.
The positive differential signal observed at TP4 will have ½ the amplitude of the
total Output1 signal with the +2.0 V offset.
9) The signals into the Anadigm ASP are differential. The PAM provides input buffers that do
two things:
i) Allow the input of either differential signals or single-ended signals according the Input
Termination DIP switch settings.
ii) Level shift ground referenced input signals to the +2.0 V referenced signals for the
Anadigm ASP to use.
10) The differential input buffers on the PAM have a gain of approximately +1 for differential
input signals and a gain of approximately + ½ for single-ended input signals. This ½ gain
characteristic is typical for differential amplifiers where only one leg of the input is driven by
a signal.
241
Step 5: Answers can vary depending on the particular PAM board. For the one tested, the
required gain is:
2.0 Vpp
Av =
× 0.33 = 0.395
1.67 Vpp
Step 6: Measured output amplitude is 1.0 Vp (2.0 Vpp).
Step 7: Answers will vary, depending on the setting of the gain stage and the particular
PAM version. With the gain stage set for a gain of 0.395, the simulated amplitude is
1.17 Vp (2.34 Vpp). The measured amplitude for the PAM tested drops to 0.79 Vp
(1.58 Vpp).
Instructor note: The remaining steps in the experiment are observations only and require a
set of computer speakers, so that students can hear the audio tone that is generated. If
speakers are not available, these steps can be skipped.
Questions: Part 2
1.
Steps to change gain are:
• Double-click the gain’s stage to open the CAM window
• Change gain value in the CAM window
• Click in another part of the window to update and verify the realized value
• Close the CAM window
• Download the new configuration
2.
Signals internal to the Anadigm IC; and some signals at the pins of the Anadigm
IC that are not sent to the output of the PAM board
3.
Increase the gain of the gain stage by the ratio of the desired output signal to the
observed output signal.
Instructor note: This procedure changes the gain at all frequencies. There are filter
adjustments that can avoid this, but this answer is not expected from students.)
4.
The Anadigm IC resets, losing the configuration information.
242
Experiment 13-A Basic Op-Amp Circuit
Part 1: The Comparator and Schmitt Trigger
+15 V
Vin
Vs =
3.0 Vpp
50 Hz
+15 V
+
2
−
Vout
4
1.0 µF
VREF
10 kΩ
7 1.0 µF
6
741C
3
Vin
0V
3.0 Vpp
Vout
0V
28 Vpp
−15 V
−15 V
Horiz =5.0 ms/div
Plot 13-1 Comparator waveform
Step 2: Varying the potentiometer changes the duty cycle of the output from 0 to
100%. The sine wave shows the same response.
0V
0V
X = 1 V/div
Y = 10 V/div
X = 1 V/div
Y = 10 V/div
0V
0V
The vertical line moves along the
x-axis as the potentiometer is varied.
Plot 13-2 Comparator transfer curve
Plot 13-3 Comparator transfer curve
(inputs reversed)
Step 4: Varying the potentiometer causes the vertical line along the x-axis.
Steps 6/7: When the potentiometer is set to maximum, the output is in positive
saturation. As the potentiometer is varied (less resistance), the output waveform
suddenly becomes a 50% duty cycle. Reducing the resistance more causes the
output waveform to shift to the left.
243
Note that the positive threshold is
different than the negative threshold.
+15 V
V in
Vs
3.0 Vpp
50 Hz
10 kΩ
7 1.0 µF
6
741C
2
−
3
+ 4
Vout
1.0 µF
Vin
0V
3.0 Vpp
Vout
0V
28 Vpp
−15 V
R1
100 kΩ
Horiz =5.0 ms/div
Plot 13-4 Schmitt trigger waveform
Step 8: The potentiometer varies the hysteresis; the upper and lower thresholds move
apart as resistance is increased.
0V
X = 1 V/div
Y = 10 V/div
0V
Plot 13-5 Schmitt trigger transfer curve
Questions: Part 1
1. The threshold voltage is a dc quantity that adds to or subtracts from the input
plotted along the x-axis of the transfer curve. Varying the threshold shifts the
vertical line along the x-axis.
2.
The offset control on the generator does not affect the threshold for the circuit but
it adds a dc component to the input voltage. As a result, the duty cycle of the
output waveform can be changed by the offset control. (Note: it is useful to show
this with the transfer curve – it varies only the endpoints of the transfer curve, not
the vertical line).
3.
The transfer curve is a characteristic that is independent of the input. On an
analog oscilloscope, the transfer curve will show various intensities that depend
244
on the input because the waveform determines the time the beam spends in
graphing any given point on the curve.
4.
A comparator has the same threshold for rising or falling signals; a Schmitt
trigger has a different threshold for each.
Part 2: The Summing Amplifier
Table 13-1
Resistor
RA
RB
RC
Rf
Listed Measured
Value
Value
20 kΩ 20.0 kΩ
10 kΩ 10.1 kΩ
5.1 kΩ 5.08 kΩ
3.9 kΩ 3.93 kΩ
QA
0V
QB
QC
−4.4 V
Horiz = 1 ms/div
Vertical = 1.0 V/div
Horiz = 1 ms/div
Vertical = 5.0 V/div
Plot 13-6
Plot 13-7
Step 4: The output waveform is the positive portion of the input waveform with no
offset. The small jump on the output is due to slew rate limitation as the output
moves from negative saturation.
Step 5: The output is a negative half-wave rectified signal. With D1 removed, the
output appears to be a full-wave rectified signal with overshoot on the back side
of every other pulse. This overshoot is frequency dependent, and disappears at a
few hundred hertz.
Step 6: The output is a positive full-wave rectified signal. The signals are shown in
Plot 13-8.
245
Input R i2
Input R i3
Vout
Horiz = 2 ms/div
Vertical = 5.0 V/div
Plot 13-8
Questions: Part 2
1.
(a) To approximate the column values in the binary system (1,2,4, etc.), the three
inputs are amplified in proportion to the column values they represent. (This is in
effect a three bit D/A converter).
(b) Add an inverting amplifier to the output.
2.
Gains are −0.195, −0.39, and −0.76. The output is 4.5 V x (−0.195 −0.39 −0.76) =
−6.05 V
3.
One of the inputs to the summing amplifier is a variable dc as shown:
Rf
R1
R2
Vs
−
+15 V
10 k Ω
VREF
Vout
+
−15 V
4.
The inverted half-wave rectified signal is amplified twice as much as the sine
wave input in order to cancel the negative excursion of the sine wave and add a
positive-going signal to it.
5.
The resistors shown are representative and can have other values; the ratios are
important.
Rf
R1
10 k Ω
R2
15 kΩ
30 k Ω
−
Vout
+
246
Part 3: The Integrator and Differentiator
Table 13-2
VOUT
Red ON Green ON
+2.1 V
-2.0 V
VREF
Threshold
VA
0V
0.001 V
Step 3: Duty cycle changes as R3 is
varied; output B slope follows.
VB
0V
Horiz = 0.5 ms/div
Vertical = 2.0 V/div
Plot 13-9
Table 13-3
Trouble
No Negative Power Supply
Red LED open
C1 open
R5 open
Symptoms
Red LED on; B goes to positive saturation
A = -2 V to + sat; B = - sat w/small deviation
B goes to a square wave (+ and - saturation)
No change in A; B goes toward - saturation.
VB
VB
Vout
Vout
0V
0V
0V
0V
Horiz = 0.5 ms/div
Vertical = 2.0 V/div
Horiz = 0.5 ms/div
Vertical = 2.0 V/div
Plot 13-10
Questions: Part 3
1. VREF(MIN) = −714 mV
Plot 13-11
VREF(MAX) = +714 mV
2.
The LEDs drop a maximum of about 2.0 V at the op-amp's current limit.
3.
(a) R4 establishes a virtual ground at the inverting input through negative feedback
and stabilizes the operating point. Without it, the output will saturate.
(b) The output went to negative saturation.
4.
Differentiator circuit
247
Experiment 13-B Programmable Analog Design
Part 1: The Comparator and Comparator with Hysteresis
Vin
0V
Vout
0V
Vertical = 2.0 V/div (both channels)
Horizontal = 5.0 ms/div
Plot 13-12
Vin
0V
Vin
0V
Vout
0V
Vout
0V
Vertical = 2.0 V/div (both channels)
Horizontal = 5.0 ms/div
Vertical = 2.0 V/div (both channels)
Horizontal = 5.0 ms/div
Plot 13-13
Plot 13-14
Step 8: As the offset voltage is increased, the output positive time increases and the
negative time decreases; when the offset voltage is decreased, the opposite occurs.
x-axis = 1.0 V/div y-axis = 2.0 V/div
Plot 13-15 Comparator transfer curve.
248
Step 10: The vertical transition on the transfer curve moves to the right to approximately
2.0 V on the x-axis. (For reference, the plot is shown here, but not required in the
experiment. Note that the 2.0 V result is because the internal differential signal is ½
the external single-ended signal.)
x-axis = 1.0 V/div y-axis = 2.0 V/div
Step 10 result
Step 11: The end points on the transfer curve move left or right, following the offset
control.
Vout
0V
Vin
Channel 1 ( Vin): Vertical = 200 mV/div
Channel 2 ( Vout): Vertical = 2.0 V/div
Horizontal = 5.0 ms/div
x-axis = 200 mV/div y-axis = 2.0 V/div
persist ON
Plot 13-16 Comparator with hysteresis.
Plot 13-17 Schmitt trigger transfer curve.
Questions: Part 1
Instructor note: The questions in Part 1 are stand alone, i.e. they do not specifically
apply to the experiments completed in the laboratory work for this section.
1.
In a single-ended signal, the signal is referenced to a static value, which is
typically ground. In a differential signal, the signal is referenced to another signal.
2.
Hysteresis is a characteristic of a circuit in which the trigger level (or switching
point) for a rising signal is different than that of a falling signal.
3.
Hysteresis helps reduce the susceptibility to noise for a comparator.
249
4.
In a triangle wave the change of voltage over time is linear; in a sine wave the
change in voltage over time is not linear. The transfer curve would look similar,
but with a sine wave, the ends of the transfer curve would be brighter and the
center dimmer on an analog scope display.
Part 2: The Summing Amplifier and Peak Detector
Step 5: The simulation shows the sum of the two signals. The sum shows a pulsating
appearance; the envelope represents the difference in the two frequencies.
Step 7: An audio tone is heard in the speaker that represents the difference frequency
between the two oscillators. The peak detector is necessary to hear the tone.
Instructor note: The simulated and measured waveforms are virtually identical. The
simulated waveform is shown in Plot 13-18 for reference; the light gray signal on top
is from the peak detector. A. A magnified view of the signals is shown in the
unnumbered plot. (Note the decay time for the peak detector.)
Both channels: 1 V/div, 200 μs/div
Both channels: 1 V/div, 1 ms/div
Plot 13-18 Summing amplifier and peak
detector outputs.
Magnified view of summing amplifier and
peak detector outputs
Step 8: The sound heard will be the difference frequency between the oscillators.
Step 9: There is no sound when the peak detector is removed.
Questions: Part 2
1. The decay time constant controls how fast the peak detector responds to changes.
A smaller time constant would allow the peak signal to show as a group of spikes
that follow the wave instead of the smooth envelope that was observed.
2.
The peak detector converts the envelope to a frequency that can be heard. Without it,
there is no audible frequency in the signal.
3.
The peak detector follows the envelope which represents a “beat” or difference
frequency between the oscillators.
250
Part 3: The Differentiator
Instructor note: The ASP outputs are not precisely differential, meaning that there is a slight DC
offset between the two parts of each output. The output buffer, a difference amplifier, exacerbates
this by subtracting the two signals. The amount of dc offset varies with different PAM units. In an
actual application a DC blocking capacitor to remove the offset is recommended; students can use
AC coupling on the scope to see true differentiation.
Vin
Vin
0V
0V
Vout
Vout
Both channels = 1.0 V/div, ground at center
Horizontal: 10 μs/div (see not about dc offset)
Both channels = 1.0 V/div, ground at center
Horizontal: 10 μs/div
Plot 13-19 Differential output of a triangle wave.
Plot 13-20 Differential output of a
sine wave.
Step 4: The output waveform is not affected by small changes in the dc offset.
Vin
Vin
Vout
0V
0V
Vout
Input = 1.0 V/div, output = 2.0 V/div
Horizontal: 10 μs/div
Input = 1.0 V/div, output = 2.0 V/div
Horizontal: 10 μs/div
Plot 13-21 Differential output of a square wave.
Step 7 result with a rectifier filter.
Step 7: The output has only positive excursions from 0 to 4.3 V, as shown in the
unnumbered plot above.
Questions: Part 3
1. The dc level had no effect because the rate of change of dc (a constant) is zero.
2.
For a constant amplitude input, changing the frequency changes the slope. A
higher frequency will have a larger slope and hence a larger amplitude derivative.
3.
The derivative of a sine wave has the same shape but lags the input by 90o.
251
Experiment 14-A Special-Purpose Op-Amp Circuits
Part 1: The Instrumentation Amplifier
Table 14-1
Resistor
R1
R2
Table 14-3
Listed
Value
10 kΩ
10 kΩ
Measured
Value
Measured
Value
9.87 kΩ
Parameter
Oscillator frequency
9.87 kΩ
Vout(pp) from oscillator
7.6 Vpp
Vout(pp) from IA
170 mVpp
RG
470 Ω
463 Ω
R3
10 kΩ
9.91 kΩ
R4
10 kΩ
9.87 kΩ
R5
10 kΩ
9.88 kΩ
R6
R8
8.2 kΩ
100 kΩ
8.10 kΩ
R9
100 kΩ
100 kΩ
682 Hz
*
*
*Output amplitude depends on battery voltage
101 kΩ
Table 14-2
Step
3
Parameter
Differential input voltage, Vin(d)
Differential gain, Av(d)
43.5
Differential output Voltage, Vout(d)
Common-mode input voltage, Vin(cm)
4
Common-mode gain, Av(cm)
Common-mode output voltage, Vout(cm)
5
Computed
Value
300 mVpp
CMRR′
Measured
Value
300 mVpp
43.0
13.1 Vpp
13.0 Vpp
10 Vpp
10.0 Vpp
0.008
80 mVpp
74.6 dB
Step 8: The measured differential signal was a 170 mV, 682 Hz square wave (from the 555
timer). It was amplified by the IA but the 10 Vpp common-mode signal was almost
completely eliminated from the output as viewed on an oscilloscope.
Questions: Part 1
1. For a CMRR of 130 dB, the ratio of Av(d) to Av(cm) is 3.16 x 106. This implies that
the common-mode gain for the experiment is 43/3.16 x 106 = 13.6 x 10-6. The
expected output signal is 10 Vpp x 13.6 x 10-6 = 136 µVpp.
2.
The oscillator signal was a differential-mode signal but the signal generator was a
common-mode signal.
3.
The reference ground for the 555 timer needs to be isolated from the ground for
the IA. The simplest way to do this is power it from an independent source.
252
4.
The IA has CMRR, both inputs to the IA are balanced, and it has high input
impedance. (The input impedance was 100 kΩ, but it can be much higher).
Part 2: The Log Amplifier and Antilog Amplifier
Table 14-4
Resistor
R1
R2
12
Listed
Value
100 kΩ
100 kΩ
Measured
Value
100 kΩ
100 kΩ
12
Vin
10
8
Vin(V)
Vin
10
8
Vin(V)
6
6
4
4
2
2
0
0
Vout is from −0.58 V to
−0.51 V (both plots)
Horiz = 0.2 ms/div
Horiz = 0.2 ms/div
Plot 14-1
Plot 14-2
Step 5: The output from the antilog amp matches the input to the log amp, as it should.
Step 6: When the log amp is warmed (by touch), the output goes down; when the
antilog amp is warmed (by touch), the output increases.
−0.4
Data for
−0.45
VOUT
-0.513 V
-0.532 V
-0.548 V
-0.559 V
-0.566 V
-0.572 V
-0.577 V
−0.5
VOUT (V)
Table 14-5
Log Amp
VIN
+1.0 V
+2.0 V
+4.0 V
+6.0 V
+8.0 V
+10.0 V
+12.0 V
−0.55
−0.6
−0.65
−0.7
1
2
3
4
VIN (V)
Plot 14-3
253
6
8
10 12
Questions: Part 2
1. Advantages of integrated circuit IA’s include
(a) less temperature sensitivity
(b) greater dynamic range (5 or 6 decades)
(c) gain control
(d) single package design
(e) high accuracy and linearity
(f) very low bias current (max of 5 pA in the LOG100)
2.
The antilog amp transfer curve is also a straight line plotted on semilog paper;
however, the input voltage should be plotted on the linear scale and the output
voltage is plotted on the log scale.
3.
With the same resistor in the log and antilog circuit, the original signal applied to
the log amp is restored by the antilog amp. If the antilog amp has a larger resistor,
its transfer curve is shifted up, resulting in more gain.
4.
(a) Multiplication of the inputs (and multiplying by −1 because of the three
inversions). (Note the summing amplifier added the logs; the antilog amplifier
returns the product of the original numbers but with opposite sign).
(b) −6.0 V
Experiment 14-B Programmable Analog Design
Part 1: Single-Ended Signals into a Differential Signal Circuit
Step 3: (a) 1.00 Vpp
(b) 0.50 Vpp
Step 4: Typical values for OUT1 = 0.445 Vpp to 0.468 Vpp. (Answers to these steps depend
on the particular PAM.)
Step 5: Typical values for OUT2 = 0.455 Vpp to 0.494 Vpp.
Step 6: Typical values for gain settings to equalize outputs = 0.970 to 978.
Step 7: Some trial and error may be required, because the ASP cannot set exact gains. The
ASP outputs of 0.445 Vpp need to be multiplied by 2.25 to achieve 1.0 Vpp, but a
small adjustment was needed for one of the PAMs tested; the final gain setting for
this PAM was 2.16.
Questions: Part 1
1. This reduces any errors caused by differences in the equipment or problems
with calibration.
2.
Any unshielded wire will capture nearby signals.
3.
Ground paths are sometimes called “returns”. If several signals use the
aluminum structure for the return path, signals can combine, increasing the
noise for any given signal. In short, this is a bad idea.
4.
Small differences in the actual gain are generally due to component variations.
254
Part 2: Instrumentation CAMs
Zero-crossing Detector
0V
Vin
Vout
Ch 1 (Vin): Vertical 500 mV/div
Ch 2 (Vout): Vertical 2.0 V/div
Horizontal: 250 μs/div
Plot 14-4 Sine wave input and zero-crossing detector output.
The output is at a level of – 5 V and pulses to +5.0 V when the zero crossing occurs.
For comparison, the simulation data is shown. The simulation shows the pulse is 2 μs wide.
Step 4: The delay is approximately 5 μs when the output is positive, which is significant at
50 kHz, representing 25% of the period. It is positive for about 2 μs, in good
agreement with the simulation.
Step 5: The zero crossing pulse is closer to the actual zero crossing as the frequency is
increased.
255
Peak Detector
Step 8: The signal at OUT1 is a half-wave signal that is ½ of the input peak. The signal at
OUT2 is a full-wave signal that is also ½ of the input peak.
Step 9: The half-wave signal returns to the base line between peaks, but the full-wave
signal does not.
Step 10: Neither the half-wave nor full-wave signal return to the baseline between peaks.
The half-wave signal drops about 50%; the full-wave drops about 25%.
Step 11: The signals approach the dc level of the peak as the frequency is raised.
Gain-Limiter
Steps 13 and 14: The simulated waveform and the measured waveform are virtually
identical. The waveforms shown below are from the simulation, with the top
waveform offset by +10 (1 div) and the bottom waveform offset by −10.
Plot 14-5 Simulated limiter waveform. (Plot 14-6 will be the same.)
256
Comparator Application – Tank Experiment
Plot 14-7 Simulated comparator waveform. The simulator waveform shows the trigger
points at +40 mV and at −40 mV.
Vout
Vin
0V
Ch 1 (Vin): Vertical 50 mV/div
Ch 2 (Vout): Vertical 2.0 V/div
Horizontal: 50 μs/div
Plot 14-8 Actual comparator waveform.
Step 17: The trigger points on the actual waveform are at +80 mV and −80 mV.
257
Questions: Part 2
1. (a) One method is to rectify the input signal and combine it with a small negative
dc voltage to offset the output and force it to cross 0 V. The rectified signal is
twice the frequency of the input, which is then passed on to a zero-crossing
detector. The configuration for this solution is shown. Note that the small dc
voltage is generated with the Voltage CAM set to +3 V and a GainInv stage with
a gain set to 0.02.
Instructor note: You can also generate a small dc voltage using the PeriodicWave
CAM by cycling through a constant voltage. This CAM is discussed in
Experiment 16-B, part 3.
Output of circuit for Question 1.
Circuit for Question 1
(b) This circuit could be used to measure the time an arbitrary wave is above 0 V.
2.
When the time constant is short, the peak detector tends to follow the positive halfcycle if the input.
3.
(a) A long time constant causes the change from the peak value to decay slowly,
acting as a low-pass filter.
(b) A higher frequency causes the output to reset to the peak value sooner than a low
frequency and tends to smooth the output as a result.
4.
Using a high-gain amplifier causes the signal to rapidly reach the limiter
cutoff values, so the output signal looks like a square wave.
5.
Without hysteresis, the decision point for turning the valve on or off could be
crossed several times because of noise in the system. Thus, the valve would
tend to chatter.
258
Experiment 15-A Active Filters
Part 1: Four-pole Low-Pass Filter
Table 15-2
Component
Listed
Value
8.2 kΩ
0.01 µF
10 kΩ
1.5 kΩ
22 kΩ
27 kΩ
RA1, RB1, RA2, RB2
CA1, CB1, CA2, CB2
Ri1
Rf1
Ri2
Rf2
Table 15-3
Frequency
VRL
A1
Measured Values
B1
A2
8.17 kΩ
8.37 kΩ
8.00 kΩ 8.22 kΩ
0.01 µF
0.01 µF
0.01 µF
0.01 µF
10.1 kΩ
1.5 kΩ
21.9 kΩ
26.8 kΩ
3.0
2.55 V
1000 Hz
2.52 V
1500 Hz
2.45 V
2000 Hz
1.72 V
3000 Hz
0.45 V
4000 Hz
0.14 V
8000 Hz
0.009 V
VRL (V)
500 Hz
2.0
1.0
0.0
0
1.0
2.0
3.0
4.0
5.0
Frequency (kHz)
Plot 15-1
10
VRL (V)
1.0
0.1
0.01
10
B2
100
1.0 k
Frequency (Hz)
Plot 15-2
259
10 k
6.0
7.0
8.0
Questions: Part 1
1. (a) The cutoff frequency is approximately 2.0 kHz.
(b) Answers vary; for the tested circuit, the average R is 8.19 kΩ, the average C is
0.010 µF. The computed cutoff frequency from these values is 1.94 kHz.
2.
(a) The measured voltage gain in the band pass is 2.55.
(b) The desired value for a four-pole filter (from Table 15-1) is 2.574 (This is the
product of the two gains: 1.152 x 2.235 = 2.574).
3.
The output is reduced by a factor of 104 (−80 dB for this filter), which is
approximately 250 µV.
4.
The constructed filter is very close to the theoretical roll-off.
5.
(a) The gain computed from the actual resistors in the first stage is 1.149.
(b) The gain computed from the actual resistors in the second stage is 2.227. The
product of these gains results in an overall gain of 2.559 (compare to question 2).
Part 2: State-Variable Filter
Table 15-4
Component
R1
R2
R3
R4
R5
R6
R7
C1
C2
Listed
Value
10 kΩ
10 kΩ
10 kΩ
1.0 kΩ
100 kΩ
1.0 kΩ
1.0 kΩ
0.1 μF
0.1 μF
Measured
Value
10.0 kΩ
10.1 kΩ
9.91 kΩ
1.01 kΩ
101 kΩ
1.00 kΩ
Table 15-5
Quantity
Computed Measured
Center frequency, f0 = 1.59 kHz 1.62 kHz
Vpp(center) =
13.3 Vpp
1.649 kHz
Upper cutoff, fcu =
1.60 kHz
Lower cutoff, fcl =
Bandwidth, BW = 0.047 kHz 0.049 kHz
33.7
32.4
Q=
1.02 kΩ
0.0979 µF
0.1006 µF
260
Table 15-6
40 mVpp
200 Hz
75 mVpp
500 Hz
200 mVpp
1.0 kHz
0.48 Vpp
1.5 kHz
2.0 kHz
3.0 Vpp
1.14 Vpp
2.5 kHz
0.54 Vpp
3.0 kHz
0.37 Vpp
4.0 kHz
0.24 Vpp
5.0 kHz
180 mVpp
10 kHz
20 kHz
82 mVpp
41 mVpp
1.0
VRL (V)
Frequency
100 Hz
10
Output voltage
Vout(pp)
0.1
0.01
100
1.0 k
10 k
Frequency (Hz)
Plot 15-3
Questions: Part 2
1.
If the Q of the circuit is made smaller, the output can be increased.
2.
(a) Advantages: high Q, easily tuned, and both high- and low-pass outputs are
available.
(b) The change of R6 to 100 kΩ, as noted in step 6, will eliminate the peaking, but
greatly decreases the Q of the circuit so it affects the response of the band-pass
filter.
3.
(a) To double the frequency, reduce R4 and R7 or reduce C1 and C2 by half.
(b) To lower the Q, increase the value of R6.
4.
(a) A band reject or notch filter.
(b) Rejection of an interfering noise frequency.
261
100 k
Experiment 15-B Programmable Analog Design
Part 1: Single-Pole Low-Pass Filter using the Bilinear Filter CAM
The simulation scope is shown. The two signals are nearly identical, so Channel 1,
which represents the input, is offset by 10 units (1 div) to show both signals.
Plot 15-4 Input and output waveforms from a single-pole low-pass filter.
Table 15-7 Simulated input and output voltage and time.
f
500 Hz
2.5 kHz
5.0 kHz
10 kHz
50 kHz
T
2000 μs
400 μs
200 μs
100 μs
20 μs
Δt
32 μs
29 μs
25 μs
18 μs
5.0 μs
Phase shift
Input Peak
Voltage, Vp
5.8o
26.1o
45.0o
64.8o
90.0o
1.50
1.50
1.50
1.50
1.50
Output Peak
Voltage, Vp
1.49
1.34
1.06
0.67
0.15
Table 15-8 Measured input and output voltage and time.
f
500 Hz
2.5 kHz
5.0 kHz
10 kHz
50 kHz
T
2000 μs
400 μs
200 μs
100 μs
20 μs
Δt
38.0 μs
30.3 μs
25.6 μs
18.5 μs
5.45 μs
Phase shift
6.8o
27.3o
46.1o
66.4o
98.1o
Input Peak
Voltage, Vp
3.02
3.02
3.02
3.02
3.02
Output Peak
Voltage, Vp
1.67
1.47
1.18
0.750
0.17
Step 9: The shape of the responses is nearly identical but the measured outputs are slightly
larger than the simulation. The attenuation in the PAM input buffer required the
larger specified input signal, and may account for the differences.
Questions: Part 1
1. At the zero crossing, the signals are changing at the maximum rate, so it is easier to
read time precisely. Also, the signals are not as sensitive to alignment on the scope.
262
2.
Yes. In general, low-pass filters are constructed as RC networks with the output taken
across C, causing a phase lag. With RL networks, the output is taken across R, also
producing a phase lag.
3.
The response of the simulation is nearly identical to theory for the points at 0.1fc, fc,
and 10fc. The measured responses are higher at all frequencies. This may be
accounted for by the PAM input buffer amplifier.
Part 2: Single-Pole Low-Pass Filter Using AnadigmFilter
Step 9: Both filters have identical responses at all frequencies tested.
Table 15-9 Simulated input and output voltage
for a five-pole low-pass filter.
f
500 Hz
2.5 kHz
5.0 kHz
10 kHz
50 kHz
Input Peak
Voltage, Vp
1.00
1.00
1.00
1.00
1.00
Output Peak
Voltage, Vp
1.00
1.00
0.71
0.0316
0.00
Step 14: At the cutoff frequency of 5 kHz, the measured output is 0.73 Vp (1.46 Vpp).
Step 15: At 10 kHz, the measured output is 0.377 Vp (73.5 mVpp).
Questions: Part 2
1. The filter has a very sharp roll-off. At one decade, the predicted output is too small to
measure (it should be approximately 10 μV).
10
(a) See Plot 15-5.
(b) The frequency as read on
the plot for Vout = 10 mV is
approximately 13 kHz. This
agrees with the calculated value
for a 5 pole filter of 13.3 kHz.
1.0
Vout (V)
2.
0.1
0.01
100
1.0 k
10 k
Frequency (Hz)
Plot 15-5
263
100 k
Experiment 16-A Oscillators
Part 1: The Wien-Bridge Oscillator
Table 16-2
Computed
Table 16-1
Listed
Value
10 kΩ
Measured
Value
R2
10 kΩ
10 kΩ
C1
0.01 μF 0.01 μF
0.01 μF 0.01 μF
Component
R1
C2
fr
10 kΩ
1.59 kHz
Measured
1.46 kHz
Step 2: The output saturates on both positive and negative peaks. Freeze spray causes
circuit to change and even stop oscillating. Circuit is temperature sensitive.
Table 16-3
Vout(pp)
V(+)(pp)
V(–)(pp)
(pin 6)
(pin 3)
(pin 2)
4.0 Vpp
1.5 Vpp
1.5 Vpp
VG
−1.0 Vdc
Step 5: The phase shift is 0o.
Step 6: Very little effect with freeze spray. The output is much more stable.
Table 16-4
Vout(pp)
V(+)(pp)
V(–)(pp)
(pin 6)
(pin 3)
(pin 2)
4.6 Vpp
1.56 Vpp
1.56 Vpp
VG
−1.29 Vdc
Questions: Part 1
1.
(a) Feedback fraction is very close to 1/3.
(b) The measured result agrees with theory.
2.
The extra diode causes C3 to charge for a smaller part of the cycle decreasing VG. This
causes the FET resistance to drop (temporarily). The op-amp's gain (and output
voltage) increase until the charge on C3 is returned to the proper level for a stable
output.
3.
The diode causes the negative half-cycle of the output to charge the capacitor and bias
the FET with a negative bias voltage.
4.
The frequency is halved to 790 Hz.
264
Part 2: The Hartley and Colpitts Oscillators
Table 16-5
Resistor
R1
R2
RE1
RE2
RC
Listed
Measured
Value
Value
9.98 kΩ
10 kΩ
3.31 kΩ
3.3 kΩ
50 Ω
50 Ω *
1.01 kΩ
1.0 kΩ
2.69 kΩ
2.7 kΩ
* Set to the center position
Table 16-6
DC
Computed
Parameter
Value
VB
3.01 V
VE
2.31 V
IE
2.18 mA
VC
6.11 V
Table 16-8
Hartley
Computed
Oscillator
Value
frequency 969 kHz
amplitude
Table 16-7
AC
Computed
Parameter
Value
Vb
100 mVpp
re′
61.5 Ω
Av
43.9
Vc
4.39 Vpp
Measured
Value
2.97 V
2.32 V
6.07 V
Table 16-9
Colpitts
Computed
Oscillator
Value
frequency 1.06 MHz
amplitude
Measured
Value
961 kHz
5.5 Vpp
Measured
Value
100 mVpp
39.0
3.9 Vpp
Measured
Value
1.04 MHz
7.4 Vpp
Step 6: Both the amplitude and the frequency of the oscillator decreased.
Questions: Part 2
1. The amount of feedback decreased.
2.
The two conditions are positive feedback and a loop gain equal or greater than 1.
3.
In the Hartley oscillator, an inductor is used to provide positive feedback from the
tank circuit. In a Colpitts oscillator, a capacitor is used to supply positive
feedback.
265
Part 3: The 555 Timer
Table 16-10
Table 16-11
Listed
Value
8.2 kΩ
Measured
Value
8.14 kΩ
R2
10 kΩ
Cext
0.01 μF
9.91 kΩ
10.3 nF
Component
R1
Component
Frequency
Computed
Value
4.96 kHz
Duty cycle
0.65
Measured
Value
5.15 kHz
0.65
Pin 3
0V
Pin 2
0V
Vertical = 2 V/div Horiz = 50μ s/div
Plot 16-1
Step 5: The capacitor waveform shows the charge and very fast discharge. Frequency rises
to 12.5 kHz, with only negative triggers on the output.
Steps 6 and 7: Student answers will vary. One possible circuit is to change both RA and RB
to 4.7 kΩ (no change to C). This will give a calculated frequency of 10.1 kHz.
Questions: Part 3
1. The value of R1 needs to be larger and R2 smaller. R1 will need to be increased by
twice the amount of reduction to R2. For example if R2 is reduced to 5.1 kΩ, then R1
should be a resistor that is near 2 x 4.9 kΩ larger than 8.2 kΩ, which is 18 kΩ.
2.
The shape will remain the same, but the waveform will go between 5 V and 10 V (1/3
and 2/3 of VCC.)
3.
For any real value of R1, the fraction (R1+R2)/(R1+2R2) > 0.5.
4.
(a) The trigger points are 1/3 and 2/3 of VCC. The capacitor charges and
discharges between these two levels.
(b) It has no effect on the frequency because the frequency is determined solely
by the time constants.
5.
(a) The maximum output source or sink current is 200 mA but depends on the
acceptable output voltage levels for high and low.
(b) The high output voltage drops and the low output voltage rises.
266
Experiment 16-B Programmable Analog Design
Part 1: Ring Oscillators
Instructor Note: Values for frequency and amplitude will vary for different PAMs.
Step 3: Frequency = 470 kHz
Amplitude = 3.68 Vp (7.36 Vpp)
0V
Vertical: 2.00 V/div
Horizontal 500 ns/div
Plot 16-2 Three-stage ring oscillator.
Step 4: Frequency = 285 kHz
Amplitude = 4.04 Vp (8.08 Vpp)
0V
Vertical: 2.00 V/div
Horizontal 1.0 μs/div
Plot 16-3 Seven-stage ring oscillator.
Step 6: Frequency = 6.50 kHz
Amplitude = 1.05 Vp (2.10 Vpp)
0V
Vertical: 500 mV/div
Horizontal 50 μs/div
Plot 16-4 Waveform from the special ring oscillator.
267
Step 7: As the integration time constant is increased, the frequency increases. An
integration time constant of 4.0 produces a 12 kHz square wave.
Step 8: The last circuit used most of the available resources. The LUT and counter are
shown as available but only 2 capacitors (in CAB2) are available.
Questions: Part 1
1. Each time a signal goes through the loop it represents either a logical LOW or
logical HIGH. Thus each pass represents ½ the period of the wave.
2.
The measured frequency in step 4 is 285 kHz with a period of 3.50 μs. This time
represents fourteen total delays (two passes through seven stages). Thus the delay for
one stage is approximately 3.50 μs/14 = 250 ns.
Note that this is an average for all stages and ignores other delays in the system such
as the input and output buffers on the PAM unit.
3.
Make one inverting stage and the rest non-inverting stages. (This can be
implemented as one instance of a GainInv CAM and three instances of a
GainLimiter CAM.)
4.
In addition to showing how much of the available resources are used, it also indicates
the power consumption.
Part 2: The Sine Wave Oscillator
0V
Vertical: 500 mV/div
Horizontal: 500 ns/div
Plot 16-5 Oscillator signal at OUT1 of PAM.
268
0V
Vertical: 1.0 V/div
Horizontal: 25 μs/div
Plot 16-6 A 7 kHz sine wave using the internal 250 kHz clock.
0V
Vertical: 1.0 V/div
Horizontal: 5.0 μs/div
Plot 16-7 A 41 kHz sine wave using the internal 250 kHz clock (from a single-shot
display.)
Questions: Part 2
1. (a) At 5 samples per cycle of a sine wave, the reconstructed wave is recognizable
but the steps are clearly visible between sample points. A smoothing filter gives a
better result. (Note: Typical simulator software tools such as PSPICE, Multisim,
or Saber) use at least 20 samples per cycle.)
(b) The Nyquist criteria requires more than two samples per cycle as the
minimum sampling rate to reconstruct the frequency of the sine wave.
2.
The intent of the output stage smoothing filter is to make the steps in the output
look more like a sine wave. Because the filter frequency on the PAM5002 is set to
approximately 432 kHz, it is not effective for the 41 kHz signal used in the
experiment (the signal is more than a factor of 10 below the filter fc).
3.
The signal is 800 MHz but looks more like a triangle wave than a sine wave, even
after the 432 MHz smoothing filter.
269
Part 3: The Arbitrary Waveform Generator
Instructor note: ClockA = 2000 kHz (500 ns period). With 24 samples, the period is
T = (500ns)(24 samples) = 12,000 ns = 12 μs. This implies f = 83.3 kHz.
If a student reports an incorrect value, check that he or she has set the counter reset
value to = 23, not 24 or some other value.
0V
Vertical: 500 mV/div
Horizontal: 5.0 μs/div
Vertical: 500 mV/div
Horizontal: 5.0 μs/div
Plot 16-8 Simulated waveform.
Frequency: Simulated 83.3 kHz
Plot 16-9 Measured waveform
Measured 83.3 kHz
Step 6: The output filter on the PAM has a cutoff frequency at 432 kHz that affects the
higher harmonics in the signal. This causes rounding of the edges as shown in Plot
16-9.
Step 7: The frequency drops to 10.4 kHz, so the measured waveform has steeper changes
and approaches the ideal wave. (The simulator shows the ideal wave.)
Step 11: The frequency measured on the simulator is 1.64 kHz. The period is 0.61 ms.
Step 12: The frequency measured from the PAM is 1.64 kHz. The period is 0.61 ms.
Step 13: The frequency goes to 13.2 kHz. This is 8 times faster, which is expected because
the sample clock was increased by 8 times.
Step 14: The dc voltage on the simulator is −3.46 V. The measured voltage on the PAM
(using a DMM) is −3.55 V.
The measured voltage in the PAM is after the output buffer. Small variations in
component values can affect the gain of the buffer.
Questions: Part 3
1. There are 152 steps read at 250 kHz. This implies 4 μs per step.
T = (152 steps)(4 μs per step) = 608 μs, which is a frequency of 1.64 kHz.
2.
Examples are CD and MP3 players.
3.
The clock determines how fast the lookup table is sampled, which determines how
fast values are presented to the DAC.
270
Experiment 17 Voltage Regulators
Part 1: The Series Regulator
Table 17-1
Table 17-2
Listed
Value
2.7 kΩ
330 Ω
Measured
Value
R3
1.0 kΩ
1.00 kΩ
R4*
1 kΩ
1.00 kΩ
R5
1.2 kΩ
1.19 kΩ
RL
330 Ω
328 Ω
Resistor
R1
R2
Parameter
VOUT(min)
2.69 kΩ
VOUT(max)
329 Ω
Computed
Value
Measured
Value
8.30 V
8.54 V
15.3 V
15.09 V
*potentiometer; record maximum resistance
Table 17-4
Table 17-3
VIN
+18.0 V
VOUT
(measured)
+10.0 V
Step
Quantity
6 Line regulation
+17.0 V
9.94 V
VNL
+16.0 V
9.88 V
+15.0 V
9.82 V
+14.0 V
9.75 V
7
8
VFL
Load regulation
Measured
Value
0.63%
+10.0 V
9.96 V
0.4%
Vripple(in)
700 mVpp
Vripple(out)
45 mVpp
Questions: Part 1
1.
Increase the size of C1. (A second 1000 µF capacitor in parallel with C1 halved the
ripple).
2.
The power delivered to the load is 0.91 W. The efficiency is 45%.
Part 2: IC Regulators
Step 1: The regulated output had approximately 1 mV of ripple. The ripple waveform
showed only the tip of the positive waveform. Noise level was less than 1 mV.
Although a larger filter capacitor was specified here, the ripple is significantly smaller
than the unregulated supply in Step 9 of Experiment 2.
Step 2: The LED brightness was the same for all input voltages because of the current
source as indicated by the data in Table 17-5.
Step 3: The current was nearly identical to the current in the single LED as indicated by the
data in Table 17-6.
271
Table 17-5 Data for one LED
Table 17-6 Data for two LEDs
Voltage
Current
Voltage
Current
10 V
18.61 mA
10 V
18.61 mA
12 V
18.65 mA
12 V
18.61 mA
14 V
18.67 mA
14 V
18.61 mA
16 V
18.69 mA
16 V
18.61 mA
Questions: Part 2
1.
There is a small additional current from the common (“ground”) lead on the regulator
that adds to the current sourced by R1.
2.
Change R1 to 680 Ω (nearest standard value to 666 Ω).
Experiment 18 Communications Circuits
Part 1: The IF Amplifier
Table 18-1
Resistor
R1
R2
R3
RE1
RE2
RL
Table 18-3
AC
Parameter
Vb
Vc
Av
Vout(tot)
Listed
Value
56 kΩ
Measured
Value
56.1 kΩ
4.7 kΩ
10 kΩ
220 Ω
470 Ω
10 kΩ
4.62 kΩ
Table 18-2
DC
Parameter
VB
Computed
Value
0.697 V
Measured
Value
0.697 V
VE
0.0 V*
0.0999 V
10.1 kΩ
IE
0 mA
222 Ω
VC
9.00 V
8.99 V
VCE
9.00 V
8.99 V
*assuming VE cannot be negative
467 Ω
10.1 kΩ
Table 18-4
AC
Parameter
fc
Measured
Value
300 mVpp*
8.0 mVpp**
26.7
1.2 mVpp
* Signal gen set to approx 500 mVpp
** Different transformers were tested. Results varied more
than usual. Typical results shown.
Measured
Value*
455.8 kHz
fcu
461.4 kHz
fcl
444.6 kHz
BW
16.8 kHz
Q
27.1
*frequency counter suggested for frequency measurements
Questions: Part 1
1. Adding a second probe doubles the loading effect. If probe loading is not a
problem, no effect will be observed when the second probe is connected to the
circuit.
2.
The resonant circuit has highest reactance at resonance; thus, amplifier gain is also
highest here.
272
4.
The voltage across Rin is 3X larger than that dropped across R3, hence
Rin = 3 x 10 kΩ = 30 kΩ.
5.
Answers (a) and (e) could account for 0 V on the collector.
Part 2: The Phase-Locked Loop
Table 18-5
Listed
Value
2.0 kΩ
Measured
Value
1.99 kΩ
R2
1.0 kΩ
1.00 kΩ
R3
1.0 kΩ
1.01 kΩ
C1
2200 pF
2200 pF
C2
0.1 μF
0.1 µF
C3
1000 pF
1000 pF
Component
R1*
* plus 10 kΩ potentiometer in circuit
Table 18-6
Step
2 and 3
Quantity
free-running frequency, f0(min)
Computed
Value
11.54 kHz
Measured
Value
11.65 kHz
free-running frequency, f0(max)
68.5 kHz
68.3 kHz
4
lower capture frequency
5
upper capture frequency
Range =
± 1.9 kHz
lower lock frequency
6
8
Range =
23.8 kHz
28.1 kHz
17.5 kHz
± 8.3 kHz
34.6 kHz
frequency in (multiplier)
2.5 kHz
2.5 kHz
frequency out (multiplier)
25.0 kHz
25.0 kHz
upper lock frequency
Step 7: Pin 7 shows a capacitor charge and discharge waveform that goes between 8
and 10 V. The frequency is twice the input frequency.
Questions: Part 2
1. A decrease in either R1 or C1 by a factor of ten will multiply the free-running
frequency by ten.
2.
The transistor limits the input signal to the logic circuit between 0 and 5 V.
3.
The capture range is the range of frequencies over which the VCO can establish
synchronization. After a signal is captured, the VCO can track it over the lock range.
4.
It must be multiplied by two.
5.
(a) ±12 V
(b) The power supply voltage is inversely proportional to the lock range.
273
Test Item File
Electronic Devices
Eighth Edition
Thomas L. Floyd
Contents
275
Chapter 1
Introduction to Semiconductors............................................................. 277
Chapter 2
Diode Applications ................................................................................ 282
Chapter 3
Special‐Purpose Diodes ......................................................................... 291
Chapter 4
Bipolar Junction Transistors .................................................................. 299
Chapter 5
Transistor Bias Circuits.......................................................................... 308
Chapter 6
BJT Amplifiers....................................................................................... 316
Chapter 7
Power Amplifiers ................................................................................... 325
Chapter 8
Field‐Effect Transistors (FETs) ............................................................. 333
Chapter 9
FET Amplifiers and Switching Circuits ................................................ 341
Chapter 10
Amplifier Frequency Response.............................................................. 349
Chapter 11
Thyristors ............................................................................................... 356
Chapter 12
The Operational Amplifier..................................................................... 363
Chapter 13
Basic Op‐Amp Circuits.......................................................................... 371
Chapter 14
Special‐Purpose Op‐Amp Circuits......................................................... 379
Chapter 15
Active Filters.......................................................................................... 386
Chapter 16
Oscillators .............................................................................................. 393
Chapter 17
Voltage Regulators................................................................................. 401
Chapter 18
Communications .................................................................................... 411
Answer Key ............. .....................................................................................................415
276
Chapterȱ1 Introduction to Semiconductors
1) Aȱmoleculeȱisȱtheȱsmallestȱparticleȱofȱanȱelementȱthatȱretainsȱtheȱcharacteristicsȱofȱthatȱelement.
Diff:ȱ2
2) Aȱconductingȱgermaniumȱdiodeȱhasȱaȱpotentialȱofȱaboutȱ0.7ȱVȱacrossȱit.
Diff:ȱ2
3) Siliconȱdopedȱwithȱimpuritiesȱisȱusedȱinȱtheȱmanufactureȱofȱsemiconductorȱdevices.
Diff:ȱ2
4) Reverseȱbiasȱpermitsȱfullȱcurrentȱthroughȱaȱpnȱjunction.
Diff:ȱ2
5) SemiconductorȱmaterialȱofȱtheȱpȬtypeȱhasȱfewȱfreeȱelectrons.
Diff:ȱ2
6) Theȱapplicationȱofȱaȱdcȱvoltageȱtoȱcontrolȱdiodeȱconductionȱisȱcalled
A) oscillation.
B) amplification.
C) bias.
D) aȱpnȱjunction.
Diff:ȱ2
7) Holesȱareȱtheȱmajorityȱcarriersȱin
A) anȱnȬtypeȱsemiconductor.
B) aȱpȬtypeȱsemiconductor.
C) aȱpnȱjunctionȱsemiconductor.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
8) Semiconductorȱmaterialsȱareȱthoseȱwith
A) conductiveȱpropertiesȱthatȱareȱinȱbetweenȱthoseȱofȱaȱconductorȱorȱanȱinsulator.
B) conductiveȱpropertiesȱthatȱareȱveryȱgood.
C) noȱconductiveȱproperties.
D) EitherȱAȱorȱB.
Diff:ȱ2
9) Thereȱisȱcurrentȱthroughȱtheȱjunctionȱofȱaȱforward-biasedȱdiode.ȱȱThisȱcurrentȱisȱcalled
A) forwardȱcurrent.
B) reverseȱbreakdownȱcurrent.
C) avalancheȱcurrent.
D) reverseȱleakageȱcurrent.
Diff:ȱ2
277
10) Aȱtypicalȱvalueȱofȱreverseȱbreakdownȱvoltageȱinȱaȱdiodeȱis
A) 0ȱV.
B) 0.3ȱV.
C) 0.7ȱV.
D) 50ȱVȱorȱlarger.
Diff:ȱ2
11) Theȱsmallȱcurrentȱwhenȱaȱdiodeȱisȱreverse-biasedȱisȱcalled
A) forward-biasȱcurrent.
B) reverseȱbreakdownȱcurrent.
C) conventionalȱcurrent.
D) reverse-leakageȱcurrent.
Diff:ȱ2
12) Asȱtheȱforwardȱcurrentȱthroughȱaȱforward-biasedȱdiodeȱdecreases,ȱtheȱvoltageȱacrossȱthe
diode
A) increases.
B) immediatelyȱdropsȱtoȱ0ȱV.
C) isȱrelativelyȱconstant.
D) increasesȱandȱthenȱdecreases.
Diff:ȱ2
13) WhichȱstatementȱbestȱdescribesȱaȱpȬtypeȱsemiconductor?
A) Siliconȱwithȱpentavalentȱimpurity.
B) Siliconȱwithȱtrivalentȱimpurityȱatomsȱadded.
C) Aȱmaterialȱwhereȱholesȱareȱtheȱminorityȱcarriers.
D) Pureȱintrinsicȱsilicon.
Diff:ȱ3
14) Theȱresistanceȱofȱaȱforward-biasedȱdiodeȱis
A) perfectlyȱlinear.
B) infinite.
C) minimalȱbelowȱtheȱkneeȱofȱtheȱcurve.
D) minimalȱaboveȱtheȱkneeȱofȱtheȱcurve.
Diff:ȱ2
15) Aȱsiliconȱdiodeȱmeasuresȱaȱhighȱvalueȱofȱresistanceȱwithȱtheȱmeterȱleadsȱinȱbothȱpositions.ȱȱThe
trouble,ȱifȱany,ȱis
A) theȱdiodeȱisȱopen.
B) theȱdiodeȱisȱshortedȱtoȱground.
C) theȱdiodeȱisȱinternallyȱshorted.
D) nothing;ȱtheȱdiodeȱisȱgood.
Diff:ȱ2
16) Theȱforwardȱvoltageȱacrossȱaȱconductingȱsiliconȱdiodeȱisȱabout
A) 1.3ȱV.
B) 0.3ȱV.
C) 0.7ȱV.
Diff:ȱ2
278
D) -0.3ȱV.
17) Anȱunknownȱtypeȱofȱdiodeȱisȱinȱaȱcircuit.ȱȱTheȱforwardȱvoltageȱmeasuredȱacrossȱitȱisȱfoundȱto
beȱ0.3ȱV.ȱȱTheȱdiodeȱis
A) aȱsiliconȱdiode.
B) aȱgermaniumȱdiode.
C) aȱtransistor.
D) shorted.
Diff:ȱ2
18) Aȱreverse-biasedȱdiodeȱhasȱtheȱ________ȱconnectedȱtoȱtheȱpositiveȱsideȱofȱtheȱsource,ȱandȱthe
________ȱconnectedȱtowardsȱtheȱnegativeȱsideȱofȱtheȱsource.
A) cathode,ȱanode
B) cathode,ȱbase
C) base,ȱanode
D) anode,ȱcathode
Diff:ȱ3
19) TheȱboundaryȱbetweenȱpȬtypeȱmaterialȱandȱn-typeȱmaterialȱinȱaȱdiodeȱisȱcalled
A) theȱcathode.
B) theȱcontrolȱgrid.
C) theȱpnȱjunction.
D) theȱanode.
Diff:ȱ2
20) Theȱatomicȱnumberȱofȱanȱatomȱrefersȱtoȱthe
A) numberȱofȱprotonsȱinȱtheȱnucleus.
B) numberȱofȱelectronsȱinȱaȱchargedȱatom.
C) netȱelectricalȱchargeȱofȱtheȱatom.
D) numberȱofȱneutronsȱinȱtheȱnucleus.
Diff:ȱ1
21) Electronsȱorbitingȱtheȱnucleusȱofȱanȱatomȱareȱgroupedȱintoȱenergyȱbandsȱknownȱas
A) slots.
B) tracks.
C) shells.
D) tunnels.
Diff:ȱ2
22) Valenceȱelectronsȱhaveȱ________ȱenergyȱlevelȱofȱallȱtheȱelectronsȱinȱorbitȱaroundȱtheȱnucleusȱof
aȱgivenȱatom.
A) theȱlowest
B) theȱhighest
C) theȱsame
D) Noneȱofȱtheȱabove.
Diff:ȱ2
23) Theȱdifferenceȱinȱenergyȱlevelsȱthatȱexistsȱbetweenȱtheȱvalenceȱbandȱandȱtheȱconductionȱband
isȱcalled
A) covalentȱgap.
B) semiconductorȱregion.
C) sparkȱgap.
D) energyȱgap.
Diff:ȱ3
279
24) Theȱvalenceȱelectronȱofȱaȱcopperȱatomȱexperiencesȱwhatȱkindȱofȱattractionȱtowardȱtheȱnucleus?
A) None
B) Weak
C) Strong
D) Impossibleȱtoȱsay
Diff:ȱ2
25) Whatȱmustȱbeȱusedȱinȱseriesȱwithȱaȱforward-biasedȱdiodeȱtoȱpreventȱdamageȱdueȱtoȱexcessive
current?
A) Ammeter
B) Resistor
C) NCȱswitch
D) Nothingȱisȱrequired
Diff:ȱ2
26) Reverseȱbiasȱisȱaȱconditionȱthatȱessentiallyȱ________ȱcurrentȱthroughȱtheȱdiode.
A) prevents
B) allows
C) increases
D) amplifies
Diff:ȱ2
27) Theȱkneeȱvoltageȱofȱaȱdiodeȱisȱapproximatelyȱequalȱtoȱthe
A) appliedȱvoltage.
B) barrierȱpotential.
C) breakdownȱvoltage.
D) reverseȱvoltage.
Diff:ȱ2
28) Aȱnonconductingȱdiodeȱisȱ________ȱbiased.
A) forward
B) inverse
C) poorly
D) reverse
C) 0.7ȱV.
D) 0.79ȱV.
Diff:ȱ2
29) Onȱdiodeȱcheck,ȱaȱshortedȱdiodeȱwillȱmeasure
A) 0ȱV.
B) 0.3ȱV.
Diff:ȱ2
30) Howȱmuchȱforwardȱdiodeȱvoltageȱisȱthereȱwithȱtheȱideal -diodeȱapproximation?
A) 0ȱV
B) 0.7ȱV
C) Moreȱthanȱ0.7ȱV
D) 1ȱV
Diff:ȱ1
31) AȱDMMȱmeasuresȱ0.13ơ̇̄ȱinȱbothȱdirectionsȱwhenȱtestingȱaȱdiode.ȱTheȱdiodeȱis
A) constructedȱofȱSiȱandȱisȱgood.
B) open.
C) operatingȱnormally.
D) shorted.
Diff:ȱ3
280
32) Ifȱtheȱpositiveȱleadȱofȱanȱohmmeterȱisȱplacedȱonȱtheȱcathodeȱandȱtheȱnegativeȱleadȱisȱplacedȱon
theȱanode,ȱwhichȱofȱtheȱfollowingȱreadingsȱwouldȱindicateȱaȱdefectiveȱdiode?
A) 0ơ̇̄
B) Q ̛
C) 1ȱM̛
D) 400ȱk̛
Diff:ȱ3
33) Whatȱisȱtheȱmaximumȱnumberȱofȱelectronsȱthatȱcanȱexistȱinȱtheȱshellȱclosestȱtoȱtheȱnucleusȱof
anȱatom?
A) 1
B) 2
C) 4
D) 8
C) silicon.
D) copper.
Diff:ȱ2
34) Allȱofȱtheȱfollowingȱareȱsemiconductorsȱexcept
A) carbon.
B) germanium.
Diff:ȱ2
35) Aȱreverse-biasedȱsiliconȱdiodeȱisȱconnectedȱinȱseriesȱwithȱaȱ12ȱVȱsourceȱandȱaȱresistor.ȱThe
voltageȱacrossȱtheȱdiodeȱis
A) 0ȱV.
B) 0.3ȱV.
C) 0.7ȱV.
D) 12ȱV.
Diff:ȱ2
36) Aȱreverse-biasedȱsiliconȱdiodeȱisȱconnectedȱinȱseriesȱwithȱaȱ12ȱVȱsourceȱandȱaȱresistor.ȱThe
voltageȱacrossȱtheȱresistorȱis
A) 0ȱV.
B) 0.3ȱV.
C) 0.7ȱV.
D) 12ȱV.
Diff:ȱ2
37) Siliconȱandȱgermaniumȱcontainȱ________ȱvalenceȱelectrons.
A) one
B) two
C) four
D) eight
Diff:ȱ1
38) Germaniumȱhasȱlimitedȱuseȱinȱmodernȱelectronicsȱdueȱto
A) shortagesȱofȱrawȱmaterials.
B) higherȱforwardȱvoltageȱdropȱwhenȱcomparedȱtoȱSi.
C) highȱtemperatureȱinstability.
D) filamentȱwarm-upȱtime.
Diff:ȱ2
39) Aȱdiodeȱisȱoperatedȱinȱreverseȱbias.ȱAsȱtheȱreverseȱvoltageȱisȱdecreased,ȱtheȱdepletionȱregion
A) narrows.
B) hasȱaȱconstantȱwidth.
C) widens.
D) isȱnotȱrelatedȱtoȱreverseȱvoltage.
Diff:ȱ2
281
Chapterȱ2 DiodeȱApplications
1) Aȱdiodeȱconductsȱcurrentȱwhenȱforward-biasedȱandȱblocksȱcurrentȱwhenȱreverse-biased.
Diff:ȱ2
2) Theȱlargerȱtheȱrippleȱvoltage,ȱtheȱbetterȱtheȱfilter.
Diff:ȱ2
3) Clampingȱcircuitsȱuseȱcapacitorsȱandȱdiodesȱtoȱaddȱaȱdcȱlevelȱtoȱaȱwaveform.
Diff:ȱ2
4) Oneȱofȱtheȱadvantagesȱofȱusingȱtransformerȱcouplingȱinȱaȱhalf-waveȱrectifierȱisȱthatȱitȱallows
theȱacȱsourceȱtoȱbeȱdirectlyȱconnectedȱtoȱtheȱload.
Diff:ȱ2
5) TheȱPIVȱratingȱofȱaȱdiodeȱinȱaȱfull-waveȱbridgeȱrectifierȱisȱmoreȱthanȱthatȱrequiredȱforȱa
full-waveȱcenter-tappedȱconfiguration.
Diff:ȱ2
6) Theȱdiodeȱinȱaȱhalf-waveȱrectifierȱconductsȱforȱ________ȱofȱtheȱinputȱcycle.
A) 0°
B) 45°
C) 90°
D) 180°
Diff:ȱ2
7) Aȱfull-waveȱbridgeȱrectifierȱusesȱ________ȱdiode(s)ȱinȱaȱbridgeȱcircuit.
A) 1
B) 2
C) 3
D) 4
Diff:ȱ2
8) Aȱsiliconȱdiodeȱisȱconnectedȱinȱseriesȱwithȱaȱ10ȱk̛ resistorȱandȱaȱ12ȱVȱbattery.ȱȱIfȱtheȱcathodeȱof
theȱdiodeȱisȱconnectedȱtoȱtheȱpositiveȱterminalȱofȱtheȱbattery,ȱtheȱvoltageȱfromȱtheȱanodeȱtoȱthe
negativeȱterminalȱofȱtheȱbatteryȱis
A) 0ȱV.
B) 0.7ȱV.
C) 11.3ȱV.
Diff:ȱ3
282
D) 12ȱV.
9) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱvoltmeterȱacrossȱtheȱtransformerȱsecondaryȱreadsȱ0ȱV,ȱthe
probableȱtroubleȱisȱthat
A) oneȱofȱtheȱdiodesȱisȱopen.
B) theȱfilterȱcapacitorȱisȱopen.
C) theȱtransformerȱsecondaryȱisȱopen.
D) theȱinductorȱisȱopen.
E) Noȱtroubleȱexists;ȱeverythingȱisȱnormal.
Diff:ȱ3
10) Referȱtoȱtheȱfigureȱabove.ȱȱInȱservicingȱthisȱpowerȱsupply,ȱyouȱnoticeȱthatȱtheȱrippleȱvoltageȱis
higherȱthanȱnormalȱandȱthatȱtheȱrippleȱfrequencyȱhasȱchangedȱtoȱ60ȱHz.ȱȱTheȱprobableȱtrouble
isȱthat
A) theȱfilterȱcapacitorȱhasȱopened.
B) theȱinductorȱhasȱopened.
C) aȱdiodeȱhasȱshorted.
D) aȱdiodeȱhasȱopened.
Diff:ȱ3
11) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱoscilloscopeȱtraceȱindicatesȱtheȱoutputȱfrom
A) aȱhalf-waveȱfilteredȱrectifier.
B) aȱfull-waveȱrectifierȱwithȱnoȱfilterȱandȱanȱopenȱdiode.
C) aȱfull-waveȱfilteredȱrectifier.
D) aȱfull-waveȱfilteredȱrectifierȱwithȱanȱopenȱdiode.
Diff:ȱ3
283
12) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱtraceȱonȱthisȱoscilloscopeȱindicatesȱtheȱoutputȱfrom
A) aȱhalf-waveȱrectifierȱwithȱnoȱfilter.
B) aȱfull-waveȱrectifierȱwithȱnoȱfilter.
C) aȱfull-waveȱfilteredȱrectifier.
D) aȱfull-waveȱfilteredȱrectifierȱwithȱanȱopenȱdiode.
Diff:ȱ3
13) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱisȱtheȱoutputȱfrom
A) aȱhalf-waveȱrectifierȱwithȱnoȱfilter.
B) aȱfull-waveȱrectifierȱwithȱnoȱfilterȱandȱanȱopenȱdiode.
C) aȱfull-waveȱfilteredȱrectifier.
D) aȱfull-waveȱfilteredȱrectifierȱwithȱanȱopenȱdiode.
Diff:ȱ3
14) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱtraceȱshowsȱtheȱoutputȱfrom
A) aȱhalf-waveȱrectifierȱwithȱnoȱfilter.
B) aȱfull-waveȱrectifierȱwithȱnoȱfilterȱandȱanȱopenȱdiode.
C) aȱhalf-waveȱrectifierȱwithȱanȱopenȱdiode.
D) aȱfull-waveȱfilteredȱrectifierȱwithȱanȱopenȱdiode.
Diff:ȱ2
15) Referȱtoȱtheȱfigureȱabove.ȱȱTheseȱcircuitsȱareȱknownȱas
A) amplifiers.
B) clippers.
C) clampers.
Diff:ȱ2
284
D) rectifiers.
FigureȱI
FigureȱII
16) WhichȱofȱtheȱcircuitsȱinȱFigureȱIȱwillȱproduceȱtheȱsignalȱinȱFigureȱIIȱ(a)?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
17) WhichȱofȱtheȱcircuitsȱinȱFigureȱIȱwillȱproduceȱtheȱsignalȱinȱFigureȱIIȱ(b)?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
18) WhichȱofȱtheȱcircuitsȱinȱFigureȱIȱwillȱproduceȱtheȱsignalȱinȱFigureȱIIȱ(c)?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
19) WhichȱofȱtheȱcircuitsȱinȱFigureȱIȱwillȱproduceȱtheȱsignalȱinȱFigureȱIIȱ(d)?
A) (a)
B) (b)
C) (c)
Diff:ȱ2
285
D) (d)
20) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱThisȱrectifierȱarrangement
A) willȱproduceȱaȱpositiveȱoutputȱvoltage.
B) willȱproduceȱaȱnegativeȱoutputȱvoltage.
C) isȱincorrectlyȱconnected.
D) AȱorȱCȱabove.
Diff:ȱ2
21) Referȱtoȱ(d)ȱinȱtheȱfigureȱabove.ȱȱThisȱrectifierȱarrangement
A) willȱproduceȱaȱpositiveȱoutputȱvoltage.
B) willȱproduceȱaȱnegativeȱoutputȱvoltage.
C) isȱincorrectlyȱconnected.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
22) Aȱsiliconȱdiodeȱhasȱaȱvoltageȱtoȱgroundȱofȱ117ȱVȱfromȱtheȱanode.ȱȱTheȱvoltageȱtoȱgroundȱfrom
theȱcathodeȱisȱ117.7ȱV.ȱȱTheȱdiodeȱis
A) conducting.
B) shorted.
C) forward-biased.
D) reverse-biased.
Diff:ȱ2
286
23) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱprobableȱtrouble,ȱifȱany,ȱindicatedȱbyȱtheseȱvoltagesȱis
A) oneȱofȱtheȱdiodesȱisȱopen.
B) anȱopenȱtransformerȱprimary.
C) anȱopenȱtransformerȱsecondary.
D) theȱfilterȱcapacitorȱisȱopen.
E) theȱinductorȱisȱopen.
Diff:ȱ3
24) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱvoltmeterȱacrossȱtheȱtransformerȱsecondaryȱreadsȱ0ȱV,ȱthe
probableȱtrouble,ȱifȱany,ȱwouldȱbe
A) oneȱofȱtheȱdiodesȱisȱopen.
B) anȱopenȱtransformerȱprimary.
C) theȱinductorȱisȱopen.
D) theȱinductorȱisȱshorted.
Diff:ȱ3
25) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱoscilloscopeȱtraceȱindicatesȱtheȱoutputȱfromȱaȱfiltered
full-waveȱrectifierȱwithȱanȱopenȱdiode?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ3
26) Theȱrippleȱfrequencyȱofȱaȱbridgeȱrectifierȱis
A) theȱsameȱasȱtheȱinputȱfrequency.
B) doubleȱtheȱinputȱfrequency.
C) fourȱtimesȱtheȱinputȱfrequency.
D) one-halfȱtheȱinputȱfrequency.
Diff:ȱ2
287
27) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱcorrectȱdiodeȱarrangementȱtoȱsupplyȱaȱpositiveȱoutputȱvoltage
is
A) (a).
B) (b).
C) (c).
D) (d).
Diff:ȱ2
28) Withȱaȱhalf-waveȱrectifiedȱvoltageȱacrossȱaȱloadȱresistor,ȱloadȱcurrentȱexistsȱforȱwhatȱpartȱofȱa
cycle?
A) 0ȱdegrees
B) 90ȱdegrees
C) 180ȱdegrees
D) 360ȱdegrees
Diff:ȱ2
29) Whenȱaȱ60ȱHzȱsinusoidalȱsignalȱvoltageȱisȱappliedȱtoȱtheȱinputȱofȱaȱhalf -waveȱrectifier,ȱthe
outputȱfrequencyȱis
A) 120ȱHz.
B) 60ȱHz.
C) 30ȱHz.
D) 90ȱHz.
Diff:ȱ1
30) Theȱaverageȱvalueȱofȱtheȱhalf-waveȱrectifiedȱoutputȱvoltageȱisȱapproximatelyȱ________ȱofȱVp.
A) 31.8%
B) 63.6%
C) 70.7%
D) 100%
Diff:ȱ2
31) Usingȱaȱpracticalȱforward-biasedȱdiode,ȱifȱtheȱvoltageȱatȱtheȱanodeȱwereȱ10ȱV,ȱtheȱvoltageȱat
theȱcathodeȱwouldȱequal
A) 10ȱV.
B) 9.3ȱV.
C) 10.7ȱV.
D) 10.3ȱV.
Diff:ȱ3
32) Ifȱinputȱfrequencyȱisȱ60ȱHz,ȱtheȱoutputȱfrequencyȱofȱaȱbridgeȱrectifierȱis
A) 30ȱHz.
B) 60ȱHz.
C) 120ȱHz.
Diff:ȱ1
288
D) 240ȱHz.
33) Toȱreduceȱsurgeȱcurrent,ȱ________ȱshouldȱbeȱaddedȱtoȱaȱpowerȱsupplyȱcircuit.
A) additionalȱfilterȱcapacitance
B) aȱlargerȱfuse
C) aȱvaractorȱtuningȱcircuit
D) aȱsurge-limitingȱresistor
Diff:ȱ3
34) Theȱdcȱcurrentȱthroughȱeachȱdiodeȱinȱaȱbridgeȱrectifierȱequals
A) twiceȱtheȱdcȱloadȱcurrent.
B) halfȱtheȱdcȱloadȱcurrent.
C) theȱloadȱcurrent.
D) one-fourthȱtheȱdcȱloadȱcurrent.
Diff:ȱ3
35) Theȱpeakȱinverseȱvoltageȱacrossȱaȱnonconductingȱdiodeȱinȱanȱunfilteredȱbridgeȱrectifierȱequals
approximately
A) halfȱtheȱpeakȱsecondaryȱvoltage.
B) twiceȱtheȱpeakȱsecondaryȱvoltage.
C) theȱpeakȱvalueȱofȱtheȱsecondaryȱvoltage.
D) fourȱtimesȱtheȱpeakȱvalueȱofȱtheȱsecondaryȱvoltage.
Diff:ȱ3
36) Theȱidealȱdcȱoutputȱvoltageȱofȱaȱcapacitor-inputȱfilterȱequalsȱthe
A) rmsȱvalueȱofȱtheȱrectifiedȱvoltage.
B) peakȱvalueȱofȱtheȱrectifiedȱvoltage.
C) averageȱvalueȱofȱtheȱrectifiedȱvoltage.
D) peak-to-peakȱvalueȱofȱtheȱsecondaryȱvoltage.
Diff:ȱ3
37) Aȱfilteredȱfull-waveȱrectifierȱvoltageȱhasȱaȱsmallerȱrippleȱthanȱdoesȱaȱhalf-waveȱrectifier
voltageȱforȱtheȱsameȱloadȱresistanceȱandȱcapacitorȱvaluesȱbecause
A) ofȱtheȱshorterȱtimeȱbetweenȱpeaks.
B) ofȱtheȱlongerȱtimeȱbetweenȱpeaks.
C) theȱlargerȱtheȱripple,ȱtheȱbetterȱtheȱfilteringȱaction.
D) Noneȱofȱtheȱabove.
Diff:ȱ3
38) Asȱtheȱloadȱresistanceȱinȱaȱfilteredȱpowerȱsupplyȱvaries,ȱtheȱoutputȱvoltage
A) remainsȱconstant.
B) isȱunaffected.
C) varies.
D) doesȱnotȱchange.
Diff:ȱ1
289
39) Theȱvoltageȱregulationȱstageȱinȱaȱpowerȱsupply
A) isȱlocatedȱprecedingȱtheȱtransformerȇsȱprimary.
B) followsȱtheȱfilterȱstage.
C) isȱconnectedȱtoȱtheȱinputȱofȱtheȱrectifier(s).
D) isȱinsideȱtheȱtransformer.
Diff:ȱ2
40) Aȱvoltageȱregulatorȱcompensatesȱforȱchangesȱin
A) theȱinputȱvoltage.
B) temperature.
C) theȱloadȱconditions.
D) Allȱofȱtheȱabove.
Diff:ȱ2
41) Anotherȱnameȱforȱaȱdiodeȱlimiterȱis
A) bridger.
B) clipper.
C) clamper.
D) dcȱrestorer.
Diff:ȱ1
42) Aȱdiodeȱclamperȱwill
A) clipȱoffȱaȱportionȱofȱtheȱinputȱsignal.
B) eliminateȱtheȱpositiveȱorȱnegativeȱalternationȱofȱaȱsignal.
C) addȱanȱacȱvoltageȱtoȱaȱsignal.
D) addȱaȱdcȱvoltageȱtoȱaȱsignal.
Diff:ȱ3
43) Voltageȱmultipliersȱuseȱ________ȱactionȱtoȱincreaseȱpeakȱrectifiedȱvoltagesȱwithoutȱincreasing
theȱinputȱtransformerȱvoltageȱrating.
A) clipping
B) clamping
C) charging
D) cropping
Diff:ȱ3
44) Allȱofȱtheȱfollowingȱdiodeȱinformationȱisȱprovidedȱbyȱaȱmanufacturerȇsȱdataȱsheetȱexcept
A) frequencyȱresponse.
B) PIVȱratings.
C) mechanicalȱdata.
D) temperatureȱparameters.
Diff:ȱ4
290
Chapterȱ3 Special-PurposeȱDiodes
1) Theȱregulatingȱabilityȱofȱaȱzenerȱdiodeȱdependsȱuponȱitsȱabilityȱtoȱoperateȱinȱaȱbreakdown
condition.
Diff:ȱ2
2) Darkȱcurrentȱisȱtheȱamountȱofȱthermallyȱgeneratedȱforwardȱcurrentȱinȱaȱphotodiodeȱinȱthe
absenceȱofȱlight.
Diff:ȱ2
3) Aȱ________ȱdiodeȱmaintainsȱaȱconstantȱvoltageȱacrossȱitȱwhenȱoperatingȱinȱtheȱbreakdown
condition.
A) silicon
B) germanium
C) zener
D) Noneȱofȱtheȱabove.
Diff:ȱ2
4) Aȱtunnelȱdiodeȱhasȱ________ȱcharacteristic(s).
A) anȱextremelyȱwideȱdepletionȱregion
B) aȱnegativeȱresistance
C) aȱlinear
D) extremelyȱlightȱdoping
Diff:ȱ2
5) Typically,ȱtheȱmaximumȱV FȱforȱanȱLEDȱisȱbetween
A) 0ȱVȱandȱ0.7ȱV.
B) 1ȱVȱandȱ1.4ȱV.
C) 1.2ȱVȱandȱ3.2ȱV.
D) 3.2ȱVȱandȱ10ȱV.
Diff:ȱ2
6) AnȱOLEDȱproducesȱlightȱbyȱaȱprocessȱcalledȱ________.
A) Electrophosphorescence.
B) Organicȱlightȱemission.
C) Avalancheȱlightȱemission.
D) Photonicȱlightȱemission.
Diff:ȱ2
7) Whenȱaȱzenerȱdiodeȱisȱforward-biased,ȱit
A) operatesȱlikeȱaȱrectifierȱdiode.
B) exhibitsȱaȱvoltageȱdropȱofȱVZȱ+ȱ0.7ȱV.
C) conductsȱnoȱcurrent.
D) emitsȱvisibleȱlight.
Diff:ȱ2
291
8) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱV in increases,ȱV R will
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) Unableȱtoȱdetermine.
Diff:ȱ3
9) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱzenerȱshorts
A) VinȱwillȱbeȱequalȱtoȱVR.
B) VRL willȱbeȱequalȱtoȱzero.
C) thereȱisȱnoȱcurrentȱthroughȱRL.
D) Allȱofȱtheȱabove.
Diff:ȱ3
10) Referȱtoȱtheȱfigureȱabove.ȱȱMeasurementsȱshowȱthatȱV RL hasȱincreased.ȱȱWhichȱofȱthe
followingȱfaults,ȱifȱany,ȱcouldȱhaveȱcausedȱthisȱproblem?
A) Rȱopens.
B) Theȱzenerȱshorts.
C) Vinȱhasȱdecreased.
D) Theȱzenerȱopens.
Diff:ȱ3
11) Referȱtoȱtheȱfigureȱabove.ȱȱAsȱlongȱasȱtheȱzenerȱisȱinȱregulation
A) thereȱisȱnoȱcurrentȱthroughȱRL.
B) thereȱisȱnoȱcurrentȱthroughȱtheȱzener.
C) VRL ȱwillȱbeȱequalȱtoȱ0.7ȱV.
D) theȱcurrentȱ(IRL )ȱremainsȱconstant.
Diff:ȱ3
12) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱloadȱcurrentȱincreases,ȱIR willȱ________ȱandȱI Zȱwillȱ________.
A) remainȱtheȱsame,ȱincrease
B) decrease,ȱremainȱtheȱsame
C) increase,ȱremainȱtheȱsame
D) remainȱtheȱsame,ȱdecrease
Diff:ȱ3
13) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱV in decreases,ȱIR will
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) Unableȱtoȱdetermine.
Diff:ȱ2
292
14) Referȱtoȱtheȱfigureȱabove.ȱIfȱtheȱloadȱcurrentȱincreasesȱinȱtheȱzenerȱregulator
A) theȱseriesȱcurrentȱincreases.
B) theȱseriesȱcurrentȱremainsȱtheȱsame.
C) theȱzenerȱcurrentȱincreases.
D) BothȱBȱandȱCȱabove.
Diff:ȱ3
15) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱTheȱsymbolȱisȱfor
A) aȱzenerȱdiode.
B) anȱLED.
C) aȱSchottkyȱdiode.
D) aȱphotodiode.
E) aȱtunnelȱdiode.
Diff:ȱ2
16) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱTheȱsymbolȱisȱfor
A) aȱzenerȱdiode.
B) anȱLED.
C) aȱSchottkyȱdiode.
D) aȱphotodiode.
E) aȱtunnelȱdiode.
Diff:ȱ2
17) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱTheȱsymbolȱisȱfor
A) aȱzenerȱdiode.
B) anȱLED.
C) aȱSchottkyȱdiode.
D) aȱphotodiode.
E) aȱtunnelȱdiode.
Diff:ȱ2
293
18) Referȱtoȱ(d)ȱinȱtheȱfigureȱabove.ȱȱTheȱsymbolȱisȱfor
A) aȱzenerȱdiode.
B) anȱLED.
C) aȱSchottkyȱdiode.
D) aȱphotodiode.
E) aȱtunnelȱdiode.
Diff:ȱ2
19) Referȱtoȱ(e)ȱinȱtheȱfigureȱabove.ȱȱTheȱsymbolȱisȱfor
A) aȱzenerȱdiode.
B) anȱLED.
C) aȱSchottkyȱdiode.
D) aȱphotodiode.
E) aȱtunnelȱdiode.
Diff:ȱ2
20) Aȱvaractorȱisȱaȱdiodeȱthat
A) variesȱitsȱresistanceȱwithȱtemperature.
B) changesȱitsȱcapacitanceȱwithȱvoltage.
C) emitsȱlightȱwhenȱforward-biased.
D) switchesȱveryȱfast.
E) exhibitsȱanȱincreaseȱinȱreverseȱcurrentȱwithȱlightȱintensity.
Diff:ȱ2
21) AȱSchottkyȱdiodeȱisȱaȱdiodeȱthat
A) variesȱitsȱresistanceȱwithȱtemperature.
B) changesȱitsȱcapacitanceȱwithȱvoltage.
C) emitsȱlightȱwhenȱforward-biased.
D) switchesȱveryȱfast.
E) exhibitsȱanȱincreaseȱinȱreverseȱcurrentȱwithȱlightȱintensity.
Diff:ȱ2
294
22) Aȱphotodiodeȱisȱaȱdiodeȱthat
A) variesȱitsȱresistanceȱwithȱtemperature.
B) changesȱitsȱcapacitanceȱwithȱlightȱintensity.
C) emitsȱlightȱwhenȱforward-biased.
D) switchesȱveryȱfast.
E) exhibitsȱanȱincreaseȱinȱreverseȱcurrentȱwithȱlightȱintensity.
Diff:ȱ2
23) TheȱcorrectȱwayȱtoȱilluminateȱanȱLEDȱisȱto
A) placeȱtheȱLEDȱinȱreverseȱbiasȱdirectlyȱacrossȱaȱ5ȱVȱdcȱsupply.
B) placeȱtheȱLEDȱinȱforwardȱbiasȱdirectlyȱacrossȱaȱ5ȱVȱdcȱsupply.
C) placeȱtheȱLEDȱinȱseriesȱwithȱaȱresistorȱandȱaȱ5ȱVȱdcȱsupplyȱwithȱtheȱanodeȱtowardȱthe
positiveȱsideȱofȱtheȱsupply.
D) placeȱtheȱLEDȱinȱseriesȱwithȱaȱresisitorȱandȱaȱ5ȱVȱdcȱsupplyȱwithȱtheȱcathodeȱtowardȱthe
positiveȱsideȱofȱtheȱsupply.
Diff:ȱ3
24) Aȱdiodeȱwithȱaȱnegative-resistanceȱcharacteristicȱisȱneeded.ȱTheȱcorrectȱselectionȱwouldȱbeȱa
A) tunnelȱdiode.
B) Gunnȱdiode.
C) varactorȱdiode.
D) Schottkyȱdiode.
Diff:ȱ2
25) Aȱ6.2ȱVȱzenerȱisȱratedȱatȱ1ȱwatt.ȱȱTheȱmaximumȱsafeȱcurrentȱtheȱzenerȱcanȱcarryȱis
approximately
A) 1.61ȱA.
B) 161ȱmA.
C) 16.1ȱmA.
D) 1.61ȱmA.
Diff:ȱ2
26) AnȱLEDȱisȱforward-biased.ȱȱTheȱdiodeȱshouldȱbeȱon,ȱbutȱnoȱlightȱisȱshowing.ȱȱAȱpossible
problemȱmightȱbe
A) thatȱtheȱdiodeȱisȱopen.
B) thatȱtheȱseriesȱresistorȱisȱtooȱsmall.
C) none;ȱtheȱdiodeȱshouldȱbeȱoffȱifȱforward-biased.
D) thatȱtheȱpowerȱsupplyȱvoltageȱisȱtooȱhigh.
Diff:ȱ3
27) Theȱbestȱtypeȱofȱdiodeȱtoȱuseȱinȱaȱtuningȱcircuitȱis
A) anȱLED.
B) aȱSchottkyȱdiode.
C) aȱGunnȱdiode.
D) aȱvaractor.
Diff:ȱ2
295
28) Whatȱisȱtrueȱaboutȱtheȱbreakdownȱvoltageȱinȱaȱzenerȱdiode?
A) Itȱdecreasesȱwhenȱcurrentȱincreases.
B) Itȱdestroysȱtheȱdiode.
C) Itȱoccursȱonlyȱinȱtheȱforwardȱregion.
D) Itȱisȱapproximatelyȱconstant.
Diff:ȱ2
29) Twoȱtypesȱofȱreverseȱbreakdownȱinȱaȱzenerȱdiodeȱare
A) avalancheȱandȱzener.
B) avalancheȱandȱreverse.
C) avalancheȱandȱforward.
D) chargeȱandȱdischarge.
Diff:ȱ2
30) Forȱzenerȱdiodes,ȱtheȱtemperatureȱcoefficientȱis
A) alwaysȱpositive.
B) alwaysȱnegative.
C) negativeȱforȱbreakdownȱvoltagesȱlessȱthanȱ5ȱVȱandȱpositiveȱforȱbreakdownȱvoltages
greaterȱthanȱ6ȱV.
D) alwaysȱzero.
Diff:ȱ2
31) Dataȱsheetsȱforȱzenerȱdiodesȱusuallyȱspecifyȱtheȱzenerȱvoltageȱatȱaȱparticularȱtestȱcurrent
designated
A) IS.
B) IZK.
C) IZM.
D) IZT.
Diff:ȱ1
32) Whenȱtheȱsourceȱvoltageȱincreasesȱinȱaȱzenerȱregulator,ȱtheȱcurrentȱthatȱremainsȱapproximately
constantȱisȱthe
A) seriesȱcurrent.
B) zenerȱcurrent.
C) loadȱcurrent.
Diff:ȱ3
33) Ifȱtheȱloadȱresistanceȱdecreasesȱinȱaȱzenerȱregulator,ȱtheȱzenerȱcurrent
A) decreases.
B) staysȱtheȱsame.
C) increases.
D) equalsȱtheȱsourceȱvoltageȱdividedȱbyȱtheȱseriesȱresistance.
Diff:ȱ2
296
D) totalȱcurrent.
34) Ifȱtheȱloadȱresistanceȱdecreasesȱinȱaȱzenerȱregulator,ȱtheȱseriesȱcurrent
A) decreases.
B) staysȱtheȱsame.
C) increases.
D) equalsȱtheȱsourceȱvoltageȱdividedȱbyȱtheȱseriesȱresistance.
Diff:ȱ2
35) Theȱvaractorȱisȱusually
A) forward-biased.
B) reverse-biased.
C) unbiased.
D) operatedȱinȱtheȱbreakdownȱregion.
Diff:ȱ2
36) Theȱcapacitanceȱofȱaȱvaractorȱdiode
A) remainsȱconstantȱasȱtheȱbiasȱvoltageȱvaries.
B) decreasesȱasȱtheȱreverseȱbiasȱvoltageȱincreases.
C) increasesȱasȱtheȱreverseȱbiasȱvoltageȱincreases.
D) isȱusuallyȱ1000ȱΐFȱorȱmore.
Diff:ȱ3
37) Aȱphotodiodeȱisȱnormally
A) reverse-biased.
B) forward-biased.
C) notȱbiased.
D) usedȱtoȱregulateȱvoltage.
Diff:ȱ2
38) Whenȱtheȱlightȱincreases,ȱtheȱreverseȱminorityȱcarrierȱcurrentȱinȱaȱphotodiode
A) decreases.
B) increases.
C) isȱunaffected.
D) reversesȱdirection.
Diff:ȱ1
39) LEDȱcolorȱisȱdeterminedȱby
A) theȱappliedȱLEDȱvoltage.
B) theȱimpuritiesȱaddedȱduringȱdopingȱtoȱcontrolȱwavelength.
C) theȱLEDȱcurrent.
D) theȱmaterialȱusedȱforȱtheȱincandescentȱfilament.
Diff:ȱ2
297
40) Toȱdisplayȱtheȱdigitȱ8ȱinȱaȱseven-segmentȱindicator
A) onlyȱCȱmustȱbeȱlighted.
B) Gȱmustȱbeȱoff.
C) onlyȱFȱmustȱbeȱon.
D) allȱsegmentsȱmustȱbeȱon.
Diff:ȱ2
41) Modernȱtrafficȱsignalsȱandȱlargeȱvideoȱscreensȱareȱimplementedȱwith
A) PINȱdiodes.
B) infraredȱphotodiodes.
C) highȱintensityȱLEDȱarrays.
D) hotȱfilamentȱbulbs.
Diff:ȱ2
42) AȱSchottkyȱdiode
A) hasȱaȱforwardȱvoltageȱdropȱofȱaboutȱ2ȱV.
B) hasȱnoȱlimitȱonȱmaximumȱcurrent.
C) hasȱaȱmetal-to-semiconductorȱjunction.
D) cannotȱoperateȱproperlyȱatȱhighȱfrequencies.
Diff:ȱ2
43) TheȱPINȱdiode,ȱwhenȱreverse-biased,ȱactsȱlikeȱaȱnearlyȱconstant
A) resistance.
B) capacitance.
C) voltageȱsource.
D) currentȱsource.
Diff:ȱ3
44) Whichȱofȱtheȱfollowingȱhasȱaȱnegative-resistanceȱregion?
A) Tunnelȱdiode
B) Rectifierȱdiode
C) Schottkyȱdiode
D) LED
Diff:ȱ2
45) TheȱradiationȱpatternȱforȱanȱLED
A) showsȱhowȱdirectionalȱtheȱlightȱis.
B) showsȱtheȱcurrentȱvs.ȱvoltageȱcurveȱofȱtheȱLED.
C) visuallyȱshowsȱtheȱcolorȱofȱtheȱlight.
D) showsȱtheȱwavelengthȱofȱtheȱlight.
Diff:ȱ3
46) Allȱofȱtheȱfollowingȱareȱcharacteristicsȱofȱaȱlaserȱdiodeȱexcept
A) emitsȱmonochromaticȱlight.
B) emitsȱincoherentȱlight.
C) emitsȱlightȱofȱaȱsingleȱcolor.
D) containsȱaȱpnȱjunction.
Diff:ȱ3
298
Chapterȱ4 BipolarȱJunctionȱTransistorsȱ
1) BJTȱtransistorsȱhaveȱtwoȱpnȱjunctions.
Diff:ȱ2
2) AȱBJTȱtransistorȱhasȱtheȱbase-emitterȱjunctionȱreverse-biasedȱforȱproperȱoperation.
Diff:ȱ2
3) TheȱratioȱI E/I CȱisȱΆ dc.
Diff:ȱ2
4) ProperȱoperationȱofȱaȱBJTȱrequiresȱthatȱtheȱbase-collectorȱjunctionȱshouldȱbeȱreverse-biased.
Diff:ȱ2
5) TheȱformulaȱforȱICȱisȱICȱ=ȱIEȱ- IB.
Diff:ȱ2
6) Whenȱaȱtransistorȱisȱcheckedȱout-of-circuit,ȱaȱveryȱlowȱresistanceȱreadingȱshouldȱbeȱobtained
betweenȱtheȱCȱandȱEȱleadsȱofȱaȱgoodȱtransistor.
Diff:ȱ2
7) Phototransistorsȱcomeȱinȱbothȱtwoȱandȱthreeȱterminalȱconfigurations.
Diff:ȱ3
8) AȱBJTȱhasȱanȱI B ofȱ75ȱΐAȱandȱaȱΆ dc ofȱ100.ȱȱTheȱvalueȱofȱI C is
A) 175ȱΐA.
B) 75ȱmA.
C) 10ȱmA.
D) 7.5ȱmA.
Diff:ȱ2
9) AȱcertainȱtransistorȱhasȱanȱI Cȱ= 12ȱmAȱandȱanȱI B = 125ȱΐA.ȱȱΆ dc is
A) 150.
B) 15.
C) 96.
D) 12.
Diff:ȱ2
10) NormalȱoperationȱofȱanȱNPNȱBJTȱrequiresȱtheȱbaseȱtoȱbeȱ________ȱwithȱrespectȱtoȱtheȱemitter,
andȱ________ȱwithȱrespectȱtoȱtheȱcollector.
A) positive,ȱnegative
B) positive,ȱpositive
C) negative,ȱpositive
D) negative,ȱnegative
Diff:ȱ2
299
11) Aȱtransistorȱamplifierȱhasȱanȱinputȱvoltageȱofȱ67ȱmVȱandȱanȱoutputȱvoltageȱofȱ2..48ȱV.ȱȱThe
voltageȱgainȱis
A) 67.
B) 37.
C) 27.
D) 17.
Diff:ȱ2
12) Aȱ22ȱmVȱsignalȱisȱappliedȱtoȱtheȱbaseȱofȱaȱproperlyȱbiasedȱtransistorȱthatȱhasȱanȱ rȇeȱ=ȱ7ơ̇̄ and
anȱRCȱ=ȱ1.2ȱk̛.ȱȱTheȱoutputȱvoltageȱatȱtheȱcollectorȱis
A) 22ȱmV.
B) 17.1ȱV.
C) 7ȱV.
D) 3.77ȱV.
Diff:ȱ2
13) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱcircuitȱisȱoperating
A) inȱcutoff.
B) inȱsaturation.
C) inȱtheȱactiveȱregion.
D) incorrectlyȱbecauseȱtheȱbiasȱvoltagesȱareȱwrong.
Diff:ȱ3
14) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱvalueȱofȱIB is
A) 8.6ȱmA.
B) 860ȱΐA.
C) 1ȱmA.
D) 0.7ȱΐA.
Diff:ȱ2
15) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱvalueȱofȱV BB wereȱincreasedȱtoȱ10ȱV,ȱtheȱtransistorȱwouldȱbe
operatingȱin
A) cutoff.
B) saturation.
C) theȱactiveȱregion.
D) Cannotȱbeȱdetermined.
Diff:ȱ3
16) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱthisȱtransistorȱisȱoperatingȱinȱsaturation,ȱtheȱvalueȱofȱI C(sat) is
A) 9.4ȱmA.
B) 4.26ȱmA.
C) 28.6ȱmA.
Diff:ȱ3
300
D) 42.6ȱmA.
17) Referȱtoȱtheȱfigureȱabove.ȱȱAssumeȱthatȱthisȱcircuitȱisȱoperatingȱinȱcutoff.ȱTheȱmeasurement,ȱif
any,ȱthatȱwouldȱconfirmȱthisȱassumptionȱis
A) VBEȱ=ȱ0.7ȱV.
B) VCEȱ=ȱ8ȱV.
C) VCEȱ=ȱ20ȱV.
D) VCC ȱ=ȱ20ȱV.
E) Noneȱofȱtheȱabove.
Diff:ȱ3
18) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱvalueȱofȱIC atȱcutoffȱis
A) 0ȱmA.
B) 2.13ȱmA.
C) 10.65ȱΐA.
D) 10ȱmA.
Diff:ȱ2
19) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱvalueȱofȱtheȱcollectorȱresistorȱisȱincreasedȱtoȱ6.8ȱk ̛,ȱtheȱnew
valueȱof
IC(sat)ȱis
A) 2.13ȱmA.
B) 0.68ȱmA.
C) 1.47ȱmA.
Diff:ȱ2
301
D) 0ȱmA.
20) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱcollectorȱresistorȱvalueȱisȱchangedȱtoȱ4.7ȱk̛ȱandȱΆ dcȱ=ȱ200,
IC(sat)ȱwould
be
A) 4.26ȱmA.
B) 8ȱmA.
C) 4.26ȱΐA.
D) 8.426ȱmA.
Diff:ȱ2
21) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱmeasuredȱvoltageȱfromȱtheȱcollectorȱtoȱgroundȱwereȱ0ȱV,ȱthe
transistorȱisȱoperatingȱin
A) saturation.
B) cutoff.
C) theȱactiveȱregion.
D) Notȱenoughȱdataȱtoȱdetermine.
Diff:ȱ2
22) Referȱtoȱtheȱfigureȱabove.ȱThisȱcircuitȱisȱsaturated.ȱToȱgetȱtheȱcircuitȱtoȱoperateȱcloseȱtoȱits
linearȱrange
A) RBȱshouldȱbeȱdecreased.
B) RC shouldȱbeȱdecreased.
C) Vinȱshouldȱbeȱincreased.
D) RB shouldȱbeȱincreased.
Diff:ȱ3
23) Aȱ35ȱmVȱsignalȱisȱappliedȱtoȱtheȱbaseȱofȱaȱproperlyȱbiasedȱtransistorȱwithȱanȱrȇeȱ=ȱ8ơ̇̄ȱandȱRC =
1ȱk̛.ȱȱTheȱoutputȱsignalȱvoltageȱatȱtheȱcollectorȱis
A) 3.5ȱV.
B) 28.57ȱV.
C) 4.375ȱV.
Diff:ȱ2
302
D) 4.375ȱmV.
24) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱvalueȱofȱVCE is
A) 9.9ȱV.
B) 9.2ȱV.
C) 0.7ȱV.
D) 19.3ȱV.
Diff:ȱ2
25) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱminimumȱvalueȱofȱI B thatȱwillȱproduceȱsaturationȱis
A) 0.25ȱmA.
B) 5.325ȱΐA.
C) 1.064ȱΐA
Diff:ȱ2
303
D) 10.64ȱΐA
26) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱvoltageȱVCE wasȱmeasuredȱandȱfoundȱtoȱbeȱ20ȱV.ȱȱThe
transistorȱis
operatingȱin
A) saturation.
B) cutoff.
C) theȱactiveȱregion.
D) Notȱenoughȱdataȱtoȱdetermine.
Diff:ȱ2
27) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱV CE isȱmeasuredȱandȱisȱequalȱtoȱnearlyȱzero,ȱtheȱtransistorȱis
operatingȱin
A) cutoff.
B) theȱactiveȱregion.
C) saturation.
D) Cannotȱbeȱdetermined.
Diff:ȱ3
28) InȱanȱNPNȱtransistor,ȱtheȱmajorityȱcarriersȱinȱtheȱbaseȱare
A) freeȱelectrons.
B) holes.
C) neither.
D) both.
Diff:ȱ1
29) TheȱbaseȱofȱanȱNPNȱtransistorȱisȱthinȱand
A) heavilyȱdoped.
B) lightlyȱdoped.
C) metallic.
D) dopedȱbyȱaȱpentavalentȱmaterial.
Diff:ȱ2
30) Inȱaȱtransistor,ȱtheȱrelationȱofȱtheȱthreeȱtransistorȱcurrentsȱis
A) ICȱ=ȱIEȱ+ȱVC/RC.
B) IC = IB - 2IE.
C) IEȱ=ȱICȱ+ȱIB.
D) IC = IE + IB.
Diff:ȱ2
30
304
31) AȱtransistorȱhasȱaȱΆ DCȱofȱ250ȱandȱaȱbaseȱcurrent,ȱI B,ȱofȱ20ȱΐA.ȱȱTheȱcollectorȱcurrent,ȱIC,ȱequals
A) 500ȱΐA.
B) 5ȱmA.
C) 50ȱmA.
D) 5ȱA.
Diff:ȱ2
32) Inȱaȱbipolarȱjunctionȱtransistor,ȱcollectorȱcurrentȱisȱcontrolledȱby
A) collectorȱvoltage.
B) baseȱcurrent.
C) collectorȱresistance.
D) Allȱofȱtheȱabove.
Diff:ȱ2
33) MostȱofȱtheȱelectronsȱinȱtheȱbaseȱofȱanȱNPNȱtransistorȱflow
A) outȱofȱtheȱbaseȱlead.
B) intoȱtheȱcollector.
C) intoȱtheȱemitter.
D) intoȱtheȱbaseȱsupply.
Diff:ȱ2
34) Whenȱaȱtransistorȱisȱoperatedȱinȱtheȱactiveȱregion,ȱchangesȱinȱtheȱcollectorȱsupplyȱvoltageȱV CC
A) produceȱchangesȱinȱcollectorȱcurrent.
B) produceȱchangesȱinȱbaseȱvoltage.
C) haveȱlittleȱorȱnoȱeffectȱonȱcollectorȱcurrent.
D) produceȱchangesȱinȱemitterȱvoltage.
Diff:ȱ2
35) Aȱbipolarȱjunctionȱtransistorȱhasȱ________ȱregionsȱofȱoperation.
A) 1
B) 2
C) 3
D) 4
Diff:ȱ2
36) Theȱregionȱinȱaȱtransistorȱthatȱhasȱtoȱdissipateȱtheȱmostȱheatȱisȱthe
A) emitter.
B) base.
C) collector.
D) anode.
C) hj-fj.
D) Ά ac.
Diff:ȱ2
37) TheȱsymbolȱhFEȱisȱtheȱsameȱas
A) Ά DC.
B) ΅DC.
Diff:ȱ2
38) VCEȱapproximatelyȱequalsȱ________ȱwhenȱaȱtransistorȱswitchȱisȱinȱsaturation.
A) VC
B) VB
C) 0.2ȱV
Diff:ȱ2
305
D) 0.7ȱV
39) Whenȱaȱtransistorȱswitchȱisȱon,ȱtheȱcollectorȱcurrentȱisȱlimitedȱby
A) theȱbaseȱcurrent.
B) theȱcollectorȱresistance.
C) theȱbaseȱvoltage.
D) theȱbaseȱresistance.
Diff:ȱ2
40) Theȱsignalȱoutputȱvoltageȱ(V out)ȱisȱaȱfunctionȱofȱthe
A) currentȱfromȱbaseȱtoȱcollector.
B) voltageȱdropȱfromȱbaseȱtoȱcollector.
C) powerȱbeingȱdissipatedȱbyȱtheȱbaseȱsupplyȱvoltage.
D) changingȱcollectorȱcurrentȱ(I C)ȱthroughȱtheȱcollectorȱresistorȱR C.
Diff:ȱ2
41) Theȱsignalȱvoltageȱgainȱofȱanȱamplifier,ȱAV,ȱisȱdefinedȱas
Vout
.
A) AVȱ=ȱ
Vin
B) AVȱ=ȱȱIBȱxȱRB.
C) AVȱ=ȱȱȱ
D) AVȱ=ȱ
rȇe
.
RC
Rc
.
ȱRL
Diff:ȱ2
42) Whenȱtransistorsȱareȱusedȱinȱdigitalȱcircuitsȱtheyȱusuallyȱoperateȱinȱthe
A) activeȱregion.
B) breakdownȱregion.
C) saturationȱandȱcutoffȱregions.
D) linearȱregion.
Diff:ȱ1
43) Besidesȱoperatingȱasȱanȱamplifier,ȱtheȱBJTȱisȱoftenȱappliedȱasȱa
A) variableȱinductor.
B) switch.
C) voltageȱcontrolledȱcapacitance.
D) varactor.
Diff:ȱ2
306
44) Anȱopenȱbaseȱresistorȱ(RB)ȱinȱaȱtransistorȱswitchȱwillȱresultȱinȱthe
A) transistorȱalwaysȱbeingȱON.
B) transistorȱalwaysȱbeingȱOFF.
C) transistorȱoperatingȱinȱtheȱactiveȱregion.
D) transistorȱbeingȱinstantlyȱdestroyed.
Diff:ȱ3
45) Aȱtransistorȱcollectorȱcharacteristicȱcurveȱisȱaȱgraphȱshowing
A) emitterȱcurrentȱ(I E)ȱversusȱcollector-emitterȱvoltageȱ(VCE)ȱforȱspecifiedȱvaluesȱofȱbase
currentȱ(IB).
B) collectorȱcurrentȱ(IC)ȱversusȱcollector-emitterȱvoltageȱ(VCE)ȱforȱspecifiedȱvaluesȱofȱbase
currentȱ(IB).
C) collectorȱcurrentȱ(IC)ȱversusȱcollector-emitterȱvoltageȱ(VC)ȱforȱspecifiedȱvaluesȱofȱbase
currentȱ(IB).
D) collectorȱcurrentȱ(IC)ȱversusȱcollector-emitterȱvoltageȱ(VCC )ȱforȱspecifiedȱvaluesȱofȱbase
currentȱ(IB).
Diff:ȱ3
46) Theȱbase-to-emitterȱjunctionȱofȱaȱcertainȱtransistorȱisȱcheckedȱwithȱaȱDMMȱonȱdiodeȱcheckȱin
theȱforwardȱbiasȱdirection.ȱIfȱtheȱDMMȱindicatesȱ0.700,ȱtheȱtransistorȱis
A) definitelyȱdefective.
B) siliconȱandȱmeasuringȱnormal.
C) germaniumȱandȱmeasuringȱnormal.
D) openȱbetweenȱtheȱbaseȱandȱemitter.
Diff:ȱ2
47) Ifȱtheȱcollectorȱresistanceȱinȱaȱtransistorȱamplifierȱisȱopen,ȱtheȱdcȱvoltageȱatȱtheȱcollectorȱwillȱbe
closestȱto
A) VBB.
B) VCC .
C) VCC /2.
Diff:ȱ2
307
D) 0ȱV.
Chapterȱ5 TransistorȱBiasȱCircuits
1) BiasingȱaȱBJTȱamplifierȱmeansȱestablishingȱdcȱoperatingȱvoltagesȱforȱproperȱoperation.
Diff:ȱ2
2) Aȱtransistorȱoperatingȱinȱsaturationȱhasȱveryȱlittleȱcollectorȱcurrent.
Diff:ȱ2
3) Voltage-dividerȱbiasingȱisȱrarelyȱusedȱdueȱtoȱinstability.
Diff:ȱ2
4) Negativeȱfeedbackȱinȱtheȱcollector-feedbackȱcircuitȱprovidesȱmoreȱstableȱoperation.
Diff:ȱ2
5) TheȱcorrectȱformulaȱforȱfindingȱtheȱdcȱcurrentȱgainȱisȱΆ DC = IC/I B.
Diff:ȱ2
6) Aȱcertainȱtransistorȱinȱaȱfixed-biasȱcircuitȱhasȱtheȱfollowingȱvalues:ȱȱI B = 50ȱΐA,ȱΆ DCȱ=ȱ125,
VCC ȱ=ȱ18ȱV,ȱandȱR Cȱ=ȱ1.2ȱk̛.ȱȱVCȱis
A) 0ȱV.
B) 7.5ȱV.
C) 10.5ȱV.
D) 18ȱV.
Diff:ȱ2
7) Addingȱanȱemitterȱresistorȱtoȱaȱbase-biasȱcircuitȱproducesȱaȱbiasȱcircuitȱcalled
A) emitterȱbias.
B) base-emitterȱbias.
C) emitter-feedbackȱbias.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
8) Anȱindicationȱofȱcutoffȱisȱthat
A) ICȱ=ȱIC(sat).
B) VCE = 0ȱV.
C) VBE = 0.7ȱV.
Diff:ȱ2
308
D) VCEȱ=ȱVCC.
9) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱtransistorȱisȱbiasedȱforȱ________ȱoperation.
A) saturation
B) linear
C) cutoff
D) EitherȱAȱorȱCȱabove.
Diff:ȱ2
10) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱvoltageȱatȱtheȱbaseȱofȱthisȱsiliconȱtransistorȱis
A) 0.3ȱV.
B) 0ȱV.
C) 12ȱV.
D) 11.3ȱV.
E) 0.7ȱV.
Diff:ȱ2
11) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱΆ DC = 100,ȱtheȱminimumȱvalueȱofȱI B thatȱwouldȱcauseȱthis
transistorȱto
saturateȱis
A) 100ȱΐA.
B) 50ȱΐA.
C) 1ȱmA.
D) 0.1ȱmA.
Diff:ȱ3
12) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱV C increasesȱtoȱ9ȱV,ȱwhichȱofȱtheȱfollowingȱwouldȱmakeȱtheȱdc
collectorȱvoltageȱreturnȱtoȱ6ȱV?
A) IncreaseȱtheȱvalueȱofȱR B
B) ReplaceȱtheȱtransistorȱwithȱoneȱwithȱaȱlowerȱΆ dc
C) DecreaseȱtheȱvalueȱofȱR B
D) IncreaseȱVCC
Diff:ȱ3
309
13) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱvalueȱofȱR C thatȱwillȱproduceȱaȱvalueȱofȱV Cȱ=ȱ10ȱVȱis
A) 2.2ȱk̛.
B) 2ȱk̛.
C) 1ȱk̛.
D) 500ơ̇̄.
Diff:ȱ3
14) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱtransistorȱwereȱreplacedȱwithȱaȱtransistorȱwhoseȱȱ Ά dcȱ= 200,
theȱchangeȱthatȱmightȱoccurȱis
A) VCȱwouldȱincreaseȱtoȱnearȱ20ȱV.
B) VC wouldȱdecreaseȱtoȱnearȱ0ȱV.
C) IBȱwouldȱincreaseȱsignificantly.
D) VC wouldȱchangeȱaȱsmallȱamount.
Diff:ȱ3
15) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR1 = 10ȱk̛,ȱtheȱdcȱvoltageȱpresentȱatȱtheȱbaseȱofȱthisȱsilicon
transistorȱis
A) 0.7ȱV.
B) 9.1ȱV.
C) 10ȱV.
Diff:ȱ3
16) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱpurposeȱforȱR 1 andȱR2 isȱto
A) establishȱaȱdcȱbaseȱvoltage.
B) stabilizeȱtheȱoperatingȱpointȱwithȱnegativeȱfeedback.
C) developȱtheȱoutputȱvoltage.
D) maintainȱVBEȱatȱ0.7ȱV.
Diff:ȱ3
17) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱpurposeȱofȱRC isȱto
A) establishȱaȱdcȱbaseȱvoltage.
B) stabilizeȱtheȱoperatingȱpointȱwithȱnegativeȱfeedback.
C) developȱtheȱoutputȱvoltage.
D) maintainȱVBEȱatȱ0.7ȱV.
Diff:ȱ2
310
D) 20ȱV.
18) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱpurposeȱofȱRE isȱto
A) establishȱaȱdcȱbaseȱvoltage.
B) stabilizeȱtheȱoperatingȱpointȱwithȱnegativeȱfeedback.
C) developȱtheȱoutputȱvoltage.
D) maintainȱVBEȱatȱ0.7ȱV.
Diff:ȱ2
19) Twoȱimportantȱyetȱeasilyȱmeasuredȱquantitiesȱthatȱcanȱhelpȱdetermineȱifȱaȱtransistorȱamplifier
isȱoperatingȱcorrectlyȱare
A) Ά dcȱandȱIB.
B) IC andȱVC.
C) VC andȱVBE.
D) VBEȱandȱIE.
Diff:ȱ2
20) Saturationȱandȱcutoffȱareȱoperatingȱconditionsȱthatȱareȱveryȱusefulȱwhenȱoperatingȱthe
transistorȱas
A) aȱlinearȱamplifier.
B) aȱswitch.
C) aȱcurrentȱamplifier.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
21) Forȱlinearȱoperation,ȱitȱisȱusualȱtoȱsetȱtheȱQ-pointȱsoȱthat
A) VCEȱ=ȱV CC.
B) VCE = VE.
C) VCE = V CC /4.
Diff:ȱ2
311
D) VCEȱ=ȱVCC /2.
22) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱTheȱmostȱprobableȱcauseȱofȱtrouble,ȱifȱany,ȱfromȱtheseȱvoltage
measurementsȱwouldȱbe
A) theȱbase-emitterȱjunctionȱisȱopen.
B) RE isȱopen.
C) aȱshortȱfromȱcollectorȱtoȱemitter.
D) Thereȱareȱnoȱproblems.
Diff:ȱ3
23) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱTheȱmostȱprobableȱcauseȱofȱtrouble,ȱifȱany,ȱfromȱtheseȱvoltage
measurementsȱis
A) theȱbase-emitterȱjunctionȱisȱopen.
B) RE isȱopen.
C) aȱshortȱfromȱcollectorȱtoȱemitter.
D) Thereȱareȱnoȱproblems.
Diff:ȱ3
24) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱTheȱmostȱprobableȱcauseȱofȱtrouble,ȱifȱany,ȱfromȱtheseȱvoltage
measurementsȱis
A) theȱbase-emitterȱjunctionȱisȱopen.
B) RE isȱopen.
C) aȱshortȱfromȱcollectorȱtoȱemitter.
D) Thereȱareȱnoȱproblems.
Diff:ȱ3
25) Referȱtoȱ(d)ȱinȱtheȱfigureȱabove.ȱȱTheȱmostȱprobableȱcauseȱofȱtrouble,ȱifȱany,ȱfromȱtheseȱvoltage
measurementsȱis
A) theȱbase-emitterȱjunctionȱisȱopen.
B) RE isȱopen.
C) aȱshortȱfromȱcollectorȱtoȱemitter.
D) Thereȱareȱnoȱproblems.
Diff:ȱ3
312
26) Theȱmostȱsuitableȱbiasingȱtechniqueȱusedȱisȱthe
A) base-bias.
B) emitter-bias.
C) voltage-dividerȱbias.
D) collector-bias.
Diff:ȱ2
27) Improperȱbiasingȱcanȱcauseȱdistortionȱinȱanȱamplifierȇs
A) inputȱsignal.
B) outputȱsignal.
C) powerȱdissipation.
D) frequencyȱresponse.
Diff:ȱ2
28) Onȱaȱdcȱloadȱline,ȱtheȱareaȱbetweenȱsaturationȱandȱcutoffȱisȱcalledȱthe
A) saturationȱzone.
B) depletionȱregion.
C) linearȱregion.
D) breakdownȱregion.
Diff:ȱ3
29) ThreeȱdifferentȱQ-pointsȱareȱshownȱonȱaȱdcȱloadȱline.ȱTheȱupperȱQ -pointȱrepresentsȱthe
A) minimumȱcurrentȱgain.
B) intermediateȱcurrentȱgain.
C) maximumȱcurrentȱgain.
D) cutoffȱpoint.
Diff:ȱ2
30) Ifȱaȱtransistorȱoperatesȱatȱtheȱmiddleȱofȱtheȱdcȱloadȱline,ȱaȱdecreaseȱinȱtheȱcurrentȱgainȱwill
moveȱtheȱQ-point
A) offȱtheȱloadȱline.
B) nowhere.
C) up.
D) down.
Diff:ȱ2
31) Theȱinputȱresistance,ȱR IN,ȱofȱaȱvoltage-dividerȱbiasedȱNPNȱtransistorȱisȱ________ȱbyȱaȱfactor
ofȱBeta.
A) stepped-up
B) stepped-down
C) notȱaffected
D) Noneȱofȱtheȱabove.
Diff:ȱ3
32) Voltage-dividerȱbiasȱprovides
A) anȱunstableȱQ-point.
B) aȱstableȱQ-point.
C) aȱQ-pointȱthatȱeasilyȱvariesȱwithȱchangesȱinȱtheȱtransistorȇsȱcurrentȱgain.
D) BothȱAȱandȱCȱabove.
Diff:ȱ1
313
33) Forȱtransistorsȱusingȱvoltage-dividerȱbias,ȱtheȱbaseȱcurrentȱshouldȱbe
A) muchȱlargerȱthanȱtheȱcurrentȱthroughȱtheȱvoltageȱdivider.
B) aboutȱone-halfȱtheȱcollectorȱcurrent.
C) muchȱsmallerȱthanȱtheȱcurrentȱthroughȱtheȱvoltageȱdivider.
D) Betaȱtimesȱlargerȱthanȱtheȱcollectorȱcurrent.
Diff:ȱ3
34) Baseȱbiasȱprovides
A) aȱveryȱstableȱQ-point.
B) aȱveryȱunstableȱQ-point.
C) noȱcurrentȱgain.
D) zeroȱcurrentȱinȱtheȱbaseȱandȱcollectorȱcircuits.
Diff:ȱ2
35) Aȱcircuitȱwithȱaȱfixedȱemitterȱcurrentȱisȱcalled
A) base-bias.
B) emitter-bias.
C) grid-bias.
D) one-supplyȱbias.
Diff:ȱ2
36) Forȱaȱproperlyȱdesignedȱemitter-biasȱcircuit,ȱchangesȱinȱcurrentȱgain
A) doȱnotȱaffectȱtheȱQ-point.
B) severelyȱaffectȱtheȱQ-point.
C) doȱnotȱoccurȱinȱtheȱtransistor.
D) affectȱtheȱcollectorȱvoltage.
Diff:ȱ3
37) AȱlinearȱamplifierȱshouldȱhaveȱtheȱQ-pointȱlocated
A) closeȱtoȱsaturation.
B) closeȱtoȱcutoff.
C) inȱtheȱdistortionȱregion.
D) approximatelyȱhalf-wayȱbetweenȱsaturationȱandȱcutoff.
Diff:ȱ2
38) TheȱQ-pointȱofȱaȱtwoȱsupplyȱemitter-biasȱcircuitȱisȱnotȱaffectedȱby
A) VCC.
B) collectorȱresistance.
C) emitterȱresistance.
D) currentȱgain.
Diff:ȱ3
314
39) Theȱemitterȱresistorȱinȱaȱvoltage-dividerȱbiasȱcircuitȱisȱopen.ȱTheȱcollectorȱvoltageȱwillȱequal
approximately
A) VCC.
B) 0ȱV.
C) one-halfȱVCC.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
40) Ifȱtheȱbase-emitterȱjunctionȱopensȱinȱaȱvoltage-dividerȱbiasedȱcircuit,ȱtheȱemitterȱvoltageȱwill
measure
A) 0ȱV.
B) 0.7ȱVȱlessȱthanȱtheȱbase.
C) 0.7ȱVȱmoreȱthanȱtheȱbase.
D) aȱvoltageȱnearlyȱequalȱtoȱV CC.
Diff:ȱ2
41) Ifȱtheȱcollectorȱresistorȱdecreasesȱtoȱzeroȱinȱaȱbase-biasedȱcircuit,ȱtheȱloadȱlineȱwillȱbecome
A) horizontal.
B) vertical.
C) useless.
D) flat.
Diff:ȱ3
42) Theȱfirstȱstepȱinȱanalyzingȱemitter-biasedȱcircuitsȱisȱtoȱfindȱthe
A) baseȱcurrent.
B) emitterȱvoltage.
C) transistorȱpower.
D) collectorȱcurrent.
Diff:ȱ2
43) TheȱmainȱdifferenceȱbetweenȱanȱNPNȱandȱPNPȱtransistorȱamplifierȱisȱthat
A) PNPȱtransistorsȱneedȱmoreȱheatȱsinking.
B) NPNȱtransistorsȱareȱlinearȱamplifiers,ȱwhileȱPNPȱamplifiersȱareȱnonlinear.
C) PNPȱtransistorsȱcannotȱamplifyȱsineȱwaves.
D) PNPȱtransistorsȱrequireȱoppositeȱbiasȱpolaritiesȱasȱcomparedȱtoȱNPN.
Diff:ȱ2
315
Chapterȱ6 BJTȱAmplifiers
1) Aȱcommon-emitterȱamplifierȱhasȱveryȱhighȱinputȱimpedance,ȱhighȱvoltageȱgain,ȱandȱhigh
currentȱgain.
Diff:ȱ2
2) AȱhighȱinputȱimpedanceȱamplifierȱcouldȱbeȱimplementedȱwithȱaȱDarlingtonȱpair.
Diff:ȱ2
3) Aȱcommon-collectorȱamplifierȱisȱalsoȱknownȱasȱanȱemitterȱfollower.
Diff:ȱ2
4) Aȱcommon-baseȱamplifierȱhasȱaȱhighȱcurrentȱgain.
Diff:ȱ2
5) TheȱSziklaiȱpairȱusesȱtoȱpnpȱtransistors.
Diff:ȱ2
6) Aȱcertainȱtransistorȱhasȱaȱdcȱemitterȱcurrentȱofȱ25ȱmA.ȱȱTheȱvalueȱofȱrȇe is
A) 25ơ̇̄.
B) 2.5ơ̇̄.
C) 1.2ơ̇̄.
D) 1ơ̇̄.
C) 5ȱV.
D) 0ȱV.
Diff:ȱ2
7) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱvalueȱofȱVC is
A) 20ȱV.
B) 10ȱV.
Diff:ȱ2
8) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱanȱemitter-bypassȱcapacitorȱwereȱadded,ȱtheȱvoltageȱgain
A) wouldȱnotȱchange.
B) wouldȱdecrease.
C) wouldȱincrease.
D) wouldȱdecreaseȱtoȱzero.
Diff:ȱ2
316
9) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR 2 opened,ȱVCE wouldȱbe
A) 0ȱV.
B) 20ȱV.
C) 10ȱV.
D) 4.8ȱV.
Diff:ȱ3
10) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR 2 opened,ȱtheȱvalueȱofȱIC wouldȱbe
A) 6ȱmA.
B) 6.67ȱmA.
C) 8ȱmA.
D) 10ȱmA.
Diff:ȱ3
11) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR C opened,ȱVE would
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) beȱundetermined.
Diff:ȱ2
12) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱemitterȱcollectorȱshorted,ȱtheȱvoltageȱV Cȱwouldȱbe
A) 0ȱV.
B) 20ȱV.
C) 16.67ȱV.
D) 3.33ȱV.
Diff:ȱ2
13) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱcollectorȱopenedȱinternally,ȱtheȱvoltageȱonȱtheȱcollectorȱwould
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) beȱundetermined.
Diff:ȱ3
14) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱV E = 0,ȱtheȱtroubleȱmightȱbeȱthat
A) REȱisȱopen.
B) RC isȱopen.
C) R2 isȱopen.
D) R1 ȱisȱopen.
Diff:ȱ2
15) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱanȱemitter-bypassȱcapacitorȱwereȱinstalled,ȱtheȱvalueȱofȱR in
wouldȱbe
A) 50ơ̇̄.
B) 175ơ̇̄.
C) 378ơ̇̄.
D) 500ơ̇̄.
Diff:ȱ2
16) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱanȱemitter-bypassȱcapacitorȱwereȱinstalled,ȱtheȱnewȱAVȱwouldȱbe
A) 4.96.
B) 125.
C) 398.
Diff:ȱ2
317
D) 600.
17) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱAV1 = 75ȱandȱAV2 = 95,ȱAVT wouldȱbe
A) 75.
B) 95.
C) 1275.
D) 7125.
Diff:ȱ2
18) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheȱfollowingȱfaultsȱwouldȱaccountȱforȱtheȱoutputȱvoltage
beingȱlowerȱthanȱnormal,ȱbutȱnotȱaȱcompleteȱlossȱofȱoutputȱvoltage?
A) AnȱopenȱC1
B) AnȱopenȱC3
C) AnȱopenȱC4
D) AnȱopenȱC5
Diff:ȱ3
19) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱV B2 wereȱhigherȱthanȱnormal,ȱtheȱproblem,ȱifȱany,ȱcouldȱbeȱthat
A) C3 ȱisȱshorted.
B) R3 isȱopen.
C) C1 isȱopen.
D) C2 ȱisȱopen.
Diff:ȱ3
20) Referȱtoȱtheȱfigureȱabove.ȱȱInȱservicingȱthisȱamplifierȱV out hasȱaȱdcȱcomponentȱinȱadditionȱto
theȱnormalȱacȱoutputȱvoltage.ȱThisȱwouldȱbeȱcausedȱbyȱa(n)
A) openȱC3.
B) openȱC2.
C) openȱbase-emitterȱofȱC2 .
D) shortedȱC5.
Diff:ȱ3
21) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱoutputȱsignalȱatȱtheȱcollectorȱofȱ Q1 isȱhigherȱthanȱnormal.ȱThis
couldȱbeȱcausedȱbyȱa(n)
A) openȱC1.
B) openȱC3.
C) openȱbase-emitterȱofȱQ 1.
D) openȱC2.
Diff:ȱ3
22) Theȱbestȱselectionȱforȱaȱhighȱinputȱimpedanceȱamplifierȱisȱa
A) lowȱgainȱcommon-emitter.
B) common-base.
C) common-collector.
D) highȱgainȱcommon-emitter.
Diff:ȱ2
318
23) Whichȱofȱtheȱfollowingȱisȱnotȱaȱcharacteristicȱofȱtheȱcommon-baseȱamplifier?
A) Highȱinputȱimpedance
B) Currentȱgainȱofȱ1
C) Highȱvoltageȱgain
D) Highȱoutputȱimpedance
Diff:ȱ2
24) Whichȱofȱtheȱfollowingȱisȱnotȱaȱcharacteristicȱofȱtheȱemitter-follower?
A) Voltageȱgainȱofȱ1
B) Lowȱinputȱimpedance
C) Lowȱoutputȱimpedance
D) Highȱcurrentȱgain
Diff:ȱ2
25) Theȱbestȱchoiceȱforȱaȱveryȱhighȱpowerȱamplifierȱisȱa(n)
A) common-collector.
B) common-base.
C) common-emitter.
D) emitter-follower.
Diff:ȱ2
26) Forȱtransistors
A) theȱdcȱandȱacȱcurrentȱgainsȱareȱtheȱsame.
B) theȱdcȱcurrentȱgainȱisȱzero.
C) theȱdcȱandȱacȱcurrentȱgainsȱareȱusuallyȱdifferent.
D) amplificationȱofȱsignalȱvoltageȱisȱnotȱpossible.
Diff:ȱ2
27) Theȱacȱresistanceȱofȱtheȱemitterȱdiodeȱrȇe equals
A)
25ȱmV
.
IE
B) 25ȱmVȱ× IC.
C)
Diff:ȱ2
28) Inȱgeneral,ȱcouplingȱcapacitorsȱcanȱbeȱconsidered
A) openȱforȱsignalȱvoltageȱandȱaȱshortȱforȱdc.
B) shortȱforȱsignalȱvoltageȱandȱanȱopenȱforȱdc.
C) lossy.
D) shortȱforȱsignalȱvoltageȱandȱaȱshortȱforȱdc.
Diff:ȱ2
319
25ȱmV
.
IB
D)
25ȱmV
.
IC
29) Theȱprimaryȱreasonȱanȱacȱloadȱlineȱdiffersȱfromȱaȱdcȱloadȱlineȱis
A) theȱeffectiveȱacȱcollectorȱresistanceȱisȱgreaterȱthanȱtheȱdcȱcollectorȱresistance.
B) theȱeffectiveȱacȱcollectorȱresistanceȱisȱlessȱthanȱtheȱdcȱcollectorȱresistance.
C) changesȱinȱcurrentȱareȱnonlinearȱforȱsmall-signalȱamplifierȱoperation.
D) theȱacȱloadȱlineȱisȱnotȱasȱsteepȱasȱtheȱdcȱloadȱline.
Diff:ȱ3
30) Theȱh-parameter,ȱh fe ,ȱisȱtheȱsameȱasȱ________ȱofȱtheȱtransistor.
A) dcȱBeta
B) acȱBeta
C) maximumȱcollectorȱcurrent
D) minimumȱholdȱcurrent
Diff:ȱ2
31) Theȱcapacitorȱthatȱproducesȱanȱacȱgroundȱatȱaȱpointȱinȱaȱcircuitȱisȱcalledȱa(n)
A) bypassȱcapacitor.
B) couplingȱcapacitor.
C) dcȱshort.
D) acȱopen.
Diff:ȱ2
32) Reducingȱallȱdcȱsourcesȱtoȱzeroȱisȱdoneȱtoȱhelpȱobtainȱthe
A) dcȱequivalentȱcircuit.
B) acȱequivalentȱcircuit.
C) completeȱamplifierȱcircuit.
D) voltage-dividerȱbiasedȱcircuit.
Diff:ȱ2
33) Theȱinputȱresistance,ȱRin(base) ,ȱofȱaȱcommon-emitterȱamplifier,ȱconsistsȱof
A) rbȱ?ȱΆre.
C) re ? Άrȇe.
B) Ά ac rȇe.
D) RGȱ?ȱrc ? Άrȇe.
Diff:ȱ3
34) Theȱthreeȱfactorsȱthatȱmustȱbeȱtakenȱintoȱaccountȱwhenȱdeterminingȱtheȱactualȱsignalȱvoltage
atȱtheȱbaseȱofȱaȱsmallȱsignalȱbipolarȱamplifierȱare
A) sourceȱresistance,ȱemitterȱresistance,ȱandȱinputȱresistance.
B) sourceȱresistance,ȱbiasȱresistance,ȱandȱinputȱresistance.
C) sourceȱresistance,ȱcollectorȱresistance,ȱinternalȱresistance.
D) sourceȱresistance,ȱbiasȱresistance,ȱandȱloadȱresistance.
Diff:ȱ2
35) Theȱvalueȱofȱoutputȱresistanceȱinȱaȱcommon-emitterȱamplifier,ȱR out,ȱconsistsȱof
A) RC.
B) RL + RC.
C) Ά ? RC.
Diff:ȱ2
320
D) RLȱ?ȱRC.
36) Theȱvoltageȱgainȱofȱanȱamplifierȱisȱdefinedȱasȱthe
A) acȱinputȱvoltageȱdividedȱbyȱtheȱacȱoutputȱvoltage.
B) acȱcollectorȱcurrentȱdividedȱbyȱtheȱacȱbaseȱcurrent.
C) acȱoutputȱvoltageȱdividedȱbyȱtheȱacȱinputȱvoltage.
D) acȱcollectorȱcurrentȱdividedȱbyȱtheȱacȱemitterȱcurrent.
Diff:ȱ2
37) Removingȱaȱbypassȱcapacitorȱfromȱaȱfullyȱbypassed,ȱcommon -emitterȱamplifierȱcircuitȱwill
________ȱvoltageȱgainȱandȱ________ȱacȱinputȱresistance.
A) increase,ȱdecrease
B) decrease,ȱincrease
C) decrease,ȱdecrease
D) increase,ȱincrease
Diff:ȱ3
38) Theȱvoltageȱgainȱofȱaȱcommon-emitterȱamplifier,ȱAV,ȱcanȱbeȱdefinedȱas
IeRC
Vb
.
B) AV = IC × RC.
C) AVȱ=
.
A) AVȱ=ȱ
Ierȇe
Vc
D) AVȱ=ȱ
RC
RCȱ+ȱ1
Diff:ȱ3
39) Forȱaȱbypassȱcapacitorȱtoȱworkȱproperly,ȱthe
A) XCȱshouldȱbeȱtenȱtimesȱsmallerȱthanȱR E atȱtheȱminimumȱoperatingȱfrequency.
B) XCȱshouldȱequalȱRE.
C) XCȱshouldȱbeȱtenȱtimesȱgreaterȱthanȱR E atȱtheȱminimumȱoperatingȱfrequency.
D) XCȱshouldȱbeȱtwiceȱtheȱvalueȱofȱtheȱRE.
Diff:ȱ2
40) Aȱbypassȱcapacitorȱisȱplacedȱacrossȱtheȱemitterȱresistorȱinȱaȱvoltage-dividerȱbiased
common-emitterȱamplifierȱcircuit.ȱThisȱwill
A) placeȱtheȱemitterȱatȱacȱground.
B) shiftȱtheȱQ-pointȱonȱtheȱdcȱloadȱline.
C) reduceȱtheȱemitterȇsȱdcȱvoltageȱtoȱzero.
D) Allȱofȱtheȱabove.
Diff:ȱ2
41) Removingȱtheȱemitterȱbypassȱcapacitorȱfromȱaȱcommon-emitterȱamplifier
A) increasesȱRinȱandȱdecreasesȱvoltageȱgain.
B) decreasesȱRinȱandȱincreasesȱvoltageȱgain.
C) doesȱnotȱaffectȱR in.
D) increasesȱtheȱdistortion.
Diff:ȱ3
321
.
42) IncreasingȱtheȱresistanceȱofȱtheȱloadȱresistorȱinȱanȱRCȱcoupledȱcommon -emitterȱamplifierȱwill
haveȱwhatȱeffectȱonȱvoltageȱgain?
A) Doesȱnotȱaffectȱtheȱvoltageȱgain
B) Decreasesȱtheȱvoltageȱgain
C) Increasesȱtheȱvoltageȱgain
D) Noneȱofȱtheȱabove.
Diff:ȱ3
43) Leavingȱsomeȱofȱtheȱemitterȱresistanceȱunbypassedȱinȱaȱcommon-emitterȱamplifierȱwill
A) reduceȱdistortion.
B) stabilizeȱtheȱvoltageȱgain.
C) increaseȱtheȱinputȱimpedance.
D) Allȱofȱtheȱabove.
Diff:ȱ2
44) Inȱaȱswampedȱamplifier,ȱtheȱeffectsȱofȱtheȱemitterȱdiodeȱ(rȇe)ȱbecome
A) importantȱtoȱvoltageȱgain.
B) criticalȱtoȱinputȱimpedance.
C) significantȱtoȱtheȱanalysis.
D) insignificant.
Diff:ȱ2
45) Toȱreduceȱtheȱdistortionȱofȱanȱamplifiedȱsignal,ȱyouȱcanȱincreaseȱthe
A) collectorȱresistance.
B) emitterȱfeedbackȱresistance.
C) generatorȱresistance.
D) loadȱresistance.
Diff:ȱ3
46) Anȱemitterȱfollowerȱhasȱaȱvoltageȱgainȱthatȱis
A) muchȱlessȱthanȱone.
B) approximatelyȱequalȱtoȱone.
C) greaterȱthanȱone.
D) zero.
Diff:ȱ1
47) Whereȱisȱtheȱoutputȱcouplingȱcapacitorȱconnectedȱonȱaȱcommon-collectorȱamplifier?
A) Base
B) Emitter
C) Collector
D) dcȱpowerȱsupply
Diff:ȱ2
48) Theȱinputȱresistanceȱofȱtheȱbaseȱofȱanȱemitterȱfollowerȱisȱusually
A) low.
B) high.
C) shortedȱtoȱground.
D) open.
Diff:ȱ2
322
49) Oftenȱaȱcommon-collectorȱwillȱbeȱtheȱlastȱstageȱbeforeȱtheȱload;ȱtheȱmainȱfunction(s)ȱofȱthis
stageȱisȱto
A) provideȱaȱlargeȱvoltageȱgain.
B) bufferȱtheȱvoltageȱamplifiersȱfromȱtheȱlowȱresistanceȱloadȱandȱprovideȱimpedance
matchingȱforȱmaximumȱpowerȱtransfer.
C) provideȱphaseȱinversion.
D) provideȱaȱhighȱfrequencyȱpathȱtoȱimproveȱtheȱfrequencyȱresponse.
Diff:ȱ2
50) Outputȱresistanceȱinȱaȱcommon-collectorȱamplifierȱcircuitȱisȱsteppedȱdownȱbyȱaȱfactorȱof
A) alphaȱ΅.
C) RE ? RL.
B) BetaȱΆ.
D) rȇeȱ+ȱre.
Diff:ȱ3
51) IfȱtwoȱtransistorsȱareȱconnectedȱasȱaȱDarlingtonȱpairȱandȱeachȱtransistorȱhasȱaȱ Betaȱofȱ175,ȱthe
overallȱcurrentȱgainȱofȱtheȱpairȱequals
A) 30,625.
B) 3,625.
C) 10,000.
D) 5,000.
Diff:ȱ1
52) Aȱthree-stageȱamplifierȱhasȱaȱgainȱofȱ20ȱforȱeachȱstage.ȱTheȱoverallȱdecibelȱvoltageȱgainȱis
A) 60ȱdB.
B) 400ȱdB.
C) 78ȱdB.
D) 8,000ȱdB.
Diff:ȱ2
53) Inȱaȱtwo-stageȱamplifier,ȱtheȱinputȱresistanceȱofȱtheȱsecondȱstage
A) doesȱnotȱaffectȱtheȱvoltageȱgainȱofȱtheȱfirstȱstage.
B) affectsȱtheȱvoltageȱgainȱofȱtheȱfirstȱstage.
C) isȱinȱparallelȱwithȱtheȱcollectorȱresistorȱofȱtheȱfirstȱstage.
D) BothȱBȱandȱCȱabove.
Diff:ȱ2
54) Inȱaȱtwo-stageȱamplifier,ȱtheȱvoltageȱgainȱofȱtheȱfirstȱstageȱisȱ80ȱandȱtheȱvoltageȱgainȱofȱthe
secondȱstageȱisȱ50.ȱHowȱmuchȱisȱtheȱoverallȱvoltageȱgain?
A) 72
B) 130
C) 4,000
D) 400
Diff:ȱ1
55) IfȱaȱCEȱstageȱisȱdirectȱcoupledȱtoȱanȱemitter-follower,ȱhowȱmanyȱcouplingȱcapacitorsȱareȱthere
betweenȱtheȱtwoȱstages?
A) 0
B) 1
C) 2
Diff:ȱ2
323
D) 3
56) Theȱquantityȱrƍ e
A) isȱexternalȱtoȱtheȱtransistor.
B) isȱtemperatureȱdependent.
C) hasȱnoȱeffectȱonȱgainȱinȱtransistors.
D) isȱaȱdcȱvalue.
Diff:ȱ2
57) Aȱdifferentialȱamplifierȱprovidesȱanȱoutputȱthatȱisȱtheȱ________ȱofȱtheȱtwoȱinputȱquantities.
A) square
B) difference
C) multiplication
D) sine
Diff:ȱ1
58) Aȱdifferentialȱamplifierȱshouldȱexhibitȱaȱ________ȱdifferentialȱgainȱandȱaȱ________ȱcommon
modeȱgain.
A) high,ȱlow
B) low,ȱhigh
C) high,ȱhigh
D) low,ȱlow
Diff:ȱ2
59) Assumeȱthatȱaȱcertainȱdifferentialȱamplifierȱhasȱaȱdifferentialȱgainȱofȱ3,000ȱandȱaȱcommon
modeȱgainȱofȱ0.25.ȱWhatȱisȱtheȱCMRR?
A) 66.89
B) 750
C) 3,025
D) 12,000
Diff:ȱ2
60) Assumeȱthatȱaȱcertainȱdifferentialȱamplifierȱhasȱaȱdifferentialȱgainȱofȱ5,000ȱandȱaȱcommon
modeȱgainȱofȱ0.3.ȱWhatȱisȱtheȱCMRRȱinȱdB?
A) 0.3ȱdB
B) 62.12ȱdB
C) 84.44ȱdB
Diff:ȱ2
324
D) 1,500ȱdB
Chapterȱ7 PowerȱAmplifiers
1) TheȱclassȱAȱamplifierȱisȱusuallyȱbiasedȱbelowȱcutoff.
Diff:ȱ2
2) Darlingtonȱpairȱtransistorsȱareȱoftenȱusedȱinȱpowerȱamplifiersȱbecauseȱtheȱinputȱimpedanceȱis
veryȱlow.
Diff:ȱ2
3) Forȱcertainȱapplicationsȱwithȱlow-resistanceȱloads,ȱaȱpush-pullȱamplifierȱusingȱDarlington
transistorsȱcanȱbeȱusedȱtoȱdecreaseȱtheȱinputȱresistanceȱpresentedȱtoȱtheȱdrivingȱamplifierȱand
avoidȱgreatlyȱreducingȱvoltageȱgain.
Diff:ȱ2
4) AȱclassȱBȱamplifierȱconductsȱforȱ________ȱofȱtheȱcycle.
A) 45°
B) 90°
C) 180°
D) 360°
Diff:ȱ2
5) Theȱclassȱofȱamplifiersȱthatȱisȱtheȱmostȱefficientȱandȱhasȱtheȱmostȱdistortionȱisȱclassȱ________
amplifiers.
A) A
B) B
C) C
D) AB
Diff:ȱ2
6) Push-pullȱamplifiersȱoftenȱuseȱclassȱ________ȱamplifiers.
A) A
B) BȱorȱAB
C) C
Diff:ȱ2
7) IfȱaȱclassȱAȱamplifierȱhasȱaȱvoltageȱgainȱofȱ50ȱandȱaȱcurrentȱgainȱofȱ75,ȱtheȱpowerȱgainȱis
A) 50.
B) 75.
C) 1500.
D) 3750.
Diff:ȱ2
8) IfȱaȱclassȱAȱamplifierȱhasȱR Cȱ= 4.7ȱk̛ andȱRE = 1.5ȱk̛ andȱVCC = 24ȱV,ȱIC(sat)ȱis
A) 5.1ȱmA.
B) 16ȱmA.
C) 3.87ȱmA.
D) 0ȱmA.
Diff:ȱ2
9) Ifȱanȱapplicationȱforȱanȱamplifierȱrequiresȱoperationȱinȱaȱlinearȱmode,ȱtheȱmostȱlikelyȱchoice
wouldȱbeȱa
A) classȱA.
B) classȱB.
C) classȱC.
Diff:ȱ2
325
D) classȱAB.
10) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR 1 opened,ȱandȱV in atȱtheȱbaseȱwasȱlarge,ȱV outȱatȱtheȱcollector
would
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ3
11) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱdiodeȱopened,ȱthisȱamplifierȱwouldȱbeȱoperatingȱas
A) classȱA.
B) classȱB.
C) classȱC.
D) classȱAB.
Diff:ȱ3
12) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱpurposeȱofȱtheȱdiodeȱisȱtoȱbiasȱtheȱamplifierȱas
A) classȱA.
B) classȱB.
C) classȱC.
D) classȱAB.
Diff:ȱ2
13) TheȱmaximumȱefficiencyȱforȱaȱclassȱAȱamplifierȱisȱabout
A) 25%.
B) 50%.
C) 75%.
D) 100%.
Diff:ȱ2
14) Theȱamplifierȱwithȱtheȱmostȱdistortionȱwouldȱbeȱaȱ________ȱamplifier.
A) classȱA
B) classȱB
C) classȱC
Diff:ȱ2
326
D) classȱAB
15) Referȱtoȱtheȱfigureȱabove.ȱȱWithȱnoȱsignalȱinput,ȱtheȱdcȱemitterȱvoltageȱwithȱrespectȱtoȱground
is
A) 10.7ȱV.
B) 9.3ȱV.
C) 0ȱV.
D) 10ȱV.
Diff:ȱ2
16) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱamplifierȱonlyȱshowsȱaȱpositiveȱalternationȱatȱtheȱoutput.ȱȱThe
possibleȱtroubleȱmightȱbeȱthat
A) C3 ȱisȱshorted.
B) BE1 isȱopen.
C) BE2 isȱopen.
D) R1 ȱisȱopen.
Diff:ȱ3
17) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱdcȱvoltageȱacrossȱR L wasȱmeasuredȱatȱ10ȱV.ȱȱAȱpossible
problem,ȱifȱany,ȱmightȱbeȱthat
A) C1 ȱisȱopen.
B) C3 isȱshorted.
C) R1 isȱopen.
D) C3 ȱisȱopen.
Diff:ȱ3
18) Referȱtoȱtheȱfigureȱabove.ȱȱDuringȱtheȱpositiveȱinputȱalternation,ȱQ 1 isȱ________ȱandȱQ 2 is
________.
A) on,ȱon
B) on,ȱoff
C) off,ȱoff
Diff:ȱ2
19) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱpurposeȱforȱtheȱdiodesȱD 1 andȱD 2 is
A) toȱapplyȱequalȱsignalsȱtoȱeachȱtransistor.
B) toȱallowȱtheȱcorrectȱbiasȱvoltagesȱonȱtheȱtwoȱbases.
C) toȱmaintainȱconstantȱbiasȱwithȱtemperatureȱchanges.
D) Allȱofȱtheȱabove.
Diff:ȱ3
327
D) off,ȱon
20) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱcombinationȱofȱtheȱtwoȱtransistorsȱisȱcalled
A) same.
B) complementary.
C) NPN.
D) PNP.
Diff:ȱ2
21) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱcircuitȱisȱoperatingȱasȱa
A) classȱAȱpush-pull.
B) classȱABȱpush-pull.
C) classȱCȱpush-pull.
D) classȱBȱpush-pull.
Diff:ȱ2
22) Anȱapplicationȱforȱaȱpowerȱamplifierȱtoȱoperateȱatȱradioȱfrequenciesȱisȱneeded.ȱTheȱmostȱlikely
choiceȱwouldȱbeȱaȱ_________ȱamplifier.
A) classȱA
B) classȱB
C) classȱC
D) classȱAB
Diff:ȱ2
23) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱapproximateȱvoltagesȱonȱtheȱbase,ȱcollector,ȱandȱemitter,
respectively,ȱare
A) 0.7ȱV,ȱ6.8ȱV,ȱ0ȱV
B) 0ȱV,ȱ0ȱV,ȱ0ȱV
C) 0.7ȱV,ȱ15ȱV,ȱ0ȱV
D) 0.7ȱV,ȱ0ȱV,ȱ15ȱV
Diff:ȱ2
328
24) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR L showsȱaȱzeroȱsignalȱvoltageȱonȱanȱoscilloscope,ȱtheȱproblem
mightȱbe
that
A) C3 ȱisȱopen.
B) BE1 isȱopen.
C) BE2 isȱopen.
D) R1 ȱisȱopen.
Diff:ȱ3
25) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱthereȱwereȱnoȱoutputȱsignal,ȱandȱtheȱmeasuredȱdcȱvoltageȱofȱ Q1
emitterȱwereȱ0ȱV,ȱtheȱtroubleȱmightȱbeȱthat
A) D1 ȱisȱshorted.
B) D2 isȱshorted.
C) R1 ȱisȱopen.
D) Noȱtrouble;ȱeverythingȱisȱnormal.
Diff:ȱ3
26) AȱclassȱABȱamplifierȱisȱbiased
A) atȱcutoff.
B) slightlyȱaboveȱtheȱcenterȱofȱtheȱloadȱline.
C) slightlyȱaboveȱcutoff.
D) atȱtheȱcenterȱofȱtheȱloadȱline.
Diff:ȱ3
27) Heatȱsinksȱreduceȱthe
A) transistorȱpower.
B) ambientȱtemperature.
C) junctionȱtemperature.
D) collectorȱcurrent.
Diff:ȱ1
28) Anȱamplifierȱhasȱtwoȱloadȱlinesȱbecause
A) itȱhasȱacȱandȱdcȱcollectorȱresistances.
B) itȱhasȱtwoȱequivalentȱcircuits.
C) theȱdcȱandȱacȱcircuitsȱareȱdifferent.
D) Allȱofȱtheȱabove.
Diff:ȱ3
329
29) WhenȱtheȱQ-pointȱisȱatȱtheȱcenterȱofȱtheȱacȱloadȱline,ȱaȱmaximumȱ________ȱsignalȱcanȱbe
obtained.
A) classȱA
B) classȱB
C) classȱC
D) Noneȱofȱtheȱabove.
Diff:ȱ3
30) Forȱmaximumȱpeak-to-peakȱoutputȱvoltage,ȱtheȱQ-pointȱshouldȱbe
A) nearȱsaturation.
B) nearȱcutoff.
C) atȱtheȱcenterȱofȱtheȱdcȱloadȱline.
D) atȱtheȱcenterȱofȱtheȱacȱloadȱline.
Diff:ȱ3
31) Theȱacȱloadȱlineȱisȱtheȱsameȱasȱtheȱdcȱloadȱlineȱwhenȱtheȱacȱcollectorȱresistanceȱequalsȱthe
A) dcȱemitterȱresistance.
B) acȱemitterȱresistance.
C) dcȱcollectorȱresistance.
D) supplyȱvoltageȱdividedȱbyȱcollectorȱcurrent.
Diff:ȱ3
32) ForȱaȱQ-pointȱnearȱtheȱcenterȱofȱtheȱdcȱloadȱline,ȱclippingȱisȱmoreȱlikelyȱtoȱoccurȱonȱthe
A) positiveȱpeakȱofȱinputȱvoltage.
B) negativeȱpeakȱofȱoutputȱvoltage.
C) positiveȱpeakȱofȱoutputȱvoltage.
D) negativeȱpeakȱofȱemitterȱvoltage.
Diff:ȱ3
33) Theȱacȱloadȱlineȱusually
A) equalsȱtheȱdcȱloadȱline.
B) hasȱlessȱslopeȱthanȱtheȱdcȱloadȱline.
C) isȱsteeperȱthanȱtheȱdcȱloadȱline.
D) isȱhorizontal.
Diff:ȱ2
34) ForȱaȱclassȱAȱCEȱamplifier,ȱtheȱpowerȱdissipation,ȱP DQ
A) isȱmaximumȱwhenȱthereȱisȱnoȱinputȱsignal.
B) increasesȱwhenȱtheȱpeak-to-peakȱloadȱvoltageȱincreases.
C) isȱzeroȱwithȱnoȱinputȱsignal.
D) isȱmaximumȱwhenȱtheȱtransistorȱisȱdrivenȱtoȱcutoff.
Diff:ȱ2
35) AȱCEȱamplifierȱhasȱaȱloadȱpowerȱofȱ10ȱmWȱandȱtheȱdcȱpowerȱisȱ215ȱmW.ȱȱTheȱefficiencyȱis
A) 46.5%.
B) 4.65%.
C) 25%.
Diff:ȱ2
330
D) 0%.
36) Toȱimproveȱtheȱefficiencyȱofȱanȱamplifier,ȱyouȱhaveȱto
A) reduceȱloadȱpower.
B) decreaseȱunwantedȱpowerȱlosses.
C) reduceȱtheȱsupplyȱvoltage.
D) increaseȱtheȱdcȱcurrent.
Diff:ȱ2
37) Theȱquiescentȱcollectorȱcurrentȱisȱtheȱsameȱas
A) acȱcollectorȱcurrent.
B) acȱloadȱresistorȱcurrent.
C) dcȱcollectorȱcurrent.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
38) ForȱeachȱtransistorȱinȱaȱclassȱBȱamplifier,ȱthereȱisȱcollectorȱcurrentȱfor
A) 270°ȱofȱtheȱinputȱcycle.
B) 180° ofȱtheȱinputȱcycle.
C) 360°ȱofȱtheȱinputȱcycle.
D) 90° ofȱtheȱinputȱcycle.
Diff:ȱ2
39) InȱaȱclassȱABȱpush-pullȱamplifier,ȱtheȱtransistorsȱareȱbiasedȱslightlyȱaboveȱcutoffȱtoȱavoid
A) unusuallyȱhighȱefficiency.
B) negativeȱfeedback.
C) crossoverȱdistortion.
D) aȱlowȱinputȱimpedance.
Diff:ȱ2
40) ForȱaȱclassȱABȱpush-pullȱamplifierȱtoȱworkȱproperly,ȱtheȱemitterȱdiodesȱmust
A) matchȱtheȱcompensatingȱdiodes.
B) beȱgermaniumȱandȱtheȱcompensatingȱdiodesȱmustȱbeȱsilicon.
C) beȱsiliconȱandȱtheȱcompensatingȱdiodesȱmustȱbeȱgermanium.
D) notȱmatchȱtheȱcompensatingȱdiodes.
Diff:ȱ2
41) ForȱaȱclassȱABȱpush-pullȱamplifier,ȱdiodeȱbiasȱisȱusedȱto
A) allowȱtheȱtransistorsȱtoȱconductȱforȱ360°.
B) ensureȱthermalȱrunaway.
C) avoidȱthermalȱrunaway.
D) saturateȱtheȱoutputȱtransistors.
Diff:ȱ2
42) TheȱmaximumȱefficiencyȱofȱaȱclassȱBȱpush-pullȱamplifierȱis
A) 25ȱpercent.
B) 50ȱpercent.
C) 79ȱpercent.
Diff:ȱ1
331
D) 100ȱpercent.
43) Underȱno-signalȱorȱquiescentȱconditions,ȱtheȱtransistorsȱofȱaȱclassȱBȱpush-pullȱamplifier
A) haveȱexcessivelyȱhighȱpowerȱdissipation.
B) getȱquiteȱhot.
C) areȱinȱsaturation.
D) dissipateȱveryȱlittleȱpower.
Diff:ȱ2
44) PowerȱMOSFETsȱhaveȱseveralȱadvantagesȱoverȱbipolarȱpowerȱtransistors.ȱWhichȱofȱthe
followingȱstatementsȱisȱnotȱcorrect?
A) LessȱproneȱtoȱESDȱdamageȱwhenȱcomparedȱtoȱBJTs
B) Haveȱsimplerȱbiasingȱcircuits
C) Canȱbeȱconnectedȱinȱparallelȱtoȱincreaseȱcurrentȱcapacity
D) Haveȱaȱlowȱvoltageȱdropȱacrossȱtheȱdeviceȱunderȱhighȱvoltageȱandȱcurrentȱconditions
Diff:ȱ3
45) ForȱaȱclassȱCȱamplifier,ȱthereȱisȱcollectorȱcurrentȱfor
A) 0°ȱofȱtheȱinputȱcycle.
B) lessȱthanȱ180° ofȱtheȱinputȱcycle.
C) 210°ȱofȱtheȱinputȱcycle.
D) 360° ofȱtheȱinputȱcycle.
Diff:ȱ2
46) ClassȱCȱamplifiersȱareȱalmostȱalways
A) transformer-coupledȱbetweenȱstages.
B) operatedȱatȱaudioȱfrequencies.
C) tunedȱRFȱamplifiers.
D) wideband.
Diff:ȱ2
47) TheȱinputȱsignalȱofȱaȱclassȱCȱamplifier
A) isȱnegativelyȱclampedȱatȱtheȱbase.
B) isȱamplifiedȱandȱinverted.
C) producesȱbriefȱpulsesȱofȱcollectorȱcurrent.
D) Allȱofȱtheȱabove.
Diff:ȱ2
48) TheȱcollectorȱcurrentȱofȱaȱclassȱCȱamplifier
A) isȱanȱamplifiedȱversionȱofȱtheȱinputȱvoltage.
B) hasȱharmonics.
C) isȱnegativelyȱclamped.
D) flowsȱforȱhalfȱaȱcycle.
Diff:ȱ2
332
Chapterȱ8 Field-EffectȱTransistors (FETs)
1) AȱFETȱhasȱthreeȱterminalsȱnamedȱtheȱsource,ȱdrain,ȱandȱgate.
Diff:ȱ2
2) TheȱJFETȱoperatesȱwithȱaȱforward-biasedȱgate-sourceȱpnȱjunction.
Diff:ȱ2
3) AnȱE-MOSFETȱcanȱbeȱusedȱasȱaȱswitch.
Diff:ȱ2
4) AȱD-MOSFETȱcanȱoperateȱwithȱbothȱpositiveȱandȱnegativeȱvaluesȱofȱV GS.
Diff:ȱ2
5) TheȱslopeȱofȱtheȱcharacteristicȱcurveȱinȱtheȱohmicȱregionȱofȱaȱJFETȱisȱdefinedȱbyȱtheȱequation:
VDS
.
RDSȱ=ȱ
ID
Diff:ȱ2
6) SpecialȱcareȱisȱrequiredȱinȱhandlingȱaȱMOSFET.
Diff:ȱ2
7) JFETȱdataȱsheetsȱspecifyȱinputȱresistanceȱbyȱgivingȱtheȱvaluesȱforȱV GS andȱIDSS.
Diff:ȱ2
8) TheȱohmicȱregionȱofȱaȱJFETȱcharacteristicȱcurveȱisȱroughlyȱparabolicȱinȱshape.
Diff:ȱ2
9) Underȱnoȱsignalȱconditions,ȱmidpointȱbiasȱallowsȱtheȱmaximumȱamountȱofȱdrainȱcurrent
swingȱbetweenȱI DSSȱandȱzero.
Diff:ȱ2
10) Aȱself-biasedȱȱnȬchannelȱJFETȱhasȱaȱV D = 8ȱV,ȱV GS = -5ȱV.ȱȱTheȱvalueȱofȱVDSȱis
A) 3ȱV.
C) -5ȱV.
B) 8ȱV.
Diff:ȱ2
333
D) -3ȱV.
11) Fieldȱeffectȱtransistorsȱareȱalsoȱknownȱas
A) unipolarȱdevices.
B) bipolarȱdevices.
C) three-chargeȱcarrierȱdevices.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
12) TheȱFETȱthatȱhasȱnoȱphysicalȱchannelȱis
A) theȱDȱMOSFET.
B) theȱEȱMOSFET.
C) theȱJFET.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
13) AȱFETȱthatȱhasȱnoȱIDSSȱparameterȱisȱthe
A) JFET.
B) DEȱMOSFET.
C) VȱMOSFET.
D) EȱMOSFET.
Diff:ȱ2
14) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱThisȱsymbolȱidentifies
A) aȱpȬchannelȱEȱMOSFET.
B) anȱnȬchannelȱDȱMOSFET.
C) aȱpȬchannelȱDȱMOSFET.
D) anȱnȬchannelȱEȱMOSFET.
Diff:ȱ2
15) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱThisȱsymbolȱidentifies
A) aȱpȬchannelȱEȱMOSFET.
B) anȱnȬchannelȱDȱMOSFET.
C) aȱpȬchannelȱDȱMOSFET.
D) anȱnȬchannelȱEȱMOSFET.
Diff:ȱ2
16) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱThisȱsymbolȱidentifies
A) aȱpȬchannelȱEȱMOSFET.
B) anȱnȬchannelȱDȱMOSFET.
C) aȱpȬchannelȱDȱMOSFET.
D) anȱnȬchannelȱEȱMOSFET.
Diff:ȱ2
334
17) Referȱtoȱ(d)ȱinȱtheȱfigureȱabove.ȱȱThisȱsymbolȱidentifies
A) aȱpȬchannelȱEȱMOSFET.
B) anȱnȬchannelȱDȱMOSFET.
C) aȱpȬchannelȱDȱMOSFET.
D) anȱnȬchannelȱEȱMOSFET.
Diff:ȱ2
18) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱIfȱI D = 4ȱmA,ȱtheȱvalueȱofȱV DS is
A) 12ȱV.
B) 8ȱV.
C) 4ȱV.
D) 0ȱV.
Diff:ȱ2
19) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱIfȱID = 4ȱmA,ȱtheȱvalueȱofȱV GS is
A) 20ȱV.
B) 11.2ȱV.
C) 8.8ȱV.
D) 0ȱV.
Diff:ȱ2
20) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱIfȱID = 2ȱmA,ȱtheȱvalueȱofȱV DS is
A) 4.4ȱV.
B) 10ȱV.
C) 15.6ȱV.
D) 20ȱV.
Diff:ȱ2
21) AȱJFETȱmanufacturerȇsȱdataȱsheetȱspecifiesȱV GS(off) = -8ȱVȱandȱIDSS = 6ȱmA.ȱWhenȱV GS = -4
V,ȱtheȱvalueȱofȱI Dȱwouldȱbe
A) 6ȱmA.
B) 1.25ȱmA.
C) 1.5ȱmA.
Diff:ȱ3
335
D) 4ȱmA.
22) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱvalueȱofȱtheȱvoltageȱdropȱacrossȱR D is
A) 20ȱV.
B) 12ȱV.
C) 6ȱV.
D) 3ȱV.
Diff:ȱ2
23) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱamplifierȱisȱbiasedȱfor
A) linearȱoperation.
B) pinch-offȱoperation.
C) saturation.
D) operationȱasȱaȱswitch.
Diff:ȱ2
24) Referȱtoȱtheȱfigureȱabove.ȱȱInȱthisȱcircuit,ȱV GS isȱbiasedȱcorrectlyȱforȱproperȱoperation.ȱȱThis
meansȱthat
VGSȱis
A) positive.
B) negative.
C) eitherȱnegativeȱorȱpositive.
D) 0ȱV.
Diff:ȱ3
25) Referȱtoȱtheȱfigureȱabove.ȱȱCalculateȱtheȱvalueȱofȱV D.
A) 20ȱV
B) 8ȱV
C) 6ȱV
D) 2ȱV
Diff:ȱ2
26) Referȱtoȱtheȱfigureȱabove.ȱȱCalculateȱtheȱvalueȱofȱV DS.
A) 0ȱV
B) 2ȱV
C) 4ȱV
D) -2ȱV
Diff:ȱ2
27) Forȱproperȱoperation,ȱanȱnȬchannelȱE-MOSFETȱshouldȱbeȱbiasedȱsoȱthatȱV GSȱis
A) eitherȱpositiveȱorȱnegative.
B) negative.
C) positive.
D) -4ȱV.
Diff:ȱ2
336
28) AȱgoodȱapplicationȱforȱaȱVMOSFETȱwouldȱbeȱasȱa
A) powerȱamplifier.
B) lowȱpowerȱamplifier.
C) lowȱinputȱimpedanceȱdevice.
D) substituteȱforȱaȱdiode.
Diff:ȱ2
29) AȱVMOSFETȱdeviceȱoperatesȱin
A) theȱdepletionȱmode.
B) theȱenhancementȱmode.
C) aȱJFETȱmode.
D) inȱeitherȱenhancementȱorȱdepletionȱmode.
Diff:ȱ2
30) Theȱgate-sourceȱjunctionȱofȱaȱJFETȱis
A) normallyȱnotȱbiased.
B) normallyȱforward-biased.
C) normallyȱreverse-biased.
D) aȱlowȱresistanceȱpathȱforȱdcȱcurrentȱwhenȱreverse-biased.
Diff:ȱ2
31) TheȱchannelȱwidthȱinȱaȱJFETȱisȱcontrolledȱby
A) varyingȱgateȱvoltage.
B) varyingȱdrainȱvoltage.
C) increasingȱforwardȱbiasȱonȱtheȱgate-sourceȱjunction.
D) increasingȱreverseȱbiasȱonȱtheȱdrain-sourceȱjunction.
Diff:ȱ2
32) Whenȱoperatedȱinȱtheȱohmicȱarea,ȱaȱJFETȱactsȱlikeȱa(n)
A) smallȱresistor.
B) voltageȱsource.
C) currentȱsource.
D) insulator.
Diff:ȱ2
33) VDSȱequalsȱpinch-offȱvoltageȱdividedȱbyȱthe
A) baseȱcurrent.
B) gateȱcurrent.
C) idealȱdrainȱcurrent.
D) drainȱcurrentȱforȱzeroȱgateȱvoltage.
Diff:ȱ3
337
34) IDSSȱcanȱbeȱdefinedȱasȱthe
A) minimumȱpossibleȱdrainȱcurrent.
B) maximumȱpossibleȱcurrentȱwithȱtheȱdrainȱshortedȱtoȱtheȱsource.
C) maximumȱcurrentȱdrain-to-sourceȱwithȱaȱshortedȱgate.
D) maximumȱdrainȱcurrentȱwithȱtheȱsourceȱshorted.
Diff:ȱ2
35) Theȱpinch-offȱvoltageȱhasȱtheȱsameȱmagnitudeȱasȱthe
A) gateȱvoltage.
B) drain-sourceȱvoltage.
C) gate-sourceȱvoltage.
D) gate-sourceȱcutoffȱvoltage.
Diff:ȱ3
36) JFETsȱareȱoftenȱcalled
A) one-wayȱswitches.
B) two-wayȱswitches.
C) bipolarȱdevices.
D) unipolarȱdevices.
Diff:ȱ2
37) TheȱtransconductanceȱcurveȱofȱaȱJFETȱisȱaȱgraphȱof
A) ISȱversusȱV DS.
B) IC versusȱV CE.
C) IDȱversusȱV GS.
D) ID Λ RDS.
Diff:ȱ2
38) ForȱaȱJFET,ȱthereȱisȱmaximumȱdrainȱcurrentȱwhen
A) VGSȱequalsȱVGS(off).
B) VDS isȱzero.
C) theȱdrainȱandȱsourceȱareȱinterchanged.
D) VGS isȱzero.
Diff:ȱ2
39) TheȱtransconductanceȱcurveȱofȱaȱJFETȱis
A) hyperbolic.
B) linear.
C) nonlinear.
D) symmetrical.
Diff:ȱ2
40) Aȱ________ȱchangeȱinȱV DSȱwillȱproduceȱaȱ________ȱchangeȱinȱI D.
A) small,ȱlarge
B) large,ȱsmall
C) large,ȱlarge
Diff:ȱ3
338
D) small,ȱsmall
41) Toȱgetȱaȱnegativeȱgate-sourceȱvoltageȱinȱaȱself-biasedȱJFETȱcircuit,ȱyouȱmustȱuseȱa
A) voltageȱdivider.
B) sourceȱresistor.
C) ground.
D) negativeȱgateȱsupplyȱvoltage.
Diff:ȱ3
42) TheȱeasiestȱwayȱtoȱbiasȱaȱJFETȱinȱtheȱohmicȱregionȱisȱwith
A) voltage-dividerȱbias.
B) self-bias.
C) gateȱbias.
D) sourceȱbias.
Diff:ȱ3
43) Oneȱadvantageȱofȱvoltage-dividerȱbiasȱisȱthatȱtheȱdependencyȱofȱdrainȱcurrentȱI D,ȱonȱthe
rangeȱofȱQ-pointsȱis
A) increased.
B) reduced.
C) notȱaffected.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
44) Theȱdepletion-modeȱMOSFETȱcan
A) operateȱwithȱonlyȱpositiveȱgateȱvoltages.
B) operateȱwithȱonlyȱnegativeȱgateȱvoltages.
C) notȱoperateȱinȱtheȱohmicȱregion.
D) operateȱwithȱpositiveȱasȱwellȱasȱnegativeȱgateȱvoltages.
Diff:ȱ2
45) AnȱnȬchannelȱE-MOSFETȱconductsȱwhenȱitȱhas
A) VGSȱ>ȱV P.
B) aȱthinȱlayerȱofȱpositiveȱchargesȱinȱtheȱsubstrateȱregionȱnearȱtheȱSiO 2 ȱlayer.
C) VDSȱ>ȱ0.
D) aȱthinȱlayerȱofȱnegativeȱchargesȱinȱtheȱsubstrateȱregionȱnearȱtheȱSiO 2 ȱlayer.
Diff:ȱ3
46) Forȱanȱenhancement-modeȱMOSFET,ȱtheȱminimumȱV GS requiredȱtoȱproduceȱdrainȱcurrentȱis
calledȱthe
A) thresholdȱvoltage,ȱdesignatedȱV GS(th).
B) blockingȱvoltage,ȱdesignatedȱVB.
C) breakoverȱvoltage.
D) IDss.
Diff:ȱ2
339
47) SpecialȱhandlingȱprecautionsȱshouldȱbeȱtakenȱwhenȱworkingȱwithȱMOSFETs.ȱWhichȱofȱthe
followingȱisȱnotȱoneȱofȱtheseȱprecautions?
A) Allȱtestȱequipmentȱshouldȱbeȱgrounded.
B) MOSFETȱdevicesȱshouldȱhaveȱtheirȱleadsȱshortedȱtogetherȱforȱshipmentȱandȱstorage.
C) NeverȱremoveȱorȱinsertȱMOSFETȱdevicesȱwithȱtheȱpowerȱon.
D) WorkersȱhandlingȱMOSFETȱdevicesȱshouldȱnotȱhaveȱgroundingȱstrapsȱattachedȱtoȱtheir
wrists.
Diff:ȱ2
48) TheȱsimplestȱmethodȱtoȱbiasȱaȱD-MOSFETȱisȱto
A) setȱVGSȱ=ȱ+4.
B) setȱVGS = -4.
C) setȱVGSȱ=ȱ0.
D) selectȱtheȱcorrectȱvalueȱR D.
Diff:ȱ3
49) Theȱtype(s)ȱofȱbiasȱmostȱoftenȱusedȱwithȱE-MOSFETȱcircuitsȱis
A) drain-feedback.
B) constantȱcurrent.
C) voltage-divider.
D) BothȱAȱandȱCȱabove.
Diff:ȱ2
340
Chapterȱ9 FETȱAmplifiers and Switching Circuits
1) Theȱformulaȱforȱtheȱvoltageȱgainȱofȱaȱcommon-sourceȱamplifierȱisȱRD/gm .
Diff:ȱ2
2) Loadȱresistanceȱaddedȱtoȱtheȱoutputȱofȱanȱamplifierȱincreasesȱtheȱvoltageȱgain.
Diff:ȱ2
3) Theȱadditionȱofȱaȱsourceȱbypassȱcapacitorȱwillȱincreaseȱtheȱvoltageȱgain.
Diff:ȱ2
4) FETsȱareȱsuperiorȱtoȱBJTsȱinȱalmostȱallȱswitchingȱapplications.
Diff:ȱ2
5) FETȱamplifiersȱgenerallyȱhaveȱlowerȱdistortionȱthanȱBJTȱamplifiers.
Diff:ȱ2
6) Cascodeȱamplifiersȱareȱusedȱprimarilyȱinȱradioȱfrequencyȱapplications.
Diff:ȱ2
7) MostȱofȱtheȱgainȱinȱaȱJFET-basedȱcascodeȱamplifierȱisȱprovidedȱbyȱtheȱCSȱamplifier.
Diff:ȱ3
8) ClassȱDȱamplifiersȱusuallyȱemployȱJFETs.
Diff:ȱ2
9) Theȱ3ȱstagesȱinȱaȱclassȱDȱamplifierȱareȱtheȱpulse-width-modulator,ȱtheȱswitchingȱamplifier,
andȱtheȱlow-passȱfilter.
Diff:ȱ3
10) Aȱpulse-width-modulatorȱemploysȱaȱsquare-waveȱgeneratorȱandȱaȱcomparator.
Diff:ȱ3
11) AȱMOSFETȱswitchȱisȱturnedȱonȱandȱoffȱbyȱchangingȱtheȱsourceȱvoltage.
Diff:ȱ2
12) AnȱanalogȱMOSFETȱswitchȱisȱturnedȱonȱwhenȱtheȱgateȱreceivesȱaȱpositiveȱvoltageȱpulse.
Diff:ȱ2
341
13) CMOSȱcombinesȱn-channelȱandȱp-channelȱD-MOSFETS.
Diff:ȱ3
14) PowerȱMOSFETsȱhaveȱaȱnegativeȱtemperatureȱcoefficientȱandȱthereforeȱareȱlessȱproneȱto
thermalȱrunaway.
Diff:ȱ3
15) InȱanȱamplifierȱusingȱaȱJFET,ȱtheȱgateȱcurrentȱisȱapproximatelyȱ0.
Diff:ȱ2
16) Aȱcommon-sourceȱamplifierȱhasȱaȱ________ȱphaseȱshiftȱbetweenȱtheȱinputȱandȱtheȱoutput.
A) 45°
B) 90°
C) 180°
D) 360°
Diff:ȱ2
17) Referȱtoȱtheȱfigureȱabove.ȱȱAssumingȱmidpointȱbiasing,ȱifȱV GS = -4ȱV,ȱtheȱvalueȱofȱR Sȱthatȱwill
provideȱthisȱvalueȱis
A) 600ơ̇̄.
B) 1.2ȱk̛.
C) 80ơ̇̄.
D) 800ơ̇̄.
Diff:ȱ2
18) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱV in = 50ȱmVp-p,ȱtheȱoutputȱvoltageȱis
A) 50ȱmVp-p.
B) 4.4ȱVp-p.
C) 0.044ȱVp-p.
D) 440ȱmVp-p.
Diff:ȱ3
19) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱmeasuredȱvalueȱofȱV out wereȱbelowȱnormal,ȱtheȱproblem
mightȱbeȱthat
A) RDȱisȱopen.
B) C2 isȱshorted.
C) C2 ȱisȱopen.
D) Vin hasȱincreased.
Diff:ȱ3
342
20) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱV in = 1ȱVp-p,ȱtheȱoutputȱvoltageȱVout wouldȱbe
A) undistorted.
B) clippedȱonȱtheȱnegativeȱpeaks.
C) clippedȱonȱtheȱpositiveȱpeaks.
D) 0ȱV.
Diff:ȱ2
21) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱID = 6ȱmA,ȱtheȱvalueȱofȱV GS is
A) 9ȱV.
B) -9ȱV.
C) -19.8ȱV.
D) -10.2ȱV.
Diff:ȱ2
22) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱgm = 6500ȱΐSȱandȱanȱinputȱsignalȱofȱ125ȱmVp-pȱisȱappliedȱtoȱthe
gate,ȱtheȱoutputȱvoltageȱV outȱis
A) 2.68ȱVp-p.
B) 0.8125ȱVp-p.
C) 1.625ȱVp-p.
D) 6.25ȱVp-p.
Diff:ȱ2
23) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱC2 opened,ȱtheȱoutputȱsignalȱwould
A) increaseȱinȱvalue.
B) decreaseȱinȱvalue.
C) notȱchange.
D) decreaseȱandȱthenȱincrease.
Diff:ȱ2
24) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱID = 4ȱmA,ȱI DSS = 16ȱmA,ȱandȱV GS(off)ȱ= -8ȱV,ȱVDSȱwouldȱbe
A) 19.2ȱV.
B) -6ȱV.
C) 10.8ȱV.
D) 30ȱV.
Diff:ȱ2
25) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱgm = 4000ȱΐSȱandȱaȱsignalȱofȱ75ȱmVȱrmsȱisȱappliedȱtoȱtheȱgate,ȱthe
p-pȱoutputȱvoltageȱis
A) 990ȱmV.
B) 1.13ȱVp-p.
C) 2.8ȱVp-p.
Diff:ȱ3
343
D) 990ȱVp-p.
26) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR 7 wereȱtoȱincreaseȱinȱvalue,ȱVout would
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ3
27) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱC2 opened,ȱVout would
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ2
28) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR 1 opened,ȱVout would
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ3
29) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱC3 opened,ȱVout would
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ2
30) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR 3 opened,ȱVout would
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ2
31) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR 5 opened,ȱVout would
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ2
344
32) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱsource-drainȱofȱQ2 shorted,ȱtheȱoutputȱsignalȱfromȱQ 1 ȱwould
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ3
33) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱAV1 = 18ȱandȱAVt = 288,ȱtheȱvalueȱofȱA V2 wouldȱbe
A) 5184.
B) 18.
C) 49.18.
D) 16.
Diff:ȱ2
34) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱC4 opened,ȱtheȱsignalȱvoltageȱatȱtheȱdrainȱofȱQ 1 ȱwould
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ3
35) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱC5 opened,ȱtheȱsignalȱvoltageȱacrossȱR7 would
A) increase.
B) beȱzero.
C) remainȱtheȱsame.
D) distort.
Diff:ȱ3
36) WhatȱcomponentȱofȱanȱFETȱamplifierȱneedsȱtoȱbeȱatȱleastȱtenȱtimesȱgreaterȱthanȱR Dȱtoȱensure
maximumȱvoltageȱgain?
A) rȇds
B) RS
C) Rs
D) gm
Diff:ȱ2
37) Inȱaȱself-biasedȱcommon-sourceȱamplifier,ȱwhatȱpurposeȱdoesȱresistorȱRGȱserve?
A) Keepsȱtheȱgateȱatȱapproximatelyȱzeroȱvolts
B) Developsȱtheȱgate-sourceȱbiasȱcurrent
C) Preventsȱloadingȱofȱtheȱacȱsignalȱsource
D) BothȱAȱandȱCȱabove.
Diff:ȱ3
38) AȱCSȱamplifierȱhasȱaȱvoltageȱgainȱof
A) gm Rd.
B) gm Rs.
C)
Diff:ȱ3
345
gm Rs
.
(1ȱ+ȱg m Rd)
D)
gm Rd
.
(1ȱ+ȱg m Rd)
39) Theȱcapacitorȱconnectedȱtoȱtheȱsourceȱofȱaȱcommonȱsourceȱamplifier
A) isȱusedȱforȱinputȱcoupling.
B) isȱusedȱforȱoutputȱcoupling.
C) makesȱtheȱsourceȱanȱacȱgroundȱpoint.
D) isȱneededȱforȱextraȱpowerȱsupplyȱfiltering.
Diff:ȱ2
40) Approximatelyȱhowȱmuchȱsignalȱvoltageȱshouldȱbeȱmeasuredȱatȱtheȱbypassedȱsourceȱofȱa
commonȱsourceȱamplifier?
Vin
A) Vin
B)
2
C) theȱsameȱamountȱasȱtheȱdrain
D) 0ȱV
Diff:ȱ2
41) Aȱsourceȱfollowerȱhasȱaȱvoltageȱgainȱof
gm
A) gm Rd.
B)
.
RS
C)
gm Rs
.
(1ȱ+ȱg m RS)
D)
gm Rd
.
(1ȱ+ȱg m Rd)
Diff:ȱ2
42) Whenȱtheȱinputȱsignalȱisȱlarge,ȱaȱsourceȱfollowerȱhas
A) aȱvoltageȱgainȱofȱlessȱthanȱone.
B) aȱsmallȱdistortion.
C) aȱhighȱinputȱresistance.
D) Allȱofȱtheȱabove.
Diff:ȱ2
43) Changingȱ________ȱcanȱcontrolȱtheȱvoltageȱgainȱofȱaȱcommon -sourceȱamplifier.
A) theȱinputȱvoltage
B) gm
C) VDD
D) RS
Diff:ȱ2
44) Whereȱisȱtheȱinputȱsignalȱappliedȱinȱaȱcommon-gateȱamplifier?
A) Source
B) Gate
C) Drain
D) Base
Diff:ȱ1
45) IfȱtheȱinterstageȱcouplingȱcapacitorȱopensȱinȱaȱtwoȱstageȱFETȱamplifier,ȱtheȱoutputȱsignalȱwill
A) doubleȱinȱamplitude.
B) beȱslightlyȱdecreased.
C) beȱslightlyȱincreased.
D) beȱzero.
Diff:ȱ2
346
46) TwoȱFETȱamplifiersȱareȱoperatedȱinȱcascade.ȱIfȱtheȱgainȱofȱtheȱamplifiersȱisȱequalȱandȱtheȱtotal
overallȱgainȱisȱ25,ȱtheȱgainȱofȱeachȱamplifierȱis
A) 2.
B) 5.
C) 7.25.
D) 12.5.
Diff:ȱ2
47) TwoȱFETȱamplifiersȱoperatedȱinȱcascadeȱhaveȱgainsȱofȱ6ȱdBȱandȱ8ȱdB.ȱTheȱtotalȱoverallȱgainȱin
dBȱis
A) 2ȱdB.
B) 14ȱdB.
C) 48ȱdB.
D) 64ȱdB.
Diff:ȱ2
48) Howȱmuchȱdcȱvoltageȱshouldȱalwaysȱbeȱmeasuredȱatȱtheȱgateȱofȱaȱcommon -gateȱamplifier?
+VDD
C) 0.7ȱV
D) 0ȱV
A) +VDD
B)
2
Diff:ȱ2
49) WhenȱtroubleshootingȱaȱmultipleȱstageȱCSȱamplifier,ȱsignalȱtracingȱrevealsȱaȱsignificant
amountȱofȱsignalȱvoltageȱatȱtheȱsourceȱofȱtheȱfirstȱstage.ȱTheȱmostȱlikelyȱproblemȱis
A) anȱopenȱcouplingȱcapacitorȱfromȱsignalȱsource.
B) aȱshortedȱloadȱinȱthirdȱstage.
C) anȱopenȱsourceȱbypassȱcapacitor.
D) tooȱmuchȱdcȱsupplyȱvoltage.
Diff:ȱ3
50) TheȱmainȱreasonȱthatȱtheȱinputȱresistanceȱofȱFETȱamplifiersȱisȱsoȱhighȱisȱthatȱthe
A) FETȱjunctionsȱareȱforward-biasedȱandȱmadeȱofȱgermanium.
B) biasingȱresistorsȱareȱextremelyȱsmall.
C) powerȱsuppliesȱusedȱareȱhighȱvoltage/lowȱcurrent.
D) gateȱjunctionȱisȱreverse-biased.
Diff:ȱ2
51) TheȱacȱequivalentȱcircuitȱofȱaȱFETȱamplifierȱassumesȱthatȱtheȱcapacitors
A) areȱtreatedȱlikeȱshorts.
B) haveȱanȱXCȱofȱ600ơ̇̄ȱatȱtheȱsignalȱfrequency.
C) areȱtreatedȱlikeȱopens.
D) haveȱanȱXCȱofȱ1ȱM̛ȱatȱtheȱsignalȱfrequency.
Diff:ȱ2
347
52) WhichȱofȱtheȱfollowingȱisȱnotȱaȱFETȱamplifier?
A) Source-follower
B) Common-gate
C) Emitter-follower
D) Common-drain
Diff:ȱ1
53) IfȱRSȱisȱnotȱbypassed
A) theȱdcȱpowerȱsupplyȱwillȱhaveȱexcessiveȱripple.
B) theȱgainȱwillȱbeȱextremelyȱhigh.
C) theȱgainȱwillȱbeȱreduced.
D) noȱsignalȱwillȱbeȱcoupledȱtoȱtheȱoutput.
Diff:ȱ2
54) Twoȱcommon-sourceȱamplifiersȱareȱcascaded.ȱTheȱoverallȱphaseȱshiftȱfromȱtheȱinputȱofȱthe
firstȱamplifierȱtoȱtheȱoutputȱofȱtheȱsecondȱamplifierȱis
A) 0°.
B) 45°.
C) 90°.
D) 180°.
Diff:ȱ2
55) WhichȱofȱtheȱfollowingȱisȱnotȱpartȱofȱaȱclassȱDȱamplifier?
A) oscillator
B) pulse-widthȱmodulator
C) low-passȱfilter
D) switchingȱamplifier
Diff:ȱ3
56) WhichȱofȱtheȱfollowingȱisȱnotȱaȱcharacteristicȱofȱaȱJFET-basedȱcascodeȱamplifier?
A) highȱinputȱresistance
B) highȱinputȱcapacitance
C) highȱfrequencyȱresponse
D) highȱgain
Diff:ȱ3
57) Whatȱisȱtheȱroleȱofȱtheȱlow-passȱfilterȱinȱaȱclassȱDȱamplifier?
A) limitȱamplifierȱfrequencyȱresponse
B) removeȱhum
C) preventȱoscillation
D) removeȱtheȱmodulatingȱfrequencyȱandȱharmonics
Diff:ȱ3
58) WhichȱofȱtheȱfollowingȱisȱnotȱanȱapplicationȱofȱanȱanalogȱMOSFETȱswitch
A) sample-and-holdȱcircuit
B) analogȱmultiplexer
C) inverter
D) switchedȱcapacitorȱcircuit
Diff:ȱ2
348
Chapterȱ10 AmplifierȱFrequencyȱResponse
1) Couplingȱandȱbypassȱcapacitorsȱlimitȱtheȱlow-frequencyȱresponseȱofȱanȱamplifier.
Diff:ȱ2
2) High-frequencyȱresponseȱisȱlimitedȱbyȱtheȱinternalȱcapacitancesȱofȱaȱtransistor.
Diff:ȱ2
3) Atȱtheȱcutoffȱfrequency,ȱtheȱoutputȱisȱdownȱbyȱ3ȱdB.
Diff:ȱ2
4) Anȱoctaveȱofȱfrequencyȱisȱaȱten-timesȱchange.
Diff:ȱ2
5) Theȱbandwidthȱisȱtheȱsumȱofȱtheȱtwoȱcutoffȱfrequencies.
Diff:ȱ2
6) ToȱeffectivelyȱanalyzeȱanȱRCȱcoupledȱamplifierȇsȱhighȱfrequencyȱresponse,ȱyouȱonlyȱneedȱto
considerȱtheȱcouplingȱandȱbypassȱcapacitances.ȱTheȱinternalȱcapacitanceȱcanȱbeȱignored.
Diff:ȱ2
7) Ifȱanȱamplifierȱhasȱanȱoutputȱvoltageȱofȱ12.7ȱVp-pȱatȱtheȱmidpointȱofȱtheȱfrequencyȱrange,ȱthe
outputȱvoltageȱatȱtheȱcutoffȱfrequencyȱwouldȱbe
A) 12.7ȱVp-p.
B) 4.49ȱVp-p.
C) 5.89ȱVp-p.
D) 8.98ȱVp-p.
Diff:ȱ2
8) Ifȱanȱamplifierȱhasȱanȱinputȱsignalȱvoltageȱofȱ0.37ȱmVȱandȱanȱoutputȱvoltageȱofȱ16.8ȱV,ȱthe
voltageȱgainȱinȱdBȱwouldȱbe
A) 45.4ȱdB.
B) 33.1ȱdB.
C) 93.1ȱdB.
D) 46.6ȱdB.
Diff:ȱ2
9) Ifȱanȱamplifierȱhasȱaȱvoltageȱgainȱofȱ54ȱdB,ȱandȱanȱinputȱsignalȱofȱ22ȱmV,ȱtheȱoutputȱsignal
voltageȱwouldȱbe
A) 11ȱV.
B) 55.3ȱV.
C) 2.45ȱV.
D) 24.5ȱV.
Diff:ȱ3
10) Ifȱanȱamplifierȱhasȱaȱbandwidthȱofȱ47ȱkHzȱandȱaȱhigherȱcutoffȱfrequencyȱofȱ104ȱkHz,ȱtheȱlower
cutoffȱfrequencyȱwouldȱbe
A) 151ȱkHz.
B) 57ȱkHz.
C) 47ȱkHz.
Diff:ȱ2
349
D) 104ȱkHz.
11) IfȱanȱamplifierȱhasȱanȱR inȱ=ȱ950ơ̇̄,ȱandȱaȱcouplingȱcapacitorȱofȱvalueȱ3.3ȱ ΐF,ȱtheȱapproximate
cutoffȱfrequencyȱwouldȱbe
A) 508ȱHz.
B) 50.8ȱkHz.
C) 50.8ȱHz.
D) 5.08ȱHz.
Diff:ȱ2
12) TheȱfcȱofȱaȱcertainȱRCȱnetworkȱthatȱhasȱvaluesȱofȱRȱ = 470ơ̇̄ andȱCȱ= 0.005ȱΐFȱis
A) 67.7ȱkHz.
B) 425ȱkHz.
C) 213ȱkHz.
D) 12ȱkHz.
Diff:ȱ2
13) Referȱtoȱtheȱfigureȱabove.ȱȱLowȱfrequencyȱresponseȱisȱaffectedȱby
A) RC.
B) CBE.
C) C3.
D) Allȱofȱtheȱabove.
Diff:ȱ2
14) Referȱtoȱtheȱfigureȱabove.ȱȱHighȱfrequencyȱresponseȱisȱaffectedȱby
A) RC.
B) CBE.
C) C3.
D) Allȱofȱtheȱabove.
Diff:ȱ2
15) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱoutputȱvoltageȱatȱtheȱupperȱcutoffȱfrequencyȱwasȱ7.19ȱVp -p,
theȱoutputȱvoltageȱthatȱwouldȱbeȱexpectedȱatȱtheȱlowerȱcutoffȱfrequencyȱis
A) 5.08ȱVp-p.
B) 7.19ȱVp-p.
C) 10.17ȱVp-p.
Diff:ȱ3
350
D) 2.11ȱVp-p.
16) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱoutputȱvoltageȱatȱf cl isȱ22ȱmV.ȱȱIdeally,ȱV outȱatȱtheȱmidpoint
frequencyȱwouldȱbe
A) 22ȱmV.
B) 17ȱmV.
C) 31.1ȱmV.
D) Notȱenoughȱinformationȱtoȱdetermine.
Diff:ȱ3
17) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱbandwidthȱofȱthisȱamplifierȱis
A) theȱsumȱofȱtheȱupperȱandȱlowerȱfrequencies.
B) theȱupperȱfrequencyȱdividedȱbyȱ0.707.
C) theȱdifferenceȱbetweenȱtheȱupperȱandȱlowerȱfrequencies.
D) theȱlowerȱfrequencyȱtimesȱ0.707.
Diff:ȱ3
18) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱcapacitanceȱC bc affects
A) high-frequencyȱresponse.
B) low-frequencyȱresponse.
C) mid-rangeȱresponse.
D) nothing.
Diff:ȱ2
19) Referȱtoȱtheȱfigureȱabove.ȱAȱdefiniteȱreductionȱinȱtheȱoutputȱvoltageȱisȱnoticed.ȱTheȱtroubleȱis
that
A) C3 ȱhasȱshorted.
B) C1 hasȱopened.
C) C2 ȱhasȱopened.
D) C3 hasȱopened.
Diff:ȱ3
20) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱreductionȱinȱtheȱoutputȱatȱveryȱhighȱfrequenciesȱisȱdueȱto
A) theȱnegativeȱfeedbackȱeffectȱofȱR E.
B) theȱnegativeȱfeedbackȱeffectȱofȱCbc.
C) theȱpositiveȱfeedbackȱeffectȱofȱV BE.
D) RL decreasingȱinȱvalue.
Diff:ȱ2
21) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱoutputȱvoltageȱatȱf cl isȱ12ȱmV,ȱtheȱactualȱoutputȱvoltageȱatȱthe
midpointȱfrequencyȱwouldȱbe
A) 12ȱmV.
B) 12ȱmVp-p.
C) 16.97ȱmV.
D) 8.48ȱmV.
Diff:ȱ2
22) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR L increasesȱinȱvalue,ȱtheȱoutputȱvoltageȱwould
A) increase.
B) decrease.
C) remainȱtheȱsame.
D) Cannotȱbeȱdetermined.
Diff:ȱ2
351
23) AȱBodeȱplot
A) isȱaȱtestingȱmethodȱusedȱforȱdcȱamplifiers.
B) providesȱaȱvisualȱpresentationȱofȱdecibelȱvoltageȱgainȱvs.ȱfrequency.
C) indicatesȱvoltageȱgainȱwithȱnoȱreferenceȱtoȱfrequency.
D) indicatesȱvoltageȱgainȱonlyȱatȱ0ȱHz.
Diff:ȱ2
24) Theȱcutoffȱfrequencyȱofȱaȱlowȱpassȱfilterȱoccursȱat
A) -5ȱdB.
B) -3ȱdB.
C) +3ȱdB.
D) -20ȱdB.
Diff:ȱ2
25) Aȱhighȱpassȱfilterȱmayȱbeȱusedȱto
A) passȱlowȱfrequencies.
B) passȱhighȱfrequencies.
C) passȱfrequenciesȱbetweenȱlowȱandȱhigh.
D) BothȱAȱandȱBȱabove.
Diff:ȱ2
26) Aȱroll-offȱofȱ20ȱdBȱperȱdecadeȱisȱequivalentȱtoȱaȱroll-offȱofȱ________ȱperȱoctave.
A) 3ȱdB
B) 13ȱdB
C) 12ȱdB
D) 6ȱdB
Diff:ȱ2
27) Whichȱofȱtheȱfollowingȱcapacitancesȱaffectsȱtheȱhighȱfrequencyȱresponseȱofȱanȱamplifier?
A) Strayȱwiringȱcapacitance
B) Internalȱpnȱjunctionȱcapacitance
C) Couplingȱandȱbypassȱcapacitors
D) BothȱAȱandȱBȱabove.
Diff:ȱ1
28) Atȱlowȱfrequencies,ȱtheȱcouplingȱcapacitorsȱproduceȱaȱdecreaseȱin
A) inputȱresistance.
B) voltageȱgain.
C) generatorȱresistance.
D) generatorȱvoltage.
Diff:ȱ2
29) Ifȱtheȱvalueȱofȱaȱfeedbackȱcapacitorȱisȱ50ȱpF,ȱwhatȱisȱtheȱinputȱMillerȱcapacitanceȱwhenȱA V =
200?
A) 1ȱΐF
B) 10ȱΐF
C) 100ȱΐF
Diff:ȱ2
352
D) 10ȱnF
30) Theȱcriticalȱfrequenciesȱofȱanȱamplifierȱareȱtheȱfrequenciesȱwhereȱtheȱoutputȱvoltageȱis
A) halfȱofȱV mid.
B) 0.707ȱofȱV mid.
C) zero.
D) 0.25ȱofȱVmid.
Diff:ȱ2
31) Theȱvoltageȱgainȱofȱanȱamplifierȱisȱ200.ȱȱTheȱdecibelȱvoltageȱgainȱis
A) 23ȱdB.
B) 46ȱdB.
C) 200ȱdB.
D) 106ȱdB.
Diff:ȱ2
32) Ifȱtheȱvoltageȱgainȱdoubles,ȱtheȱdecibelȱvoltageȱgainȱincreasesȱby
A) aȱfactorȱofȱ2.
B) 3ȱdB.
C) 6ȱdB.
D) 10ȱdB.
Diff:ȱ2
33) InȱtheȱmidbandȱofȱaȱCEȱamplifier
A) theȱemitterȱisȱnotȱatȱacȱground.
B) theȱMillerȱeffectȱhasȱmaximumȱinfluence.
C) theȱvoltageȱgainȱisȱmaximum.
D) theȱcouplingȱandȱbypassȱcapacitorsȱappearȱopen.
Diff:ȱ2
34) Ifȱtheȱpowerȱgainȱdoubles,ȱtheȱdecibelȱpowerȱgainȱincreasesȱby
A) aȱfactorȱofȱ2.
B) 3ȱdB.
C) 6ȱdB.
D) 10ȱdB.
Diff:ȱ2
35) Atȱlowȱfrequencies,ȱtheȱemitter-bypassȱcapacitor
A) isȱnoȱlongerȱanȱacȱshort.
B) hasȱminimumȱXC.
C) increasesȱtheȱoutputȱvoltage.
D) increasesȱtheȱvoltageȱgain.
Diff:ȱ2
36) Raisingȱtheȱfrequencyȱofȱ1ȱkHzȱbyȱ2ȱoctavesȱresultsȱinȱaȱfrequencyȱof
A) 4ȱkHz.
B) 500ȱHz.
C) 250ȱHz.
D) 2ȱMHz.
Diff:ȱ2
37) Theȱfrequencyȱresponseȱofȱanȱamplifierȱisȱaȱgraphȱof
A) voltageȱversusȱcurrent.
B) voltageȱversusȱtime.
C) outputȱvoltageȱversusȱfrequency.
D) inputȱvoltageȱversusȱfrequency.
Diff:ȱ1
353
38) Theȱvoltageȱgainȱofȱanȱamplifierȱisȱ150.ȱȱIfȱtheȱoutputȱvoltageȱdoublesȱ(forȱtheȱsameȱamountȱof
inputȱvoltage),ȱtheȱvoltageȱgainȱequals
A) 21.7ȱdb.
B) 43.5ȱdb.
C) 49.5ȱdb.
D) 114ȱdb.
Diff:ȱ2
39) Atȱtheȱlowerȱorȱupperȱcutoffȱfrequency,ȱtheȱvoltageȱgainȱis
A) 0.35ȱAv mid.
B) 0.5ȱAvmid.
C) 0.707ȱAv mid.
D) 0.995 ȱAv mid
.
Diff:ȱ1
40) PhaseȱshiftȱinȱtheȱinputȱofȱanȱRCȱcircuitȱwillȱapproachȱ90 ° whenȱfrequencyȱapproaches
A) zero.
B) maximum.
C) mid-range.
Diff:ȱ2
41) WhatȱeffectȱdoesȱlowȱfrequencyȱhaveȱonȱtheȱemitterȱbypassȱRCȱcircuit?
A) Decreasesȱimpedanceȱandȱincreasesȱvoltageȱgain
B) Increasesȱimpedanceȱandȱdecreasesȱvoltageȱgain
C) Increasesȱimpedanceȱandȱincreasesȱvoltageȱgain
D) Decreasesȱimpedanceȱandȱdecreasesȱvoltageȱgain
Diff:ȱ2
42) Forȱaȱlagȱnetworkȱaboveȱtheȱcutoffȱfrequency,ȱtheȱvoltageȱgain
A) decreasesȱatȱtheȱrateȱofȱ20ȱdbȱperȱdecade.
B) increasesȱatȱtheȱrateȱofȱ6ȱdbȱperȱoctave.
C) decreasesȱatȱtheȱrateȱofȱ6ȱdbȱperȱoctave.
D) AȱandȱCȱabove.
Diff:ȱ3
43) Semilogȱgraphȱpaperȱhas
A) twoȱ(2)ȱlinearȱaxis.
B) oneȱverticalȱlinearȱaxisȱandȱoneȱlogarithmicȱhorizontalȱaxis.
C) oneȱhorizontalȱlinearȱaxisȱandȱoneȱverticalȱlogarithmicȱaxis.
D) twoȱ(2)ȱlogarithmicȱaxis.
Diff:ȱ1
354
D) cutoff.
44) Theȱunity-gainȱfrequencyȱ(fT)ȱequalsȱtheȱproductȱofȱmid-rangeȱvoltageȱgainȱ(A V(mid))ȱand
the
A) compensatingȱcapacitance.
B) fcu.
C) BW.
D) loadȱresistance.
Diff:ȱ2
45) Atȱtheȱunity-gainȱfrequency,ȱtheȱopen-loopȱvoltageȱgainȱis
A) 1.
B) Amid.
C) zero.
Diff:ȱ2
355
D) veryȱlarge.
Chapterȱ11 Thyristors
1) TheȱSCRȱisȱaȱdeviceȱthatȱcanȱbeȱtriggeredȱonȱbyȱaȱpulseȱappliedȱtoȱtheȱgate.
Diff:ȱ2
2) Aȱdeviceȱthatȱconductsȱcurrentȱinȱonlyȱoneȱdirectionȱisȱcalledȱaȱdiac.
Diff:ȱ2
3) AȱdeviceȱthatȱcanȱbeȱturnedȱonȱorȱoffȱbyȱaȱgateȱpulseȱisȱcalledȱanȱSCS.
Diff:ȱ2
4) Aȱtriacȱcanȱbeȱturnedȱonȱbyȱaȱpulseȱappliedȱtoȱtheȱgate.
Diff:ȱ2
5) AȱUJTȱisȱturnedȱonȱbyȱaȱnegativeȱpulseȱatȱtheȱbase.
Diff:ȱ2
6) Theȱforcedȱcommutationȱmethodȱrequiresȱmomentarilyȱforcingȱcurrentȱinȱtheȱdirection
oppositeȱtoȱtheȱreverseȱconductionȱsoȱthatȱtheȱnetȱreverseȱcurrentȱisȱreducedȱbelowȱtheȱholding
value.
Diff:ȱ3
7) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱTheȱsymbolȱisȱfor
A) aȱtriac.
B) aȱUJT.
C) aȱdiac.
D) aȱPUT.
E) anȱSCR.
D) aȱPUT.
E) anȱSCR.
D) aȱPUT.
E) anȱSCR.
Diff:ȱ2
8) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱTheȱsymbolȱisȱfor
A) aȱtriac.
B) aȱUJT.
C) aȱdiac.
Diff:ȱ2
9) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱTheȱsymbolȱisȱfor
A) aȱtriac.
B) aȱUJT.
C) aȱdiac.
Diff:ȱ2
356
10) Referȱtoȱ(d)ȱinȱtheȱfigureȱabove.ȱȱTheȱsymbolȱisȱfor
A) aȱtriac.
B) aȱUJT.
C) aȱdiac.
D) aȱPUT.
E) anȱSCR.
Diff:ȱ2
11) ToȱavoidȱconfusingȱtheȱschematicȱsymbolsȱforȱaȱJFETȱandȱaȱUJT,ȱkeepȱinȱmindȱthatȱtheȱUJT
symbol
A) hasȱtwoȱcircles.
B) hasȱnoȱarrow.
C) usesȱaȱdot.
D) hasȱfourȱterminals.
E) hasȱanȱarrowȱatȱanȱangle.
Diff:ȱ2
12) Aȱgoodȱchoiceȱtoȱtriggerȱaȱtriacȱwouldȱbeȱa(n)
A) 4-layerȱdiode.
B) SCR.
C) diac.
D) Schockleyȱdiode.
Diff:ȱ2
13) Theȱbestȱchoiceȱtoȱcontrolȱaȱsmallȱvariableȱspeedȱacȱmotorȱisȱa(n)
A) triac.
B) diac.
C) SCR.
D) UJT.
E) PUT.
Diff:ȱ2
14) Theȱbestȱchoiceȱtoȱshutȱdownȱaȱdcȱpowerȱsupplyȱinȱcaseȱofȱanȱabnormallyȱhighȱvoltage
conditionȱisȱa(n)
A) triac.
B) diac.
C) SCR.
D) UJT.
E) PUT.
Diff:ȱ2
15) Eachȱofȱtheȱfollowingȱhasȱaȱgateȱexceptȱthe
A) triac.
B) diac.
C) SCR.
D) PUT.
Diff:ȱ2
16) Theȱmostȱlikelyȱdeviceȱtoȱbeȱusedȱinȱanȱoscillatorȱisȱa(n)
A) triac.
B) diac.
C) SCR.
D) UJT.
E) PUT.
Diff:ȱ2
17) AnȱSCSȱhasȱaȱuniqueȱabilityȱto
A) beȱturnedȱonȱorȱoffȱwithȱaȱpulse.
B) beȱturnedȱoffȱonlyȱwithȱaȱpulse.
C) controlȱaȱPUT.
D) Allȱofȱtheȱabove.
Diff:ȱ2
357
18) IfȱanȱSCRȱstartsȱtoȱconductȱwhenȱaȱgateȱcurrentȱisȱestablished,ȱwhenȱtheȱgateȱcircuitȱis
interruptedȱtheȱSCR
A) willȱturnȱoff.
B) currentȱwillȱincrease.
C) willȱcontinueȱtoȱconduct.
D) gateȱcurrentȱwillȱincrease.
Diff:ȱ3
19) AnȱSCRȱwillȱturnȱoffȱwhenȱtheȱvoltageȱacrossȱitȱis
A) increasedȱtoȱtheȱsupplyȱvoltage.
B) decreasedȱtoȱnearȱ0ȱV.
C) timedȱout.
D) decreasedȱbyȱtheȱvalueȱofȱtheȱgateȱvoltage.
Diff:ȱ2
20) Aȱtriacȱisȱusedȱforȱacȱbecause
A) itȱconductsȱonȱbothȱalternations.
B) itȱisȱturnedȱoffȱwhenȱtheȱacȱvoltageȱreachesȱzero.
C) itȱcanȱdeliverȱmoreȱpowerȱtoȱtheȱloadȱinȱaȱcycle.
D) Allȱofȱtheȱabove.
Diff:ȱ2
21) AȱdeviceȱisȱneededȱtoȱtriggerȱanȱSCR.ȱȱOneȱpossibleȱdeviceȱtoȱuseȱmightȱbeȱa(n)
A) SCR.
B) UJT.
C) Schockleyȱdiode.
D) PUT.
Diff:ȱ2
22) Theȱbestȱdeviceȱtoȱbeȱusedȱtoȱcontrolȱaȱdcȱmotorȱisȱthe
A) triac.
B) PUT.
C) SCR.
D) diac.
Diff:ȱ2
23) AnȱSCRȱisȱusedȱtoȱcontrolȱtheȱspeedȱofȱaȱdcȱmotorȱbyȱ________ȱtheȱ________ȱofȱtheȱpulse
deliveredȱtoȱtheȱmotor.
A) varying,ȱwidth
B) increasing,ȱamplitude
C) decreasing,ȱgateȱwidth
D) Noneȱofȱtheȱabove.
Diff:ȱ3
358
24) Ofȱtheȱfollowingȱapplications,ȱtheȱlikelyȱoneȱtoȱuseȱaȱdiacȱisȱa(n)
A) batteryȱcharger.
B) oscillator.
C) highȱfrequencyȱamplifier.
D) lampȱdimmer.
Diff:ȱ2
25) Ifȱtheȱgateȱcircuitȱisȱopenȱonȱaȱtriacȱusedȱforȱacȱmotorȱcontrol,ȱtheȱmotor
A) canȱneverȱturnȱon.
B) willȱconstantlyȱrunȱatȱhalfȱspeed.
C) willȱconstantlyȱrunȱatȱfullȱspeed.
D) willȱrunȱatȱ60ȱRPM.
Diff:ȱ3
26) Aȱthyristorȱcanȱbeȱusedȱas
A) aȱresistor.
B) anȱamplifier.
C) aȱswitch.
D) aȱpowerȱsource.
Diff:ȱ2
27) Theȱminimumȱinputȱcurrentȱthatȱcanȱturnȱonȱaȱthyristorȱisȱcalledȱthe
A) holdingȱcurrent.
B) switchingȱcurrent.
C) breakdownȱcurrent.
D) low-currentȱdropoutȱcurrent.
Diff:ȱ2
28) Theȱminimumȱcurrentȱthatȱkeepsȱaȱlatchȱclosedȱisȱcalledȱthe
A) pick-upȱcurrent.
B) criticalȱrateȱofȱcurrentȱrise.
C) triggerȱcurrent.
D) holdingȱcurrent.
Diff:ȱ2
29) Theȱonlyȱwayȱtoȱmakeȱaȱfour-layerȱdiodeȱconductȱȱisȱwith
A) aȱtriggerȱinputȱappliedȱtoȱtheȱgate.
B) forwardȱbreakoverȱvoltage.
C) low-currentȱdropout.
D) Noneȱofȱtheȱabove.
Diff:ȱ3
30) TheȱonlyȱwayȱtoȱstopȱanȱSCRȱthatȱisȱconductingȱisȱby
A) aȱpositiveȱtrigger.
B) low-currentȱdropȱout.
C) breakover.
D) reverse-biasȱtriggering.
Diff:ȱ2
359
31) Aȱsiliconȱcontrolledȱrectifierȱhas
A) twoȱexternalȱleads.
B) threeȱexternalȱleads.
C) fourȱexternalȱleads.
D) threeȱdopedȱregions.
Diff:ȱ1
32) AnȱSCRȱisȱusuallyȱturnedȱonȱby
A) breakover.
B) aȱgateȱtrigger.
C) breakdown.
D) holdingȱcurrent.
Diff:ȱ2
33) SCRsȱare
A) low-powerȱdevices.
B) four-layerȱdiodes.
C) high-currentȱdevices.
D) bidirectional.
Diff:ȱ2
34) TheȱtriggerȱvoltageȱofȱanȱSCRȱisȱclosestȱto
A) 0ȱV.
B) 0.7ȱV.
C) 4ȱV.
D) breakoverȱvoltage.
Diff:ȱ2
35) TheȱvoltageȱacrossȱaȱconductingȱSCR
A) equalsȱtheȱbreakoverȱvoltage.
B) isȱapproximatelyȱzero.
C) decreasesȱwithȱmoreȱanodeȱcurrent.
D) equalsȱtheȱsourceȱvoltage.
Diff:ȱ2
36) DisconnectingȱtheȱgateȱleadȱonȱanȱSCR
A) willȱresultȱinȱmaximumȱgateȱcurrent.
B) resultsȱinȱtheȱSCRȱstayingȱonȱallȱtheȱtime.
C) destroysȱtheȱdevice.
D) meansȱthatȱtheȱSCRȱcannotȱbeȱtriggeredȱon.
Diff:ȱ3
37) AȱconductingȱSCRȱcanȱbeȱturnedȱoffȱby
A) reducingȱtheȱsourceȱvoltageȱtoȱzero.
B) openingȱtheȱanodeȱcircuit.
C) temporarilyȱshortingȱacrossȱtheȱSCRȇsȱanodeȱtoȱcathode.
D) Allȱofȱtheȱabove.
Diff:ȱ2
360
38) AnȱSCRȱcrowbarȱcircuitȱisȱusedȱto
A) protectȱagainstȱundervoltageȱconditions.
B) detectȱwhenȱaȱcircuitȱisȱoverheating.
C) protectȱagainstȱovervoltageȱconditions.
D) controlȱthreeȱphaseȱacȱmotors.
Diff:ȱ2
39) Onceȱaȱdiacȱisȱconducting,ȱtheȱonlyȱwayȱtoȱturnȱitȱoffȱisȱwith
A) low-currentȱdropout.
B) breakover.
C) aȱnegativeȱgateȱvoltage.
D) aȱpositiveȱgateȱvoltage.
Diff:ȱ2
40) Theȱdiacȱisȱequivalentȱto
A) twoȱfour-layeredȱdiodesȱinȱparallel.
B) twoȱSCRsȱinȱparallel.
C) twoȱfour-layerȱdiodesȱinȱseries.
D) twoȱtriacsȱinȱparallel.
Diff:ȱ3
41) Theȱdiacȱisȱa
A) transistor.
B) unidirectionalȱdevice.
C) three-layerȱdevice.
D) bidirectionalȱdevice.
Diff:ȱ2
42) Aȱtriacȱactsȱlike
A) twoȱSCRsȱinȱparallel.
B) twoȱSCRsȱinȱseries.
C) twoȱdiacsȱinȱparallel.
D) aȱnormalȱtransistor.
Diff:ȱ1
43) Aȱtriac
A) canȱtriggerȱonlyȱonȱpositiveȱgateȱvoltages.
B) canȱtriggerȱonlyȱonȱnegativeȱgateȱvoltages.
C) canȱbeȱtriggeredȱbyȱeitherȱaȱpositiveȱorȱaȱnegativeȱgateȱvoltage.
D) cannotȱbeȱtriggeredȱwithȱgateȱvoltages.
Diff:ȱ2
361
44) Aȱsilicon-controlledȱswitch
A) hasȱonlyȱ1ȱgateȱlead.
B) hasȱtwoȱgateȱleads.
C) canȱonlyȱbeȱturnedȱoffȱwithȱlow-currentȱdropout.
D) isȱbidirectional.
Diff:ȱ2
45) AȱUJTȱhas
A) twoȱbaseȱleads.
B) oneȱemitterȱlead.
C) twoȱemitterȱandȱoneȱbaseȱleads.
D) bothȱAȱandȱBȱabove.
Diff:ȱ2
46) ForȱaȱUJT,ȱtheȱintrinsicȱstandoffȱratioȱis
A) equalȱtoȱ1.
B) alwaysȱgreaterȱthanȱ1.
C) alwaysȱlessȱthanȱ1.
D) usuallyȱaroundȱ1ȱk̛ȱorȱso.
Diff:ȱ2
47) TheȱPUTȱ(ProgrammableȱUnijunctionȱTransistor)ȱisȱactuallyȱaȱtypeȱof
A) thyristor.
B) FETȱdevice.
C) triac.
Diff:ȱ2
362
D) SCR.
Chapterȱ12 TheȱOperationalȱAmplifier
1) Aȱgoodȱop-ampȱhasȱhighȱvoltageȱgain,ȱlowȱoutputȱimpedance,ȱandȱhighȱinputȱimpedance.
Diff:ȱ2
2) Anȱinvertingȱamplifierȱhasȱanȱinputȱresistanceȱequalȱtoȱtheȱinputȱresistor.
Diff:ȱ2
3) CMRRȱisȱtheȱmeasureȱofȱanȱop-ampȇsȱvoltageȱgainȱforȱanȱinvertingȱamplifier.
Diff:ȱ2
4) Theȱdifferentialȱamplifierȱisȱusedȱasȱtheȱinputȱstageȱofȱanȱoperationalȱamplifier.
Diff:ȱ2
5) Aȱvoltageȱfollowerȱhasȱaȱveryȱhighȱinputȱimpedance,ȱandȱisȱoftenȱusedȱasȱaȱhighȱvoltageȱgain
amplifier.
Diff:ȱ2
6) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱcircuitȱisȱtheȱinvertingȱamplifier?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
7) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱcircuitȱisȱaȱvoltageȱfollower?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
8) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱcircuitȱisȱtheȱnoninvertingȱamplifier?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
363
9) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱcircuitȱhasȱaȱvoltageȱgainȱofȱ1?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
10) Seeȱtheȱfigureȱabove.ȱȱWhichȱcircuitȱhasȱanȱinputȱimpedanceȱofȱaboutȱ5ȱk ̛?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ3
11) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱcircuitȱhasȱaȱvoltageȱgainȱofȱ10?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
12) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱcircuitȱhasȱaȱvoltageȱgainȱofȱ20?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
13) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱIfȱthisȱcircuitȱhasȱaȱV in = 12ȱVp-p,ȱtheȱvalueȱofȱV outȱwouldȱbe
A) 20ȱV.
B) -20ȱV.
C) 8.48ȱVp-p.
D) 12ȱVp-p.
Diff:ȱ2
14) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱIfȱthisȱcircuitȱhasȱaȱV in = 0.7,ȱV out wouldȱbe
A) 14.7ȱV.
B) -14.7ȱV.
C) 14ȱV.
D) 0ȱV.
Diff:ȱ2
15) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱV in = -60ȱmV.ȱȱTheȱvalueȱofȱV out is
A) 600ȱmV.
B) -600ȱmV.
C) 660ȱmV.
D) aboutȱ16ȱV.
Diff:ȱ2
16) Seeȱtheȱfigureȱabove.ȱȱIfȱtheseȱthreeȱcircuitsȱwereȱconnectedȱasȱaȱmultiple-stageȱamplifier,ȱthe
totalȱvoltageȱgainȱwouldȱbe
A) 1.
B) 10.
C) 21.
Diff:ȱ2
364
D) 210.
17) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱIfȱR f isȱchangedȱtoȱ1ȱM̛,ȱtheȱnewȱAcl wouldȱbe
A) 20.
B) -20.
C) 21.
D) -21.
Diff:ȱ2
18) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱIfȱanȱamplifierȱwithȱanȱinputȱimpedanceȱofȱ12ȱk ̛ȱandȱthe
sameȱvoltageȱgainȱisȱneeded,ȱtheȱnewȱvalueȱofȱR 1 ȱwouldȱbeȱ________ȱandȱtheȱnewȱvalueȱofȱRf
wouldȱbeȱ________.
A) 10ȱk̛,ȱ100ȱk̛
B) 13.3ȱk̛,ȱ120ȱk̛
C) 12ȱk̛,ȱ108ȱk̛
D) 12ȱk̛,ȱ120ȱk̛
Diff:ȱ2
19) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱop-ampȱhasȱaȱslewȱrateȱofȱ1.33ȱV/ΐs.ȱȱHowȱlongȱwouldȱitȱtake
theȱoutputȱvoltageȱtoȱchangeȱfromȱ-12ȱVȱtoȱ+12ȱV?
A) 18ȱΐs
B) 16ȱΐs
C) 36ȱΐs
D) 48ȱΐs
Diff:ȱ2
20) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱcomponentsȱareȱusedȱtoȱsetȱinputȱimpedanceȱandȱvoltage
gain?
A) R4
B) R3
C) R1 andȱR2
D) R3 ȱandȱR4
Diff:ȱ2
21) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱcomponentsȱareȱusedȱforȱoffsetȱvoltageȱcompensation?
A) R4
B) R3
C) R1ȱandȱR2
D) R2
Diff:ȱ3
22) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱcomponentsȱareȱusedȱforȱbiasȱcurrentȱcompensation?
A) R4
B) R3
C) R1 andȱR2
Diff:ȱ2
365
D) R2
23) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱpurposeȱofȱR1 andȱR2 is
A) forȱbiasȱcurrentȱcompensation.
B) forȱinputȱoffsetȱvoltageȱcompensation.
C) toȱsetȱinputȱimpedanceȱonly.
D) toȱsetȱinputȱimpedanceȱandȱvoltageȱgain.
Diff:ȱ2
24) Itȱtakesȱanȱop-ampȱ22ȱΐsȱtoȱchangeȱitsȱoutputȱfromȱ-15ȱVȱtoȱ+15ȱV.ȱȱTheȱslewȱrateȱforȱthis
amplifierȱis
A) 1.36ȱV/ΐs.
B) 0.68ȱV/ΐs.
C) 0.73ȱV/ΐs.
D) 660ȱV/ΐs.
Diff:ȱ2
25) Aȱvoltageȱfollowerȱamplifierȱcomesȱtoȱyouȱforȱservice.ȱȱWithȱaȱsineȱwaveȱinputȱofȱ1ȱV,ȱthe
outputȱisȱsquaredȱoffȱatȱapproximatelyȱ30ȱVȱpeak-to-peak.ȱTheȱmostȱlikelyȱproblemȱis
A) noȱdcȱsupplyȱvoltage.
B) theȱinputȱisȱshortedȱtoȱground.
C) openȱfeedbackȱloop.
D) theȱoutputȱisȱshortedȱtoȱground.
Diff:ȱ3
26) Theȱop-ampȱcanȱamplify
A) acȱsignalsȱonly.
B) dcȱsignalsȱonly.
C) bothȱacȱandȱdcȱsignals.
D) neitherȱacȱnorȱdcȱsignals.
Diff:ȱ1
27) Theȱtypicalȱinputȱstageȱofȱanȱop-ampȱhasȱa(n)
A) emitterȱfollower.
B) single-endedȱinputȱandȱdifferentialȱoutput.
C) push-pullȱcircuit.
D) two-inputȱdifferentialȱamplifier.
Diff:ȱ2
28) Theȱcommon-modeȱsignalȱisȱappliedȱto
A) theȱnoninvertingȱinput.
B) theȱinvertingȱinput.
C) bothȱinputs.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
366
29) Ifȱanȱop-ampȱwereȱperfect,ȱtheȱCMRRȱwould
A) beȱzero.
B) approachȱinfinity.
C) beȱveryȱsmall.
D) beȱlessȱthanȱone.
Diff:ȱ2
30) Inȱanȱop-amp,ȱtheȱCMRRȱisȱlimitedȱmostlyȱbyȱthe
A) theȱcommon-modeȱgainȱofȱtheȱop-amp.
B) gain-bandwidthȱproduct.
C) supplyȱvoltages.
D) toleranceȱofȱtheȱresistors.
Diff:ȱ2
31) Theȱopen-loopȱvoltageȱgainȱ(A ol)ȱofȱanȱop-ampȱisȱthe
A) externalȱvoltageȱgainȱtheȱdeviceȱisȱcapableȱof.
B) internalȱvoltageȱgainȱtheȱdeviceȱisȱcapableȱof.
C) mostȱcontrolledȱparameter.
D) sameȱasȱA cm.
Diff:ȱ2
32) Theȱinputȱoffsetȱcurrentȱis
A) theȱdifferenceȱbetweenȱtheȱinputȱbiasȱcurrents.
B) notȱrelatedȱtoȱtheȱinputȱbiasȱcurrents.
C) lessȱthanȱtheȱinputȱoffsetȱvoltage.
D) unimportantȱwhenȱaȱbaseȱresistorȱisȱused.
Diff:ȱ2
33) Withȱbothȱinputsȱgrounded,ȱtheȱonlyȱoffsetȱthatȱproducesȱanȱerrorȱisȱthe
A) inputȱoffsetȱcurrent.
B) inputȱbiasȱcurrent.
C) inputȱoffsetȱvoltage.
D) inputȱshortȱcircuitȱcurrent.
Diff:ȱ2
34) Theȱinputȱoffsetȱcurrentȱequalsȱthe
A) differenceȱbetweenȱtwoȱbaseȱcurrents.
B) averageȱofȱtwoȱbaseȱcurrents.
C) collectorȱcurrentȱdividedȱbyȱcurrentȱgain.
D) differenceȱbetweenȱtwoȱbase-emitterȱvoltages.
Diff:ȱ2
367
35) Theȱidealȱop-ampȱhas
A) infiniteȱinputȱimpedanceȱandȱzeroȱoutputȱimpedance.
B) infiniteȱoutputȱimpedanceȱandȱzeroȱinputȱimpedance.
C) infiniteȱvoltageȱgainȱandȱinfiniteȱbandwidth.
D) BothȱAȱandȱC.
Diff:ȱ2
36) Theȱtwoȱbasicȱwaysȱofȱspecifyingȱinputȱimpedanceȱofȱanȱop-ampȱare
A) differentialȱandȱextremelyȱhigh.
B) differentialȱandȱcommon-loop.
C) differentialȱandȱcommon-mode.
D) closed-loopȱandȱcommon-mode.
Diff:ȱ2
37) Whatȱtypeȱofȱinputȱisȱprovidedȱtoȱanȱop-ampȱforȱslew-rateȱmeasurement?
A) Constantȱdcȱvoltage
B) Sinusoidalȱvoltage
C) Stepȱinputȱvoltage
D) Triangleȱwaveform
Diff:ȱ2
38) Whenȱtheȱinitialȱslopeȱofȱaȱsineȱwaveȱisȱgreaterȱthanȱtheȱslewȱrate
A) distortionȱoccurs.
B) theȱoutputȱlooksȱexactlyȱlikeȱtheȱinput.
C) voltageȱgainȱisȱmaximum.
D) theȱop-ampȱworksȱbest.
Diff:ȱ2
39) Whichȱop-ampȱparameterȱisȱdependentȱuponȱtheȱhighȱfrequencyȱresponseȱofȱtheȱamplifier
stagesȱinsideȱtheȱop-amp?
A) Inputȱbiasȱcurrent
B) Short-circuitȱoutputȱcurrent
C) Slewȱrate
D) Inputȱoffsetȱvoltage
Diff:ȱ2
40) Withȱnegativeȱfeedback,ȱtheȱreturningȱsignal
A) aidsȱtheȱinputȱsignal.
B) opposesȱtheȱinputȱsignal.
C) isȱproportionalȱtoȱoutputȱcurrent.
D) isȱproportionalȱtoȱdifferentialȱvoltageȱgain.
Diff:ȱ2
368
41) Theȱclosed-loopȱvoltageȱgainȱofȱanȱinvertingȱamplifierȱequals
A) theȱratioȱofȱtheȱinputȱresistanceȱtoȱtheȱfeedbackȱresistance.
B) theȱopen-loopȱvoltageȱgain.
C) theȱfeedbackȱresistanceȱdividedȱbyȱtheȱinputȱresistance.
D) theȱinputȱresistance.
Diff:ȱ2
42) Anȱinvertingȱamplifierȱwithȱaȱgainȱofȱ-8ȱmeansȱthat
A) theȱsignalȱisȱattenuatedȱbyȱaȱfactorȱofȱ8.
B) acȱandȱdcȱsignalsȱareȱincreasedȱbyȱaȱfactorȱofȱ8ȱwithȱnoȱphaseȱshift.
C) theȱsignalȱamplitudeȱisȱincreasedȱbyȱaȱfactorȱofȱ8ȱwithȱaȱ180 ° phaseȱshift.
D) theȱstageȱreducesȱtheȱsignalȱbyȱaȱfactorȱofȱ8ȱfromȱinputȱtoȱoutput.
Diff:ȱ2
43) Theȱvoltageȱfollowerȱhasȱa
A) closed-loopȱvoltageȱgainȱofȱunity.
B) smallȱopen-loopȱvoltageȱgain.
C) closed-loopȱbandwidthȱofȱzero.
D) largeȱclosed-loopȱoutputȱimpedance.
Diff:ȱ2
44) TheȱfeedbackȱfractionȱȈBȈ
A) isȱalwaysȱlessȱthanȱ1.
B) isȱusuallyȱgreaterȱthanȱ1.
C) mayȱequalȱ1.
D) mayȱnotȱequalȱ1.
Diff:ȱ2
45) TheȱloopȱgainȱA OLB
A) isȱusuallyȱmuchȱsmallerȱthanȱ1.
B) isȱusuallyȱmuchȱgreaterȱthanȱ1.
C) mayȱnotȱequalȱ1.
D) isȱbetweenȱ0ȱandȱ1.
Diff:ȱ2
46) Thereȱcanȱbeȱnoȱcurrentȱtoȱgroundȱthrough
A) aȱmechanicalȱground.
B) anȱacȱground.
C) aȱvirtualȱground.
D) anȱordinaryȱground.
Diff:ȱ2
369
47) Theȱclosed-loopȱinputȱimpedanceȱinȱaȱnoninvertingȱamplifierȱis
A) muchȱgreaterȱthanȱtheȱopen-loopȱinputȱimpedance.
B) equalȱtoȱtheȱopen-loopȱinputȱimpedance.
C) sometimesȱlessȱthanȱtheȱopen-loopȱinputȱimpedance.
D) ideallyȱzero.
Diff:ȱ2
48) Whatȱisȱtheȱvalueȱofȱcompensatingȱresistorȱneededȱforȱaȱnoninvertingȱop-ampȱcircuitȱusingȱ10
k̛ȱresistorsȱforȱbothȱRIȱandȱRF?
A) 5ȱk̛
B) 10ȱk̛
C) 20ȱk̛
D) 100ȱk̛
Diff:ȱ2
49) Theȱvoltageȱgainȱofȱanȱop-ampȱisȱunityȱatȱthe
A) cutoffȱfrequency.
B) unity-gainȱfrequency.
C) generatorȱfrequency.
D) powerȱbandwidth.
Diff:ȱ2
50) Forȱaȱgivenȱop-amp,ȱwhichȱofȱtheseȱisȱconstant?
A) fC(CL)
B) feedbackȱvoltage
C) AOL
D) AOL f c(OL)
Diff:ȱ3
51) Ifȱtheȱunit-gainȱfrequencyȱisȱ10ȱMHzȱandȱtheȱmid -bandȱopen-loopȱvoltageȱgainȱisȱ200,000,ȱthe
cutoffȱfrequencyȱis
A) 5ȱkHz.
B) 50ȱHz.
C) 5ȱHz.
Diff:ȱ1
370
D) 25ȱMHz.
Chapterȱ13 BasicȱOp-AmpȱCircuits
1) Anȱop-ampȱcomparatorȱhasȱanȱoutputȱdependentȱuponȱtheȱpolaritiesȱofȱtheȱtwoȱinputs.
Diff:ȱ2
2) Theȱoutputȱvoltageȱofȱaȱsummingȱamplifierȱisȱproportionalȱtoȱtheȱproductȱofȱtheȱinput
voltages.
Diff:ȱ2
3) Integrationȱisȱaȱmathematicalȱprocessȱforȱdeterminingȱtheȱareaȱunderȱaȱcurve.
Diff:ȱ2
4) Aȱsquareȱwaveȱinputȱtoȱanȱop-ampȱintegratorȱwillȱproduceȱaȱsineȱwaveȱoutput.
Diff:ȱ2
5) Boundingȱallowsȱtheȱop-ampȱtoȱhaveȱunlimitedȱoutputȱvoltageȱupȱtoȱtheȱvalueȱofȱtheȱsupply
voltages.
Diff:ȱ2
6) Anȱop-ampȱhasȱanȱopen-loopȱgainȱofȱ100,000.ȱȱV sat = +/-12ȱV.ȱȱAȱdifferentialȱsignalȱvoltageȱof
150ȱΐVp-pȱisȱappliedȱbetweenȱtheȱinputs.ȱȱTheȱoutputȱvoltageȱis
A) 12ȱV.
B) -12ȱV.
C) 12ȱVp-p.
D) 24ȱVp-p.
Diff:ȱ2
7) Aȱsummingȱamplifierȱcanȱadd
A) dcȱvoltages.
B) acȱvoltages.
C) dcȱtoȱacȱvoltages.
D) Allȱofȱtheȱabove.
Diff:ȱ2
8) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱIfȱV CC = 15ȱV,ȱtheȱapproximateȱoutputȱvoltageȱis
A) 1ȱV.
B) -1ȱV.
C) 13ȱV.
Diff:ȱ2
371
D) -13ȱV.
9) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱIfȱVsat = +/-12ȱV,ȱtheȱapproximateȱoutputȱvoltageȱis
A) 12ȱV.
B) -12ȱV.
C) 2ȱV.
D) -2ȱV.
Diff:ȱ2
10) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱWithȱtheȱinputsȱshown,ȱtheȱoutputȱvoltageȱwouldȱbe
A) 7ȱV.
B) -7ȱV.
C) +Vsat.
D) -Vsat.
Diff:ȱ2
11) Eachȱofȱtheȱfollowingȱisȱusedȱtoȱestablishȱaȱreferenceȱvoltageȱonȱaȱcomparatorȱinputȱexceptȱa
A) voltageȱdivider.
B) zenerȱdiode.
C) LED.
D) battery.
Diff:ȱ2
12) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱIfȱaȱsolderȱsplashȱshortedȱtheȱtwoȱendsȱofȱtheȱfeedbackȱresistor
toȱeachȱother,ȱtheȱoutputȱvoltageȱwouldȱbe
A) 0.5ȱV.
B) -0.5ȱV.
C) 0ȱV.
D) -Vsat.
Diff:ȱ3
13) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱAȱvoltmeterȱplacedȱfromȱtheȱinvertingȱinputȱtoȱgroundȱwould
read
A) -0.925ȱV.
B) -2.775ȱV.
C) 2.775ȱV.
Diff:ȱ3
372
D) Yȱ0ȱV.
14) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱThisȱcircuitȱisȱknownȱasȱa
A) multivibrator.
B) zeroȱlevelȱdetector.
C) comparatorȱwithȱhysteresis.
D) noninvertingȱamplifier.
Diff:ȱ2
15) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱThisȱtypeȱofȱcircuitȱwillȱusuallyȱhave
A) aȱsquareȱwaveȱoutputȱifȱtheȱinputȱisȱaȱsineȱwave.
B) aȱtriangleȱwaveȱoutput.
C) aȱrampȱoutputȱforȱaȱsquareȱwaveȱinput.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
16) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱTheȱoutputȱvoltageȱwithȱtheȱinputsȱasȱshownȱis
A) +Vsat.
B) -Vsat.
C) 26ȱVp-p.
Diff:ȱ3
17) Seeȱ(a)ȱinȱtheȱfigureȱabove.ȱȱThisȱcircuitȱisȱknownȱas
A) aȱnoninvertingȱamplifier.
B) anȱintegrator.
C) aȱdifferentiator.
D) aȱsummingȱamplifier.
Diff:ȱ2
373
D) 17.06ȱVp-p.
18) Referȱtoȱtheȱfigureȱabove.ȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱanȱintegrator?
A) (a)
B) (b)
C) Neitherȱofȱtheȱabove.
Diff:ȱ2
19) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱAȱsquareȱwaveȱinputȱisȱappliedȱtoȱthisȱcircuit.ȱȱTheȱoutput
voltageȱisȱmostȱlikelyȱtoȱbe
A) aȱsquareȱwave.
B) aȱtriangleȱwave.
C) aȱsineȱwave.
D) noȱoutput.
Diff:ȱ2
20) AȱSchmittȱtriggerȱisȱaȱcomparatorȱwith
A) hysteresis.
B) oneȱtriggerȱpoint.
C) twoȱtriggerȱpoints.
D) AȱandȱCȱabove.
Diff:ȱ2
21) Anȱop-ampȱhasȱanȱopen-loopȱgainȱofȱ90,000.ȱȱV sat = +/-13ȱV.ȱȱAȱdifferentialȱvoltageȱofȱ0.1
Vp-pȱisȱappliedȱbetweenȱtheȱinputs.ȱȱTheȱoutputȱvoltageȱis
A) 13ȱV.
B) -13ȱV.
C) 13ȱVp-p.
D) 26ȱVp-p.
C) sawtooth.
D) squareȱwave.
Diff:ȱ3
22) TheȱoutputȱofȱaȱSchmittȱtriggerȱisȱa
A) triangleȱwave.
B) sineȱwave.
Diff:ȱ2
23) Anȱintegratorȱcircuit
A) usesȱaȱcapacitorȱinȱitsȱfeedbackȱcircuit.
B) producesȱaȱrampȱvoltageȱatȱitsȱoutputȱforȱaȱstepȱinputȱvoltage.
C) usesȱanȱinductorȱinȱitsȱfeedbackȱcircuit.
D) AȱandȱBȱabove.
Diff:ȱ2
24) Aȱdifferentiatorȱcircuit
A) usesȱaȱresistorȱinȱitsȱfeedbackȱcircuit.
B) usesȱaȱcapacitorȱinȱitsȱfeedbackȱcircuit.
C) producesȱaȱsquareȱwaveȱatȱitsȱoutputȱforȱaȱtriangleȱwaveȱinput.
D) AȱandȱCȱabove.
Diff:ȱ2
374
25) Hysteresisȱvoltageȱisȱdefinedȱas
A) theȱvoltageȱofȱtheȱlowerȱtriggerȱpoint.
B) theȱvoltageȱofȱtheȱupperȱtriggerȱpoint.
C) theȱdifferenceȱinȱvoltageȱbetweenȱtheȱupperȱandȱtheȱlowerȱtriggerȱpoints.
D) theȱsumȱofȱvoltagesȱofȱtheȱupperȱandȱtheȱlowerȱtriggerȱpoints.
Diff:ȱ2
26) Aȱcomparatorȱisȱanȱexampleȱofȱa(n)
A) activeȱfilter.
B) currentȱsource.
C) linearȱcircuit.
D) nonlinearȱcircuit.
Diff:ȱ2
27) Ifȱtheȱinputȱtoȱaȱcomparatorȱisȱaȱsineȱwave,ȱtheȱoutputȱisȱa
A) rampȱvoltage.
B) sineȱwave.
C) rectangularȱwave.
D) sawtoothȱwave.
Diff:ȱ2
28) Aȱzeroȱcrossingȱdetectorȱisȱa
A) comparatorȱwithȱnoȱoutput.
B) comparatorȱwithȱaȱtripȱpointȱreferencedȱtoȱzero.
C) peakȱdetector.
D) limiter.
Diff:ȱ2
29) Aȱwindowȱcomparator
A) hasȱonlyȱoneȱusableȱthreshold.
B) usesȱhysteresisȱtoȱspeedȱupȱresponse.
C) clampsȱtheȱinputȱpositively.
D) detectsȱanȱinputȱvoltageȱbetweenȱtwoȱlimits.
Diff:ȱ2
30) AȱSchmittȱtriggerȱhas
A) onlyȱoneȱtripȱpoint.
B) onlyȱnegativeȱfeedback.
C) twoȱslightlyȱdifferentȱtripȱpoints.
D) aȱtriangularȱoutput.
Diff:ȱ2
375
31) AȱSchmittȱtriggerȱisȱaȱcomparatorȱwith
A) negativeȱfeedback.
B) positiveȱfeedback.
C) NeitherȱAȱnorȱB.
D) BothȱAȱandȱB.
Diff:ȱ2
32) Theȱ________ȱcircuitȱovercomesȱtheȱproblemȱofȱfalseȱswitchingȱcausedȱbyȱnoiseȱonȱtheȱinput(s).
A) inputȱbuffer
B) Schmittȱtrigger
C) inputȱnoiseȱeliminator
D) differentiator
Diff:ȱ2
33) TheȱamountȱofȱhysteresisȱinȱaȱSchmittȱtriggerȱisȱdefinedȱby
VUTP
.
A) VUTPȱ-ȱVLTP.
B) VUTP xȱVLTP.
C)
VLTP
D) VUTPȱ+ VLTP.
Diff:ȱ3
34) Outputȱboundingȱisȱtheȱprocessȱofȱ________ȱtheȱoutputȱvoltageȱrangeȱofȱaȱcomparator.
A) extending
B) limiting
C) comparing
D) filtering
Diff:ȱ2
35) Ifȱallȱtheȱresistorsȱinȱaȱsummingȱamplifierȱareȱequal,ȱtheȱoutputȱwillȱbeȱequalȱtoȱthe
A) averageȱofȱtheȱindividualȱinputs.
B) invertedȱaverageȱofȱtheȱindividualȱinputs.
C) sumȱofȱtheȱindividualȱinputs.
D) invertedȱsumȱofȱtheȱindividualȱinputs.
Diff:ȱ2
36) IfȱtheȱvalueȱofȱresistorȱR fȱinȱaȱaveragingȱamplifierȱcircuitȱisȱequalȱtoȱtheȱvalueȱofȱoneȱinput
resistorȱdividedȱbyȱtheȱnumberȱofȱinputs,ȱtheȱoutputȱwillȱbeȱequalȱto
A) averageȱofȱtheȱindividualȱinputs.
B) invertedȱaverageȱofȱtheȱindividualȱinputs.
C) sumȱofȱtheȱindividualȱinputs.
D) invertedȱsumȱofȱtheȱindividualȱinputs.
Diff:ȱ3
37) Theȱ________ȱinputȱmakesȱtheȱsummingȱamplifierȱcircuitȱpossible.
A) virtualȱgroundȱatȱtheȱnoninverting
B) virtualȱgroundȱatȱtheȱinverting
C) lowȱvoltage
D) highȱvoltage
Diff:ȱ3
376
38) AȱD/Aȱconverterȱisȱanȱapplicationȱofȱthe
A) adjustableȱbandwidthȱcircuit.
B) noninvertingȱamplifier.
C) voltage-to-currentȱconverter.
D) scalingȱadder.
Diff:ȱ2
39) Inȱanȱop-ampȱintegrator,ȱtheȱcurrentȱthroughȱtheȱinputȱresistorȱisȱintoȱthe
A) invertingȱinput.
B) noninvertingȱinput.
C) bypassȱcapacitor.
D) feedbackȱcapacitor.
Diff:ȱ2
40) Aȱmathematicalȱoperationȱthatȱdeterminesȱtheȱrateȱofȱchangeȱofȱaȱcurveȱisȱcalled
A) differentiation.
B) integration.
C) curveȱaveraging.
D) linearȱregression.
Diff:ȱ2
41) Aȱmathematicalȱoperationȱforȱfindingȱtheȱareaȱunderȱtheȱcurveȱofȱaȱgraphȱisȱcalled
A) differentiation.
B) integration.
C) curveȱaveraging.
D) linearȱregression.
Diff:ȱ2
42) TheȱformulaȱICȱ=ȱȱ
VC
t
ȱCȱshowsȱthatȱforȱaȱgivenȱcapacitor,ȱifȱtheȱvoltageȱchangesȱatȱaȱconstant
rateȱwithȱrespectȱtoȱtime,ȱthenȱcurrentȱwill
A) increase.
B) decrease.
C) beȱconstant.
D) decreaseȱlogarithmically.
Diff:ȱ3
43) Theȱoutputȱofȱanȱop-ampȱdifferentiatorȱwithȱaȱrectangularȱinputȱisȱa
A) seriesȱofȱpositiveȱandȱnegativeȱspikes.
B) sineȱwave.
C) rampȱvoltage.
Diff:ȱ2
44) Aȱboundedȱcomparatorȱusesȱ________ȱinȱtheȱfeedbackȱcircuit.
A) equal-valuedȱresistors
B) zenerȱdiodes
C) anȱinductor
D) aȱresonantȱfilter
Diff:ȱ2
377
45) Aȱtwo-inputȱsummingȱamplifierȱhasȱinputȱvoltagesȱofȱ3ȱVȱandȱ4ȱV.ȱIfȱRf isȱopen,ȱtheȱoutput
voltageȱwillȱbeȱapproximately
A) +7ȱV.
B) -7ȱV.
C) +Vsat.
D) -Vsat.
Diff:ȱ3
46) AnȱR/2Rȱladderȱcircuitȱwouldȱbeȱfoundȱinȱa
A) commonȱemitterȱamplifier.
B) differentialȱamplifier.
C) Schmittȱtriggerȱcircuit.
D) D/Aȱconverterȱcircuit.
Diff:ȱ2
378
Chapterȱ14 Special-PurposeȱOp-AmpȱCircuits
1) Aȱbasicȱinstrumentationȱamplifierȱhasȱthreeȱop-amps.
Diff:ȱ2
2) Oneȱofȱtheȱkeyȱcharacteristicsȱofȱanȱinstrumentationȱamplifierȱisȱitsȱlowȱinputȱimpedance.
Diff:ȱ2
3) Theȱvoltageȱgainȱofȱanȱinstrumentationȱamplifierȱisȱsetȱwithȱanȱexternalȱresistor.
Diff:ȱ2
4) Aȱbasicȱisolationȱamplifierȱhasȱtwoȱelectricallyȱisolatedȱsections.
Diff:ȱ2
5) Mostȱmodernȱisolationȱamplifiersȱuseȱtransformerȱcouplingȱforȱisolation.
Diff:ȱ2
6) OTAȱstandsȱforȱoperationalȱtransistorȱamplifier.
Diff:ȱ2
7) AȱlogȱamplifierȱhasȱaȱJFETȱinȱtheȱfeedbackȱloop.
Diff:ȱ2
8) AnȱantilogȱamplifierȱhasȱaȱBJTȱinȱseriesȱwithȱtheȱinput.
Diff:ȱ2
9) Theȱmainȱpurposeȱofȱanȱinstrumentationȱamplifierȱisȱtoȱamplifyȱcommonȱmodeȱvoltage.
Diff:ȱ2
10) TheȱOTAȱisȱaȱvoltage-to-currentȱamplifier.
Diff:ȱ2
11) Linearȱsignalȱcompressionȱscalesȱdownȱallȱsignalȱlevelsȱbyȱtheȱsameȱamount.
Diff:ȱ2
12) TheȱOTAȱhasȱaȱ________ȱinputȱimpedanceȱandȱaȱ________ȱCMRR.
A) high,ȱlow
B) low,ȱhigh
Diff:ȱ2
379
C) high,ȱhigh
13) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱanȱantilogȱamplifier?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
14) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱconstant-currentȱsource?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
15) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱanȱisolationȱamplifier?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
16) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱanȱinstrumentationȱamplifier?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
17) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱIfȱR 1 = R2ȱ= 30ȱk̛ andȱtheȱclosedȱloopȱgainȱisȱ450,ȱtheȱvalueȱof
theȱexternalȱgain-settingȱresistorȱR Gȱis
A) 133.63ȱk̛.
B) 133.63ơ̇̄.
C) 13.36ơ̇̄.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
380
18) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱIfȱR 1 = R2 = 28ȱk̛ andȱRG = 100ơ̇̄,ȱtheȱAclȱwouldȱbe
A) 5.60.
B) 56.1.
C) 561.
D) 560.
Diff:ȱ2
19) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱIfȱVin = 5ȱVȱandȱR in = 22ȱk̛,ȱtheȱcurrentȱthruȱtheȱloadȱR L
wouldȱbe
A) 227.27ȱmA.
B) 2.27ȱmA.
C) 22.72ȱmA.
D) 227.27ȱΐA.
Diff:ȱ2
20) Referȱtoȱ(d)ȱinȱtheȱfigureȱabove.ȱȱIfȱV in = 200ȱmV,ȱRF = 52ȱk,ȱandȱIEBO = 50ȱnA,ȱtheȱV outȱwould
be
A) 7.75ȱmV.
B) -5.41ȱmV.
C) -7.75ȱV.
D) -775ȱmV.
Diff:ȱ2
21) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱvoltage-to-currentȱconverter?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
22) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱcurrent-to-voltageȱconverter?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
23) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱcontainsȱanȱOTA?
A) (a)
B) (b)
C) (c)
Diff:ȱ2
381
D) (d)
24) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱpeakȱdetector?
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
25) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱIfȱR L = 20ȱk,ȱR1 = 1.2ȱk,ȱandȱV in = 2.5ȱV,ȱtheȱloadȱcurrentȱI L
wouldȱbe
A) 20.83ȱmA.
B) 2.083ȱmA.
C) 2.083ȱA.
D) 208.3ȱΐA.
Diff:ȱ2
26) Referȱtoȱ(d)ȱinȱtheȱfigureȱabove.ȱȱIfȱg m = 25ȱmSȱandȱR L = 25ȱk̛,ȱtheȱvoltageȱgainȱwouldȱbe
A) 625.
B) 62.5.
C) 6.25.
D) Notȱenoughȱinformationȱisȱgiven.
Diff:ȱ2
27) Theȱinputȱsignalȱforȱanȱinstrumentationȱamplifierȱusuallyȱcomesȱfrom
A) anȱinvertingȱamplifier.
B) aȱfilteredȱdcȱpowerȱsupply.
C) aȱdifferentialȱamplifier.
D) aȱWheatstoneȱbridge.
Diff:ȱ2
28) Instrumentationȱamplifiersȱareȱwellȱsuitedȱforȱenvironmentsȱwith
A) noȱsignalȱandȱnoȱnoise.
B) highȱsignalȱlevelsȱthatȱneedȱtoȱbeȱattenuated.
C) noȱpowerȱsupplyȱvoltages.
D) smallȱsignalsȱsuperimposedȱonȱlargerȱcommon-modeȱvoltages.
Diff:ȱ3
29) Anȱinstrumentationȱamplifierȱhasȱaȱhigh
A) outputȱimpedance.
B) powerȱgain.
C) CMRR.
D) supplyȱvoltage.
Diff:ȱ2
30) Anȱinputȱtransducerȱconverts
A) voltageȱtoȱcurrent.
B) currentȱtoȱvoltage.
C) anȱelectricalȱquantityȱtoȱaȱnonelectricalȱquantity.
D) aȱnonelectricalȱquantityȱtoȱanȱelectricalȱquantity.
Diff:ȱ2
382
31) Inȱsomeȱrespectsȱanȱisolationȱamplifierȱisȱnothingȱmoreȱthanȱanȱelaborate
A) op-amp.
B) instrumentationȱamplifier.
C) rectifierȱandȱfilter.
D) BothȱAȱandȱBȱabove.
Diff:ȱ2
32) Theȱprimaryȱfunctionȱofȱtheȱoscillatorȱinȱanȱisolationȱamplifierȱisȱto
A) convertȱdcȱtoȱhighȱfrequencyȱac.
B) convertȱdcȱtoȱlowȱfrequencyȱac.
C) rectifyȱhighȱfrequencyȱacȱtoȱdc.
D) produceȱdualȱpolarityȱdcȱvoltagesȱforȱtheȱinputȱtoȱtheȱdemodulator.
Diff:ȱ3
33) TheȱvoltageȱgainȱofȱanȱOTAȱcanȱbeȱcalculatedȱusingȱtheȱformula
A) AVȱ=ȱȱ
Rf
.
ȱRi
B) AV = g m RL.
Rf
C) AVȱ=ȱ Ri ȱ+ȱ1.
D) AVȱ=ȱ
2Rf
ȱRi
.
Diff:ȱ2
34) Ifȱanȱoperationalȱtransconductanceȱamplifierȱ(OTA)ȱisȱusedȱasȱaȱnonlinearȱmixerȱandȱanȱaudio
signalȱisȱmixedȱwithȱanȱRFȱsignal,ȱtheȱoutputȱwillȱbeȱa(n)ȱ________ȱsignal.
A) squareȱwave
B) triangularȱwave
C) frequencyȱmodulatedȱ(FM)
D) amplitudeȱmodulatedȱ(AM)
Diff:ȱ3
35) WhenȱusingȱanȱOTAȱinȱaȱSchmitt-triggerȱconfiguration,ȱtheȱtriggerȱpointsȱareȱcontrolledȱby
A) theȱIOUT.
B) theȱIBIAS.
C) theȱVOUT.
D) BothȱAȱandȱBȱabove.
Diff:ȱ3
36) Anȱantilogȱamplifierȱisȱformedȱbyȱconnectingȱaȱpnȱjunctionȱ(diodeȱorȱBJT)ȱtoȱthe
A) input.
B) output.
C) feedbackȱloop.
D) invertingȱandȱnoninvertingȱinputs.
Diff:ȱ3
383
37) Toȱscaleȱdownȱlargeȱsignalȱvoltagesȱwithoutȱobscuringȱlowerȱsignalȱvoltages,ȱ________ȱshould
beȱused.
A) signalȱcompression
B) logarithmicȱsignalȱcompression
C) naturalȱlogarithmicȱsignalȱcompression
D) antilogarithmicȱsignalȱcompression
Diff:ȱ3
38) Aȱvoltage-to-currentȱconverterȱisȱusedȱinȱapplicationsȱwhereȱitȱisȱnecessaryȱtoȱhaveȱanȱoutput
loadȱcurrentȱthatȱisȱcontrolledȱby
A) inputȱvoltage.
B) inputȱresistance.
C) outputȱresistance.
D) inputȱfrequency.
Diff:ȱ3
39) Theȱoutputȱofȱaȱpeakȱdetectorȱisȱalways
A) 70.7%ȱofȱinput.
B) equalȱtoȱtheȱmaxȱvalueȱofȱtheȱpeakȱlevelȱreceivedȱsinceȱtheȱlastȱresetȱpulse.
C) equalȱtoȱtheȱminȱvalueȱofȱtheȱpeakȱlevelȱreceivedȱsinceȱtheȱlastȱresetȱpulse.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
40) Whichȱofȱtheȱfollowingȱcorrectlyȱdescribesȱtheȱrelationshipȱbetweenȱbandwidthȱandȱgainȱforȱan
instrumentationȱamplifier?
A) Instrumentationȱamplifiersȱhaveȱnoȱbandwidthȱsinceȱtheyȱcanȱonlyȱamplifyȱdc.
B) Bandwidthȱandȱgainȱareȱbothȱzero.
C) Bandwidthȱincreasesȱasȱgainȱincreases.
D) Bandwidthȱdecreasesȱasȱgainȱincreases.
Diff:ȱ3
41) Isolationȱamplifiersȱcanȱaccomplishȱisolationȱusing
A) transformerȱcoupling.
B) opticalȱcoupling.
C) capacitiveȱcoupling.
D) Allȱofȱtheȱabove.
Diff:ȱ2
42) Theȱvoltageȱgainȱofȱtheȱinputȱstageȱofȱanȱisolationȱamplifierȱisȱ12.ȱIfȱtheȱoutputȱstageȱhasȱaȱgain
ofȱ6,ȱtheȱtotalȱvoltageȱgainȱis
A) 6.
B) 18.
C) 72.
Diff:ȱ2
384
D) 144.
43) Theȱtotalȱvoltageȱgainȱofȱanȱisolationȱamplifierȱisȱ49.ȱIfȱtheȱvoltageȱgainȱofȱtheȱinputȱandȱoutput
stagesȱareȱequal,ȱtheȱvoltageȱgainȱforȱeachȱstageȱis
A) 4.9.
B) 7.
C) 24.5.
D) 98.
Diff:ȱ3
44) Logȱamplifiersȱareȱusedȱto
A) compressȱanȱanalogȱsignal.
B) linearizeȱanȱexponentialȱoutputȱfromȱaȱtransducer.
C) performȱanalogȱmultiplicationȱandȱdivision.
D) Allȱofȱtheȱabove.
Diff:ȱ2
45) Whatȱisȱtheȱrequiredȱvalueȱofȱfeedbackȱresistanceȱneededȱinȱaȱcurrent-to-voltageȱconverter
whereȱeachȱ100ȱΐAȱofȱinputȱcurrentȱneedsȱtoȱresultȱinȱanȱoutputȱofȱ1ȱV?
A) 1ȱk̛
B) 10ȱk̛
C) 1ȱM̛
D) 10ȱM̛
Diff:ȱ2
46) Theȱcurrentȱappliedȱtoȱaȱcurrent-to-voltageȱconverterȱcircuitȱchangesȱfromȱ4ȱtoȱ20ȱmA.ȱIfȱRf is
625ơ̇̄,ȱwhatȱisȱtheȱchangeȱinȱoutputȱvoltage?
A) 1ȱV
B) 5ȱV
C) 10ȱV
Diff:ȱ2
385
D) 20ȱV
Chapterȱ15 ActiveȱFilters
1) Theȱbandwidthȱofȱaȱband-passȱfilterȱisȱtheȱdifferenceȱbetweenȱtheȱtwoȱcutoffȱfrequencies.
Diff:ȱ2
2) Butterworthȱfiltersȱhaveȱaȱroll-offȱofȱ40ȱdB/decadeȱandȱaȱwidelyȱvaryingȱoutputȱinȱthe
passband.
Diff:ȱ2
3) Aȱhigh-passȱfilterȱpassesȱhighȱfrequenciesȱeasilyȱandȱattenuatesȱallȱothers.
Diff:ȱ2
4) Aȱlow-passȱfilterȱattenuatesȱlowȱfrequencies.
Diff:ȱ2
5) Aȱband-passȱfilterȱpassesȱallȱfrequenciesȱwithinȱaȱspecifiedȱbandȱandȱblocksȱallȱother
frequencies.
Diff:ȱ2
6) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱThisȱisȱtheȱfrequencyȱresponseȱcurveȱforȱa
A) low-passȱfilter.
B) high-passȱfilter.
C) band-passȱfilter.
D) band-stopȱfilter.
Diff:ȱ2
386
7) Referȱtoȱ(b)ȱinȱtheȱfigureȱabove.ȱȱThisȱisȱtheȱfrequencyȱresponseȱcurveȱforȱa
A) low-passȱfilter.
B) high-passȱfilter.
C) band-passȱfilter.
D) band-stopȱfilter.
Diff:ȱ2
8) Referȱtoȱ(c)ȱinȱtheȱfigureȱabove.ȱȱThisȱisȱtheȱfrequencyȱresponseȱcurveȱforȱa
A) low-passȱfilter.
B) high-passȱfilter.
C) band-passȱfilter.
D) band-stopȱfilter.
Diff:ȱ2
9) Referȱtoȱ(d)ȱinȱtheȱfigureȱabove.ȱȱThisȱisȱtheȱfrequencyȱresponseȱcurveȱforȱa
A) low-passȱfilter.
B) high-passȱfilter.
C) band-passȱfilter.
D) band-stopȱfilter.
Diff:ȱ2
10) Referȱtoȱtheȱfigureȱabove.ȱȱIdentifyȱtheȱactiveȱsingle-poleȱhigh-passȱfilter.
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
11) Referȱtoȱtheȱfigureȱabove.ȱȱIdentifyȱtheȱhigh-passȱfilterȱwithȱaȱ40ȱdB/decadeȱroll-off.
A) (a)
B) (b)
C) (c)
Diff:ȱ2
12) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱlow-passȱfilterȱwithȱaȱ20ȱdB/decadeȱroll-offȱis
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
387
D) (d)
13) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱband-passȱfilterȱis
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
14) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱlow-passȱfilterȱwithȱaȱroll-offȱofȱ40ȱdB/decadeȱis
A) (a)
B) (b)
C) (c)
D) (d)
Diff:ȱ2
15) Referȱtoȱ(a)ȱinȱtheȱfigureȱabove.ȱȱThisȱcircuitȱwasȱcheckedȱforȱproperȱoperationȱandȱf Cȱwas
correctȱbutȱtheȱvoltageȱgainȱisȱ1.ȱTheȱcauseȱofȱthisȱproblemȱmightȱbeȱthat
A) theȱ1.2ȱk̛ȱresistorȱisȱopen.
B) theȱcapacitorȱisȱshorted.
C) RAȱisȱopen.
D) RBȱisȱopen.
Diff:ȱ3
16) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱcircuitȱisȱknownȱasȱaȱ________ȱandȱtheȱroll -offȱrateȱisȱ________.
A) low-passȱfilter,ȱ60ȱdB/decade
B) high-passȱfilter,ȱ20ȱdB/decade
C) high-passȱfilter,ȱ80ȱdB/decade
D) band-passȱfilter,ȱ80ȱdB/decade
Diff:ȱ3
17) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱcutoffȱfrequencyȱforȱtheȱfirstȱfilterȱsectionȱisȱ________ȱtheȱcutoff
frequencyȱforȱtheȱsecondȱsection.
A) equalȱto
B) higherȱthan
C) lowerȱthan
D) Noneȱofȱtheȱabove.
Diff:ȱ2
18) Anotherȱnameȱforȱaȱband-stopȱfilterȱisȱa(n)ȱ________ȱfilter.
A) low-cut
B) all-stop.
C) notch
Diff:ȱ2
388
D) all-pass
19) Aȱhigh-passȱactiveȱfilterȱhasȱaȱcutoffȱfrequencyȱofȱ1.23ȱkHz.ȱȱTheȱbandwidthȱofȱthisȱfilterȱis
A) 2.46ȱkHz.
B) 1.23ȱkHz.
C) 644ȱHz.
D) Cannotȱdetermine.
Diff:ȱ2
20) Aȱlow-passȱfilterȱwithȱaȱroll-offȱrateȱofȱ60ȱdB/decadeȱisȱneeded.ȱȱTheȱbestȱcombinationȱtoȱuseȱis
A) aȱ2-poleȱfilterȱfollowedȱbyȱanotherȱ2-pole.
B) twoȱsingle-poleȱfiltersȱinȱseries.
C) aȱ2-poleȱfilterȱfollowedȱbyȱaȱ1-pole.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
21) Aȱhigh-passȱfilterȱhasȱRȱ=ȱ47ȱk̛ andȱCȱ= 0.002ȱΐF.ȱȱTheȱcutoffȱfrequencyȱis
A) 1.69ȱkHz.
B) 10.6ȱkHz.
C) 3.39ȱHz.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
22) Aȱpoleȱisȱaȱnetworkȱthatȱcontains
A) aȱresistorȱandȱaȱcapacitor.
B) aȱresistorȱandȱanȱinductor.
C) aȱcapacitorȱandȱanȱinductor.
D) twoȱresistorsȱandȱoneȱinductor.
Diff:ȱ2
23) Aȱmaximallyȱflatȱfrequencyȱresponseȱisȱaȱcommonȱnameȱfor
A) Chebyshev.
B) Bessel.
C) Butterworth.
D) Colpitts.
Diff:ȱ2
24) AȱsingleȱRCȱcircuitȱproducesȱaȱroll-offȱrateȱof
A) -20ȱdB/decade.
B) -6ȱdB/octave.
C) -40ȱdB/decade.
D) AȱandȱBȱabove.
Diff:ȱ3
25) Aȱlow-passȱfilterȱhasȱaȱcutoffȱfrequencyȱofȱ1.23ȱkHz.ȱȱDetermineȱtheȱbandwidthȱofȱtheȱfilter.
A) 2.46ȱkHz
B) 1.23ȱkHz
C) 644ȱHz
D) Notȱenoughȱinformationȱisȱgiven.
Diff:ȱ3
389
26) Aboveȱtheȱcutoffȱfrequencyȱofȱaȱlow-passȱfilter,ȱtheȱoutputȱvoltage
A) doesȱnotȱchange.
B) doublesȱforȱeveryȱ1ȱkHzȱincreaseȱinȱfrequency.
C) increases.
D) decreases.
Diff:ȱ3
27) Theȱcenterȱfrequencyȱofȱaȱband-passȱfilterȱisȱalwaysȱequalȱtoȱthe
A) bandwidth.
B) geometricȱaverageȱofȱtheȱcutoffȱfrequencies.
C) bandwidthȱdividedȱbyȱQ.
D) 3-dBȱfrequency.
Diff:ȱ1
28) Band-passȱfiltersȱareȱdesignedȱtoȱpassȱaȱbandȱofȱfrequenciesȱbetween
A) fc1ȱandȱfc2.
B) aȱband-startȱandȱband-stop.
C) 1ȱkHzȱandȱ10ȱkHz.
D) 1ȱkHzȱandȱ10ȱMHz.
Diff:ȱ2
29) Low-Qȱfiltersȱareȱ________ȱcircuits,ȱandȱhigh-Qȱfiltersȱareȱ________ȱcircuits.
A) band-pass,ȱband-stop
B) wideȱband-pass,ȱnarrowȱband-pass
C) lowȱpass,ȱhighȱpass
D) lowȱorder,ȱhighȱorder
Diff:ȱ2
30) Aȱnotchȱfilterȱisȱa(n)
A) all-passȱfilter.
B) band-passȱcircuit.
C) band-stopȱcircuit.
D) time-delayȱcircuit.
Diff:ȱ2
31) Theȱtypeȱofȱfilterȱresponseȱwithȱaȱrippledȱpassbandȱisȱthe
A) Butterworth.
B) Chebyshev.
C) InverseȱChebyshev.
D) Bessel.
Diff:ȱ2
32) Theȱfilterȱresponseȱcharacteristicȱthatȱdistortsȱpulsesȱtheȱleastȱisȱthe
A) Butterworth.
B) Chebyshev.
C) Elliptic.
Diff:ȱ3
390
D) Bessel.
33) Theȱfilterȱwithȱtheȱslowestȱroll-offȱrateȱisȱthe
A) Butterworth.
B) Chebyshev.
C) Elliptic.
D) Bessel.
Diff:ȱ2
34) Theȱdampingȱfactorȱ(DF)ȱofȱanȱactiveȱfilterȱdeterminedȱby
A) theȱpositiveȱfeedbackȱofȱtheȱcircuit.
B) theȱnegativeȱfeedbackȱofȱtheȱcircuit.
C) theȱnumberȱofȱpoles.
D) theȱQȱofȱtheȱcircuit.
Diff:ȱ2
35) IfȱaȱButterworthȱfilterȱhasȱ9ȱsecond-orderȱstages,ȱitsȱrolloffȱrateȱis
A) 20ȱdBȱperȱdecade.
B) 40ȱdBȱperȱdecade.
C) 180ȱdBȱperȱdecade.
D) 360ȱdBȱperȱdecade.
Diff:ȱ2
36) Sallen-Keyȱfiltersȱareȱalsoȱcalled
A) VCVSȱfilters.
B) multipleȱfeedbackȱfilters.
C) biquadraticȱfilters.
D) state-variableȱfilters.
Diff:ȱ2
37) Byȱcascadingȱlow-passȱfilters,ȱ________ȱcanȱbeȱimproved.
A) bandwidth
B) roll-offȱrate
C) Q-rating
Diff:ȱ2
38) Aȱmultiple-feedbackȱband-passȱfilter
A) usesȱaȱminimumȱofȱtwoȱop-amps.
B) isȱusedȱforȱaȱnarrowȱbandȱ(highȱQ)ȱfilter.
C) isȱusedȱforȱaȱwideȱbandȱ(lowȱQ)ȱfilter.
D) isȱalsoȱknownȱasȱaȱSallen-Keyȱfilter.
Diff:ȱ3
39) Theȱstate-variableȱfilter
A) isȱdifficultȱtoȱtune.
B) usesȱfewerȱthanȱthreeȱop-amps.
C) hasȱhighȱcomponentȱsensitivity.
D) hasȱaȱlow-pass,ȱhigh-passȱandȱband-passȱoutput.
Diff:ȱ2
391
D) phaseȱshift
40) TheȱQȱofȱaȱstate-variableȱfilterȱisȱcontrolledȱbyȱthe
R5
.
A) ratioȱofȱ
R6
C) ratioȱofȱtheȱfeedbackȱresistors.
B) productȱofȱR5ȱ× R6.
D) BothȱAȱandȱCȱabove.
Diff:ȱ3
41) Theȱlowestȱfrequencyȱthatȱanȱactiveȱlow-passȱfilterȱcanȱpassȱis
A) determinedȱbyȱtheȱunityȱgainȱbandwidthȱofȱtheȱop-amp.
B) determinedȱbyȱtheȱfeedbackȱcapacitorȱvalue.
C) determinedȱbyȱtheȱdampingȱfactor.
D) 0ȱHz.
Diff:ȱ2
42) TheȱQȱofȱaȱband-passȱfilterȱis
A) theȱratioȱofȱtheȱcenterȱfrequencyȱtoȱtheȱbandwidth.
B) notȱrelatedȱtoȱtheȱdampingȱfactor.
C) theȱdifferenceȱbetweenȱtheȱtwoȱop-ampȱpowerȱsupplyȱvoltages.
D) theȱquiescentȱcurrentȱspecificationȱofȱtheȱop-ampȱinputȱstage.
Diff:ȱ2
43) Aȱband-stopȱfilterȱisȱalsoȱknownȱas
A) aȱband-rejectȱfilter.
B) aȱnotchȱfilter.
C) aȱband-eliminationȱfilter.
D) Allȱofȱtheȱabove.
Diff:ȱ2
44) Whichȱofȱtheȱfollowingȱisȱnotȱanȱadvantageȱofȱactiveȱfiltersȱoverȱpassiveȱfilters?
A) Activeȱfiltersȱprovideȱfilteringȱwithȱgain.
B) Activeȱfiltersȱhaveȱminimalȱloadingȱdueȱtoȱaȱhighȱinputȱimpedance.
C) Activeȱfiltersȱrequireȱnoȱpowerȱtoȱoperate.
D) Activeȱfiltersȱhaveȱaȱlowȱoutputȱimpedance.
Diff:ȱ3
45) Whatȱisȱtheȱvalueȱofȱresistanceȱneededȱwithȱaȱ0.01ȱ ΐFȱcapacitorȱforȱaȱcriticalȱfrequencyȱofȱ23.4
kHz?
A) 680ơ̇̄
B) 2.34ȱk̛
C) 18ȱk̛
Diff:ȱ2
392
D) 132.9ȱk̛
Chapterȱ16 Oscillators
1) Toȱoperateȱproperly,ȱanȱoscillatorȱrequiresȱanȱexternalȱacȱinputȱsignal.
Diff:ȱ2
2) Anȱoscillatorȱcanȱproduceȱmanyȱtypesȱofȱoutputsȱsuchȱasȱsine,ȱtriangle,ȱorȱsquareȱwaves.
Diff:ȱ2
3) Positiveȱfeedbackȱisȱrequiredȱforȱanȱoscillatorȱtoȱoperateȱproperly.
Diff:ȱ2
4) Crystalȱoscillatorsȱareȱveryȱstable.
Diff:ȱ2
5) AnȱRCȱphase-shiftȱoscillatorȱusesȱfeedbackȱfromȱaȱtankȱcircuit.
Diff:ȱ2
6) TheȱTwin-TȱOscillatorȱisȱaȱpopularȱchoiceȱbecauseȱitȱworksȱwellȱoverȱaȱwideȱrangeȱof
frequencies.
Diff:ȱ2
393
7) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱColpittsȱoscillator?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
8) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱClappȱoscillator?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
9) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱHartleyȱoscillator?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
394
10) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱC5 wereȱtoȱopen
A) theȱresonantȱfrequencyȱwouldȱbeȱhigherȱthanȱnormal.
B) theȱresonantȱfrequencyȱwouldȱbeȱlowerȱthanȱnormal.
C) thereȱwouldȱbeȱnoȱsignalȱpresentȱatȱVout.
D) theȱcircuitȱwouldȱdrawȱnoȱcurrentȱfromȱ+Vcc.
Diff:ȱ2
11) Ofȱtheȱfollowingȱoscillatorȱcircuitȱcomponents,ȱtheȱoneȱthatȱexhibitsȱtheȱpiezoelectricȱeffectȱis
the
A) inductor.
B) capacitor.
C) crystal.
D) resistor.
Diff:ȱ2
12) Aȱveryȱstableȱoscillatorȱisȱneededȱtoȱoperateȱonȱaȱsingleȱfrequency.ȱȱAȱgoodȱchoiceȱmightȱbeȱa
A) Hartley.
B) VCO.
C) crystal.
Diff:ȱ2
395
D) Clapp.
13) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱvalueȱofȱV CC = 5ȱV,ȱtheȱoutputȱvoltageȱwouldȱbe
A) aȱsquareȱwaveȱofȱ10ȱV p-p.
B) aȱsquareȱwaveȱthatȱvariesȱbetweenȱ0ȱVȱandȱ5ȱV.
C) aȱsineȱwave.
D) 5ȱVȱdc.
Diff:ȱ2
14) Nonsinusoidalȱoscillatorsȱproduce
A) sineȱwavesȱonly.
B) triangleȱwaves.
C) squareȱwaves.
D) EitherȱBȱorȱCȱabove.
Diff:ȱ2
15) Theȱ555ȱtimerȱcontains
A) 2ȱcomparators.
B) 3ȱcomparators.
C) 4ȱcomparators.
D) 5ȱcomparators.
Diff:ȱ2
16) Aȱstableȱtypeȱofȱoscillatorȱis
A) theȱClappȱoscillator.
B) theȱHartleyȱoscillator.
C) theȱcrystalȱoscillator.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
396
17) Referȱtoȱtheȱfigureȱabove.ȱȱToȱreduceȱtheȱdutyȱcycleȱtoȱlessȱthanȱ50%,ȱwhichȱofȱtheȱfollowing
circuitȱchangesȱwouldȱbeȱnecessary?
A) ReduceȱtheȱsizeȱofȱR1.
B) ReduceȱtheȱsizeȱofȱR2.
C) IncreaseȱtheȱsizeȱofȱR 1.
D) ConnectȱaȱdiodeȱinȱparallelȱwithȱR2 .
Diff:ȱ2
18) Aȱcircuitȱthatȱcanȱchangeȱtheȱfrequencyȱofȱoscillationȱwithȱanȱapplicationȱofȱaȱdcȱvoltageȱis
sometimesȱcalledȱa(n)
A) voltage-controlledȱoscillator.
B) crystalȱoscillator.
C) Hartleyȱoscillator.
D) astableȱmultivibrator.
Diff:ȱ2
19) Whichȱofȱtheȱfollowingȱisȱnotȱanȱessentialȱrequirementȱofȱaȱfeedbackȱoscillator?
A) Positiveȱfeedbackȱnetwork
B) Negativeȱfeedbackȱnetwork
C) Phaseȱshiftȱaroundȱtheȱfeedbackȱloopȱofȱ0°
D) Amplifierȱcircuit
Diff:ȱ2
20) Inȱorderȱtoȱsustainȱoscillationsȱinȱaȱfeedbackȱoscillator,ȱtheȱgainȱshouldȱbeȱ________ȱsoȱthe
productȱofȱAVȱ×ȱBȱequalsȱ________.
A) reduced,ȱone
B) reduced,ȱlessȱthanȱone
C) increased,ȱmoreȱthanȱone
D) increased,ȱmuchȱgreaterȱthanȱone
Diff:ȱ2
21) Theȱvoltageȱthatȱstartsȱaȱfeedbackȱoscillatorȱisȱcausedȱby
A) rippleȱfromȱtheȱpowerȱsupply.
B) thermalȱnoiseȱinȱresistors.
C) theȱinputȱsignalȱfromȱaȱgenerator.
D) positiveȱfeedback.
Diff:ȱ2
397
22) AȱWien-bridgeȱoscillatorȱuses
A) positiveȱfeedback.
B) negativeȱfeedback.
C) bothȱtypesȱofȱfeedback.
D) anȱLCȱtankȱcircuit.
Diff:ȱ2
23) TheȱRCȱfeedbackȱnetworkȱusedȱinȱtheȱWien -bridgeȱoscillatorȱhasȱaȱmaximumȱoutputȱvoltage
when
A) XCȱ =ȱXL.
B) XL = R.
C) R1ȱ=ȱR2 ȱandȱXC1ȱ=ȱXC2.
D) Rȱ= 0ơ̇̄.
Diff:ȱ3
24) Theȱclosed-loopȱvoltageȱgain,ȱA CL,ȱforȱaȱWien-bridgeȱoscillatorȱis
A) 3,ȱafterȱtheȱoscillationsȱhaveȱbuiltȱup.
B) slightlyȱgreaterȱthanȱ1.
C) lessȱthanȱ1.
D) exactlyȱ1.
Diff:ȱ2
25) Inȱorderȱforȱfeedbackȱoscillatorsȱtoȱoperateȱproperly,ȱtheȱgainȱhasȱtoȱbe
A) 1/4.
B) self-adjusting.
C) stabilized.
D) nonlinear.
Diff:ȱ2
26) Theȱphase-shiftȱoscillatorȱusuallyȱhas
A) twoȱleadȱorȱlagȱcircuits.
B) threeȱleadȱorȱlagȱcircuits.
C) noȱRCȱsections.
D) noȱfeedbackȱloop.
Diff:ȱ2
27) OneȱwayȱtoȱrecognizeȱaȱColpittsȱoscillatorȱisȱbyȱthe
A) tappedȱinductorsȱinȱtheȱtankȱcircuit.
B) tappedȱcapacitorsȱinȱtheȱtankȱcircuit.
C) threeȱlagȱnetworksȱinȱtheȱfeedbackȱpath.
D) lead/lagȱnetworkȱinȱtheȱfeedbackȱpath.
Diff:ȱ2
28) OneȱwayȱtoȱrecognizeȱaȱHartleyȱoscillatorȱisȱbyȱthe
A) transformerȱusedȱforȱfeedback.
B) threeȱleadȱnetworksȱinȱtheȱfeedbackȱpath.
C) tappedȱcapacitorsȱinȱtheȱtankȱcircuit.
D) tappedȱinductorsȱinȱtheȱtankȱcircuit.
Diff:ȱ2
398
29) WhenȱQȱdecreasesȱinȱaȱColpittsȱoscillator,ȱtheȱfrequencyȱofȱoscillation
A) decreases.
B) remainsȱtheȱsame.
C) increases.
D) isȱunpredictable.
Diff:ȱ2
30) TheȱHartleyȱoscillatorȱuses
A) onlyȱresistorsȱandȱcapacitors.
B) twoȱinductors.
C) aȱtungstenȱlamp.
D) aȱticklerȱcoil.
Diff:ȱ2
31) Whichȱofȱtheȱfollowingȱcannotȱbeȱusedȱasȱtheȱamplifierȱelementȱwithinȱanȱoscillator?
A) BJT
B) thermistor
C) FET
D) op-amp
Diff:ȱ2
32) WhichȱtypeȱofȱLCȱoscillatorȱusesȱaȱticklerȱcoilȱinȱtheȱfeedbackȱpath?
A) Colpitts
B) Hartley
C) Armstrong
D) Clapp
Diff:ȱ2
33) Whichȱofȱtheȱfollowingȱoscillatorȱtypesȱdoesȱnotȱuseȱanyȱinductors?
A) Wien-bridge
B) Hartleyȱoscillator
C) Colpittsȱoscillator
D) Clappȱoscillator
Diff:ȱ2
34) InȱaȱColpittsȱoscillator,ȱwhichȱcomponent(s)ȱdetermineȱtheȱfeedbackȱfraction,ȱB?
A) TheȱresistorsȱR1 ȱandȱR2 ȱinȱtheȱbaseȱcircuit
B) TheȱRFȱchokeȱinȱtheȱcollectorȱcircuit
C) TheȱcapacitorsȱC 1 ȱandȱC2ȱinȱtheȱtankȱcircuit
D) Theȱinductorȱinȱtheȱtankȱcircuit
Diff:ȱ3
35) TheȱQȱofȱaȱcrystal
A) isȱextremelyȱlow.
B) isȱaboutȱ10ȱorȱsoȱinȱmostȱcases.
C) isȱextremelyȱhigh.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
399
36) Aȱcrystalȇsȱfundamentalȱfrequencyȱdependsȱupon
A) crystalȱthickness.
B) typeȱofȱcut.
C) mechanicalȱdimensions.
D) Allȱofȱtheȱabove.
Diff:ȱ2
37) Theȱhigherȱresonantȱfrequenciesȱofȱaȱcrystalȱareȱcalled
A) undertones.
B) overtones.
C) octaves.
Diff:ȱ2
400
D) decades.
Chapterȱ17 VoltageȱRegulators
1) Switchingȱregulatorsȱareȱveryȱefficient.
Diff:ȱ2
2) Aȱzenerȱdiodeȱisȱsometimesȱusedȱasȱaȱvoltageȱregulator.
Diff:ȱ2
3) Lineȱregulationȱisȱtheȱpercentageȱchangeȱinȱinputȱvoltageȱforȱaȱgivenȱchangeȱinȱoutputȱvoltage.
Diff:ȱ2
4) Inȱaȱshuntȱregulator,ȱtheȱcontrolȱelementȱisȱinȱseriesȱwithȱtheȱload.
Diff:ȱ2
5) Mostȱvoltageȱregulatorsȱincludeȱsomeȱkindȱofȱprotectionȱcircuitry.
Diff:ȱ2
6) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱzenerȱhadȱaȱvoltageȱratingȱofȱ3.7ȱV,ȱV outȱwouldȱbe
A) 25ȱV.
B) 20.2ȱV.
C) 18.2ȱV.
D) 7.1ȱV.
Diff:ȱ2
7) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱaȱwireȱclippingȱwereȱtoȱshortȱQ 1 emitterȱtoȱcollector,ȱtheȱproblem
thatȱmightȱresultȱis
A) R2 ȱwouldȱopen.
B) VOUT wouldȱincreaseȱtoȱ25ȱV.
C) Q1ȱwouldȱfail.
D) theȱzenerȱwouldȱopen.
Diff:ȱ3
401
8) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱshuntȱregulator?
A) (a)
B) (b)
C) (c)
D) (a)ȱorȱ(b)
Diff:ȱ2
9) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱstep-upȱswitchingȱregulator?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
10) Referȱtoȱtheȱfigureȱabove.ȱȱWhichȱofȱtheseȱcircuitsȱisȱknownȱasȱaȱseriesȱregulator?
A) (a)
B) (b)
C) (c)
D) Noneȱofȱtheȱabove.
Diff:ȱ2
11) Referȱtoȱtheȱfigureȱabove.ȱȱTheȱpurposeȱforȱtheȱop-ampȱisȱto
A) supplyȱaȱreferenceȱvoltage.
B) senseȱtheȱerrorȱsignal.
C) limitȱtheȱinputȱvoltageȱtoȱtheȱcircuit.
D) amplifyȱtheȱerrorȱsignal.
Diff:ȱ2
402
12) Referȱtoȱtheȱfigureȱabove.ȱȱAnȱincreaseȱinȱV OUT willȱcauseȱQ1 to
A) conductȱless.
B) conductȱtheȱsame.
C) conductȱmore.
D) open.
Diff:ȱ3
13) Referȱtoȱtheȱfigureȱabove.ȱȱToȱincreaseȱtheȱcurrentȱhandlingȱcapabilityȱofȱthisȱregulator,ȱbeyond
theȱ5ȱAȱratingȱofȱtheȱtransistor,ȱtheȱreasonableȱthingȱtoȱdoȱwouldȱbeȱto
A) placeȱanotherȱtransistorȱinȱseriesȱwithȱQ 1.
B) increaseȱtheȱvalueȱofȱtheȱzenerȱdiode.
C) placeȱanotherȱtransistorȱinȱparallelȱwithȱQ 1.
D) changeȱtheȱvaluesȱofȱR 2 ȱandȱR3.
Diff:ȱ2
14) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱtheȱoutputȱvoltageȱtendsȱtoȱincreaseȱdueȱtoȱaȱdecreaseȱinȱload
current,ȱtheȱtransistorȱwillȱconductȱforȱ________ȱtimeȱeachȱcycle.
A) aȱlonger
B) aȱshorter
C) theȱsame
D) exactlyȱhalfȱthe
Diff:ȱ2
403
15) Referȱtoȱtheȱfigureȱabove.ȱȱThisȱcircuitȱisȱbroughtȱinȱforȱrepair.ȱȱTheȱmeasuredȱoutputȱvoltage
wasȱ25ȱVȱunderȱallȱloadȱconditions.ȱȱAȱpossibleȱcauseȱofȱthisȱsymptomȱmightȱbeȱthat
A) R2 ȱhasȱopened.
B) Q1 base-emitterȱhasȱopened.
C) R3 ȱhasȱopened.
D) Vin hasȱdecreased.
Diff:ȱ3
16) Referȱtoȱtheȱfigureȱabove.ȱȱIfȱR 1 opened,ȱVOUT would
A) increase.
B) decreaseȱtoȱzero.
C) remainȱtheȱsame.
D) Cannotȱbeȱdetermined.
Diff:ȱ2
404
17) Referȱtoȱtheȱfigureȱabove.ȱInȱallȱofȱtheseȱcircuits,ȱtheȱzenerȱisȱused
A) toȱsenseȱtheȱchangeȱinȱoutputȱvoltage.
B) asȱaȱreferenceȱvoltage.
C) toȱsupplyȱtheȱop-ampȱwithȱVCC.
D) toȱregulateȱtheȱoutputȱvoltageȱdirectly.
Diff:ȱ2
18) Referȱtoȱtheȱfigureȱabove.ȱTheȱcircuitȱthatȱwillȱalsoȱregulateȱtheȱoutputȱvoltageȱwhenȱV in varies
is
A) (a).
B) (b).
C) (c).
D) Allȱofȱtheȱabove.
Diff:ȱ2
19) Referȱtoȱtheȱfigureȱabove.ȱThisȱcircuitȱoperatesȱatȱaȱrelativelyȱ________ȱfrequencyȱandȱits
efficiencyȱisȱ________.
A) low,ȱlow
B) low,ȱhigh
C) high,ȱhigh
Diff:ȱ2
405
D) high,ȱlow
20) Referȱtoȱtheȱfigureȱabove.ȱTheȱpurposeȱforȱtheȱdiodeȱD 1 isȱto
A) supplyȱaȱreferenceȱvoltage.
B) amplifyȱtheȱerrorȱsignal.
C) senseȱtheȱerrorȱsignal.
D) limitȱtheȱinputȱvoltageȱtoȱtheȱcircuit.
Diff:ȱ2
21) Referȱtoȱtheȱfigureȱabove.ȱIfȱaȱsolderȱsplashȱshortedȱtheȱendsȱofȱR 1 toȱeachȱother,ȱtheȱresult
wouldȱbeȱthat
A) theȱop-ampȱwouldȱfail.
B) Q1ȱwouldȱopen.
C) theȱoutputȱvoltageȱwouldȱnotȱchange.
D) theȱzenerȱwouldȱfail.
Diff:ȱ3
22) Aȱvoltageȱregulatorȱwithȱaȱno-loadȱdcȱoutputȱofȱ15ȱVȱisȱconnectedȱtoȱaȱloadȱwithȱaȱresistanceȱof
12ơ̇̄.ȱȱIfȱtheȱloadȱvoltageȱdecreasesȱtoȱ14.5ȱV,ȱtheȱpercentȱregulationȱwouldȱbe
A) 96.7%.
B) 3.33%.
C) 3.45%.
Diff:ȱ2
23) Anȱadvantageȱofȱaȱȱswitchingȱregulatorȱis
A) lessȱheatȱandȱwastedȱpower.
B) theȱcircuitȱisȱveryȱefficient.
C) voltagesȱcanȱbeȱstepped-upȱorȱstepped-down.
D) Allȱofȱtheȱabove.
E) Noneȱofȱtheȱabove.
Diff:ȱ2
406
D) 100%.
24) Aȱvoltageȱregulatorȱhasȱaȱno-loadȱoutputȱofȱ18ȱVȱandȱaȱfullȱloadȱoutputȱofȱ17.3ȱV.ȱTheȱpercent
loadȱregulationȱis
A) 0.25%.
B) 96.1%.
C) 4.05%.
D) 1.04%.
Diff:ȱ2
25) Aȱvoltageȱregulatorȱwithȱaȱno-loadȱoutputȱdcȱvoltageȱofȱ12ȱVȱisȱconnectȱtoȱaȱloadȱwithȱa
resistanceȱofȱ10ơ̇̄.ȱȱIfȱtheȱloadȱresistanceȱdecreasesȱtoȱ7.5ơ̇̄,ȱtheȱloadȱvoltageȱwillȱdecreaseȱto
10.9ȱV.ȱTheȱloadȱcurrentȱwillȱbeȱ________ȱandȱtheȱpercentȱloadȱregulationȱisȱ________.
A) 1.45ȱA,ȱ90.8%
B) 1.45ȱA,ȱ10.09%
C) 1.6ȱA,ȱ90.8%
D) 1.6ȱA,ȱ9.17%
Diff:ȱ2
26) Anȱincreaseȱofȱlineȱvoltageȱintoȱaȱpowerȱsupplyȱusuallyȱproduces
A) aȱdecreaseȱinȱloadȱresistance.
B) anȱincreaseȱinȱloadȱvoltage.
C) aȱdecreaseȱinȱefficiency.
D) lessȱpowerȱdissipationȱinȱtheȱrectifierȱdiodes.
Diff:ȱ2
27) ________ȱisȱaȱmeasurementȱofȱhowȱwellȱtheȱpowerȱsupplyȱmaintainsȱaȱconstantȱoutputȱvoltage
withȱchangesȱinȱinputȱvoltage.
A) Voltageȱcontrol
B) Loadȱvoltageȱcontrol
C) Loadȱregulation
D) Lineȱregulation
Diff:ȱ2
28) Ifȱtheȱoutputȱofȱaȱvoltageȱregulatorȱvariesȱfromȱ15ȱtoȱ14.7ȱVȱbetweenȱtheȱminimumȱand
maximumȱloadȱcurrent,ȱtheȱloadȱregulationȱis
A) 0.
B) 1%.
C) 2%.
D) 5%.
Diff:ȱ2
29) Ifȱtheȱoutputȱofȱaȱvoltageȱregulatorȱvariesȱfromȱ20ȱtoȱ19.8ȱVȱwhenȱtheȱlineȱvoltageȱvariesȱover
itsȱspecifiedȱrange,ȱtheȱloadȱregulationȱis
A) 0.
B) 1%.
C) 2%.
Diff:ȱ2
30) Aȱseriesȱregulatorȱisȱanȱexampleȱofȱa
A) linearȱregulator.
B) switchingȱregulator.
C) shuntȱregulator.
D) ac-to-dcȱconverter.
Diff:ȱ2
407
D) 5%.
31) Withoutȱcurrentȱlimiting,ȱaȱshortedȱloadȱwillȱprobably
A) produceȱzeroȱloadȱcurrent.
B) destroyȱdiodesȱandȱtransistors.
C) haveȱaȱloadȱvoltageȱequalȱtoȱtheȱzenerȱvoltage.
D) haveȱtooȱlittleȱloadȱcurrent.
Diff:ȱ2
32) Simpleȱcurrentȱlimitingȱmayȱproduceȱtooȱmuchȱheatȱinȱthe
A) zenerȱdiode.
B) loadȱresistor.
C) passȱtransistor.
D) ambientȱair.
Diff:ȱ2
33) Withȱfoldbackȱcurrentȱlimiting,ȱtheȱloadȱvoltageȱapproachesȱzero,ȱandȱtheȱloadȱcurrent
approaches
A) aȱsmallȱvalue.
B) infinity.
C) theȱzenerȱcurrent.
D) aȱdestructiveȱlevel.
Diff:ȱ3
34) Ifȱtheȱloadȱisȱshorted,ȱtheȱpassȱtransistorȱhasȱtheȱleastȱpowerȱdissipationȱwhenȱtheȱregulator
has
A) foldbackȱlimiting.
B) lowȱefficiency.
C) buckȱtopology.
D) aȱhighȱzenerȱvoltage.
Diff:ȱ2
35) Switchingȱregulatorȱconfigurationsȱinclude
A) step-down.
B) inverting.
C) step-up.
D) Allȱofȱtheȱabove.
Diff:ȱ2
36) Anȱadvantageȱofȱshuntȱregulationȱis
A) built-inȱshort-circuitȱprotection.
B) lowȱpowerȱdissipationȱinȱtheȱpassȱtransistor.
C) highȱefficiency.
D) littleȱwastedȱpower.
Diff:ȱ2
408
37) Toȱgetȱmoreȱoutputȱvoltageȱfromȱaȱstep-downȱswitchingȱregulator,ȱyouȱhaveȱto
A) decreaseȱtheȱdutyȱcycle.
B) decreaseȱtheȱinputȱvoltage.
C) increaseȱtheȱdutyȱcycle.
D) increaseȱtheȱswitchingȱfrequency.
Diff:ȱ3
38) Aȱ________ȱmaintainsȱaȱconstantȱoutputȱvoltageȱbyȱcontrollingȱtheȱdutyȱcycleȱofȱaȱswitchȱin
seriesȱwithȱtheȱload.
A) shuntȱregulator
B) linearȱregulator
C) seriesȱregulator
D) switchingȱregulator
Diff:ȱ2
39) Switchingȱregulatorsȱhaveȱ________ȱthanȱlinearȱregulators.
A) moreȱheat-sinkingȱrequirements
B) simplerȱcircuitry
C) lowerȱefficiency
D) greaterȱefficiency
Diff:ȱ2
40) Inȱaȱstep-upȱregulator,ȱtheȱoutputȱvoltageȱisȱfilteredȱwithȱa
A) choke-inputȱfilter.
B) capacitor-inputȱfilter.
C) diode.
D) voltageȱdivider.
Diff:ȱ2
41) Theȱ7912ȱproducesȱaȱregulatedȱoutputȱvoltageȱof
A) +5ȱV.
B) +9ȱV.
C) -12ȱV.
D) +12ȱV.
Diff:ȱ2
42) Theȱ7800ȱseriesȱofȱvoltageȱregulatorsȱproducesȱanȱoutputȱvoltageȱthatȱis
A) positive.
B) negative.
C) eitherȱpositiveȱorȱnegative.
D) unregulated.
Diff:ȱ2
43) TheȱLM317ȱregulatorȱprovidesȱa(n)
A) fixedȱpositiveȱoutputȱvoltage.
B) adjustableȱpositiveȱoutputȱvoltage.
C) fixedȱnegativeȱoutputȱvoltage.
D) adjustableȱnegativeȱoutputȱvoltage.
Diff:ȱ2
409
44) Theȱmainȱdifferenceȱbetweenȱtheȱ78XXȱandȱ79XXȱseriesȱregulatorsȱisȱthat
A) theȱ78XXȱseriesȱisȱadjustableȱandȱtheȱ79XXȱseriesȱisȱfixed.
B) theȱ78XXȱseriesȱisȱfixedȱandȱtheȱ79XXȱseriesȱisȱadjustable.
C) theȱ78XXȱseriesȱprovidesȱaȱpositiveȱfixedȱoutputȱvoltageȱandȱtheȱ79XXȱseriesȱprovidesȱa
negativeȱfixedȱoutputȱvoltage.
D) theȱ78XXȱseriesȱprovidesȱaȱnegativeȱfixedȱoutputȱvoltageȱandȱtheȱ79XXȱseriesȱprovidesȱa
positiveȱfixedȱoutputȱvoltage.
Diff:ȱ2
45) Aȱ7805ȱregulatorȱhasȱaȱ+20ȱVȱinput.ȱIfȱtheȱinputȱandȱoutputȱpinsȱofȱtheȱregulatorȱareȱshorted
togetherȱbyȱaȱsolderȱbridge,ȱtheȱoutputȱvoltageȱwillȱbe
A) 0ȱV.
C) +5ȱV.
B) 0.7ȱV.
Diff:ȱ3
410
D) +20ȱV.
Chapterȱ18 Communications
1) BalancedȱmodulationȱisȱusedȱinȱcertainȱtypesȱofȱcommunicationsȱsuchȱasȱAMȱbroadcast
systems,ȱbutȱisȱnotȱusedȱinȱsingleȱside-bandȱsystems.
Diff:ȱ2
2) Fiber-opticȱcablesȱhaveȱwiderȱbandwidth,ȱbutȱareȱmoreȱsusceptibleȱtoȱinterference.
Diff:ȱ2
3) Scatteringȱisȱtheȱlossȱofȱopticalȱsignalȱintoȱtheȱcladdingȱofȱtheȱfiber-opticȱcable.
Diff:ȱ2
4) CombiningȱanȱaudioȱsignalȱwithȱanȱRFȱcarrierȱinȱaȱnonlinearȱdeviceȱisȱcalled
A) neutralization.
B) demodulation.
C) filtering.
D) modulation.
Diff:ȱ2
5) Theȱprocessȱofȱmodifyingȱaȱhighȱfrequencyȱcarrierȱbyȱtheȱinformationȱtoȱbeȱtransmittedȱis
called
A) modulation.
B) multiplexing.
C) detection.
D) discrimination.
Diff:ȱ2
6) Mixingȱtwoȱsignalsȱbyȱaȱnonlinearȱprocessȱisȱcalled
A) sumȱandȱproductȱfrequencies.
B) heterodyning.
C) spectrumȱmodulation.
D) bandwidthȱdiscrimination.
Diff:ȱ3
7) Theȱoutlineȱofȱtheȱpeaksȱofȱtheȱmodulatedȱcarrierȱhasȱtheȱshapeȱofȱtheȱinformationȱsignal,ȱand
isȱcalledȱthe
A) envelope.
B) lower-sideȱfrequency.
C) RFȱindex.
D) dutyȱcycle.
Diff:ȱ2
8) Higherȱmodulatingȱfrequenciesȱareȱamplifiedȱmoreȱthanȱtheȱlowerȱfrequenciesȱatȱthe
transmittingȱendȱofȱanȱFMȱsystemȱbyȱaȱprocessȱcalled
A) pre-emphasis.
B) fullȱduplex.
C) de-emphasis.
Diff:ȱ3
411
D) filtering.
9) Theȱquadrantȱclassificationȱofȱaȱlinearȱmultiplierȱindicatesȱtheȱnumberȱofȱ________ȱthatȱthe
multiplierȱcanȱhandle.
A) inputȱpolarityȱcombinations
B) outputȱpolarityȱcombinations
C) transferȱcharacteristics
D) scaleȱfactors
Diff:ȱ3
10) Theȱpurposeȱofȱaȱbalancedȱmodulatorȱisȱtoȱeliminate
A) theȱupperȱside-band.
B) theȱlowerȱside-band.
C) bothȱside-bands.
D) theȱcarrier.
Diff:ȱ2
11) Theȱproductȱofȱtwoȱsinusoidalȱsignalsȱisȱcalled
A) balancedȱmodulation.
B) lowerȱsideȱfrequency.
C) suppressed-carrierȱmodulation.
D) BothȱAȱandȱCȱabove.
Diff:ȱ2
12) IfȱyouȱreceiveȱanȱAMȱsignalȱmodulatedȱbyȱaȱpureȱsinusoidalȱsignalȱinȱtheȱaudioȱfrequency
range,ȱyouȱwillȱhear
A) aȱsingleȱtone.
B) static.
C) distortion.
D) nothing.
C) demodulator.
D) modulator.
Diff:ȱ2
13) Aȱmixerȱisȱbasicallyȱaȱfrequency
A) doubler.
B) converter.
Diff:ȱ2
14) AȱbasicȱIFȱAmplifierȱalwaysȱhas
A) aȱtunedȱ(resonant)ȱcircuitȱonȱtheȱinput.
B) aȱtunedȱ(resonant)ȱcircuitȱonȱtheȱoutput.
C) aȱtunedȱ(resonant)ȱcircuitȱonȱbothȱtheȱinputȱandȱoutput.
D) Noneȱofȱtheȱabove.
Diff:ȱ2
15) TheȱmainȱdifferenceȱbetweenȱanȱFMȱreceiverȱandȱanȱAMȱreceiverȱisȱtheȱmethodȱusedȱto
recoverȱtheȱaudioȱsignalȱfromȱthe
A) modulatedȱIF.
B) carrier.
C) mixer.
Diff:ȱ2
412
D) detector.
16) TheȱphaseȱdetectorȱinȱaȱPLLȱisȱfollowedȱbyȱaȱlow-passȱfilter.ȱTheȱlow-passȱfilterȱpassesȱthe
________ȱandȱrejectsȱallȱotherȱfrequencies.
A) inputȱsignal
B) feedbackȱsignal
C) sumȱofȱtheȱinputȱandȱfeedbackȱsignals
D) differenceȱofȱtheȱinputȱandȱfeedbackȱsignals
Diff:ȱ2
17) InȱaȱPLL,ȱtoȱobtainȱlock,ȱtheȱsignalȱfrequencyȱmustȱcomeȱwithinȱthe
A) lockȱrange.
B) closedȱrange.
C) captureȱrange.
D) deviationȱrange.
Diff:ȱ2
18) ForȱaȱPLL,ȱtheȱcaptureȱrangeȱis
A) alwaysȱgreaterȱthanȱtheȱlockȱrange.
B) alwaysȱtheȱsameȱasȱtheȱlockȱrange.
C) usuallyȱlessȱthanȱtheȱlockȱrange.
D) alwaysȱtwoȱtimesȱtheȱlockȱrange.
Diff:ȱ2
19) AȱPLLȱcanȱbeȱusedȱasȱa(n)
A) seriesȱvoltageȱregulator.
B) FMȱdemodulator.
C) audioȱamplifier.
D) BothȱBȱandȱCȱabove.
Diff:ȱ2
20) Aȱphaseȱdetectorȱhas
A) oneȱinputȱsignalȱandȱtwoȱoutputȱsignals.
B) twoȱinputȱsignalsȱandȱoneȱoutputȱsignal.
C) noȱinputȱsignals.
D) threeȱoutputȱsignals.
Diff:ȱ2
21) Theȱbandwidthȱofȱtheȱlow-passȱfilterȱinȱaȱPLLȱdeterminesȱthe
A) captureȱrange.
B) lockȱrange.
C) free-runningȱfrequency.
D) phaseȱdifference.
Diff:ȱ2
413
22) MostȱVCOȇsȱusedȱinȱPLLȇsȱoperateȱonȱtheȱprincipleȱof
A) variableȱpower.
B) variableȱinductance.
C) variableȱreactance.
D) phaseȱdetection.
Diff:ȱ2
23) TheȱIFȱamplifiersȱwithinȱanȱFMȱradioȱreceiverȱareȱtunedȱto
A) 455ȱkHz.
B) 4.55ȱMHz.
C) 10.7ȱMHz.
D) 100.7ȱMHz.
Diff:ȱ2
24) Theȱsignalȱlossȱthatȱoccursȱwhenȱphotonsȱinteractȱwithȱtheȱmoleculesȱofȱtheȱcoreȱinȱa
fiber-opticȱcableȱisȱcalled
A) refraction.
B) absorption.
C) scattering.
Diff:ȱ3
414
D) scattering.
Answer Key
CHAPTER 1
CHAPTER 2
CHAPTER 3
1) FALSE
2) FALSE
3) TRUE
4) FALSE
5) TRUE
6) C
7) B
8) A
9) A
10) D
11) D
12) C
13) B
14) D
15) A
16) C
17) B
18) A
19) C
20) A
21) C
22) B
23) D
24) B
25) B
26) A
27) B
28) D
29) A
30) A
31) D
32) A
33) B
34) D
35) D
36) A
37) C
38) C
39) A
1) TRUE
2) FALSE
3) TRUE
4) FALSE
5) FALSE
6) D
7) D
8) A
9) C
10) D
11) B
12) B
13) C
14) D
15) B
16) D
17) B
18) A
19) C
20) B
21) C
22) D
23) E
24) B
25) D
26) B
27) A
28) C
29) B
30) A
31) B
32) C
33) D
34) C
35) C
36) B
37) A
38) C
39) B
40) D
41) B
42) D
43) B
44) A
1) TRUE
2) FALSE
3) C
4) B
5) C
6) A
7) A
8) A
9) D
10) D
11) D
12) D
13) B
14) B
15) B
16) A
17) D
18) E
19) C
20) B
21) D
22) E
23) C
24) A
25) B
26) A
27) D
28) D
29) A
30) C
31) D
32) C
33) A
34) B
35) B
36) B
37) A
38) B
39) B
40) D
41) C
42) C
43) B
44) A
45) A
46) B
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CHAPTER 4
CHAPTER 5
CHAPTER 6
1) TRUE
2) FALSE
3) FALSE
4) TRUE
5) TRUE
6) TRUE
7) TRUE
8) D
9) C
10) A
11) B
12) D
13) C
14) B
15) B
16) D
17) C
18) A
19) C
20) A
21) A
22) D
23) C
24) A
25) D
26) B
27) C
28) B
29) B
30) C
31) B
32) B
33) B
34) C
35) C
36) C
37) A
38) C
39) B
40) D
41) A
42) C
43) B
44) B
45) B
46) B
47) D
1) TRUE
2) FALSE
3) FALSE
4) TRUE
5) TRUE
6) C
7) C
8) D
9) B
10) E
11) D
12) C
13) B
14) D
15) B
16) A
17) C
18) B
19) C
20) B
21) D
22) B
23) D
24) C
25) A
26) C
27) B
28) C
29) C
30) D
31) A
32) B
33) C
34) B
35) B
36) A
37) D
38) D
39) A
40) A
41) B
42) B
43) D
1) FALSE
2) TRUE
3) TRUE
4) FALSE
5) FALSE
6) D
7) C
8) C
9) A
10) B
11) B
12) D
13) A
14) D
15) C
16) D
17) D
18) C
19) A
20) D
21) B
22) C
23) A
24) B
25) C
26) C
27) A
28) B
29) B
30) B
31) A
32) B
33) B
34) B
35) A
36) C
37) B
38) C
39) A
40) A
41) A
42) C
43) D
44) D
45) B
46) B
47) B
48) B
49) B
50) B
51) A
52) C
53) D
416
54) C
55) A
56) B
57) B
58) A
59) D
60) C
CHAPTER 7
CHAPTER 8
1) FALSE
2) FALSE
3) FALSE
4) C
5) C
6) B
7) D
8) C
9) A
10) D
11) A
12) D
13) A
14) C
15) D
16) C
17) B
18) B
19) D
20) B
21) B
22) C
23) C
24) A
25) C
26) C
27) C
28) D
29) A
30) D
31) C
32) C
33) C
34) A
35) B
36) B
37) C
38) B
39) C
40) A
41) C
42) C
43) D
44) A
45) B
46) C
47) D
48) B
1) TRUE
2) FALSE
3) TRUE
4) TRUE
5) FALSE
6) TRUE
7) FALSE
8) TRUE
9) FALSE
10) A
11) A
12) B
13) D
14) B
15) C
16) D
17) A
18) B
19) D
20) C
21) C
22) B
23) A
24) B
25) B
26) B
27) C
28) A
29) B
30) C
31) A
32) A
33) D
34) C
35) D
36) D
37) C
38) D
39) C
40) B
41) B
42) A
43) B
44) D
45) D
46) A
47) D
48) C
49) D
417
CHAPTER 9
1) FALSE
2) FALSE
3) TRUE
4) TRUE
5) FALSE
6) TRUE
7) FALSE
8) FALSE
9) TRUE
10) FALSE
11) FALSE
12) TRUE
13) FALSE
14) FALSE
15) TRUE
16) C
17) D
18) D
19) C
20) A
21) B
22) A
23) B
24) C
25) C
26) A
27) B
28) C
29) B
30) B
31) D
32) B
33) D
34) C
35) B
36) A
37) D
38) A
39) C
40) D
41) C
42) D
43) B
44) A
45) D
46) B
47) B
48) D
49) C
50) D
51) A
52) C
53) C
CHAPTER 11
54) A
55) A
56) B
57) D
58) C
CHAPTER 10
1) TRUE
2) TRUE
3) TRUE
4) FALSE
5) FALSE
6) FALSE
7) D
8) C
9) A
10) B
11) C
12) A
13) C
14) B
15) B
16) C
17) C
18) A
19) D
20) B
21) C
22) A
23) B
24) B
25) B
26) D
27) D
28) B
29) D
30) B
31) B
32) B
33) C
34) B
35) A
36) A
37) C
38) C
39) C
40) A
41) B
42) D
43) B
44) C
45) A
418
1) TRUE
2) FALSE
3) TRUE
4) TRUE
5) FALSE
6) FALSE
7) E
8) B
9) D
10) C
11) E
12) C
13) C
14) C
15) B
16) D
17) A
18) C
19) B
20) D
21) B
22) C
23) A
24) D
25) A
26) C
27) B
28) D
29) B
30) B
31) B
32) B
33) C
34) B
35) B
36) D
37) D
38) C
39) A
40) A
41) D
42) A
43) C
44) B
45) D
46) C
47) A
CHAPTER 12
CHAPTER 13
CHAPTER 14
1) TRUE
2) TRUE
3) FALSE
4) TRUE
5) FALSE
6) C
7) A
8) B
9) A
10) D
11) C
12) D
13) D
14) A
15) A
16) D
17) B
18) D
19) A
20) C
21) A
22) B
23) D
24) A
25) C
26) C
27) D
28) C
29) B
30) A
31) B
32) A
33) C
34) A
35) D
36) C
37) C
38) A
39) C
40) B
41) C
42) C
43) A
44) A
45) B
46) C
47) A
48) A
49) B
50) D
51) B
1) TRUE
2) FALSE
3) TRUE
4) FALSE
5) FALSE
6) D
7) D
8) C
9) B
10) C
11) C
12) C
13) D
14) C
15) A
16) C
17) C
18) B
19) B
20) D
21) D
22) D
23) D
24) D
25) C
26) D
27) C
28) B
29) D
30) C
31) B
32) B
33) A
34) B
35) D
36) B
37) B
38) D
39) D
40) A
41) B
42) C
43) A
44) B
45) D
46) D
1) TRUE
2) FALSE
3) TRUE
4) TRUE
5) FALSE
6) FALSE
7) FALSE
8) TRUE
9) FALSE
10) TRUE
11) TRUE
12) C
13) D
14) B
15) C
16) A
17) B
18) C
19) D
20) C
21) B
22) A
23) D
24) C
25) B
26) A
27) D
28) D
29) C
30) D
31) D
32) A
33) B
34) D
35) D
36) A
37) B
38) A
39) B
40) D
41) D
42) C
43) B
44) D
45) B
46) C
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CHAPTER 15
CHAPTER 16
CHAPTER 17
1) TRUE
2) FALSE
3) TRUE
4) FALSE
5) TRUE
6) C
7) B
8) A
9) D
10) A
11) D
12) D
13) C
14) B
15) D
16) C
17) A
18) C
19) D
20) C
21) A
22) A
23) C
24) D
25) B
26) D
27) B
28) A
29) B
30) C
31) B
32) D
33) D
34) B
35) D
36) A
37) B
38) C
39) D
40) D
41) D
42) A
43) D
44) C
45) A
1) FALSE
2) TRUE
3) TRUE
4) TRUE
5) FALSE
6) FALSE
7) A
8) B
9) C
10) C
11) C
12) C
13) C
14) D
15) A
16) C
17) D
18) A
19) B
20) A
21) B
22) C
23) C
24) A
25) B
26) B
27) B
28) D
29) A
30) B
31) B
32) C
33) A
34) C
35) C
36) D
37) B
1) TRUE
2) TRUE
3) FALSE
4) FALSE
5) TRUE
6) B
7) B
8) B
9) D
10) A
11) D
12) A
13) C
14) B
15) A
16) B
17) B
18) D
19) C
20) A
21) D
22) C
23) D
24) C
25) B
26) B
27) D
28) C
29) B
30) A
31) B
32) C
33) A
34) A
35) D
36) A
37) C
38) D
39) D
40) B
41) C
42) A
43) B
44) C
45) D
420
CHAPTER 18
1) FALSE
2) FALSE
3) TRUE
4) D
5) A
6) B
7) A
8) A
9) A
10) D
11) D
12) A
13) B
14) C
15) A
16) D
17) C
18) C
19) B
20) B
21) A
22) C
23) C
24) B
421