INTEL 8086 Architecture and PinDiagram Architecture of INTEL 8086 RCET Microprocessor & Microcontroller 2 INTEL 8086 • The 8086 was the first 16-bit Microprocessor to be introduced by Intel Corporation in 1978. • Features: • A 16-bit microprocessor chip. • Max. CPU clock rate:5 MHz to 10 MHz • Package: 40 pin DIP • 16-bit Arithmetic Logic Unit • 16-bit data bus • 20-bit address bus = 1,048,576 = 1 meg RCET Microprocessor & Microcontroller 3 • The 8086 microprocessor architecture is internally divided into two separate functional units. • Bus Interface Unit (BIU) • Execution Unit (EU). RCET Microprocessor & Microcontroller 4 8086 -Memory segmentation • Von – Newman architecture & Harvard architecture • Program Memory & Data Memory • Need for Segmentation – – – – – RCET To implement Harvard architecture Easy to debug Same Interfacing ICs can be used To avoid overlap of stack with normal memory Compatible with 8085 Microprocessor & Microcontroller 5 Segmented Memory Segment Size = 64KB Maximum number of segments possible = 14 Logical Address – 16 bits Physical Address – 20 bits 2 Logical Addresses for each Segments. Base Address (16 bits) Offset Address (16 bits) Segment registers are used to store the Base address of the segment. RCET Microprocessor & Microcontroller 6 Memory Address Generation • The BIU has a dedicated adder for determining physical memory addresses. Offset Value (16 bits) Segment Register (16 bits) 0000 Adder Physical Address (20 Bits) RCET Microprocessor & Microcontroller 7 Segment : Offset Address • Logical Address is specified as segment:offset • Physical address is obtained by shifting the segment address 4 bits to the left and adding the offset address. • Thus the physical address of the logical address A4FB:4872 is: A4FB0 + 4872 A9822 RCET Microprocessor & Microcontroller 8 Segments, Segment Registers & Offset Registers • Segment Size = 64KB • Maximum number of segments possible = 14 • Logical Address – 16 bits • Physical Address – 20 bits • 2 Logical Addresses for each Segments. – Base Address (16 bits) – Offset Address (16 bits) • Segment registers are used to store the Base address of the segment. RCET Microprocessor & Microcontroller 9 Segments, Segment Registers & Offset Registers • 4 Segments in 8086 – Code Segment (CS) – Data Segment (DS) – Stack Segment (SS) – Extra Segment (ES) RCET SEGMENT SEGMENT REGISTER OFFSET REGISTER Code Segment CSR Instruction Pointer (IP) Data Segment DSR Source Index (SI) Extra Segment ESR Destination Index (DI) Stack Segment SSR Stack Pointer (SP) / Base Pointer (BP) Microprocessor & Microcontroller 10 Block diagram of 8086 RCET Microprocessor & Microcontroller 11 • The BIU fetches instructions, reads data from memory and ports, and writes data to memory and I/O ports. • The EU executes instructions that have already been fetched by the BIU. • The EU decodes and executes instructions. A decoder in the EU control system translates instructions. The EU has a 16-bit ALU for performing arithmetic and logic operations. • RCET Microprocessor & Microcontroller 12 • The BIU and EU function independently. The BIU interfaces the 8086 to the outside world. • The BIU’s instruction queue is a First-In First-out (FIFO) group of registers in which up to six bytes of instruction code are perfected from memory ahead of time. • This is done in order to speed up program execution by overlapping instruction fetch with execution. This mechanism is known as pipelining. RCET Microprocessor & Microcontroller 13 Pipelined architecture of the 8086 microprocessors RCET Microprocessor & Microcontroller 14 Execution and bus interface units RCET Microprocessor & Microcontroller 15 Software Model of the 8086 Microprocessors RCET Microprocessor & Microcontroller 16 Address space & Data organization Storing a word in memory What is the word in (b) in Hex? Memory address space RCET Microprocessor & Microcontroller 17 8086 Registers General Purpose AH AL AX Index BP SP BH BL BX SI CH CL DH DL CX DI Segment DX CS Status and Control RCET SS Flags DS IP ES Microprocessor & Microcontroller 18 General Purpose Registers AX - the Accumulator BX - the Base Register CX - the Count Register DX - the Data Register • Normally used for storing temporary results • Each of the registers is 16 bits wide (AX, BX, CX, DX) • Can be accessed as either 16 or 8 bits AX, AH, AL RCET Microprocessor & Microcontroller 19 General Purpose Registers • AX – Accumulator Register – Preferred register to use in arithmetic, logic and data transfer instructions because it generates the shortest Machine Language Code – Must be used in multiplication and division operations – Must also be used in I/O operations • BX – Base Register – Also serves as an address register RCET Microprocessor & Microcontroller 20 General Purpose Registers • CX – Count register – Used as a loop counter – Used in shift and rotate operations • DX – Data register – Used in multiplication and division – Also used in I/O operations RCET Microprocessor & Microcontroller 21 Pointer and Index Registers • All 16 bits wide, L/H bytes are not accessible • Used as memory pointers – Example: MOV AH, [SI] • Move the byte stored in memory location whose address is contained in register SI to register AH • IP is not under direct control of the programmer RCET Microprocessor & Microcontroller 22 Flag Register Overflow Carry Direction Parity Auxiliary Carry Interrupt enable Trap Zero Sign RCET Microprocessor & Microcontroller 6 are status flags 3 are control flag 23 8086 Programmer’s Model ES CS SS DS IP BIU registers (20 bit adder) EU registers AX BX CX DX AH BH CH DH Stack Segment Data Segment Instruction Pointer AL BL CL DL SP BP SI DI FLAGS RCET Extra Segment Code Segment Accumulator Base Register Count Register Data Register Stack Pointer Base Pointer Source Index Register Destination Index Register Microprocessor & Microcontroller 24 The Stack • The stack is used for temporary storage of information such as data or addresses. • When a CALL is executed, the 8086 automatically PUSHes the current value of CS and IP onto the stack. • Other registers can also be pushed • Before return from the subroutine, POP instructions can be used to pop values back from the stack into the corresponding registers. RCET Microprocessor & Microcontroller 25 The Stack RCET Microprocessor & Microcontroller 26 Example for PUSH RCET Microprocessor & Microcontroller 27 Example for POP RCET Microprocessor & Microcontroller 28 Pin Diagram of INTEL 8086 RCET Microprocessor & Microcontroller 29 INTEL 8086 - Pin Diagram RCET Microprocessor & Microcontroller 30 INTEL 8086 - Pin Details Power Supply 5V 10% Ground Reset Registers, seg regs, flags CS: FFFFH, IP: 0000H If high for minimum 4 clks Clock Duty cycle: 33% RCET Microprocessor & Microcontroller 31 INTEL 8086 - Pin Details Address/Data Bus: Contains address bits A15-A0 when ALE is 1 & data bits D15 – D0 when ALE is 0. RCET Address Latch Enable: When high, multiplexed address/data bus contains address information. Microprocessor & Microcontroller 32 INTEL 8086 - Pin Details INTERRUPT Non - maskable interrupt Interrupt acknowledge Interrupt request RCET Microprocessor & Microcontroller 33 INTEL 8086 - Pin Details Direct Memory Access Hold Hold acknowledge RCET Microprocessor & Microcontroller 34 INTEL 8086 - Pin Details Address/Status Bus Address bits A19 – A16 & Status bits S6 – S3 RCET Microprocessor & Microcontroller 35 INTEL 8086 - Pin Details BHE#, A0: Bus High Enable/S7 0,0: Whole word (16-bits) Enables most significant data bits D15 – D8 during read or write operation. 0,1: High byte to/from odd address S7: Always 1. 1,0: Low byte to/from even address 1,1: No selection RCET Microprocessor & Microcontroller 36 INTEL 8086 - Pin Details Min/Max mode Minimum Mode: +5V Maximum Mode: 0V Minimum Mode Pins Maximum Mode Pins RCET Microprocessor & Microcontroller 37 Minimum Mode- Pin Details Read Signal Write Signal Memory or I/0 Data Transmit/Receive Data Bus Enable RCET Microprocessor & Microcontroller 38 Maximum Mode - Pin Details S2 S1 S0 000: INTA 001: read I/O port 010: write I/O port 011: halt 100: code access 101: read memory 110: write memory 111: none -passive RCET Status Signal Inputs to 8288 to generate eliminated signals due to max mode. Microprocessor & Microcontroller 39 Maximum Mode - Pin Details Lock Output Used to lock peripherals off the system DMA Request/Grant Activated by using the LOCK: prefix on any instruction Lock Output RCET Microprocessor & Microcontroller 40 Maximum Mode - Pin Details QS1 QS0 00: Queue is idle 01: First byte of opcode 10: Queue is empty 11: Subsequent byte of opcode Queue Status Used by numeric coprocessor (8087) RCET Microprocessor & Microcontroller 41 Minimum Mode 8086 System RCET Microprocessor & Microcontroller 42 ‘Read’ Cycle timing Diagram for Minimum Mode RCET Microprocessor & Microcontroller 43 ‘Write’ Cycle timing Diagram for Minimum Mode RCET Microprocessor & Microcontroller 44 Maximum Mode 8086 System RCET Microprocessor & Microcontroller 45 Maximum Mode 8086 System • Here, either a numeric coprocessor of the type 8087 or another processor is interfaced with 8086. • The Memory, Address Bus, Data Buses are shared resources between the two processors. • The control signals for Maximum mode of operation are generated by the Bus Controller chip 8788. • The three status outputs S0*, S1*, S2* from the processor are input to 8788. • The outputs of the bus controller are the Control Signals, namely DEN, DT/R*, IORC*, IOWTC*, MWTC*, MRDC*, ALE etc. RCET Microprocessor & Microcontroller 46 Memory Banking RCET Microprocessor & Microcontroller 47 8086 Interrupts RCET Microprocessor & Microcontroller 48 8086 Interrupts Procedure RCET Microprocessor & Microcontroller 49 8086 External Interrupts RCET Microprocessor & Microcontroller 50 8086 Interrupt Vector Table RCET Microprocessor & Microcontroller 51 8086 Interrupt Vector Table RCET Microprocessor & Microcontroller 52 Total Memory and IVT RCET Microprocessor & Microcontroller 53 8086 Control Signals 1. ALE 2. BHE 3. M/IO 4. DT/R 5. RD 6. WR 7. DEN RCET Microprocessor & Microcontroller 54
