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MEMS Packaging for the IoT
Article · June 2017
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EPE ‐ Equipment for Electronic Product Manufacturing
CEPEM, Vol. 262, pp. 35‐38, June (2017)
MEMS Packaging for the IoT
Doug Sparks
Hanking Electronics Ltd
Shenyang, PR China 110016
Many MicroElectro Mechanical Systems (MEMS) devices that are or will be employed in the
Internet of Things (IoT), like gyroscopes, oscillators, accelerometers, pressure and IR sensors
rely on wafer level packaging (WLP) to produce small, sealed silicon Chip Scaled Packages (CSP).
These advanced packaging methods compliment or in some cases will replace more traditional
IC packaging methods. The first MEMS devices were single sensors, or for motion sensors,
single axis devices packaged using cavity through‐hole technology. With the advent of WLP, the
single sensor MEMS chips could be stacked or placed side by side with the IC to form
combinations on sensors, also called combo sensors. These somewhat complex packages were
greatly simplified by combining multiple sensing elements into one MEMS chip (1), Figure 1
shows how wafer to wafer bonding is used to make Hanking Electronic’s 6‐axis inertial
Measurement Unit (IMU) with 3 gyroscope and 3 linear accelerometers on a single MEMS chip.
Figure 1. Wafer level packaging of capacitive a 6‐axis inertial MEMS sensors
These MEMS sensors are fabricated using 200mm diameter wafers. Large wafer diameters are
needed for the IoT since the projected annual volumes are more than 100 million devices per
year. Like smart phone applications, IoT MEMS manufacturing must utilize large wafer
diameter to keep the unit sensor price low in order to maximize market penetration.
EPE ‐ Equipment for Electronic Product Manufacturing
CEPEM, Vol. 262, pp. 35‐38, June (2017)
The MEMS sensor shown in Figure 1 relies on capacitive sensing elements, which inherently
consume low amounts of electrical power. This is a key requirement for IoT applications. Low
power budgets, especially for wireless IoT devices generally pushes the sensing technology
toward capacitive or piezoelectric sensors and actuators or to sensors that passively absorb
radiation such as IR and optical sensors. Energy harvesting modules may also be incorporated
into remote, distributed IoT devices. These energy harvesters may use resonators, solar cells or
thermoelectric elements to product power for the IoT module.
Wafer level packaging of IR sensors and high Q resonators, such as gyroscopes, filters,
oscillators and energy harvesters, have had problems with desorbed gas molecules in the
microcavity. The water vapor and air molecules desorb from the wafer surfaces during the
relatively high temperature (250 to 500⁰C) wafer bonding process after hermetic sealing of the
individual sensing or actuating elements. The trapped gas molecules raise the pressure and
hence lower the Q and can then be absorbed by the microcavity surfaces are low temperatures
(‐40 to 0⁰C) and then desorbed at higher temperatures (85 to 150⁰C) during operation, resulting
in degraded performance. To permanently trap the residual gas molecules commercially
available thin film absorbents or getters were developed and integrated into the WLP process
flow (2,3). These reactive layers, are most often patterned on the capping wafer, as illustrated
in Figure 1, and trap gas molecules during the 250‐400⁰C wafer bond process or subsequent
annealing.
Hermeticity of these CSP is critical for many applications, especially automotive and industrial
sensors and actuators that must operate in the field under warranty for 10 to 20 years. Helium,
neon and krypton pressurized testing is the most common method of checking the reliability of
electronic packages (4,5).
It has been found that not all types of wafer to wafer bonding method produce truly hermetic
vacuum seals. Depending on the application of the sensor, this can have an impact on the long‐
term performance of the device. Figure 2 shows experimental results of long‐term helium
pressure testing (6) and how the sensor offset voltage and hence internal cavity pressure
changed over time during the MEMS chips exposure to high pressure helium, 415 KPa. It is
interesting that the majority of the CSP parts did show ingress of helium, although the Metal
Seal 2 parts did not show any indication of helium ingress. The comparative helium pressure
testing of various wafer bonding methods with the same sensor type resulted in different leak
rates, indicating that the sealing method, not helium diffusion through silicon, is the cause for
loss of helium hermeticity. As can be seen in Figure 2, metal seal 1 parts showed a slow helium
ingress issue, while the silicon direct and anodically bonded silicon to glass bonded parts
showed a much faster change in bridge output or cavity pressure over time.
EPE ‐ Equipment for Electronic Product Manufacturing
CEPEM, Vol. 262, pp. 35‐38, June (2017)
Figure 2. The MEMS sensor output change with time during long‐term, pressurized helium storage
Improvements in any wafer bonding process can be obtained by varying the bonding
temperature, ambient gas or vacuum levels, bonding force, time and changing the reflowed
metals or opposing surface metals. Also different devices have maximum bond temperature
limitations. For example, IR sensors require lower bonding temperature than resonating
gyroscopes. Ideally the entire opposing surface seal ring will meet at temperature, forming a
lower melting point eutectic interface that does form a liquid interface. In reality particles or
scratches of a hard surface (silicon) may prevent this contact during the bonding process
resulting in a potential interface leak where the low melting point eutectic alloy does not form.
Wafer to wafer bonding using reflowed metal seals has been found to provide the best
performance and for at least one type of metal seal a long‐term helium tight solution. This
indicates that diffusion of helium through thin silicon walls is not a failure mechanism and that
truly hermetic silicon CSP packages can be manufactured for high reliability and used for helium
and hydrogen gas sensing applications.
Backend processing of such small MEMS devices as pressure sensors and microphones are also
adopting the latest chip singulation methods that have been applied to ICs. Laser dicing is
being used by many of the thinner, high volume MEMS wafer manufacturers. Deep reactive ion
etching (DRIE) was developed and applied to many MEMS devices and is now starting to be
used by ICs and MEMS wafers for chip singulation in the backend or packaging facilities. DRIE
or plasma singulation of silicon wafers provides a smaller “saw” street resulting in more chips
per wafer and it can eliminate sharp corners and silicon slurry or laser slag particle
contamination.
After dicing, the small MEMS die are most often next placed on a circuit board panel or
interposer and in many cases calibrated at the same time in parallel prior to panel singulation.
EPE ‐ Equipment for Electronic Product Manufacturing
CEPEM, Vol. 262, pp. 35‐38, June (2017)
Figure 3 shows how Hanking Electronics stacks thinned CMOS and MEMS wafers together on an
LGA panel and electrically links these together via wirebonding. Both CMOS on MEMS and
MEMS on CMOS chip stacks have been commercially developed. The thinning of the wafers
prior to packaging is key
Figure 3. Wirebonding of a CMOS on MEMS chip stack in an LGA package
For many IoT applications such as wearables and smart
phone applications where minimizing the package size
is critical. The consumer products industry has pushed
MEMS suppliers toward standard surface mount pad
outs, such as that show in Figure 4. This standard LGA
pad layout allows for the interchange of parts from
different suppliers.
Future trends for packaging include the use of through‐
silicon‐vias (TSV) to connect stacked MEMS and CMOS
wafers and chips together. Ultimately the TSV
approach will be used to incorporate the surface
mountable pads for direct silicon CSP solder
attachment to the PCB in future IoT systems
References
Figure 4. Pad side of an LGA package.
EPE ‐ Equipment for Electronic Product Manufacturing
CEPEM, Vol. 262, pp. 35‐38, June (2017)
1. K. Volker, Microgyroscope for determining rotational movements about an X and/or Y
and Z axis, US Patent 8,479,575, 2013.
2. M.Moraja, M. Amiotti, Getters films at wafer level for wafer to wafer bonded MEMS,
Design, Test, Integration and Packaging of MEMS/MOEMS 2003, IEEE, pp. 346‐349, May
5‐7, 2003
3. D.Sparks, Thin Film Getters: From Vacuum Tubes to Wafer Scale MEMS Packaging,
Wafer & Device Packaging and Interconnect, Vol.1, p.19‐22, June 2010.
4. MIL‐STD‐883, 1975
5. M.Jarrett, MEMS Sensor Package Leak Test, US Patent Application US 2007/0084270,
2007
6. D.Sparks, Advances in high‐reliability, hermetic MEMS CSP, Chip‐Scale Review, Vol. 20,
No. 6, p.36‐39, Sept‐Oct, 2016.
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