International Journal of Scientific Research Engineering & Technology (IJSRET), ISSN 2278 – 0882 Volume 5, Issue 3, March 2016 Self tuning filter (STF) based reference current generation strategy for DSTATCOM to improve power quality under non-stiff Source J.Ramesh1, T. Aruldoss Albert Victoire 2 1 Department of Electrical and Electronics Engineering, Jawaharlal Nehru Technological University, Kakinada, Andhra Pradesh, India ABSTRACT The Distribution Static Compensator (DSTATCOM) is used for compensation of load in power distribution network. Traditional reference current generation method will be erroneous due to non stiff sources. In this paper, a self tuning filter based reference current generation method which is suitable for DSTATCOM application with non stiff source has been proposed. The DSTATCOM control is based on the use of self tuning filters (STF) for the current generation and on a modulated hysteresis current controller. The use of STF instead of filters allows extracting directly the voltage and current fundamental components in the α-β axis without phase locked loop (PLL). Also the proposed method enables DSTATCOM to have a reduced dc-link voltage without compromising the compensation capability. With the reduction in the dc-link voltage, the average switching frequency of the insulated gate bipolar transistor switches of the DSTATCOM is also reduced. The efficacy of the new proposed method is verified by MATLAB simulation software. Distribution static compensator (DSTATCOM), Dc-link voltage, (STF), Modulated hysteresis current controller, Non-stiff source, Selftuning filter Keywords I. - INTRODUCTION The proliferation of power electronic devices, non linear loads, and unbalanced loads has degraded the power quality in the power distribution network [1]. To improve the quality of power, active power filters have been proposed [2]. The distribution static compensator (DSTATCOM) is a shunt active filter, which injects currents into the point of common coupling (PCC) such that harmonic filtering, power factor correction, and load balancing can be achieved. In practice, the load is distant from the distribution substation and is associated with feeder impedance. In the presence of feeder impedance, the inverter switching distorts both the terminal voltage and the source currents. In this situation, the source is termed as non stiff. If the same control algorithm for the stiff sources is used for the non -stiff sources, the reference currents generated will be erroneous and modified reference current generation gives, however, better results[3], [4]. The compensation performance of any active filter depends on the voltage rating of dc link capacitor. In general, the dc link voltage has much higher value than the peak value of the line-to –neutral voltages. This is done in order to ensure a proper compensation at the peak of the source voltage. In [5], the authors discuss the current distortion limit and loss of control limit, which states that the dc-link voltage should be greater than or equal to resultant √6 times the phase voltage of the system for distortion –free compensation. When the dc-link voltage is less than this limit, there is insufficient resultant voltage to drive the currents through the inductances so as to track the reference currents. Reference value of the dc-bus capacitor voltage mainly depends upon the requirement of reactive power compensation of the active power filter. The primary condition for reactive power compensation is that the magnitude of reference dc-bus capacitor voltage should be higher than the peak of source voltage at the PCC [6]. With the high value of dc-link capacitor [7]-[10], the voltage source inverter (VSI) becomes bulky and the switches used in the VSI also need to be rated for higher value of voltage and current. This, in turn, increases the entire cost and size of the VSI. In this paper, a self tuning filter based reference current generation have been proposed which is suitable for DSTATCOM control under non stiff source conditions. The STF is dedicated to extract the fundamental component directly from electrical signals in α-β reference frame. In the following, the frequency and dynamic responses of the STF are mathematically analyzed and discussed. The major advantages of the STF are cited under: www.ijsret.org 160 International Journal of Scientific Research Engineering & Technology (IJSRET), ISSN 2278 – 0882 Volume 5, Issue 3, March 2016 • Operating adequately in steady state and transient condition; • No phase delay and unity gain at the fundamental frequency; • No PLL required; • Easy to implement in digital or analogue control system. A focus is made on the STF performances by mathematical analysis under distorted voltage conditions. The simulation studies are carried out to verify the proposed concept, and detailed results are presented. II. CONVENTIONAL TOPOLOGIES OF DSTATCOM 2.1 System configuration In this section, the conventional topologies of the DSTATCOM are discussed in detail. Fig. 1 shows the power circuit of the neutral clamped VSI topology-based DSTATCOM which is considered the conventional topology in this study. Even though this topology requires two dc storage devices, each leg of the VSI can be controlled independently and tracking is smooth with less number of switches when compared to other VSI topologies [11]. In this figure, vsa, vsb, and vsc are source voltages. Similarly, v ta, v tb, and vtc are the terminal voltages at the PCC. The source currents in three phases are represented by isa, isb, and isc and load currents are represented by ila, ilb, and ilc. The shunt active filter currents are denoted by ifa, ifb, ifc, and io represents the current in the neutral leg. Ls and Rs represent the feeder inductance and resistance, respectively. The interfacing inductance and resistance are presented by Lf and Rf, respectively. The load constituted of both linear and nonlinear loads are as shown in this figure. The dc-link capacitors and voltages across them are represented by Cdc1 = Cdc2 = C dc and Vdc1 = Vdc2 = V dc, respectively. The current through the dc link is represented by the idc. In this topology, the voltage across each dc-link capacitance is chosen as 1.6 times the peak value of the source voltages as given in [12]. Figure 1: Neutral clamped VSI topology based DSTATCOM 2.2 Design of VSI parameters The parameters of the VSI need to be designed with utmost care for better tracking performance. The principal parameters that ought to be taken into account while designing conventional VSI are dc-link voltage Vdc, dc storage capacitor Cdc, interfacing inductance Lf , and switching frequency fsw. A detailed design procedure of VSI parameters is given in [13]; based on the following equations, the parameters of the conventional VSI topology are selected. The dc-link capacitor value is given by 2 X X / 2nT 1.8Vm 2 1.4Vm 2 Cdc (1) Where Vm is the peak value of the source voltage, X is the kVA rating of the system, n is the number of cycles, and T is the time period of each cycle. The interfacing inductance is given by Lf 1.6Vm 4hf sw m ax (2) Where h k1 2m 2 1 f sw max k 2 4m 2 (3) Where k1 and k2 are proportionality constants, fswmax is the maximum switching frequency of the switch, fswmin is minimum switching frequency of the switch, and m is given by www.ijsret.org 161 International Journal of Scientific Research Engineering & Technology (IJSRET), ISSN 2278 – 0882 Volume 5, Issue 3, March 2016 1 m (4) 1 f sw max / f sw max Consider a three-phase system with 230-V line-toneutral voltage. The hysteresis band h is taken as 0.5 A. From (2), the interfacing inductance Lf is computed to be 26 mH. The base kVA rating of the system is taken as 15 kVA. Using (1), Cdc is computed and found to be 3300 μF. The system parameters are given in Table I for the conventional VSI topology. 2.3 Generation currents of conventional reference In this paper, for conventional topology the reference currents are generated using instantaneous symmetrical component theory [14] and are given as i * i fa * fb ila i * ilb i sa * sb v vtc vta Plavg Ploss (5) ilb tb i * fc ilc i * sc ila vtc vta vtb Plavg Ploss v 2 tk i * fb ilb i * sb ilb v tb1 v tcl v ta1 Plavg Ploss 1 i * fc ilc i * sc ilc v tc1 v tal v tb1 Plavg Ploss 1 (6) Where (v tk 1 ) 2 , tan / 3 k a ,b ,c The aforesaid algorithm gives balanced source currents after compensation regardless of unbalanced and distorted supply. GENERATION OF NEW REFERNCE CURRENT WITH NON STIFF SOURCE 3.1 Self tuning filter Hong-sock Song studied the integration in the synchronous reference frame [15]. The equation that he has established for instantaneous signals is given under Vxy (t ) e jt e jtU xy (t )dt Where v ta1 v tal v tc1 Plavg Ploss 1 III. v vtb vtc Plavg Ploss ila ta i * fa ila i * sa ila , tan / 3 k a ,b ,c Here, Plavg is the average load power, Ploss denotes the switching losses in actual compensator and it is generated using a capacitor voltage PI controller. The term Plavg is obtained using a moving average filter of one cycle window of time T in seconds. The term ϕ is the desired phase angle between the source voltage and current. In this paper, the load currents are unbalanced and distorted; these currents flow through the feeder impedance and make the voltage at PCC unbalanced and distorted. However, if the voltages are unbalanced and distorted, it is not at all feasible to get balanced and sinusoidal currents after compensation using (5). To eliminate this limitation of the algorithm, fundamental positive sequence voltages v+ta1 (t), v+tb1 (t) and v+tc1 (t) of the distorted terminal voltages are extracted. Now, the voltages vta(t), vtb(t), and vtc(t) in (5) are replaced by v+ta1(t), v+tb1(t), andv+tc1(t), respectively. Therefore, the expressions for reference compensator currents become (7) Where U xy and Vxy are the instantaneous signals which can be expressed by the transfer function after Laplace transformation Figure 2: Self-tuning filter H ( s) Vxy (t ) U xy ( s) s j s2 2 (8) Here the constant K is introduced in the following transfer function H(s), to obtain a STF with a cut-off www.ijsret.org 162 International Journal of Scientific Research Engineering & Technology (IJSRET), ISSN 2278 – 0882 Volume 5, Issue 3, March 2016 frequency ωo, so the earlier transfer function H(s) becomes H ( s) Vxy (t ) U xy ( s) K ( s K ) jo 2 ( s K ) 2 o (9) By introducing the constant K in H(s), the transfer function magnitude is limited and mostly equal to one for ω=ωo. Furthermore, the phase delay is equal to zero for the frequency ωo. Input signals U xy(s) and the output signals V xy(s) are modified by the following expressions xˆ ( s ) K o K (s K ) x (s) x ( s) 2 2 2 ( s K ) o ( s K ) 2 o (10) xˆ ( s ) K o K (s K ) x (s) x ( s) 2 2 2 (s K ) o (s K ) 2 o (11) Where x̂ (s) and x̂ (s) can be either a current or a voltage signal, respectively before and after filtering Eqs. (10) and (11) can be expressed as follows: K x (s) xˆ (s) o xˆ (s) s s K xˆ ( s) x ( s) xˆ ( s) o xˆ ( s) s s xˆ ( s) This three-phase signal can be transformed into the twophase α-β reference frame by using the Concordia transformation 1 2 3 2 1 x a 2 x 3 b x 2 c (17) From (14)-(16) and (17) we obtained the following expressions 3 X 1 sin(t 1 ) 2 x (t ) 3 n X h sin(ht h ) 2 h2 (18) x (t ) n 3 3 X 1 cos(t 1 ) X h cos(ht h ) 2 2 h2 (19) By replacing Eqs. (18) and (19) after Laplace transformation into Eqs. (10) and (11) by taking the inverse Laplace transformation, the following instantaneous expressions for the STF outputs are obtained 3.3 Harmonic Isolator (12) The load currents, iLa, iLb and iLc of the three-phase system are transformed into the α-β axis as follows (13) The block diagram of the STF tuned at the pulsation ωo is depicted in Fig.2. One can notice that no displacement is introduced by this filter at the system pulsation. i i 3.2 Dynamic response of the STF under Distorted conditions n xa (t ) X 1 sin(t 1 ) X h sin(ht h ) (14) 2 n 2 xb (t ) X 1 sin t 1 X h sin ht h 3 h2 3 (15) 2 n 2 xc (t ) X 1 sin t 1 X h sin ht h 3 h2 3 (16) 1 2 3 0 1 2 3 2 1 i La 2 i 3 Lb i 2 Lc (20) Figure 3: STF-based harmonic isolator A three-phase distorted electrical signal x(t) can be expressed in Fourier series by Eqs. (14)- (16) as follows h2 1 2 3 0 x x As known, the currents in the α-β axis can be respectively decayed into DC and AC components by ~ i iˆ i ~ i iˆ i (21) Then, the STF extracts the fundamental components at the pulsation ωo directly from the currents in the α-β axis. Then, the α-β harmonic components of the load currents are computed by subtracting the STF input signals from the corresponding outputs as shown in Fig.3. The resulting signals are the AC components, www.ijsret.org 163 International Journal of Scientific Research Engineering & Technology (IJSRET), ISSN 2278 – 0882 Volume 5, Issue 3, March 2016 ~ ~ i and i , which correspond to the harmonic components [16] of the load currents iLa, iLb and iLc in the stationary reference frame. For the source voltage, the three phase voltages vsa, vsb and vsc are transformed to the α-β reference frame as follows: 1 v 2 v 3 0 1 2 3 2 i* vˆ vˆ vˆ 2 (22) Then, we applied self-tuning filtering to these α-β voltage components. This filter allows suppressing of any harmonic component of the distorted mains voltages and consequently leads to improve the performance of the harmonic isolator. After computation of the fundamental component v̂ and the harmonic ~ currents i we calculate the p and q powers as follows p i vˆ i vˆ ~ i* i vˆ ~ q vˆ vˆ2 2 (26) vˆ pc vˆ vˆ2 2 vˆ vˆ vˆ2 2 (27) pc (28) The references currents are obtained from Eqs. (27) and (28). Accordingly, a small amount of active power is captivated from or released to the DC capacitor so as to control the DC bus voltage [17] and [18]. Then, the filter reference currents in the a–b–c coordinates are defined by i i i q i vˆ i vˆ ~p pc With substitution of (24) into (25) and (26), we obtained ~ i* i 1 v sa 2 v 3 sb v 2 sc 2 * fa * fb * fc (23) 1 2 1 3 2 1 2 0 3 i 2 i 3 2 (29) Where 3.4 Modulated Hysteresis Current Controller p pˆ ~ p, q qˆ q~ With p̂ , q̂ fundamental components, ~ p , q~ alternative components and the power components, ~p and q~ related to the same α-β voltages and currents are as follows p vˆ ~ q~ vˆ vˆ ~ i ~ vˆ i (24) After adding the active power required for regulating DC bus voltage, pc, to the alternative component of the p , the current references in instantaneous real power, ~ the α-β reference frame, i are calculated by i* vˆ vˆ ~p pc 2 2 q~ 2 vˆ vˆ vˆ vˆ 2 (25) Now the current controller has to be considered. With linear controllers using pulse width modulation (PWM) techniques, a constant switching frequency can be obtained and a well-defined harmonic spectrum can also be obtained, but with limited number of dynamic properties. Compared with linear controllers, non-linear ones based on hysteresis strategies allows faster dynamic response and better robustness with respect to the variation of the non-linear load [19]. Nonetheless, with non-linear current controllers, the switching frequency is not constant and this technique generates a large side harmonics band around the switching frequency. To fix the switching frequency, one solution could consist in using a variable hysteresis bandwidth. This solution which implies the knowledge of the system model and its parameters with enough precision is difficult to implement experimentally. Here, we implemented a nonlinear current controller, so-called modulated hysteresis current controller [20]. Fig.4. presents the modulated www.ijsret.org 164 International Journal of Scientific Research Engineering & Technology (IJSRET), ISSN 2278 – 0882 Volume 5, Issue 3, March 2016 hysteresis current controller. The major principle of this controller consists in adding to the error 3.5. DC bus voltage control A DC bus controller is required to control the DC bus voltage vdc and to compensate for the DSTATCOM losses. The measured DC bus voltage vdc is compared with its reference value v dc. The error is applied to a proportional integral (PI) controller. So, the compensating device can control the DC capacitor voltage without any external power supply. Figure 4: Modulated hysteresis current controller IV. f Signal X (X = i - i f ) a triangular carrier signal (Tr) with amplitude (Atr) and period (T). The carrier frequency is selected which is equal to the desired switching frequency for the voltage inverter. The resulting signal (H) constitutes then the new reference of a traditional hysteresis controller with a bandwidth of 2Bh. The outputs of the hysteresis block are the switching pattern of the voltage source inverter. SIMULATION RESULTS The simulation results for both the conventional and the proposed topologies are presented in this section for a lucid understanding and for a comparison between both the topologies. The load currents and terminal (PCC) voltages before compensation are shown in Fig. 6. The load currents are unbalanced and distorted; the terminal voltages are also unbalanced and distorted because of the flow of these load currents through the feeder impedance in the system. The Simulink model of DSTATCOM as shown in fig .5. Simulation parameters as shown in Appendix A Fig. 5: Simulink model of DSTATCOM www.ijsret.org 165 International Journal of Scientific Research Engineering & Technology (IJSRET), ISSN 2278 – 0882 Volume 5, Issue 3, March 2016 (a) Fig. 8: Compensator filter currents (b) Fig 6: (a) Load currents before compensation (b) Terminal voltage before compensation Fig. 9: DC capacitor voltages (top and bottom) 4.1 Simulation results using conventional topology The source currents after compensation are balanced and sinusoidal as shown in the fig.7.These currents still contain the switching frequency of the compensator. The three-phase compensator currents are depicted in Fig. 8. The dc-link voltages across the top and bottom dc-link capacitors are shown in Fig. 9; using PI controller, the voltage across both capacitors are maintained constant to the reference value of 320 V as shown in the figure. The terminal voltages contain the switching frequency components of the inverter and are shown in Fig. 10. Fig. 10: Terminal voltages after compensation 4.2. Simulation results using proposed topology The source currents after compensation using proposed topology are shown in Fig.11. The compensator currents are displayed in Fig.12, which are identical to the currents using the conventional topology. The dc-link voltages across the top and bottom dc-link capacitors are shown in Fig.13. The terminal voltages after compensations are shown in Fig.14, which are free from the switching frequency components of the inverter. Fig. 7: source currents after compensation www.ijsret.org 166 International Journal of Scientific Research Engineering & Technology (IJSRET), ISSN 2278 – 0882 Volume 5, Issue 3, March 2016 conditions. A self tuning filter based reference current computation method suitable for DSTATCOM has been suggested. This has the capability of compensating the load at a lower dc-link voltage under non-stiff source. Self-tuning filters have been introduced in the proposed method instead of filters for both system voltages and load currents. The use of this filter gives the satisfactory performances since it perfectly extracts the harmonic currents under distorted conditions. For the current controller, we implemented the modulated hysteresis current controller to obtain a fixed switching frequency for the IGBTs. The simulation results have demonstrated and comforted the major advantages of using STF and modulated hysteresis current controller in the DSTATCOM control. In conclusion, the proposed control for DSTATCOM is very effectual in installation on an actual power system under non stiff source conditions. Fig. 11: source currents after compensation APPENDIX- A Fig. 12: Compensator filter currents System voltages: 230 V(L-L), 50 Hz; load: (1) Linear load impedance Z la =34+j47.5 Ω,Z lb = 81+j39.6 Ω,Z lc = 31.5 + j 70.9 Ω;Load (2) Nonlinear loads: Three phase full bridge rectifier load feeding a R-L load of 150 Ω300mH; VSI papameters: C dc=3300µF, V dcref =320V,Lf=26 mH, Rf=0.1 Ω; PI controller gains: K p=2, K i=0.5; Hysteresis Band width ±0.5 A REFERENCES Fig. 13: DC capacitor voltages (top and bottom) Fig. 14: Terminal voltages after compensation V. CONCLUSION This paper has discussed in detail the control and performances of a DSTATCOM under non-stiff source [1] M. Bollen, Understanding Power Quality Problems: Voltage Sags and Interruptions. New York: IEEE Press, 1999. [2] A. Sahoo and T. Thyagarajan, ―Modelling of facts and custom power devices in distribution network to improve power quality,‖ in Proc. Int. Conf. Power Syst., 2009, pp. 1–7. [3] M. K. Mishra, A. Ghosh, and A. Joshi, Load compensation for systems with non-stiff source using state feedback, Electro Power Syst. Res., vol. 67, no. 1, pp. 35–44, 2003. [4] A. Ghosh and G. Ledwich, Load compensating DSTATCOM in weak ac systems, IEEE Trans. Power Del., vol. 18, no. 4, pp. 1302–1309, Oct. 2003. [5] B. T. Ooi, J. C. Salmon, J. W. Dixon, and A. B. Kulkarni, A three phase controlled-current PWM converter with leading power factor, IEEE Trans. Ind. Appl., vol. IA-23, no. 1, pp. 78–84, Jan. 1987. www.ijsret.org 167 International Journal of Scientific Research Engineering & Technology (IJSRET), ISSN 2278 – 0882 Volume 5, Issue 3, March 2016 [6] Y. Ye, M. Kazerani, and V. Quintana, Modelling control and implementation of three-phase PWM converters, IEEE Trans. Power Electron.,vol. 18, no. 3, pp. 857–864, May 2003. [7] G. S. Perantzakis, F. H. Xepapas, and S. N. Manias, A novel four-level voltage source inverter—Influence of switching strategies on the distribution of power losses, IEEE Trans. Power Electron., vol. 22, no. 1,pp. 149– 159, Jan. 2007. [8] M. Routimo, M. Salo, and H. Tuusa, Comparison of voltage-source and current-source shunt active power filters, IEEE Trans. Power Electron., vol. 22, no. 2, pp. 636–643, Mar. 2007. [9] J. Liang, T. Green, C. Feng, and G. Weiss, Increasing voltage utilization in split-link four-wire inverters, IEEE Trans. Power Electron., vol. 24, no. 6, pp. 1562–1569, Jun. 2009. [10] V. George and Mahesh K. Mishra, Design and analysis of user-defined constant switching frequency current-control-based four-leg Dstatcom, IEEE Trans. Power Electron., vol. 24, no. 9, pp. 2148–2158, Sep. 2009. [11] H. Akagi and R. Kondo, A transformer less hybrid active filter using a three-level pulse width modulation (PWM) converter for a medium voltage motor drive, IEEE Trans. Power Electron., vol. 25, no. 6,pp. 1365– 1374, Jun. 2010. [12] V. George and Mahesh K. Mishra, DSTATCOM topologies for three phase high power applications, Int. J. Power Electron., vol. 2, no. 2, pp. 107–124, 2010. [13] M. K. Mishra and K. Karthikeyan, Design and analysis of voltage source inverter for active compensators to compensate unbalanced and non-linear loads, in Proc. Int. Power Eng. Conf., 2007, pp. 649– 654. [14] M. K. Mishra and B. Kalayan Kumar, A DSTATCOM topology with reduced DC link voltage rating for load compensation with non stiff source, IEEE Trans. Power Electron., vol. 27, no. 3,pp. 1201–1211, Mar. 2012. [15] M.Abdusalam and Sharam Karimi, New digital reference current generation for shunt active power filter under distorted voltage conditions. Electric power system research 79 (2009) 759-765. [16] B. Singh, K. Al-Haddad, A. Chandra, A review of active filters for power quality improvement, IEEE Transactions on Industrial Electronics 46 ,960–971,Oct 1999. [17] S.A. Gonzalez, R. Garcia-Retegui, M. Benedetti, Harmonic computation technique suitable for active power filters, IEEE Transactions on Industrial Electronics 54 2791–3279, Oct 2007. [18] G.W. Chang, C.M. Yeh, Optimisation-based strategy for shunt active power filter control under nonideal supply voltages, IEE Proceedings Electric Power Applications 152 182–190, Mar 2005. [19] M.Montero, E.R. Cadaval, F. Gonzalez, Comparison of control strategies for shunt active power filters in three-phase four-wire systems, IEEE Transactions on Power Electronics 22, 229–236,Jan 2007. [20] M.P. Kazmierkowski, L. Malesani, Current control techniques for three-phase voltage source PWM converters: a survey, IEEE Transactions on Industrial Electronics 45 691–703, 1998. www.ijsret.org 168