Design of a Programmable Low-pass Filter for UHF RFID ZIF

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PIERS Proceedings, Taipei, March 25–28, 2013
914
Design of a Programmable Low-pass Filter for UHF RFID ZIF
Receivers
C. C. Zhang1, 2 , C. Wang1 , Y. F. Guo1 , Y. M. Fang1 , L. L. Liu1 ,
D. Y. Chen1 , and W. Li1
1
Power and RF Microelectronic Research Centre
Nanjing University of Posts and Telecommunications, Nanjing 210046, China
2
Nanjing Research Institute of Electronics Technology, Nanjing 210013, China
Abstract— A programmable low-pass filter for 860 ∼ 960 MHz UHF RFID ZIF (zero IF)
receivers was designed in 0.18 µm CMOS process. Taking into account the high linearity requirements, the Active-RC filter was selected. Moreover, a fully differential operational amplifier with
common-mode feedback (CMFB) was employed as a critical building block. With a 4th-order butterworth low-pass-type topology, based on the tow-thomas biquad, the filter was synthesized. Its
bandwidth can be programmed to 480/600/700/900/1100/1680 kHz with an attenuation greater
than 50 dB at frequencies of 10 × fc (cutoff frequency). The filter exhibits many advantages,
such as low order, low power consumption, small size, wide cutoff frequency selection range and
high linearity. From a single
√ 1.8 V power supply, simulations show that the filter has an input
referred noise of 98.95 nV/ Hz, a third-order intercept point (IIP3) of 24.25 dBm, and a power
consumption of 12.42 mW.
1. INTRODUCTION
RFID (radio frequency identification) systems can be classified, according to their operation frequency bands, into the low-frequency, high-frequency, ultra-high-frequency (UHF) and microwave
ones. Among them, the UHF RFID systems possess a lot of advantages, e.g., long recognition
distance, fast communication velocity, large information capacity, small size and widespread applications, and so on, so they become the current research hot-spots, nowadays.
Due to both multiple stages of mixers and off-chip filters, a superheterodyne receiver has many
shortcomings, such as high cost, low integration and high power consumption [1]. As for a nearzero IF receiver, just like the superheterodyne counterpart, image frequency suppression problems
still exist [2]. Whereas, a ZIF receiver is characterized by no image-reject filter, high integration,
small size, low power consumption, etc., therefore the ZIF architecture is chosen for the UHF RFID
reader.
A low-pass filter design for a single-chip UHF RFID reader with the operation frequency range
of 860 ∼ 960 MHz is focused on in this paper. The filter aims to filter out noise and interferences
on the image frequencies of the subsequent ADC in order not to distort the required signals by
aliasing [3].
2. FILTER STRUCTURE SELECTION AND CIRCUIT DESIGN
Continuous-time analog filters can be divided into three types: Active-RC, MOSFET-C, and GmC. The MOSFET-C filter has advantages, such as a small chip area, low power consumption, low
noise and insensitive to parasitic capacitance; however, due to its usage of operational amplifiers (op
amps), its operating frequency is limited, so, usually this type of filter is only used in audio frequency
bands [4]. The Gm-C filter works in a open-loop topology to avoid the problem of the stability of the
op amp, which leads to a wider bandwidth and a larger dynamic range; however, its linearity is poor,
so, the power consumption has to be increased to improve its linearity [5]. Compared to the Gm-C
one, the active resistor-capacitor (Active-RC) filter operates in a closed-loop topology, thereby it has
a higher linearity [6], and the operating frequency and power consumption are mainly determined
by the used op amps. Taking into account the special requirements of higher receiver linearity, the
Active-RC filter is selected. According to the agreements, the return signal data rate from a tag
ranges from 40 kHz to 640 kHz. Without considering the limitations from the channel bandwidth,
the highest rate is 640 kHz, so a 1.28 M bandwidth is occupied. Furthermore, if a signal frequency
offset of 20% is taken into account, the maximum bandwidth turns into 1.54 MHz. According to the
operation rates, the low-pass filter cutoff frequency should be able to be programmable to 480 kHz,
600 kHz, 700 kHz, 900 kHz, 1.1 MHz and 1.68 MHz.
Progress In Electromagnetics Research Symposium Proceedings, Taipei, March 25–28, 2013
915
Since the rejection requirement on the baseband analog filter is greater than 15 dB at the frequency of twice channel bandwidth, equivalent to 50 dB/dec, at least a third-order low-pass filter
is required. The higher the order is, the bigger the occupied area is. Therefore, a 4th-order fully
differential butterworth low-pass active RC filter is chosen, which consists of two second-order filter
cells. During synthesis, the Tow-Thomas biquad, shown in Figure 1, is used. This kind of filter
owns many excellent characteristics, similar to a passive RLC filter, for example, insensitive to
parasitic parameters and strong tolerance to the non-idealities from op amps, which makes the
design and tuning easier [7].
The transfer function of the Tow-Thomas biquad is as follows:
H(s) =
VOUT (s)
=− 2
VIN (s)
s +
1
R1 R2 C1 C2
s
1
R3 C1 + R2 R4 C1 C2
(1)
From (1), −3 dB frequency (ω0 ), quality factor (Q), and gain (A0 ) of the biquad can be obtained:
r
C1
R4
1
; Q = R3
; A0 =
(2)
ω0 = √
R2 R4 C2
R1
R2 R4 C1 C2
If R1 = R2 = R4 = R, and C1 = C2 = C, according to (2), ω0 and Q can be simplified to 1/RC,
and R3 /R, respectively.
It can also be seen from (2), the ω0 and Q can be adjusted independently. The R3 in the
Tow-Thomas biquad is mainly used to prevent oscillation, so it needs to be adjusted to achieve the
stability of the whole loop.
Within the 4th-order Butterworth topology, two biquads, shown in Figure 1, are in series. For
the differential one, the inverter can be omitted [8], and, eventually, the LPF is given in Figure 2.
R4
R3
C2
C1
R1
Vin
R2
`
Vout
Figure 1: Tow-Thomas biquad.
R3
R2
C2
C0
R0
-
R1
R6
-
+
+
C1
R7
R4
R5
-
R10
R9
+
S12
S13
SS1
14
R13
R14
4
+
C3
Rin R10
R11
R12
Rout
R11
CLK
C6
C4
R8
S11
+
R14
+
C5
R15
R12
R13
+
Voutp
+
C7
IN
Voutn
Figure 2: Schematic diagram of the designed LPF.
PMO
OUT
NMO
Figure 3: Schematic diagram of the programmable
resistor circuit.
PIERS Proceedings, Taipei, March 25–28, 2013
916
In order to achieve an adjustable cutoff frequency and also prevent frequency deviation due
to errors of the manufacturing process and temperature/voltage variations, as shown in Figure 3,
a 4-bit programmable resistor is selected. Also, from Figure 3, it can be found that a CMOS
complementary switch is used, due to its excellent performance [9]. According to the relationship
table shown in Table 1, the desired cutoff frequency of the filter can be easily selected by the 4-bit
control word.
A 2-stage fully differential op amp is chosen. The phase margin of the op amp is compensated
and then its stability is assured [10]. The first stage of the op amp is the input differential pair
consisting mainly of NMOS transistors. The NMOS transistors are chosen over the PMOS ones,
because, under the same premise as the compensation capacitance and the aspect ratio, they can
achieve a larger transconductance, and then a greater bandwidth. Also, from another view, a
smaller compensation capacitor can be used to reduce the area of the op amp [11]. The PMOS
common-source stage amplifier is used as the second stage to increase the gain and improve the
swing of the op amp. A common-mode feedback technique is used to stabilize the output DC
level [12].
3. SIMULATION RESULTS
The programmable low-pass filter is designed and simulated in a standard 0.18 µm CMOS process.
The supply voltage is 1.8 V. Figures 4 and 5 show the AC response and the input-referred noise
Table 1: Relationship between control signals and cut-off frequencies.
A0
1
1
1
1
0
0
A1
1
1
0
0
0
0
A2
1
0
1
0
1
0
A3
1
1
1
1
1
1
Cut-off frequency
480 kHz
600 kHz
700 kHz
900 kHz
1.1 MHz
1.68 MHz
inputnoise (V/sqrt(Hz))
dB (dB)
60
-50
-100
73.61 dB
20
-150
0 dB, -103.9 deg
0
-200
-20
-250
-40
-300
0
10
1
10
2
10
3
10
4
5
10 10
freq (Hz)
6
10
7
10
8
10
9
10
phase (deg)
gain (dB)
40
10
-7
0
phase (deg)
iInput-referred noise (nV/vHz)
80
10
Figure 4: AC response of the op amp.
6.0x10
-7
3.0x10
5.65 nV/sqrt(Hz)@1 MHz
0.0
10
0
10
1
10
2
10
3
10
4
5
10 10
freq (Hz)
10
7
10
8
Figure 5: Noise response of the op amp.
Table 2: Simulation results of the two-stage full differential op amp.
Parameter
Supply Voltage
Open-loop Gain
Phase Margin
−3 dB Bandwidth
Input-referred noise @1 MHz
Power Consumption
6
Measured Results
1.8 V
73.61 dB
76.1◦
15.1 kHz
√
5.65 nV/ Hz
3.092 mW
10
9
Progress In Electromagnetics Research Symposium Proceedings, Taipei, March 25–28, 2013
1.68 M
1.11 M
1.103 MHz 1.669 MHz
925.8 kHz
900 k
700 k
600
600k
k
480 k
gain (dB)
0
483 kHz
602 kHz
-100
917
696.8 kHz
-200
0
10
1
10
2
10
3
10
4
5
6
10 10 10
freq (Hz)
7
10
8
10
9
10
10
10
Figure 6: AC response of the low-pass filter with six
different cut-off frequencies.
Figure 7: In-band IIP3 of the filter.
Table 3: Performance comparison with other recently published works.
Parameter
Order
Process
Supply Voltage
Power Consumption
−3 dB Bandwidth
Pass-band Ripple
Attenuation
In-band IIP3
Input-referred noise
Ref. [13]
4th/7th-order
0.18 µm
1.8 V
/
0.33/1.5 MHz
0.5 dB
/
2 dBm
/
Ref. [14]
7th-order
90 nm
1.2 V
16 mW
3/3.5/4 MHz
< 0.15 dB
56 dB@4 MHz
26 dBm
√
48 nV/ Hz
Ref. [3]
4th-order
0.18 µm
1.8 V
2.952 mW
3 MHz
1.5 dB
79.7 dB@30 MHz
/
√
137 nV/ Hz
This work
4th-order
0.18 µm
1.8 V
12.42 mW
0.483 ∼ 1.67 MHz
< 0.05 dB
> 50 dB/dec
24.25 dB
√
98.95 nV/ Hz
of the fully differential two-stage
√ op amp, respectively. It can be seen that a 105.8 MHz unitygain bandwidth and 5.65 nV/ Hz@1 MHz input-referred noise are achieved. Table 2 shows the
simulation results of the fully differential two-stage op amp.
The amplitude-frequency response characteristics of this low-pass filter is shown in Figure 6,
which shows that the cutoff frequencies can be programmable to 483 kHz, 602 kHz, 697 kHz, 926 kHz,
1.1 MHz and 1.67 MHz, and the out-band attenuation also meets design goals. At the frequency of
10 × fc , over 50 dB attenuation can be achieved. Figure 7 shows the simulation plot of the thirdorder input intermediation distortion at 483 kHz cutoff frequency, from which, it can be found that
24.25 dBm IIP3 is achieved when two single tones of 300 kHz and 400 kHz are applied.
The presented low-pass filter is compared with other recently published works and summarized
in Table 3. From this table, it can be found that this work achieves a better performance, for
example, broader selection of programmable bandwidth, smaller pass-band ripple, moderate power
consumption, good linearity, and > 50 dB/dec attenuation.
4. CONCLUSIONS
A fourth-order low-pass Butterworth programmable fully differential filter for ZIF UHF RFID
readers is designed in a standard 0.18 µm CMOS mixed-signal technology. In order to achieve an
adjustable bandwidth required by system and also to correct frequency deviation due to errors
of the manufacturing process and voltage/temperature variations, the filter can be programmed.
Compared with other recently published works, this work achieves a better performance, for example, broader selection of programmable bandwidth, smaller pass-band ripple, moderate power
consumption, good linearity, > 50 dB/dec attenuation, and so on. Simulation results show that it
can meet the requirements of UHF RFID ZIF receivers.
ACKNOWLEDGMENT
This work was supported by the National Natural Science Foundation of China (No. 61076073), the
Research Funds of Nanjing University of Posts and Telecommunications (No. NY211016, No. 211058),
918
PIERS Proceedings, Taipei, March 25–28, 2013
and the China Postdoctoral Science Foundation (No. 2012M521126).
REFERENCES
1. Yi, J. T., “Research on a 2 ∼ 6 GHz universal receiver and design and experiment on its critical
circuits,” Master’s Thesis, University of Electronic Technology, 2007.
2. Zhang, L. and B. M. Luo, “Discussion on a solution to a near-zero IF mirror interference,”
Popular Science & Technology, No. 2, 13–14, 2009.
3. Han, Y. F., “Research and realization on key techniques of the UHF RFID reader chip,”
Doctoral Dissertation, Fudan University, 2008.
4. Wang, W. L. and P. Wang, “New technologies of continuous-time filters and their application,”
Electronic Design Engineering, Vol. 18, No. 1, 110–112, 2010.
5. Chang, Z. Y., D. Haspelagh, and J. Verfaillie, “A highly linear CMOS Gm -C bandpass filter
with on-chip frequency tuning,” IEEE J. Sol. Sta. Circ., Vol. 32, No. 3, 388–397, 1997.
6. Fu, W. Y., “Research and design on high-speed analog low-pass filters,” Master’s Thesis,
University of Electronic Science and Technology, 2005.
7. Zheng, H. and H. C. Luong, “A 36/44 MHz switched-capacitor bandpass filter for cable-TV
tuner application,” IEEE Asian Solid-State Circuits Conf., 235–238, Nov. 2006.
8. Le, Y., H. L. Liao, F. Song, et al., “A single-chip CMOS UHF RFID reader transceiver for
chinese mobile applications,” IEEE J. Sol. Sta. Circ., Vol. 45, No. 7, 1316–1329, 2010.
9. He, L. N. and Y. Wang, Analog Integrated Circuit Design and Simulation, Science Press,
Beijing, 2010.
10. Allen, P. E. and D. R. Holberg, CMOS Analog Circuit Design, Oxford University Press, New
York, 2002.
11. Zhou, Z. J. and N. Li, “A dual-mode active RC lowpass filter for GSM and WCDMA,” Microelectronics, Vol. 36, No. 6, 825–829, 2006.
12. Razavi, B., Design of Analog CMOS Integrated Circuits, McGraw-Hill, New York, 2001.
13. Khannur, P. B., X. S. Chen, D. L. Yan, et al., “A universal UHF RFID reader IC in 0.18-µm
CMOS technology,” IEEE J. Sol. Sta. Circ., Vol. 43, No. 5, 1146–1155, 2008.
14. Qi, J. Y. and X. L. Wang, “Design of channel-select filter for ZIF DVB-H tuner,” Microelectronics, Vol. 38, No. 2, 289–293, 2008.
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