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1
Active Power Filter Control Strategy with
Implicit Closed Loop Current Control
and Resonant Controller
Mauricio Angulo, Domingo Ruiz-Caballero, Jackson Lago, Student Member, IEEE,
Marcelo L. Heldwein, Member, IEEE, and Samir A. Mussa, Member, IEEE
Abstract—Novel simple indirect control concepts for an Active
Power Filter (APF) application is proposed here. The concepts
are exemplarily presented to control a modified APF structure.
The main advantage over other control strategies is the achieved
excellent simplicity to performance ratio. The proposed control
strategies are based on the concept of virtual impedance emulation to provide high power factor in a system. To validate
the operating principle a single-phase low power prototype has
been built and experimentally tested. This prototype operates at
a remarkably low switching frequency of 5 kHz and is digitally
controlled by a Digital Signal Processor.
is
vs
PCC
iF
Active
Power
Filter
io
vo
Nonlinear
loads
Fig. 1. Active power filter connected in parallel with the loads — shunt-type
APF. The filter current iF supplies the load harmonic current contents.
Index Terms—Dc–ac converters, Active Power Filter, Sensorless Control techniques, Implicit control.
I. I NTRODUCTION
Nonlinear loads connected to electric energy distribution
networks generate harmonic pollution. Such nonlinear loads
drain currents with varying degree of harmonic contents.
The harmonic current components do not represent useful
active power due to the frequency mismatch with the grid
voltage. However, the circulation of harmonic currents through
feeders and protective network elements produces Joule losses
and electromagnetic emissions that might interfere with other
devices connected to the distribution network. This affects the
electrical performance of control and communication systems
involved with the protective elements. Several other harmful
effects are observed as presented in [1], [2].
A remedy to the harmonic currents injection problem is
to connect passive, active [3], [4] or hybrid [5] filters in
parallel with the loads. This are named shunt active power
filters (APF) [6], [7]. APFs are circuits based on switched
power semiconductors (typically employing voltage source
inverters) that inject opposed phase harmonic currents at the
point of common coupling (PCC). This results in the whole
nonlinear load plus APF system emulating a nearly resistive
load behavior at the PCC terminals. Power transmission in
the network is, thus, optimized and all nonlinear loads low
c 2009 IEEE. Personal use of this material is permitted.
Copyright However, permission to use this material for any other purposes must be
obtained from the IEEE by sending a request to pubs-permissions@ieee.org
J. Lago, S. A. Mussa and M. L. Heldwein are with the Power Electronics
Institute (INEP), Federal University of Santa Catarina (UFSC), Florianópolis,
SC, 88040-970, Brazil (e-mail: jacksonl@inep.ufsc.br; samir@inep.ufsc.br;
heldwein@inep.ufsc.br).
M. Angulo and D. Ruiz-Caballero are with the Power Electronics Laboratory (LEP), Pontificia Universidad Católica de Valparaı́so, Valparaı́so, Chile
(e-mail: macswv07@live.cl; domingo.ruiz@ucv.cl).
frequency harmonics electromagnetic compatibility issues are
diminished.
Two tasks are crucial to an APF to perform well its function,
namely: the generation of appropriate current references, and
the ability to rapidly follow the reference current signals.
Thus, typical shunt APFs use the error signal generated by
the comparison of measured currents with the references. The
main control objective is to minimize such error. Finally, the
employed controllers generate the modulation signals to the
inverter power section. Generally, the error minimization is
achieved through two different types of methods, the direct
control methods or the indirect ones. In the direct control
methods the required compensation inverter current reference
is the one generated within the control algorithm. On the
other hand, the indirect control methods generate the APF
current reference indirectly, i.e., by causing that the APF plus
nonlinear loads currents follow sinusoidal reference current
signals in phase with the PCC voltages. Therefore, using the
scheme shown in Fig. 1,
Nh,max
i∗F = i∗s − io = i∗s,non active −
X
io(h) ,
(1)
h=1
where i∗F and i∗s are, respectively, the APF and the PCC reference currents, i∗s,non active is the non active current component
of the mains current is and io(h) represents the load side
current harmonics of order h. This condition guarantees that
the correct inverter compensation current is injected even if
the mains voltage presents harmonic distortion. The indirect
control methods are typically easier to implement since only
the input variables (currents and voltages) are measured.
Whereas, the direct methods require sophisticated reference
generation mechanisms.
Fig. 2(a) shows a conventional APF system architecture
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2
where the smoothing inductor LF is series connected to the
voltage source inverter. The compensation opposite phase load
harmonic currents flow through the inductor generating the
according harmonic voltages across the inductor in this architecture. Assuming a purely sinusoidal mains voltage vs results
that the voltage drop across the inductor is generated by the
inverter output voltage. Thus, the bandwidth of the modulation
signal must be compatible with the voltage harmonics that
are to be generated since the modulation signal is directly
proportional to such voltage. In practice, considering that up
to the 50th order harmonic component must be compensated
in specifications such as given in standards IEEE 519 and the
IEC 61000-3 series, i.e., 2.5 kHz in a 50 Hz network, leads
to the need to employ high switching frequency fc . Carrier
frequencies above fc > 25 kHz would be desirable and the
local averaging method would provide proper results to model
the system.
A solution to this challenge is to consider the APF system architecture shown in Fig. 2(b) [8]–[11]. The smoothing
inductor LF is now placed in series with the network and
not with the inverter as usual. The dc-link capacitor CF
requirements are approximately the same as in the standard
APF configuration. The disadvantages of this architecture are
that the inductor carries the full load current, except the
harmonics, the PCC voltage vo is now switched (it requires
an low-pass filter prior to the load), and the load voltage
can be distorted due to load current harmonic components.
Another aspect is that the presence of LF limits the rate
of change of the load current. However, this APF structure
implies an advantage from the APF control strategy viewpoint.
The inductor current reference is now sinusoidal and in phase
with the mains voltage as is the APF modulating signal m(t).
Therefore, the inductor current becomes independent from the
harmonic currents of the load. It follows that
v̄o = v̄F = V̂ · sin(ω1 · t + ϕ),
(2)
where x̄ represents the local average value of x during a
carrier period, V̂ is the peak value of the mains voltage, ω1
is the mains voltage angular frequency. In this context, the
present work proposes novel indirect APF control methods to
be applied in the modified shunt APF structure presented in
Fig. 2(b).
The proposed control strategy is much simpler to implement than conventional strategies, such as the ones listed
in the following. Perhaps the most widespread method is
the average current mode control [12], which presents an
outer voltage control loop and an internal current control
loop. Large control bandwidths are typically required with
this approach. Hysteresis current control is also employed and
demands a single outer voltage control loop to generate the
current references. This scheme leads to very fast dynamics,
but brings all disadvantages inherent to variable switching
frequency. Examples of digital control strategies using intern
model principles are: the adaptive [13] and the dead–beat
control. One of the main control challenges faced in all these
strategies is the generation of current references. Among the
theories to compute the compensation reference current are:
the p–q theory [14], [15], the synchronic reference frame [16],
is
vs
(a)
vC
+
CF
io
Sp
Sp
LF
Sn
vF
iF
vo
Sn
APF - Active Power Filter
LF
is
vs
(b)
vC
+
CF
Sp
Sp
Sn
vF
io
iF
vo
Sn
APF - Active Power Filter
Fig. 2. (a) Typical single-phase APF system architecture; and, (b) the APF
architecture used in this work.
the discrete Fourier transform [17], adaptive neural networks
[1], [13], Lyapunov based control [18], among others [6].
These techniques, while having an acceptable performance
for achieving input unity power factor, are relatively complex
to implement. In the case of digital programming, powerful
digital signal processors (DSPs) are required in addition of
analog to digital A/D converters, phase locked loops and other
demanding software tasks.
Novel APF control indirect strategies are proposed here as
alternative to the cited techniques. These novel indirect methods are based on the concept of virtual impedance emulation
through inverters to achieve unity input power factor. A key
feature is that either mains-side current or voltage sensor is
used, leading to sensorless strategies. The APF implicit current
reference does not contain high order harmonic components to
ensure unity power factor at the mains and, thus, the control
function is greatly simplified leading to the control methods
derived in section II. The system is theoretically analyzed
in section III. The strategies can be implemented both with
analog or digital electronics, demanding minimum hardware
and data processing capabilities. The achieved performance is
similar or superior to that attained with conventional strategies
as shown through simulation and experimental results given in
sections IV and V. The main contribution of this work lies on
the use of very simple implicit current controllers to control
an active power filter.
II. APF I NDIRECT C ONTROL S TRATEGY C ONCEPTS
A. Current Sensorless Strategy
Applying Kirchhof’s second law to the circuit in Fig. 1 gives
vs − LF ·
dis
− (sp − sn ) ·vc = 0,
dt
| {z }
(3)
=sF
where sp and sn are the switching functions for switches Sp
and Sn , respectively. These are defined as +1 if a switch is
closed and 0 when it is off. The resulting switching function
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3
for the filter comprehends both of these into sF = sp − sn .
The switching signals are generated by a proper modulation
scheme. For the case at hand phase-shifted pulse width modulation (PWM) is adopted. The high frequency (HF) harmonics
are typically eliminated with filters and the following analysis
considers only the low frequency behavior of the circuit. This
is achieved with the definition of the local average value x̄
of the quantities within a switching period Ts . Applying this
definition to APF switching function leads to
_
vs
dF
k1
vm
sF dt = dF ,
Fig. 3.
(12).
Rs
dF
k2
Sp´
where Re∗ is the desired resistance value.
The APF dc-link voltage is controlled with a variable vm
defined as
k Vc∗
vm =
,
(7)
Re∗
where k is a gain and Vc∗ is the dc-link voltage reference.
Isolating Re∗ in (7) and using it in (5) gives
d v̄s vm
v̄s − LF
− dF v̄c = 0.
(8)
dt kVc∗
Assuming a purely sinusoidal v̄s leads to
Z
d
(v̄s ) = −ω 2 v̄s dt
dt
k1 =
ω 2 LF
k Vc∗
(9)
(11)
and replacing it in (9) results
v̄s
k1
dF =
+
v̄c
v̄c
Z
(v̄s vm ) dt.
Vc
(12)
The resulting control block diagram is presented in Fig. 3.
This control strategy is simple and does not require complex
computations for the generation of references. The phaseshifted PWM leads to the output of the inverter generating
a voltage with twice the carrier frequency and with reduced
current ripple. The procedure to determine the duty-cycle
described above is input current sensorless and has the advantage of only measuring the input and the dc-link voltages
to generate the control signal.
*
vc
*
1
Sn
1
Sn´
_
vc
Fig. 4.
Block diagram for the voltage sensorless control based on (18).
B. Voltage Sensorless Strategy
Similarly to the input current sensorless strategy, an input
voltage sensorless strategy is derived in the following.
Replacing vs from (6) in (5) gives
dīs
− dF v̄c = 0.
dt
During sinusoidal steady state
Z
d
2
(īs ) = −ω
īs dt.
dt
Re∗ īs − LF
(13)
(14)
Defining the dc-link voltage control signal as
vm =
where ω is the sinus angular frequency.
The control signal vm is assumed constant at steady state.
Thus, (8) is rewritten as
Z
ω 2 LF
v̄s +
(v̄s vm ) dt − dF v̄c = 0.
(10)
k Vc∗
Defining
Vc
vm
dīs
− dF v̄c = 0.
(5)
dt
Assuming that unity input power factor is to be achieved,
the system should emulate a resistive behavior. Thus,
v̄s
īs = ∗ ,
(6)
Re
Sp
_
t−T s
v̄s − LF
Sn´
Block diagram for the current sensorless control strategy based on
(4)
where dF is the resulting APF duty-cycle. This is to be
generated by the control strategy. Applying (4) to (3), results
1
_
vc
_
1
s̄F =
Ts
1
Sp´
Sn
vc
Vc *
is
Zt
Sp
_
Rs Vc∗
,
Re∗
(15)
where Rs is the current measurement gain, and substituting
the above relations into (13) leads to
Z
īs
Vc∗ Rs
+ ω 2 LF īs dt − dF v̄c = 0.
(16)
vm
Defining gain k2 as
k2 =
LF ω 2
Rs Vc∗
(17)
and dividing (16) by Vc∗ Rs , finally gives the duty-cycle
Z
k2
dF
īs
+
īs dt.
(18)
=
Rs Vc∗
vm v̄c
v̄c
The voltage sensorless control strategy based on (18) is
implemented with the block diagram depicted in Fig. 4.
The strategy is straightforward and similar from the practical
implementation aspects to the current sensorless one. The
advantage of this approach over the current sensorless is that
overcurrent protection techniques are easier to implement with
the current measurement. However, the semiconductor currents
are not directly measured in neither approaches. Suitable
current protection for IGBTs can be implemented through high
performance gate drivers, low precision current sensors and the
measurement of the dc-side current.
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4
III. T HEORETICAL ANALYSIS OF THE PROPOSED INDIRECT
CONTROL SENSORLESS STRATEGIES
This section presents theoretical analyses regarding the
equivalent circuit observed from the mains and the equivalence
between the proposed control technique and a control strategy
that uses conventional feedback control theory with a resonant
controller to obtain close to unity power factor. Furthermore,
a general stability analysis is presented.
Fig. 6. Block diagram for a control strategy based on the emulation of a
virtual negative inductance to cancel the effects of LF and guarantee close
to unity power factor.
A. Equivalent Circuit Based Analysis
Considering the low frequency behavior of the proposed
APF configuration and a constant dc-link voltage vc = Vc∗ =
Vc leads to
dīs
dis
+ sF vc ∼
+ dF Vc .
(19)
vs = LF
= LF
dt
dt
Replacing the duty-cycle calculation function defined in
(18) into (19) gives
Z
Rs Vc
dīs
+
īs + ω 2 LF
īs dt,
(20)
vs ∼
= LF
| {z }
|{z} dt
vm
|
{z
}
=Leq
=1/Ceq
=Re
where parameters Leq , Re and Ceq are equivalent circuit
elements that model the controlled system. The equivalent
circuit is presented in Fig. 5. This expression shows that
the equivalent input impedance of the active filter with the
proposed control strategy includes a series connection of a
resistance Re and a capacitance Ceq . The resistance is responsible for the active power transference to the load, whereas
the series capacitance compensates for the filter inductance
LF . A frequency domain analysis is applied to the equivalent
circuit. The first step is to define the reactive impedances
√
jXL = jωLeq and −jXC = −j/(ωCeq ), with j = −1.
Computing the total equivalent series impedance gives
jω 2 LF
= 0,
(21)
ω
from where it is clear that the generated virtual capacitance
does cancel the effects of the filter inductance regarding the
low frequency behavior of the system. Therefore, theoretical
unity power factor is achieved.
The capability of bidirectional inverters to emulate virtual
negative inductances have been proved in other applications
[19], [20]. Therefore, another implementation possibility for
the proposed APF control is to replace the virtual capacitance
with a virtual negative inductance. This is derived from
the idea given by the mains-side equivalent circuit analysis
jXL − jXC = jωLF −
producing a series capacitance. The according control diagram
implementation is presented in Fig. 6, where
k3 =
−LF
.
Vc∗ Rs
(22)
Such a control method is equivalent in many aspects to the
virtual capacitance method. However, since it employs a differentiation block, it tends to present faster dynamics and is more
prone to electromagnetic noise interference. Furthermore, the
stability aspects are different as presented in section III-C. The
duty-cycle equation is then
Rs Vc∗
Lf dīs
.
(23)
īs −
vm v̄c
v̄c dt
The generation of virtual impedances can be used to insert
reactive power to the grid. This is done by deliberately
changing parameters k1 , k2 or k3 at each of the control
strategies. The effect is the emulation of a larger or smaller
virtual impedance.
dF =
B. Equivalent Feedback Control Based Analysis
The proposed control methods do not present a explicit
current loop control. The current control is actually implicit
in the control laws (12) and (18) and (23) that determine the
APF duty cycle. This is understood in the following. A classic
feedback control loop is seen in Fig. 7, where C(s) represents
a current controller, G(s) is the system model, H(s) is the
transfer function of the measurement chain. The derivation
below shows the equivalence between the proposed control
methods and a conventional feedback control loop assuming
that both are in steady state with a constant dc-link voltage
vc = Vc∗ . Finally, the large signal models are linearized around
an operation point.
Analyzing Fig. 7 results in the current controller being
1
C(s) = ˜∗
(24)
Is
−
1
·
G(s)
I˜
s
Is∗ /I˜s
and the transfer functions
and G(s) must be found for
the proposed APF control strategies.
The loop equation of the circuit in Fig. 2 is
dīs
− RL īS = dF v̄C ,
dt
where RL represents the inductor parasitic resistance.
The current reference is given by
vs
i∗s =
Re
v̄s − LF
Fig. 5.
Equivalent circuit for the control strategy to emulate virtual
capacitance Ceq .
(25)
(26)
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5
where Re is the actual emulated resistance.
Assuming that vs is sinusoidal and considering that is is
proportional to it, it follows that
Z
dīs
2
(27)
= −ω1 īs dt.
dt
frequency w1 and the values of the circuit parameters Re and
LF . Similar results are found for the equivalent input current
sensorless case.
To obtain a single equation that represents the control
system, equations (25) and (26) are replaced in (25) neglecting
RL and resulting in
Z
2
(28)
Re īs + LF ω1 īs dt = dF v̄C
The proposed control strategies given by (18) and (23)
can be combined to analyze both options simultaneously and,
in an implementation to gain advantage from both sides.
This strategy includes the integral (virtual capacitance) and
derivative (virtual inductance) portions. This strategy gives
Z
1
dīs
īs dt,
(35)
+
dF v̄c = īs Re + (Ls + Lv )
dt
Cv
Subtracting (25) from (28) gives
v̄s − LF
dīs
= Re īs + LF ω12
dt
Z
īs dt.
(29)
Linearizing (29) produces
ω 2 LF I˜s
LF I˜s = R̃e Is,0 + Re,0 I˜s + 1
,
(30)
s
where the ˜· represents the linearized variable and subscript 0
denotes the operating point. The linearization of (26) leads to
Re,0
R̃e = −I˜s
.
Is,0
(31)
Replacing (31) in (30) gives the linearized transfer function
from the measured current to the reference current
s2 + τse + ω1
I˜s∗
=
,
(32)
s
I˜s
τ
e
with τe = LF /Re,0 .
The next step is to find the plant function G(s). This is
obtained with the linearization of (25). Thus,
G(s) =
I˜s
1
V∗
,
= c
˜
RL 1 + τL s
dF
(33)
with τL = LF /RL .
Finally, substituting (32) and (33) in (24) gives the equivalent implicit current controller Cimplicit (s) transfer function
Re s s + τ1
Cimplicit (s) =
· 2
,
(34)
Vo
s + ω12
which shows the transfer function of a resonant controller
tuned at ω1 . Resonant controllers in current control give excellent results with purely sinusoidal references [21]. The high
gain at the tuned frequencies guarantee the reference followup and the rejection of components in other frequencies. In
the proposed methods the implicit resonant controller is implemented in a much simpler way than with the conventional
control methods. Moreover, it follows from equation (34) that
the bandwidth of the controller varies with the fundamental
is*
_
is,measured
Fig. 7.
where Cv and Lv are the emulated (virtual) capacitance and
inductance, respectively. These are computed to result
jXL − jXC = jω (LF − Lv ) − j
1
= 0.
ωCv
(36)
Thus, guarantees zero mains current phase displacement. This
system generates the equivalent circuit shown in Fig. 8, which
is used in the following stability analysis.
The transfer function from the mains voltage to the current
in Fig. 8 is found as
s
I˜s (s)
= 2
.
s (LF + Lv ) + s Re + 1/Cv
Ṽs (s)
The poles from the system modeled with (37) are
p
−Re ± Re2 − 4 (LF + Lv ) /Cv
psystem =
.
2 (LF + Lv )
(37)
(38)
Assuming positive Re , i.e., power flow from the mains
towards the load and positive Cv , i.e., a capacitance to cancel
the effects of the APF inductance LF , the system poles are in
the right half-plane if
Leq = LF + Lv > 0.
(39)
Therefore, the first stability criteria is that the total series
equivalent inductance is positive. This prevents the emulation
of a pure negative inductance because if Lv = −LF the system
is oscillatory. A practical implementation would require either
a pure virtual capacitance or a combination with a negative
inductance so that (39) is met.
Still from (38) the system presents damped oscillatory
responses if
Re
LF + Lv
<
,
(40)
4
Cv
where Re = Vs2 /Po depends on the load power.
_
dF
C(s)
C. Stability Analysis
G(s)
is
H(s)
Current control closed loop.
Fig. 8. Equivalent circuit for the control strategy to emulate both virtual
capacitance Cv and negative inductance Lv .
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6
IV. S IMULATION RESULTS
The power stage configuration used in the simulations based
analysis of the proposed APF system is shown in Fig.9. A
remarkably low APF switching frequency of fc = 5 kHz is
used to highlight the performance of the proposed concepts.
Other experimental parameters are: input ac voltage is set to
Vs,rms = 110 V; mains frequency fs = 60 Hz; APF inductance
LF = 12.83 mF; HF filter inductance L1 = 1.4 mH; HF filter
resistance RL = 2 Ω; HF filter capacitance CL = 8 µF; and
high frequency filter capacitance C1 = 0 µF (not used in
this implementation). This setup parameters were chosen to
approach the experimental setup in section V. The nonlinear
load is a single-phase diode bridge rectifier with the following
parameters: Ro = 40 Ω; Co = 940 µF; and L2 = 1 mH.
Simulation results are shown in Fig. 10 for the voltage
Fig. 9. Active power filter power stage setup used, both, in the simulations
and in the experimental results.
Fig. 10. Simulation results waveforms for the voltage sensorless indirect
control strategy: (a) load-side PCC current io and rectifier current ir ; (b)
APF filter capacitor voltage vC , APF output voltage vo and mains voltage
vs ; (c) dc-link control variable vm ; (d) mains current is ; (e) APF control
variable dF ; and (f) load voltage.
Fig. 11. Simulation results waveforms for the current sensorless indirect
control strategy: (a) load-side PCC current io and rectifier current ir ; (b)
APF filter capacitor voltage vC , APF output voltage vo and mains voltage
vs ; (c) dc-link control variable vm ; (d) mains current is ; (e) APF control
variable dF ; and (f) load voltage.
sensorless control strategy. Fig. 10(a) shows the nonlinear load
currents at the PCC (io ) and after the HF filter (ir ). The
currents are similar except from the high frequency harmonics
and present a high THD even considering only the first 50
harmonic components. The APF filter capacitor voltage vC ,
the APF output voltage vo and the mains voltage vs are
depicted in Fig. 10(b). The dc-link control variable vm seen
in Fig. 10(c) is approximately constant as expected during
steady state. The mains current is presented in Fig. 10(d) in
phase with the mains voltage despite the large filter inductance
of LF = 12.83 mH. Thus, proving the capability of the novel
APF concept to emulate a resistive behavior when observed
form the mains. Finally, Fig. 10(e) shows the APF duty-cycle.
Similar results are found for the current sensorless control
strategy as seen in the respective graphs presented in Fig. 11.
Both, Fig. 10(f) and Fig. 11(f) show the load voltage at the
terminals of the CL —RL branch with the respective THD
values. It is seen that harmonic distortion appears as the load
current causes a distorted voltage across inductors L1 , which
is partially filtered with the parallel branch RL —CL . This
effect should be analyzed on a case-based approach in order
to evaluate the load voltage. Reducing inductor L1 , increasing
CL and/or including capacitance C1 reduces the load voltage
distortion as presented in the filter design guidelines provided
at the Appendix.
In order to compare the transient performance of the voltage sensorless control strategies a simulation with the same
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7
io [10 A/div]
iF [10 A/div]
is [10 A/div]
Fig. 13. Experimental waveforms for the single-phase APF system shown
in Fig.9. Currents: nonlinear load io , active filter inverter iF and mains is .
Fig. 12. Simulation results waveforms for the current sensorless indirect
control strategy: (a) local power factor value according to (41), (b) mains
current is and (c) APF filter capacitor voltage vC during input voltage
transient at t = 1.1 s from 100% to 120% of rated voltage and a load
transient from 75% to 100% of rated power at t = 1.75 s for two voltage
sensorless control strategies. The ratio from XLv to XCv is XLv /XCv = 4.
conditions including an input voltage step at t = 1.1 s from
100% to 120% of rated voltage and a load step from 75%
to 100% of rated power at t = 1.75 s was carried out.
The results for the purely capacitive emulation (Cv + Re )
and the combination of both virtual capacitance and negative
inductance (Cv + Lv + Re ) are shown in Fig. 12. As it is
very difficult to observe the differences in the mains current a
variable related to the power factor is used. This local power
factor variable is defined as
Rt
1
Tg t−Tg vo io dt
q R
hλiTg = q R
,
(41)
t
t
1
1
2
2
Tg t−Tg vs dt
Tg t−Tg is dt
where Tg is the mains fundamental period. It gives the correct
power factor at steady state and an impression of the power
deviations during transients. Fig. 12 shows that the combined
method gives shorter transients and that both methods achieve
close to unity power factor at steady state for all tested
load conditions. Both control strategies have presented similar
results regarding the mains side current is and APF dc-link
voltage vC , which are exemplarily shown in Fig. 12. The
settling time was below 1 s for the given simulation conditions
and is mainly dictated by the APF dc-link voltage control
loop. This is designed, as in a single-phase PFC rectifier, with
low control bandwidth in order not to distort the mains-side
current.
V. E XPERIMENTAL R ESULTS
A low power single-phase laboratory prototype of the proposed APF (cf. Fig.9) has been built in order to validate the
theoretical analysis of the indirect control. The experimental
setup employs the same configuration and parameters as the
system used in the circuit simulations.
vs [50 V/div]
is [5 A/div]
Fig. 14. Experimental waveforms for the single-phase APF system shown
in Fig.9. Mains current is and voltage vs .
The implementation of the modulation algorithm is performed in a fixed-point DSP , model T M S320F 2812 – Texas
Instruments. The control software was implemented using
“C“ language. Even though, the voltage sensorless strategies
employing both capacitance and combined capacitance and
negative inductance have been implemented and tested, the
presented results are for the virtual capacitance control method
because the achieved results are similar.
Fig. 13 shows the waveforms of the mains is , load io and
APF iF currents. The current drawn from the power grid is
close to a sine wave. The presented distortion appears due
to the distortion of the mains voltage. This verifies that the
operation of the APF is appropriate, i.e., the load emulates a
resistance from the viewpoint of the power grid. This is clearly
seen in Fig.14, where mains current and voltage are in phase
and presenting similar harmonic contents except from the
switching noise observed at the voltage measurement due to
noise coupled to the voltage probe. The effect of the emulation
of a virtual capacitance in series with the APF filter inductor
guarantees that the mains current phase displacement is close
to zero even with the large value of the inductance LF .
The APF synthesized current and dc-link voltage are shown
in Fig. 15. The dc-link voltage is nearly constant at its set-point
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8
vC [50 V/div]
iF [5 A/div]
Fig. 15. Experimental waveforms for the single-phase APF system shown
in Fig.9. Filter current iF and dc-link voltage vC .
were able to guarantee close to unity power factor. Both,
current and voltage sensorless versions were presented, where
the voltage sensorless control was analyzed in details regarding
its performance, equivalent circuits and stability. The main
feature of the strategies is their extreme simplicity since no
complex current reference computations are required. The
implicit control loop is another inovative characteristic. In
this sense, it was prooven that the proposed strategies are
equivalent to explicit current control strategies employing
resonant-type controller. This explains the excellent sinusoidal
tracking performance. In addition to the resistive behavior, the
APF emulates virtual capacitance and/or negative inductance.
Thus, zero mains side current phase displacement is achieved.
These characteristics were verified through circuit simulation
and in an experimental setup including a nonlinear rectifier
load, with the APF being switched at 5 kHz. This a very
low swtiching and highlights the achievable performance. The
concepts can be easily extended to the control of power factor
correction rectifiers and three-phase systems.
A PPENDIX
The passive component parameters employed in the prototype were not optimized in any sense. Design guidelines
are presented in the following to improve the filter overall
performance.
The first parameter to be chosen is the dc-link voltage. In
the configuration shown in Fig. 9 the APF dc-link voltage
vc must be higher than the mains maximum peak voltage
(V̂s,max ) added to the maximum Lf inductor voltage drop
(vLf ,max ) at any instant. In addition, there should be enough
margin to guarantee that the APF dynamic is capable to handle
transients. A 25% margin is suggested. Thus,
Fig. 16. Experimentally obtained frequency spectra (peak values) for the
mains current is and the load current io . The Total Harmonic Distortion for
the currents are measured up to 3 kHz, i.e., h = 50th harmonic. Measured
THDs: T HDvs = 6.85%; T HDis = 5.82% and T HDio = 79.02%.
value around 300 V. Thus, proving a good voltage regulation
across the dc bus.
Frequency spectra of the mains is and load io currents are
presented in Fig.16. The load has a very high total harmonic
distortion of THDio ∼
= 79.02%, while the current supplied
by the power grid presents a low harmonic distortion of
THDis ∼
= 5.82% with a mains voltage THD of approximately THDvs ∼
= 6.85%. The main causes for the presented
current distortion are, thus, the input voltage distortion and
the overlock and delay times in the prototype. All harmonic
components observed in Fig. 16(a) are clearly below the IEC
61000-3-2 standard limits for, both, Class A and Class D
equipment. The harmonic components beyond 23 up to 50
present a maximum rms current value of 57 mA. Thus, the
implemented prototype is able to fulfill the harmonic limits
given in IEC 61000-3-2. This shows the effectiveness of the
proposed control strategy.
VI. C ONCLUSIONS
Novel controls strategies for a modified shunt active power
filter architecture were proposed here. The proposed strategies
5
(V̂s,max + vLf ,max ).
(42)
4
The inductance value of Lf is designed to limit the HF
current ripple towards the mains (∆Is ). This depends on the
APF switching frequency and dc-link voltage leading to,
Vc ≥
Lf ≥
Vc
4∆Is fc
(43)
Inductor L2 is typically part of the load and is not considered here as a part of the APF.
The APF output filter must be design to attenuate the high
frequency components of the voltage vo , which is switched, so
to limit the output voltage (vl ) ripple. Considering the phase–
shifted modulation used in this paper, the most significant of
these high frequency components occur at 2fc ± f s.
The function of this passive HF filter is to attenuate the
HF harmonic components generated by the switching of the
semiconductors. It is not a filter for low frequency current
harmonics since these harmonics components are handled by
the active filter. The inductance L1 must be as small as possible
no to present a large impedance to the load current. This
would generate voltage distortion in the presence of current
harmonics. However, it must be large enough to limit the
current ripple at io (∆Io ) similarly to the design of Lf . Thus,
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication.
9
C1 = CL = 33 µF, L1 = 630 µH and RL = 6.8 Ω. The
computed load voltage THD was T HDvl = 4.75%
R EFERENCES
Fig. 17. Simulation results waveforms for the voltage sensorless indirect
control strategy: (a) load current ir and mains current is ; (b) load voltage vl
and mains voltage vs .
maximum and minimum values for L1 can be approximately
computed with
L1 ≥
Vc
4∆Io fs
(44)
v
u X
∞
1
T HDv V̂s2 u
t
,
L1 <
2
πfs Pl
n kn2
n=3,5,7,...
(45)
where, Pl is the load active power, T HDv is the maximum
allowed THD at the load voltage generated by the load current
and kn is the relative amplitude of the nth load current
harmonic.
The HF filter attenuation asymptote is mainly defined by L1
and C1 . Parameters RL and CL are used for passive damping
and influence only around the resonance frequency. Thus, once
L1 is determined, capacitance C1 is designed to provide the
required attenuation for the voltage components at frequencies
2fc ± f s. It is suggested to set the natural frequency of this
filter around 2fc /10 to achieve an attenuation around 40 dB.
C1 =
1
4π 2 fo2 L1
(46)
The RL – CL branch is designed to provide damping.
Optimal value for these components to provide a minimal
output impedance for the filter can chosen with [22],
CL = mC1
s
L1 (2 + m)(4 + 3m)
RL =
·
,
C1
2m2 (4 + m)
(47)
(48)
where m must be imposed.
Fig. 17 shows simulation results obtained from a new set of
parameters for the HF filter to validate the design guidelines
presented above. The load was the same as the used in Fig.
10. Load power is approximately Pl = 560 W been supplied
with a sinusoidal voltage (110 V). The load current presents a
crest factor of 2.4. The coefficients of the harmonic currents
required to determine L1 can be obtained from a simulation
of this load been supplied by a sinusoidal voltage supply. The
coefficients used here are: k3 = 0.774, k5 = 0.438, k7 =
0.160, k9 = 0.0072, k11 = 0.0065. The T HDv desired was
chosen as 4% and the m factor was imposed as 1.
Applying the procedure and rounding the results of capacitances for commercial values, the filter parameters are:
[1] M. Cirrincione, M. Pucci, G. Vitale, and A. Miraoui, “Current harmonic
compensation by a single-phase shunt active power filter controlled by
adaptive neural filtering,” IEEE Transactions on Industrial Electronics,
vol. 56, no. 8, pp. 3128–3143, 2009.
[2] P. Salmeron and S. Litran, “Improvement of the electric power quality
using series active and shunt passive filters,” IEEE Transactions on
Power Delivery, vol. 25, no. 2, pp. 1058–1067, 2010.
[3] H. Akagi, A. Nabae, and S. Atoh, “Control strategy of active power filters using multiple voltage-source pwm converters,” IEEE Transactions
on Industry Applications, no. 3, pp. 460–465, 1986.
[4] Y. Tang, P. C. Loh, P. Wang, F. H. Choo, F. Gao, and F. Blaabjerg,
“Generalized design of high performance shunt active power filter with
output lcl filter,” Industrial Electronics, IEEE Transactions on, vol. 59,
no. 3, pp. 1443 –1452, march 2012.
[5] H. Akagi and K. Isozaki, “A hybrid active filter for a three-phase 12pulse diode rectifier used as the front end of a medium-voltage motor
drive,” Power Electronics, IEEE Transactions on, vol. 27, no. 1, pp. 69
–77, jan. 2012.
[6] M. Aredes, J. Hafner, and K. Heumann, “Three-phase four-wire shunt
active filter control strategies,” IEEE Transactions on Power Electronics,
vol. 12, no. 2, pp. 311–318, 1997.
[7] S. Rahmani, N. Mendalek, and K. Al-Haddad, “Experimental design of
a nonlinear control technique for three-phase shunt active power filter,”
IEEE Transactions on Industrial Electronics, vol. 57, no. 10, pp. 3364
–3375, oct. 2010.
[8] M. Routimo, M. Salo, and H. Tuusa, “Current sensorless control of
a voltage-source active power filter,” in Applied Power Electronics
Conference and Exposition, 2005. APEC 2005. Twentieth Annual IEEE,
vol. 3, march 2005, pp. 1696 – 1702 Vol. 3.
[9] M. Salo, “Ac current sensorless control of the current-source active
power filter,” in Power Electronics Specialists Conference, 2005. PESC
’05. IEEE 36th, june 2005, pp. 2603 –2608.
[10] D. Wojciechowski, “Sensorless predictive control of three-phase parallel
active filter,” in AFRICON 2007, sept. 2007, pp. 1 –7.
[11] G.-Y. Jeong, T.-J. Park, and B.-H. Kwon, “Line-voltage-sensorless
active power filter for reactive power compensation,” Electric Power
Applications, IEE Proceedings -, vol. 147, no. 5, pp. 385 –390, sep
2000.
[12] L. Dixon, “Average current mode control of switching power supplies,”
APPLICATION NOTE U-140,UNITRODE (Texas Instruments), pp. 3–
356 –3–369, Sep. 1999.
[13] A. Bhattacharya and C. Chakraborty, “A shunt active power filter
with enhanced performance using ann-based predictive and adaptive
controllers,” IEEE Transactions on Industrial Electronics, vol. 58, no. 2,
pp. 421–428, 2011.
[14] H. Akagi and A. Nabae, “The p-q theory in three-phase systems under
non-sinusoidal conditions,” European Transactions on Electrical Power,
vol. 3, no. 1, pp. 27–31, 1993.
[15] E. Watanabe, H. Akagi, and M. Aredes, “Instantaneous p-q power theory
for compensating nonsinusoidal systems,” in Nonsinusoidal Currents
and Compensation, 2008. ISNCC 2008. International School on, 2008,
pp. 1 –10.
[16] E. Watanabe and M. Aredes, “Power quality considerations on
shunt/series current and voltage conditioners,” in Harmonics and Quality
of Power, 2002. 10th International Conference on, vol. 2, 2002, pp. 595
– 600 vol.2.
[17] M. Aredes and E. Watanabe, “New control algorithms for series and
shunt three-phase four-wire active power filters,” IEEE Transactions on
Power Delivery, vol. 10, no. 3, pp. 1649 –1656, Jul. 1995.
[18] S. Rahmani, A. Hamadi, and K. Al-Haddad, “A lyapunov-functionbased control for a three-phase shunt hybrid active filter,” Industrial
Electronics, IEEE Transactions on, vol. 59, no. 3, pp. 1418 –1429, march
2012.
[19] A. Borre, R. Dias, A. de Lima, and E. Watanabe, “Synthesis of controlled reactances using vsc converters,” in Brazilian Power Electronics
Conference (COBEP’09). IEEE, 2009, pp. 431–437.
[20] A. Morsy, S. Ahmed, P. Enjeti, and A. Massoud, “An active damping
technique for a current source inverter employing a virtual negative
inductance,” in Twenty-Fifth Annual IEEE Applied Power Electronics
Conference and Exposition (APEC). IEEE, 2010, pp. 63–67.
Copyright (c) 2011 IEEE. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication.
10
[21] F. Blaabjerg, R. Teodorescu, M. Liserre, and A. Timbus, “Overview
of control and grid synchronization for distributed power generation
systems,” IEEE Transactions on Industrial Electronics, vol. 53, no. 5,
pp. 1398–1409, 2006.
[22] M. L. Heldwein, “Emc filtering of three-phase pwm converters,” Ph.D.
dissertation, ETH Zurich, 2008.
Jackson Lago (S11) received the B.S. degrees in
electrical engineering from the University Center
of Jaragu do Sul (UNERJ), Jaragu do Sul, Brazil,
in 2009, and the M.S. degree from the Federal
University of Santa Catarina (UFSC), Florianpolis,
Brazil, in 2011.
He is currently working toward the Ph.D degree
at the Power Electronics Institute (INEP), UFSC.
Mauricio Angulo was born in Osorno, Chile, in
1973. He received the degree in Electrical Engineering from Universidad Tecnica Federico Santa
Maria (UTFSM), Valparaiso, Chile. In 2006, he
collaborated as research assistant in the Electronics
Engineering department at UTFSM. His fields of
interest include power converters control techniques,
especially multilevel converter and active filters.
Marcelo Lobo Heldwein (S99-M08) received the
B.S. and M.S. degrees in electrical engineering from
the Federal University of Santa Catarina (UFSC),
Florianpolis, Brazil, in 1997 and 1999, respectively,
and his Ph.D. degree from the Swiss Federal Institute
of Technology (ETH Zurich), Zurich, Switzerland, in
2007.
He is currently an Adjunct Professor with the
Electrical Engineering Department at the UFSC.
From 1999 to 2001, he was a Research Assistant
with the Power Electronics Institute, Federal University of Santa Catarina. From 2001 to 2003, he was an Electrical Design
Engineer with Emerson Energy Systems, in Brazil and Sweden. He was a
Postdoctoral Fellow in the Power Electronics Institute (INEP) at the UFSC,
under the PRODOC/CAPES program from 2008 to 2009.
His research interests include power factor correction techniques, power
conversion for energy distribution, multilevel converters and electromagnetic
compatibility.
Dr. Heldwein is a member of the Brazilian Power Electronic Society
(SOBRAEP).
Domingo A. Ruiz-Caballero was born in Santiago,
Chile, in 1963. He received the degree in Electrical
Engineering from Pontificia Universidad Catlica de
Valparaiso, Valparaiso, Chile, in 1989, and M.Eng.
in 1992 and Dr.Eng. in 1999 from Power Electronics Institute (INEP), Federal University of Santa
Catarina, Florianpolis, Santa Catarina, Brazil. Since
2000, he has been with Department of Electrical
Engineering, Pontificia Universidad Catlica de Valparaiso, where he is currently Adjunct Professor. His
fields of interest include high-frequency switching
converters, power quality, multilevel inverters and soft-switching techniques.
He is currently a member of the Brazilian Power Electronics Society (SOBRAEP).
Samir Ahmad Mussa (M06) was born in JaguariRS, Brazil, in 1964. He received the B.S. degree in
electrical engineering from the Federal University
of Santa Maria, Santa Maria, Brazil, in 1988, and a
second degree in mathematics/physics. He received
the M.Eng. and Ph.D. degrees in electrical engineering from the Federal University of Santa Catarina(UFSC), Florianpolis, Brazil, in 1994 and 2003,
respectively. He is currently an Adjunct Professor
with the Power Electronics Institute(INEP-UFSC),
Florianpolis. His research interests include digital
control applied to power electronics, power-factor- correction techniques and
DSP/FPGA applications. Dr.Mussa is currently a member of the Brazilian
Power Electronics Society (SOBRAEP).
Copyright (c) 2011 IEEE. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.