The 20th Microelectronics Workshop
COTS Parts Evaluation in SERVIS Project
Hiroshi Kanai, Kazumori Hama, Masatsugu Akiyama
Institute for Unmanned Space Experiment Free Flyer (USEF)
Osamu Itoh
New Energy and Industrial Technology Development Organization (NEDO)
0
Agenda
■ About USEF
■ Purpose of SERVIS project
■ Ground tests and their results
■ Payloads of SERVIS satellites
■ On-orbit verification test results of SERVIS-1
■ Conclusion
1
About USEF
 USEF: Institute for Unmanned Space Experiment Free Flyer
Established on May 16, 1986
 USEF is a non-profit organization endowed by 13 private
companies and is managed under the direction of the Ministry
of Economy, Trade and Industry (METI).
 Objectives:
USEF was established to promote development of unmanned
space experiment systems and their operational control systems
as well as to conduct research and other activities as related the
above-mentioned systems.
2
Satellites developed and launched by USEF/NEDO
Space Flyer Unit (SFU) launched in March, 1995
and retrieved in Jan. 1996
Unmanned Space Experiment
Recovery System (USERS)
launched in Sep. 2002
Experiment Reenrty Space System (EXPRESS)
launched in Jan. 1995
Recovery of Reenty Module
in May, 2003
3
SERVIS Project
■
Space Environment Reliability Verification Integrated System
■
To establish low cost spacecraft technology by utilizing
commercial-off-the-shelf parts and technologies (COTS)
■
To increase cost and technical competitiveness of the Japanese
space industry
■
Program duration: 1999 thru 2010
■
Two verification flights: 2003, 2009 (Planned)
SERVIS Project is being developed by USEF under contract with METI – NEDO.
4
Why do we challenge on COTS?
Electrical Parts used for USERS SEM
Type
CPU, Memory, GA
Digital IC
Semiconductor
Resister, Capacitor
Solar Cell, Relay, etc.
Total
Quantity
250
2,530
6,720
14,600
13,800
37,900
Cost Breakdown
87%
2%
1%
2%
8%
100%
Drastic parts procurement cost reduction can be achieved,
if CPU, memory and GA could be replaced with inexpensive
COTS.
5
Why do we challenge on COTS?
Compared with MIL class, high reliable part applied equipment,
COTS applied equipment have the following advantages.
Higher performance, lighter and smaller equipment can
be realized.
 Some functions realized on conventional electrical circuits
could shift to software, resulting in lower cost.
Some equipment units could be integrated into one unit,
resulting in lower cost.
To be concentrated on high performance COTS devices
such as CPU, Gate Array, memory.
6
How to realize COTS application?
 Extensive COTS ground evaluation tests
especially on radiation tolerance
 Confirmation by on-orbit verification
 Evaluation and correlation of the both results
 Output (Technical knowledge base)
1) COTS Database
2) COTS Parts Evaluation Guidelines
3) Equipment Design Guidelines
7
Elements of SERVIS Project
COTS Application
COTS
Verification
Flight Verification
SERVIS
Total System
Experimental
Equipment
COTS D/B 3-D CAD
Bus
Advanced Bus
SERVIS-2
SERVIS-１
Virtual Design
Infrastructure
8
Task Flow of SERVIS Project
SERVIS-1
Experimental
Equipment
Ground Test
Apply Commercial
Parts & Technology
1st Generation
2nd Generation
SERVIS-2
Experimental
Equipment
Bus
Equipment
3rd Generation
Commercial-off-the-shelf Parts & Technologies
Virtual
Design
Infrastructure
System Development
Future Low Cost Satellite Bus
Space
Verification
#1
COTS Parts Evaluation Guidelines &
Equipment Design Guidelines
Space
Verification
Test
COTS
Database
Space
Verification #2
Space
Verification Data
Final Goal
Apply to SERVIS-1 & -2 Development
9
COTS Procurement and Ground Evaluation Test
 Procurement
- One time procurement for several projects/satellites
- No special quality control requirements
 Ground Evaluation Tests
- Screening test: based on MIL-STD-883 test methods
to all purchased parts
- Radiation Test:
Total ionizing dose test
Heavy ion- and proton-induced single event tests
- Quality Conformance Inspection:
Sampling test based on MIL-STD-883 test methods
10
Ground Evaluation Tested COTS
Part's Type
CPU
DSP
SRAM
SOI-SRAM
DRAM
PROM
EEPROM
Flash Memory
Gate Array
Digital IC
Digital IC(SOI)
Analog IC
Optical
SOI
Others
Total
1999
5
1
4
3
1
0
2
0
3
3
2
6
2
0
5
37
2000
3
0
12
1
10
2
1
0
0
0
2
10
3
1
5
50
2001
4
1
6
4
1
0
1
3
7
19
2
21
1
0
11
81
2002
1
0
1
0
1
0
0
0
1
5
0
4
0
0
1
14
2003
0
0
1
2
3
0
0
1
2
0
2
1
0
0
1
13
2004
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
2
2005
0
0
1
0
1
0
0
0
0
0
0
0
0
0
2
4
2006
0
0
1
0
0
0
0
0
0
0
0
2
0
0
0
3
Total
13
2
27
10
18
2
4
4
13
27
8
44
6
1
25
204
11
Summary of Ground Test Results
About sixty percent of ground-tested COTS can be used
for LEO (low earth orbit) satellites with the following conditions:
- Orbit:
- Mission Duration:
- Shield Thickness:
- Single Event Upset:
- Single Event Latch-up:
<1000 km
< 5 years
> 5 mm(Al)
acceptable
not acceptable
12
Ground Evaluation Test Results of COTS
Measured Radiation Tolerance
SEU
ID
Sample
11114
CPU
21101
CPU
11215 SRAM
21105 SRAM
21307
SOISRAM
11222 DRAM
11224 DRAM
Specifications
32bit, RISC,
Vcc=5.0V, 28MHz
32bit, RISC,
Vcc=3.3V, 100MHz
4Mbit (256kword x 16bit),
Vcc=3.3V
4Mbit (256kword x 16bit),
Vcc=3.3V
256kbit (32kword x 8bit),
Vcc=1.5V
256Mbit (16Mword x 4bit x 4bank),
Vcc=3.3V
256Mbit (16Mword x 4bit x 4bank),
Vcc=3.3V
64Mbit (8Mword x 8bit),
Vcc=3.3V
61103
EEPROM
11319
FPGA SRAM type, Vcc=3.3V
TID
LETth
Saturated
Cross Section
SEL
Gy(Si)
MeV/(mg/cm2)
cm2
MeV/(mg/cm2)
200
<2.9
>1.0E-6(d)
>61.8
170
3.5
9.24E-3(d)
>60
500
2
1.2E-7(b)
>61.8
>361
2
3.39E-7(b)
>59.9
580
7.7
1.0E-8(b)
>82.4
600
5
1.0E-7(b)
>61.8
>500
<1.5
1.6E-6(b)
>63
850
82.8
1.0E-6(b)
11.4
500
<1.5
3.0E-6(d)
14.2
Note (b): per bit, (d): per device
13
Payloads for SERVIS-1 and -2
 Experimental Equipment
To obtain COTS data through equipment performance
 Commercial Parts Test Unit (CPT)
To obtain COTS data as part level
 Space Environment Monitoring System (EMSS)
To measure space radiation environments which COTS
encounter
14
Criteria for Selection of Experimental Equipment
 They should represent equipment for future low cost
LEO satellites.
 They must be internationally competitive.
 Those equipment for which on orbit test is effective
for their evaluation and verification.
15
Experimental Equipment on SERVIS -1
No. Equipment
Electrical TechnoParts
logy
Electrical Part Type
Technology Name
1
VTS
1
1
Void sensor
Super Plastic Forming
2
INU
1
0
RF Device in GPS Receiver
-
3
PCDS
1
0
16bit CPU
-
4
APDM
0
1
Grease Lubricant
5
ATTC
11
1
6
OBC
6
1
16b D/A C, 12b A/D C, Receiver IF, Low Noise Amp.,
Low Noise Amp./Mixer, Transmit/Receive Switch,
Up Comverter, Modulator, Transceiver, Power Amp.
Driver Amp., Driver Amp.
CPU, SDRAM, FPGA, Dig_IC×2, SRAM
7
SIS
4
1
CPU, EEPROM, CCD, SDRAM
Surface Mount Technology
8
LIB
0
2
-
Lithium-ion Battery Cell,
Power Hybrid IC
9
FOIRU
5
0
Super Luminescent Diode, Avalanche Photo Ddiode
Integrated Optic Modulator, Optical Fiber, Fiber-Optic Gyro
-
10
CPT
11
0
SRAM×2, SDRAM×2, Flash Memory, FPGA×2, SOI-SRAM×2,
EEPROM, LVDS Driver
-
40
7
Total
Surface Mount Technology
Multi-chip Module
16
Experimental Equipment on SERVIS-2
No. Equipment
Electrical TechnoParts
logy
Electrical Part Type
Technology Name
1
LIBA
7
1
32bit CPU, Multiplexer, Photo-Coupler, Relay Driver,
MOS-FET, OP Amp., Hole Sensor
Lithiumi-ion Battery Cell
2
ADMS
17
0
32bit CPU, Flash Memory SRAM, FPGA, FET, Digital ICx6,
Analog ICx4, Transistorx2
-
3
CRAFT
4
0
64bit MPU(P-QFP), 64bit MPU(BGA), SRAM, SDRAM
-
0
IEEE-1394 I/F LS, PLL LSI, LVDS Line Driver,
LVDS Line Receiver, PCI I/F Device, Dual Port SRAM,
High Speed FIFO, EDAC, Buffer IC
-
Multi-Chip Module,
SOI Technology
4
PPRTU
9
5
HPDC
7
2
LVDS Line Driver, LVDS Line Receiver, LVDS Line
Driver/Receiver, Line Receiver,
16bit Level Shifting Tranceiver, SDRAM, Image Comp Chip
6
APE
4
2
OP Amp., FIFO, FPGA, SDRAM
GPS Receiver,
Mounting Technology
7
ASM
7
1
32bit CPU, FPGA, Driverx2, OP Amp., EEPROM, SDRAM
Mounting Technology
8
MBW
1
1
Power MOSFET
Magnetic Bearing
9
MEMS
1
1
RF-MEMS Switch
MEMS Manufacturing Process
10
CPT
9
0
SRAMx2, SDRAMx2, Flash Memory, FPGAx2,
SOI-SRAMx2
-
66
8
Total
17
COTS evaluated by CPT
SERVIS-1
SERVIS-2
SRAM
1Mbit, 4Mbit
4Mbit, 8Mbit
DRAM
128Mbit, 256Mbit
256Mbit, 512Mbit
SOI SRAM
Flash Memory
FPGA
256kbit
(0.35 micron m rule)
NOR type 32Mbit
128kbit (0.18 micron m rule)
NOR type 128Mbit
SRAM type, EEPROM type SRAM type，EEPROM type
18
External View of SERVIS-1
19
Summary of SERVIS-1 Satellite
 Launch Date: October 30, 2003
Launch Vehicle/Site: ROCKOT/Plesetsk Cosmodrome (Russia)
 Orbit: altitude=1000km, Inclination=99.5deg (Sun Synchronous)
 Dimension in Orbit: 2.5m(H) X 10.2m(L)
 Launch Mass: 840kg
 Operation Period: 2 years
Electrical Power Generation: Not less than 1300 watts
 Communication: Unified S-Band and High Rate S-band
Operation Center: USEF Space Operations Center (Tokyo)
20
Summary of SERVIS-2 Satellite
 Launch Year: 2009 JFY (Planned)
Launch Vehicle: ROCKOT
 Orbit: Altitude=1200km, Inclination=100.4deg (SSO)
 Launch Mass: Less than 900 kg
 Operation Period: 1 year
 ATTC, SIS and LIB based bus equipment
21
Launch of SERVIS-1
Launched at 16:43:41(LMT(*)), on October 30, 2003
(*): UT+3H
22
Space Experiment Results of SERVIS-1
SERVIS-1 Bus
SERVIS-1 continues flawless operation on orbit.
COTS Parts
Single Event Upsets occur within the predicted frequency.
Permanent damage such as Single Event Latch-up
or Burn-out has not been observed.
Experimental Equipment
VTS experiment was successfully finished in Dec. 2003.
The other experimental equipment had been working well.
No serious malfunction caused by COTS has observed.
23
Electron and Proton Flux on World Map
Electron Flux
Proton Flux
24
Ground and On-orbit TID Tolerance
Ground Test Result
Gy (Si)
CPT
SRAM 1A
SRAM 1B
SRAM 2A
SRAM 2B
DRAM 1A
DRAM 1B
DRAM 2A
DRAM 2B
1Mb SRAM
4Mb SRAM
128Mb DRAM
256Mb DRAM
180
400
600
600
Result on Orbit
Gy (Si)
163
120
342
382
>951
>951
>951
>951
25
Predicted and Measured Single Event Upset
Equipment
OBC
SIS
ATTC
PCDS
CPT
Part ID
32 bit CPU
64M SDRAM
4M SRAM
32bit CPU
1M EEPROM
256M SDRAM
16bit DAC
16bit ADC
16bit CPU
1M SRAM
4M SRAM
128M SDRAM
256M SDRAM
SEU (times)
Predicted values
by heavy ion
irradiation test
by Proton
irradiation test
Measured
values
on orbit
3.9 / day
17 / day
17 / day
0.23 / day
0 / day
4.5 / day
0.8 / day
1.0 / day
1.0 / day
3.4 / day
2.6 / day
3.6 / day
2.0 / year
2.8 / day
6.6 / day
0.2 / day
0.5 / day
0.16 / day
0.02 / day
3.4 / day
0.073 / day
0 / day
0.3 / day
0 / day
0 / day
1.1 / year
1.2 - 2.2 / day
2.2 - 8.3 / day
0.33 - 0.38 / day
0.5 - 0.9 / day
26
COTS Database
■
■
■
■
Containsground
groundtest
testresults.
results.
Contains
Hastwo
twotier
tierconstructions:
constructions:
Has
limitedinformation
informationopen
opento
tothe
thepublic,
public,
--limited
detaileddata
datafor
forinternal
internaluse
use
--detailed
COTS Database
Radiation Tolerance
TID Tolerance
No. ID number
Part's Type
Function
Gamma-ray TIO
Temparature Range
(Catalogue base)
SEU Tolerance
Proton TID
Gy(Si)
Heavy-Ion SEU/SET
Proton SEU/SET
Heavy-Ion SEL/SEB
Saturated
Saturation
Saturated Operating Range Storage
Range
Threshold LET Cross Threshold Energy Cross
Cross
Section
Section
Section
2
2
2
2
℃
℃
MeV
MeV/(mg/cm2)
MeV/(mg/cm )
cm
cm
cm
Environment Test
High
Temperatur
Stabilization temperature
e&
Pressure Temperatur Temperatur
Bake
Operating Humidity Cooker Test e Cycling e shock
Life Test Bias Test
Rejected/Tested
(CPU)
1
11101 CPU
32bit(Internal Bus:128bit)、DRAM:2MB
>200
-
<1.44
>2.25E-03(d)
-
-
59.8
Function error
0 ～ +70
-60 ～ +150
0/22
0/22
0/22
0/22
0/22
-
2
11112 CPU
32bit
150
-
<1.5
>2.0E-06(d)
-
-
5.5
>１.0E-06(d)
-20 ～ +75
-55 ～ +125
0/11
0/11
0/11
0/11
0/11
0/11
3
11113 CPU
32bit with FPU
200
-
<1.5
>4.0E-06(d)
-
-
5.5
>１.0E-06(d)
-20 ～ +75
-55 ～ +125
0/11
0/11
0/11
0/11
0/11
0/11
-65 ～ +150
4
11114 CPU
32bit
200
-
<2.9
>1.0E-06(d)
-
-
>61.8
<１.0E-06(d)
-40 ～ +110
0/11
0/11
0/11
0/11
0/11
0/11
5
11225 CPU
32bit
150
<240
～2
～1.0E-06(b)
<20
>3E-13(b)
5.5
4.9E-06(d)
-40 ～ +110
-65 ～ +150
0/11
0/11
0/11
0/11
0/11
0/11
6
11401 CPU
32bit
200
<400
1.5
5E-08(b)
<9.7
1E-013(b)
1.5
4.9E-07(d)
-40 ～ +85
-65 ～ +150
0/45
0/32
0/22
0/22
0/22
0/22
7
21101 CPU
32bit, RISC, 100MHz
170
-
3.5
9.24E-03(d)
-
-
>60
<１.0E-05(d)
-40 ～ +110
-55 ～ +150
0/5
0/7
-
-
0/7
-
8
41315 CPU
64bit
>300
-
3
2.0E-03(d)
-
-
19.8
9.8E-05(d)
-30 ～ +85
-65 ～ +150
-
0/5
-
-
0/4
-
9
41320 CPU
64bit
>300
-
3
1.7E-07(b)
-
-
14
6.6E-07(d)
0 ～ +70
-65 ～ +150
-
0/5
-
-
0/4
-
10
51201 CPU
MPU
<200
307
4.3
1.0E-05(b)
0.12
1.5E-13(b)
26.2
4.56E-04(d)
-40 ～ +85
-55 ～ +125
0/22
0/22
0/22
0/22
0/22
0/22
11
51301 CPU
16bit CPU, Flash Memory :256kB, RAM : 8kB
123
-
0.64
7.9E-08(b)
0.5
4.0E-14(b)
1.85
6.7E-03(d)
-40 ～ +85
-55 ～ +125
0/45
0/76
0/76
0/22
0/45
0/22
12
51308 CPU
32bit､40MHz,3.3V, Flash Memory : 512kB, RAM : 32kB 200
-
2.9
2.0E-04(d)
16.3
1.59E-16(b)
5
6.80E-04(d)
-40 ～ +85
-55 ～ +125
0/45
0/76
0/45
0/22
0/45
0/15
13
61204 CPU
16bit
300
-
7.5
7.0E-03(d)
-
-
26.2
>2.5E-05(d)
-40 ～ +85
-55 ～ +125
0/3
0/12
0/6
0/5
0/6
-
14
U1001 CPU
32bit
>300
-
9
1.0E-04(d)
-
-
34
Latch-up
-
-
-
-
-
-
-
-
27
Guidelines
COTSParts
PartsEvaluation
EvaluationGuideline
Guideline
COTS
Specifiesbasic
basicrequirement
requirementfor
for
Specifies
COTSfor
forspace
spaceapplication.
application.
COTS
Hastwo
twoappendices:
appendices:
Has
1)specify
specifydetailed
detailedground
groundtest
testitems
items&&
1)
theirconditions
conditions
their
2)explanations
explanationson
onCOTS
COTSgeneral
general
2)
property&&advantages
advantages
property
Contents
Contents
Scope
1.1.Scope
ApplicableDocuments
Documents
2.2.Applicable
BasicConcept
Concept
3.3.Basic
COTSParts
PartsSelection
SelectionCriteria
Criteria
4.4.COTS
4.1
Definition
of
COTS
Parts
4.1 Definition of COTS Parts
4.2Environment
EnvironmentTest
TestCondition
Condition
4.2
4.3Selection
SelectionCriteria
Criteria
4.3
EvaluationTest
Test
5.5.Evaluation
5.1Screening
ScreeningTest
Test&its
&itsCondition
Condition
5.1
5.2Quality
QualityConformance
ConformanceInspection
Inspection&&its
itsCondition
Condition
5.2
5.3Radiation
RadiationTolerance
ToleranceTest
Test
5.3
5.3.1TID
TIDTest
TestMethod
Method
5.3.1
5.3.2Single
SingleEvent
EventEffect
EffectTest
TestMethod
Method
5.3.2
5.3.3
Other
Radiation
Tests
5.3.3 Other Radiation Tests
6.
ReliabilityConsideration
Consideration
6. Reliability
Equipment
Design
Guideline
Equipment
Design
Guideline
Equipment
Design
Guideline
Indicatesitems
itemsto
tobe
beconsidered
consideredfor
for
Indicates
COTSapplied
appliedequipment
equipmentdesign.
design.
COTS
Hasan
anappendage
appendagewhich
whichshows
shows
Has
howCOTS
COTSparts
partswere
wereapplied
appliedin
in
how
experimentalequipment.
equipment.
99experimental
Contents
Contents
Scope
1.1.Scope
ApplicableDocuments
Documents
2.2.Applicable
Definitions
3.3.Definitions
4.
DesignGuidelines
Guidelines
4. Design
4.1General
GeneralRequirements
Requirements
4.1
4.2Overall
OverallEquipment
EquipmentDesign
Design
4.2
4.3Electrical
ElectricalDesign
Design
4.3
4.4Mechanical
MechanicalDesign
Design
4.4
4.5Thermal
Thermaldesign
design
4.5
4.6EMC
EMCDesign
Design
4.6
4.7Radiation
RadiationTolerance
ToleranceDesign
Design
4.7
4.8
Interface
Design
4.8 Interface Design
4.9Reliability
ReliabilityDesign
Design
4.9
4.10Safety
SafetyDesign
Design
4.10
4.11Parts
PartsMounting
MountingDesign
Design
4.11
4.12Parts
Partsand
andMaterial
MaterialSelection
Selection
4.12
28
Conclusion
 204 COTS have been ground tested, and the test results have
been accumulated in the COTS database.
 Experimental equipment with COTS onboard of SERVIS-1 have
performed satisfactorily and it has been demonstrated that COTS can
be used for space.
 First editions of Parts Evaluation Guidelines and Equipment Design
Guidelines have been opened, waiting to be brushed up by
the coming SERVIS-2 space verification results.
 Through the program, the advanced low cost LEO bus is being
developed.
29