A 2.4GHz Cascode CMOS Low Noise Amplifier
Gustavo Campos Martins, Fernando Rangel de Sousa
Federal University of Santa Catarina (UFSC)
Integrated Circuits Laboratory (LCI)
August 31, 2012
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
1 / 25
Summary
1
Introduction
2
Design Methodology
3
Simulation and Measurement Results
4
Conclusion
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
2 / 25
Summary
1
Introduction
2
Design Methodology
3
Simulation and Measurement Results
4
Conclusion
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
3 / 25
Goal
Applications require low power and small footprint
The goal of this work is to design a low noise amplifier for:
ISM 2.4GHz
50 Ω input and output impedances
0.18 µm CMOS technology
1.8 V supply voltage
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
4 / 25
Single transistor amplifiers
Vdd
Vdd
Vdd
LNAs are usually designed with a single transistor:
Common-source: Driver; Poor reverse isolation
Common-gate: Matching with higher bandwidth; Noise
Common-drain: gain ≈ 1; buffer
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
5 / 25
Single transistor amplifiers
Vdd
Vdd
Vdd
LNAs are usually designed with a single transistor:
Common-source: Driver; Poor reverse isolation
Common-gate: Matching with higher bandwidth; Noise
Common-drain: gain ≈ 1; buffer
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
5 / 25
Single transistor amplifiers
Vdd
Vdd
Vdd
LNAs are usually designed with a single transistor:
Common-source: Driver; Poor reverse isolation
Common-gate: Matching with higher bandwidth; Noise
Common-drain: gain ≈ 1; buffer
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
5 / 25
Single transistor amplifiers
Vdd
Vdd
Vdd
LNAs are usually designed with a single transistor:
Common-source: Driver; Poor reverse isolation
Common-gate: Matching with higher bandwidth; Noise
Common-drain: gain ≈ 1; buffer
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
5 / 25
Cascode amplifier
It is possible to obtain better results using combinations of the
single-transistor topologies
The cascode topology was chosen
Can maintain gain up to high frequencies
High reverse isolation
Reduces voltage swing at the output
Cannot be as low-noise as a single transistor amplifier due to the noise
added by the second element
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
6 / 25
Summary
1
Introduction
2
Design Methodology
3
Simulation and Measurement Results
4
Conclusion
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
7 / 25
Cascode Topology
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
8 / 25
Design Methodology
STEP 1: Current density that provides the lowest NFmin
2
2
vno,r
≈ 4kTrg gm1
RL2 ∝ ID
g
p
2
vno,i
≈ 4kT γgm1 RL2 ∝ ID
d
p
4
2
2 2
2
vno,i
≈
kT
δω
C
g
R
∝
ID
m1
gs1
L
g
5
v2
2 2
Pout = out = gm
vin RL ∝ ID
RL
Increasing ID should decrease NF, but at higher currents other effects
are observed.
Lowest NFmin at ID /W = 60 µA/µm
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
9 / 25
Design Methodology
STEP 2: Size the transistor making <{Yopt } = 1/50 S
F = Fmin +
Rn
|Ys − Yopt |2
Gs
L of transistors is kept minimum for maximum fT
W = 46.5 µm
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
10 / 25
Design Methodology
STEP 3: place and size LS for <{Zin } = 50 Ω.
Zin (s) =
gm1
1
+ s(LS + LG ) +
LS
sCgs1
Cgs1
LS = 1.55nH
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
11 / 25
Design Methodology
STEP 4: Place and size the LG so that Im{Zin } = 0
LG =
1
ω 2 Cgs1
− LS
Lg = 20.27nH
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
12 / 25
Design Methodology
The W of cascoded transistor (common-gate) was chosen to provide
enough gain and low parasitic capacitances
The W of the buffer transistors were chosen to present low parasitic
capacitances and provide 50 Ω output impedance at a reasonable
IBuffer
The tank circuit was designed to resonate at 2.4GHz, parasitic
capacitances must be considered
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
13 / 25
Summary
1
Introduction
2
Design Methodology
3
Simulation and Measurement Results
4
Conclusion
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
14 / 25
Layout and Test-bench
1
VNA
2
LNA
Bias
Vdd
gnd
Buffer
SPA
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
15 / 25
S-parameters Measurement and Comparison
20
30
15
35
40
5
S12 (dB)
S21 (dB)
10
0
5
45
50
55
10
15
201.0
60
Measured
Simulated
1.5
2.0
2.5
3.0
Frequency (GHz)
3.5
4.0
651.0
Measured
Simulated
1.5
2.0
2.5
3.0
Frequency (GHz)
3.5
4.0
At 2.4 GHz
S21,meas − S21,sim = 14.5 − 16.8 = −2.3 dB
S12,meas − S12,sim = −34 − (−45) = 11 dB
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
16 / 25
S-parameters Measurement and Comparison
0
12
5
13
10
14
15
S11 (dB)
S22 (dB)
11
15
16
20
25
30
17
18
191.0
35
Measured
Simulated
1.5
2.0
2.5
3.0
Frequency (GHz)
3.5
4.0
401.0
Measured
Simulated
1.5
2.0
2.5
3.0
Frequency (GHz)
3.5
4.0
At 2.4 GHz
S22,meas − S22,sim = −13.1 − (−16.2) = 3.1 dB
S11,meas − S11,sim = −8 − (−23) = 15 dB
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
17 / 25
Linearity analysis
16
14
12
S21 (dB)
10
1-dB compression=-17.5dBm
8
6
4
2
0
250
40
30
20
Input Power (dBm)
10
0
IIP3 = -7.8 dBm
Simulation IIP3 = -6.6 dBm
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
18 / 25
Measuring Noise Figure (Y-Factor Method)
Spectrum
Analyzer
Spectrum
Analyzer
LNA
Pre-amp
Sp
Pre-amp
Noise
Source
Noise
Source
ENR =
TH − TC
T0
ENR
Noff
, where Y =
Y −1
Non
F2 − 1
FLNA = FT −
GLNA
FT =
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
19 / 25
Noise Figure in post-layout simulation
18
Noise Figure
Minimum Noise Figure
16
14
NF (dB)
12
10
8
6
NF=2.8dB
4
2
0
1.0
Minimum NF=2.0dB
1.5
G. C. Martins, F. R. de Sousa (UFSC-LCI)
2.0
2.5
3.0
Frequency (GHz)
A 2.4GHz Cascode CMOS LNA
3.5
4.0
August 31, 2012
20 / 25
Noise Figure
10
NF calculated
NF smooth
NF simulation
9
8
NF [dB]
7
6
5
4
3
2
1
0
2.3
2.4
2.5
2.6
2.7
2.8
NF = 4.2 dB at 2.4 GHz (2.8 dB in simulation)
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
21 / 25
Comparison with recent works
Parameter
Gain (dB)
NF (dB)
IIP3 (dBm)
Core power (mW)
Area (mm2 )
Supply voltage (V)
Technology (nm)
[1]
20
4
-12
1.32
0.007
1.2
130
[2]
15
3.6
-14.3
0.8
0.8
130
[3]
4.5
2.77
11.8
18
0.55
1.8
180
[4]
14.6
3.8
-12
0.12
0.6
130
[5]
23
3.8
-9.1
13
4.1
1.0
180
This Work
14.5
4.2
-7.8
5
0.15
1.8
180
1 F. Belmas, F. Hameau, and J. Fournier. A 1.3mW 20dB gain low power inductorless LNA with 4dB noise figure for
2.45GHz ISM band. In Radio Frequency Integrated Circuits Symposium (RFIC), 2011 IEEE, pages 1-4, june 2011.
2 S. Manjula and D. Selvathi. Design of micro power CMOS LNA for healthcare applications. In Devices, Circuits and
Systems (ICDCS), 2012 International Conference on, pages 153 –156, march 2012.
3 Y. Shen, H. Yang, and R. Luo. A fully integrated 0.18µm CMOS low noise amplifier for 2.4-GHz applications. In ASIC,
2005. ASICON 2005. 6th International Conference On, volume 2, pages 582-586, oct. 2005.
4 T. Taris, A. Mabrouki, H. Kraimia, Y. Deval, and J.B. Begueret. Reconfigurable ultra low power LNA for 2.4GHz
wireless sensor networks. In Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on,
pages 74 –77, dec. 2010.
5 L. Zhenying, S. Rustagi, M. Li, and Y. Lian. A 1V, 2.4GHz fully integrated LNA using 0.18µm CMOS technology. In
ASIC, 2003. Proceedings. 5th International Conference on, volume 2, pages 1062-1065 Vol.2, oct. 2003.
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
22 / 25
Summary
1
Introduction
2
Design Methodology
3
Simulation and Measurement Results
4
Conclusion
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
23 / 25
Conclusion
A Cascode CMOS LNA operating at 2.4 GHz with 4.2 dB NF and 14
dB gain was designed.
The LNA was fabricated and tested.
The S-parameters, linearity and NF were analyzed.
It has been observed a shift in frequency in S11 , which was due to the
inaccuracy in high frequency of the component models and process
variation.
The other S-parameters and linearity remained within specifications.
The measured NF was 1.4 dB above the simulated.
The LNA has a small area (0.15 mm2 ).
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
24 / 25
Conclusion
Thank you
G. C. Martins, F. R. de Sousa (UFSC-LCI)
A 2.4GHz Cascode CMOS LNA
August 31, 2012
25 / 25