Leakage Current Measurement Reference

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TI Designs
Leakage Current Measurement Reference Design for
Determining Insulation Resistance
Design Overview
Design Features
This TI design provides a reference solution to
measure the insulation resistance up to 100 MΩ. The
design has an onboard, isolated 500-V DC power
supply and an isolated signal conditioning circuit to
measure the leakage current and then determine the
insulation resistance.
•
Design Resources
Tool Folder Containing Design Files
TIDA-00440
INA225
AMC1200
CSD13202Q2
ISO7640FM
INA333
TS5A23157
LM5160
TLV1117-50
LP2985A-50
UCC28711
Product Folder
Product Folder
Product Folder
Product Folder
Product Folder
Product Folder
Product Folder
Product Folder
Product Folder
Product Folder
Featured Applications
Main Board
5V_VCC1
LDO
5V_VCC2
LDO
•
•
•
•
•
(Fly-BuckTM)
AMC1200
MUX
TS5A23157
To
MCU
V SENSE
Flyback
(DC/DC)
UCC28711
500-V DC
R CAL
LM5160
V SENSE
CSM
INA225
150-V
to
800-V
DC
Industrial Drives
Variable Speed AC/DC Drives
Servo Drives
Transformers
Solar Inverters
10-V to 20-V DC
Low-voltage DC/DC
R LIMIT
•
•
•
•
ASK Our E2E Experts
WEBENCH® Calculator Tools
Daughter Board
•
•
•
•
Leakage Current Measurement Circuit With Option
for Programmable Current Sense Amplifier and
Switchable Shunt Resistors
Range of Measurement: 0 Ω to 100 MΩ
Measurement Accuracy: 5% (Uncalibrated)
Test Voltage Level Derived from IEEE 43-2000
Onboard Isolated 500-V Power Supply to Measure
Insulation Resistance
Provision for Calibration Resistor on Board
Provision for Polarization Index Measurement
Based on Test Duration
Basic Isolation for Measurement Circuit
Onboard Relay to Disconnect the Insulation
Measurement Circuit When Not in Operation
Digital
Isolator
ISO
7640
R ISO
R ISO = Insulation resistance
R CAL = Calibration resistance
Basic isolation
An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other
important disclaimers and information.
TIDU873A – April 2015 – Revised April 2015
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Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
1
Introduction
1
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Introduction
The deterioration of insulation is one of the primary causes of electrical equipment failure. This TI design
provides a reference solution to measure the insulation resistance up to 100 MΩ with an uncalibrated
accuracy of 5%. The reference design uses an onboard isolated 500-V DC power supply and isolated
signal conditioning circuit to measure the leakage current for determining the insulation resistance.
1.1
Importance of Insulation Measurement
Insulating materials play a critical role in the life of electrical equipment. The failure of insulation, while in
service, may cause significant damage to equipment and to the system to which the equipment is
connected. Insulation failure can cause dangerous voltage, fire, high fault current and explosion, damage
to equipment and property, personnel injury, and fatal accident. By applying insulation tests, the user can
identify deteriorated insulation before any failure occurs.
1.2
Causes of Insulation Degradation
The main causes of insulation failure are dielectric contamination, temperature cycling, excessive
overloads, excessive voltage stress due to overvoltage, and aging.
1. Thermal stress: Running the machine in excessively hot or cold conditions causes over expansion or
contraction of the insulation, which may result in cracks and failures. However, thermal stresses are
also incurred every time a machine starts or stops. Unless the machinery is designed for intermittent
use, every stop and start adversely affects the aging process of the insulation.
2. Electric stress: Insulation is designed for a particular application. Overvoltages cause abnormal stress
within the insulation, which can lead to cracking or delamination of the insulation.
3. Voltage unbalance: When the voltage between all three phases is equal (balanced), the current values
are the same in each phase winding. When the voltages between the three phases (AB, BC, and CA)
are not equal (unbalanced), the current increases dramatically in the motor windings. If the user allows
this increase to continue for too long, the motor is damaged.
Normal cycles of operation lead to aging through the previously mentioned mechanisms. The aging of
insulation is a slow process of degradation as these factors interact with each other in a gradual spiral of
decline. At some point, depending on both original and operating conditions, the decline may speed up
significantly.
2
Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
TIDU873A – April 2015 – Revised April 2015
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System Description
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2
System Description
The TIDA-00440 reference design uses a mechanism to find the leakage current and detect the failure in
insulation. The leakage current is measured by applying a fixed, high voltage DC and by measuring the
leakage current flowing through the shunt. The high voltage DC is generated using an onboard power
supply based on a flyback topology, which takes a wide range of DC input voltage from 150-V DC to
800-V DC. The functionality of finding insulation resistance is implemented using two boards: the main
board (TIDA-00440MB), which is the signal conditioning circuit , and the daughter board (TIDA-00440DB),
which has an Isolated 500-V DC.
One important point to note is that the test levels, test voltage, and insulation levels derive from the IEEE
standard IEEE43-2000 (IEEE Recommended Practice for Testing Insulation Resistance of Rotating
Machinery [1]). This standard describes a recommended procedure for measuring insulation resistance
and describes the typical insulation resistance characteristics of rotating machine windings and how these
characteristics indicate winding condition. This standard recommends the minimum acceptable values of
insulation resistance for AC and DC rotating machine windings. Using this standard as a base, Table 1
makes the following judgments:
Table 1. Insulation Resistance
INSULATION
RESISTANCE
100 MΩ or higher
Acceptable.
10 to 100 MΩ
The winding has begun deteriorating. There is no problem with the performance
at present. Be sure to perform a periodic inspection.
1 to 10 MΩ
The winding has considerably deteriorated. Special care is required. Be sure to
perform a periodic inspection.
Lower than 1 MΩ
3
JUDGEMENT
Unacceptable.
Design Features
The TIDA-00440 reference design features the following characteristics:
1. Leakage current measurement circuit with option for:
(a) Programmable current sense amplifier: INA225 has four gain-settings selected based on the GS0
and GS1
(b) Switchable shunt resistors
2. Facilitates online insulation measurement during installation and maintenance testing
3. Range of measurement: 0 Ω to 100 MΩ
4. Measurement accuracy: 5% (Uncalibrated)
5. Test voltage Level derived from IEEE 43-2000 (Recommended Practice for Testing Insulation
Resistance of Rotating Machinery)
6. Onboard isolated 500-V power supply to measure insulation resistance
7. Provision for calibration resistor on board
8. Provision for polarization index measurement based on test duration
9. Basic isolation for measurement circuit
10. Onboard relay to disconnect the insulation measurement circuit when not in operation
TIDU873A – April 2015 – Revised April 2015
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Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
3
Block Diagram
4
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Block Diagram
Daughter Board
Main Board
5V_VCC1
LDO
5V_VCC2
LDO
10-V to 20-V DC
Low-voltage DC/DC
R LIMIT
(Fly-BuckTM)
V SENSE
MUX
TS5A23157
AMC1200
CSM
INA225
To
MCU
V SENSE
150-V
to
800-V
DC
Flyback
(DC/DC)
UCC28711
500-V DC
R CAL
LM5160
Digital
Isolator
ISO
7640
R ISO
R ISO = Insulation resistance
R CAL = Calibration resistance
Basic isolation
Figure 1. High-Level Block Diagram of Measurement Circuit
Figure 1 shows the high-level block diagram of the measurement circuit. As previously mentioned, this
design consists of two boards: one main board (TIDA-00440MB) and one daughter board
(TIDA-00440DB). The flyback (DC/DC) block on the left side of Figure 1 is the daughter board. All the
remaining blocks are present on the main board.
The leakage current is measured by applying a fixed voltage and measuring the voltage across the shunt
that is a result of the leakage current. The reference design uses different switchable shunt resistances,
which are switched on in a sequence to measure the insulation resistance. When there is a dead short,
the insulation resistance is 0 Ω and a full current (or maximum) can pass through the insulation resistance.
At this point in the measurement having a smaller shunt value (by turning on all of the switches) is
mandatory. In the other case, when the insulation is higher, a higher shunt value is required. The leakage
current flowing through the shunt or shunts is measured using a current shunt monitor (INA225). The
leakage current is amplified with different gains (if required), which can be programmed using pins GS0
and GS1 of the INA225 device. If using the gain of the INA225 is not required, the voltage across the
shunt can be routed directly by using an onboard multiplexer (TS5A23157). The measured output voltage
is isolated using an isolated amplifier (AMC1200), which has an output that can connect to an MCU. The
switchable shunts and the multiplexer (MUX) channels are controlled through DIP switches, which are
isolated using a digital isolator (ISO7640FM). The DIP switches are used to emulate the signals coming
from the MCU to change the gain and shunts. The board operates from 15 V and then generates two
isolated 5-V rails through the Fly-Buck. The primary side generates 3.3 V.
The daughter board consists of an isolated discontinuous mode (DCM) flyback circuit for generating
500-V DC from an input voltage ranging from 150-V DC to 800-V DC. On the main board, there is a
provision to measure the 500-V DC output voltage for diagnostic purposes.
4
Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
TIDU873A – April 2015 – Revised April 2015
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Block Diagram
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4.1
Highlighted Products
The TIDA-00440 reference design features the following devices, which were selected based on their
specifications.
1. INA225 — Programmable gain, voltage output, and current shunt monitor
2. AMC1200 — Precision fully-differential isolation amplifier
3. LM5160 — Wide input, 1.5-A synchrounous Fly-Buck converter
4. UCC28711 — Constant-voltage, constant-current controller with primary-side regulation
5. CSD13202Q2 — 12-V, N-channel NexFET™ power MOSFETs
6. ISO7640FM — Low-power, quad-channel digital isolators
7. TS5A23157 — Dual 10-Ω SPDT analog switch
8. TLV1117-50 — 800-mA, 5-V fixed, low drop-out voltage regulator
9. LP2985A-50 — 150-mA, 5-V fixed, low drop-out voltage regulator
10. INA333 — Low power instrumentation amplifier
For more information on each of these devices, see the respective product folders at www.ti.com or click
on the links for the product folders on the first page of this reference design guide.
TIDU873A – April 2015 – Revised April 2015
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Leakage Current Measurement Reference Design for Determining Insulation
Resistance
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5
Principle of Operation
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5
Principle of Operation
5.1
Current-Shunt Approach
This design uses a current-shunt approach to measure the insulation resistance. Figure 2 shows a
schematic of the current-shunt approach. The circuit consists of three stages: the current shunt monitor,
multiplexer, and isolation amplifier.
3V3
5V_VCC1
5V_VCC1
5V_VCC1
C39
0.1µF
D10
1
10.0
C6
1µF
R24
5V
10.0
8
5
C43
0.01µF
IN1
2
IN+
IN-
NO1
REF
GS0
GND
NC1
GND
4
GS1
COM1
V+
NO2
7
MUX 5
NC2
IN2
2
GND1
COM2
10.0
9 ISENSE
C4
1µF
+
3
GND1
V-
V-
R25
10.0
6
7
R21 470
6
R23 470
V+
-
TS5A23157DGS
INA225AIDGK
CSM(+)
V+
2
8
7 MID
GND
U4
1
R18
10
8
MUX 1
4
3
6
R55
0
MID
OUT
5
R20
VS
GND1
U10
U3
3
GND1
C40
0.1µF
C38
0.1µF
AMC1200BDWV
J8
1
2
C5
1000pF
CSM(-)
282834-2
4
SMBJ5.0A-13-F
GND1
C42
0.01µF
ISENSE
C41
0.1µF
GND1
GND
GND1
5V_VCC1
5V_VCC1
GND1
GND1
R31
0
R30
0
R32
SW2
0
R33
0
GS0 GS1 GAIN
==================
GND GND 25V/V
GND VS
50V/V
VS
GND 100V/V
VS
VS
200V/V
R34
0
GND1
GND1
Figure 2. Signal Chain for Current Shunt Method
Multiple shunts are used in this design, which is important to note. Figure 3 shows the shunt resistors
used for the insulation measurement. R13 is the fixed shunt and R11−R12 are switched on and off by
using two MOSFETs (Q1 and Q2), respectively. Both of the MOSFETs are CSD13202Q2 logic-level
NexFETs from TI.
1
2
JD3
500V+
5-534206-1
R2
R59
499k
R61
499k
R62
499k
499k
R45
0
R8
500V-
2
1
5-534206-1
0
GND2
JD4
ISENSE
R15
2.00k
3
G
S
8
SW2
Q1
TR-CSD13202Q2
S
D
G
R17
10.0k
Q2
TR-CSD13202Q2
4
3
R16
10.0k
4
2.00k
S
8
R14
S
D
SW1
R13
220k
7
6
5
2
1
R12
2.70k
7
6
5
2
1
R11
261
MID
Figure 3. Schematic With Multiple Shunts
6
Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
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Principle of Operation
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The current shunt monitor used in this design is INA225 (see Figure 4). The voltage across the shunt
(between the ISENSE and MID points in the schematic) is connected to the inputs of INA225. The board
has provisions to ensure protection, such as a 5-V clamp diode (D10) and differential caps (C42 and C43).
These protections are currently not populated on the board and are marked as do not populate (DNP).
The gain of INA225 is programmable and can be set by using the GS0 and GS1 pins. Table 2 shows the
gain setting for INA225. The gain can also be programmed using a signal SW2 coming from the digital
isolator.
Table 2. Gain Setting for INA225
GAIN
GS0
GS1
25 V/V
GND
GND
50 V/V
GND
VS
100 V/V
VS
GND
200 V/V
VS
VS
The TS5A23157 is an analog multiplexer with two differential channels. One channel is connected to the
output of INA225 and the second channel is connected directly to the sense signal (between ISENSE and
MID). The selection between the two differential channels of TS5A23157 is controlled by the signal MUX,
coming from the digital isolator. During scenarios of high leakage current, gain may not be required and
the INA225 monitor can be bypassed using the TS5A23157 device.
NOTE: When INA225 is not used for providing the gain, TI recommends to unpopulate R20 and R24
to prevent any effect due to the input impedance of INA225.
5V_VCC1
5V_VCC1
C39
0.1µF
SMBJ5.0A-13-F
GND1
C42
0.01µF
ISENSE
R20
1
10.0
C6
1µF
R24
5V
10.0
8
5
C43
0.01µF
OUT
MUX 1
4
2
IN+
3
6
R55
0
MID
VS
GND1
U10
U3
3
GND1
D10
C41
0.1µF
IN-
4
GS1
REF
GS0
GND
7
MUX 5
2
IN1
NO1
COM1
NC1
GND
V+
NO2
NC2
IN2
COM2
10
9 ISENSE
R18
10.0
C4
1µF
8
7 MID
6
R25
10.0
TS5A23157DGS
INA225AIDGK
GND1
GND1
5V_VCC1
5V_VCC1
GND1
GND1
R31
0
R30
0
R32
SW2
0
R33
0
GS0 GS1 GAIN
==================
GND GND 25V/V
GND VS
50V/V
VS
GND 100V/V
VS
VS
200V/V
R34
0
GND1
GND1
Figure 4. INA225 and TS5A23157 Section for Current Shunt Method
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Resistance
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7
Principle of Operation
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The output of TS5A23157 is connected to the isolated amplifier AMC1200 (see Figure 5). The nonisolated side of AMC1200 is powered with 5V_VCC1 coming from the TLV1117-50. The isolated side of
AMC1200 is powered with 3.3 V coming from the LM5160 Fly-Buck power supply section. Both of the
supplies are decoupled using 0.1-μF capacitors (C38 and C40 respectively). The differential output of
AMC1200 is available on terminal J8.
3V3
5V_VCC1
5V_VCC1
C41
0.1µF
3
4
MUX 5
NO1
NC1
GND
V+
NO2
NC2
IN2
COM2
10
9 ISENSE
1
10.0
2
C4
1µF
8
7 MID
3
CSM(+)
V+
7
+
V+
-
V-
V-
R25
10.0
6
GND
U4
8
COM1
5
2
IN1
R18
6
R21 470
R23 470
CSM(-)
AMC1200BDWV
J8
1
2
C5
1000pF
282834-2
4
MUX 1
GND1
GND1
U10
C40
0.1µF
C38
0.1µF
TS5A23157DGS
GND1
GND
GND1
Figure 5. AMC1200 Section of Current Shunt Method
5.1.1
Single-Shunt Approach
In this approach, both the MOSFETs Q1 and Q2 are turned off using signals SW1 and SW2, respectively.
So, the shunt resistor used in this case is R13 only (fixed at a value of 22 Ω). To cover the entire range of
insulation resistance, the gain of INA225 is varied using GS0 and GS1 pins. Figure 6 shows the simplified
connection diagram for this approach. Section 8.2 shows the measurement accuracy for this approach.
499 k
+
R45
ISENSE
R11
R12
R13
Q1
INA225
TS5A23157
GS0 GS1
MUX
AMC1200
500-V DC
coming
from
daughter
board
J8
Q2
MID
RINSULATION
t
R8 = 0 (Q1 and Q2 are open)
Figure 6. Simplified Connection Diagram for Single-Shunt Approach
8
Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
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Principle of Operation
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5.1.2
Multiple-Shunt Approach
In this approach, MOSFETs Q1 and Q2 are turned on or off based on the output voltage measured on
terminal J8. The total shunt resistance can be a combination of R11, R12, and R13. In this approach,
INA225 is not used (so R20 and R24 must be unpopulated). Figure 7 shows the simplified connection
diagram for this approach. Section 8.1 shows the measurement accuracy for this approach.
499 k
+
R45
ISENSE
R11
R12
R13
Q1
AMC1200
500-V DC
coming
from
daughter
board
TS5A23157
J8
Q2
MID
MUX
RINSULATION
t
R8 = 0 (Q1 and Q2 are open and closed based on the requirement)
Figure 7. Simplified Connection Diagram for Multiple-Shunt Approach
5.2
Resistive Divider Approach
This design also uses the resistive divider approach to measure the insulation resistance. Figure 8 shows
a schematic of the resistive divider approach.
5V_VCC2
R2
R59
499k
R61
499k
R62
499k
499k
R60
7.50M
R45
0
2
1
5-534206-1
JD4
500V-
R8
7.50M
R3
7.50M
R6
6.8k
D9
C2
100pF
5V
8
C35
0.01µF
GND2
1
V+
OUT
R4
6
GND2
10.0
VIN+
VIN-
2
REF
C1
1µF
5
R9
RG
RG
V-
10.0
4
R11
261
R12
2.70k
R13
220k
GND2
3
U2
GND
V+
+
RDM(+)
7
R5
470
6
R7
470
V+
-
V-
V-
C3
1000pF
RDM(-)
AMC1200BDWV
J7
1
2
282834-2
INA333AIDGK
GND2
Gain = 1 + (100k/RG)
ISENSE
C14
0.1µF
C13
0.1µF
U1
2
R10
51k
7.50M
GND2
C12
0.1µF
GND2
7
3
R63
7.50M
R43
0
C15
0.01µF GND2
5V_VCC2 3V3
1
500V+
5-534206-1
R58
8
1
2
7.50M
1
5
R44
4
2
S MB J5.0A -13-F
JD3
GND2
GND
For Resistive Divider based measurement:
R13 = 0 ohm, R43 = DNP
Figure 8. Signal Chain for Resistive Divider Method
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Leakage Current Measurement Reference Design for Determining Insulation
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9
Principle of Operation
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The circuit consists of two stages: the instrumentation amplifier and an isolation amplifier. This reference
design uses the instrumentation amplifier INA333 (see Figure 9).
7.50M
1
R58
7.50M
R60
7.50M
R3
7.50M
SMBJ5.0A-13-F
5V_VCC2
R44
2
C12
0.1µF
C15
0.01µF GND2
U1
7
GND2
V+
3
R63
7.50M
D9
R6
6.8k
C2
100pF
5V
R43
VIN-
8
R10
51k
GND2
10.0
REF
5
R9
RG
1
C35
0.01µF
R4
6
VIN+
2
7.50M
OUT
RG
V-
10.0
4
INA333AIDGK
Gain = 1 + (100k/RG)
GND2
GND2
For Resistive Divider based measurement:
R13 = 0 ohm, R43 = DNP
Figure 9. INA333 Section for Resistive Divider Method
The 500-V DC coming from the daughter board is applied across the insulation resistance. The voltage
developed across the insulation resistance is divided by four resistors: R44, R58, R3, and R6. An
important thing to note is that the total resistance is divided into three 7.5-MΩ resistors to reduce the
voltage stress on each of the resistors. A single high-voltage resistor is costly in comparison to the three
different low-voltage resistors. The voltage across R6 is fed to the input of the instrumentation amplifier
INA333. One 100-pF capacitor (C2) is used as a filter for any noise present on the input signal. The board
has provisions to ensure protection, such as a 5-V clamp diode (D9) and differential caps (C15 and C35).
These protections are currently not populated on the board and are marked as DNP. The gain of the
INA333 amplifier can be set by the RG pin (that is R10 in Figure 9) using the following formula:
Gain = 1 + (100 k / RG)
(1)
Currently the gain is set at unity because of the signal levels. The output of INA333 is connected to the
isolated amplifier AMC1200 (see Figure 10).
NOTE: The primary reason for using an INA333 amplifier is to provide a high input impedance for
the measurement circuit. For lower-cost applications, a simple op-amp based, non-inverting
unity-gain buffer can be used.
5V_VCC2 3V3
C14
0.1µF
C13
0.1µF
1
R4
2
C1
1µF
+
V+
-
V-
V-
5
10.0
3
V+
RDM(+)
7
R5
470
6
R7
470
J7
1
2
C3
1000pF
RDM(-)
AMC1200BDWV
282834-2
4
R9
U2
GND
8
GND2
10.0
GND2
GND
Figure 10. AMC1200 Section of Resistive Divider Method
The non-isolated side of the AMC1200 device is powered with 5V_VCC2 coming from the LP2985A-50.
The isolated side of the AMC1200 device is powered with 3.3 V coming from the LM5160 Fly-Buck
section. Both of the supplies are decoupled using 0.1-μF capacitors (C13 and C14, respectively). The
differential output of the AMC1200 is available on terminal J7.
10
Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
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Principle of Operation
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Figure 11 shows a simplified circuit for the resistive divider approach.
499 k
+
R11
22.5 M
R13
0
6.8 k
R12
Q1
AMC1200
500-V DC
coming
from
daughter
board
R45
0
INA333
Q2
J7
OR
Any non-investing
unity gain buffers
RINSULATION
t
R8 = 0 (R13 = 0 )
Figure 11. Simplified Resistive Divider Approach
Figure 12 shows the TINA-TI™ simulation software for the resistive divider approach. The graph from the
TINA-TI simulation (Figure 13) shows that, due to the ratio of resistors, the voltage across R6 does not
vary linearly with the insulation resistance. The measured value of voltage at the output of AMC1200 is
almost saturated with an insulation resistance value greater than 15 MΩ. Section 8.3 shows the same
observation during the testing and in the results.
Vdd1
R12 22.5M
Vdd2
+
GND2
AM1
V3 5
+
V4 5
U6 INA 333
V6 5
VDC_PLUS
TERMINAL 1
+
R1 499k
+
7
2
VS1 250
1
Riso 10M
+
VS2 250
VDC_MINUS
R2 6.8k
TERMINAL 2
C5 100p
+
+
GND2
U2 AMC1200
5
V+
RG
Vdd1
GND2
Ref
Out
VM1
Vdd2
R5 470
R3 10
6
VDD1 VDD2
-
8
R4 0
3
RG
+
V4
C3 1u
-
C4 1n
VIN N
VOUT N
GND1
GND2
V5 0
+
VOUT P
VIN P
VM4
-
-
VM6
GND2
R11 10
R6 470
+
GND2
GND2
GND2
Figure 12. TINA-TI Simulation for Resistive Divider Approach
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Figure 13. TINA-TI Graphs Showing Saturation
Though the resistive divider approach is investigated in this design, it is not useful as an approach to
cover the entire range for insulation resistance up to 100 MΩ.
12
Leakage Current Measurement Reference Design for Determining Insulation
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6
Circuit Design
6.1
Sensing of 500-V DC for Resistive Divider Approach
To measure the 500-V DC voltage, the design is provided with an isolated amplifier AMC1200. Figure 14
shows a schematic of the AMC1200.
1
2
JD3
1
2
JD1
500V+
J1
5-534206-1
HV_DC(+)
5-534206-1
R2
R59
499k
R61
499k
R62
499k
499k
Daughter Card (500Vdc)
2
1
5-534206-1
2
1
5-534206-1
J2
JD2
JD4
R8
500V-
0
HV_DC(-)
GND2
R64
3.0M
5V_VCC2
C36
0.1µF
1
R22
GND2
10.0
C7
1µF
5V
R29
10.0
R56
0
R57
0
2
U5
3
V+
7
+
V+
-
V-
V-
5
D5
6
GND
500V_SENSE(+)
R26 470
R28 470
AMC1200BDWV
C8
1000pF
500V_SENSE(-)
J6
1
2
282834-2
4
R27
3.0k
C37
0.1µF
8
R19
3.0M
3V3
SMBJ5.0A-13-F
R65
3.0M
GND2
GND
GND2
Figure 14. Sensing of 500-V DC Voltage
The 500-V input coming from the daughter card is stepped down using four resistors: R64, R65, R19, and
R27. The voltage across R27 is taken as an input to the AMC1200. An important thing to note is that the
total resistance is divided into three 3-MΩ resistors to reduce the voltage stress on each of the resistors.
One single high-voltage resistor is costly in comparison to the three different low-voltage resistors. The
board has a 5-V clamp diode (D5) if protection is required. This protection is currently not populated on
the board and is marked as DNP. The non-isolated side of the AMC1200 is powered with 5V_VCC2
coming from the LP2985A-50. The isolated side of the AMC1200 is powered with 3.3 V coming from the
LM5160 Fly-Buck section. Both the supplies are decoupled using 0.1-μF capacitors (C36 and C37,
respectively). The differential output of the AMC1200 is available on terminal J6.
An important thing to note is that the input impedance of the AMC1200 amplifier is approximately 28 kΩ
(typical). With such a high value for the sense resistor (R27 = 3 kΩ), the effect of input impedance must
be considered. The current passing through each of the resistors must also be very low to reduce the
overall power consumption. In short, this trade-off must be addressed.
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Circuit Design
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Digital Isolator and DIP Switches
As previously mentioned, signals SW1 and SW2 control the MOSFETs in the current shunt method. The
MUX signal is used to select the input channel of the multiplexer TS5A23157. The signal RELAY controls
the onboard relay. The intention of this design is to have all of these signals originate from an MCU in the
end-application. To emulate this intention, the design uses four-channel DIP switches (see Figure 15).
Because the MCU operates at 3.3 V and the control signals control the high-voltage circuits, isolating the
MCU and high-voltage circuit is important. The ISO7640FM is a digital isolator from TI with four channels.
The outputs are enabled when EN = 1. To enable and disable the outputs of the ISO7640FM, two
resistors are used (R41 and R42). R41 is currently populated, which means that the outputs are enabled.
The isolated side of the ISO7640FM device is powered with 5V_VCC1 coming from the TLV1117-50; the
non-isolated side is powered with 3.3 V coming from the LM5160 Fly-Buck section. Both of the supplies
are decoupled using 0.1-μF capacitors (C9 and C10, respectively).
3V3
5V_VCC1
U11
1
VCC1
C10
0.1µF
2
3V3
3
5
6
7
8
4
GND
S1
4
3
2
1
78B04ST
5
6
R37 R38 R39 R40 7
0
0
0
0
8
VCC2
GND1
GND2
INA
OUTA
INB
OUTB
INC
OUTC
IND
OUTD
NC
GND1
EN
GND2
C9
0.1µF
16
15
14
SW1
13
SW2
12
RELAY
11
MUX
GND1
5V_VCC1
10
9
R41
0
ISO7640FM
GND1
GND
R42
0
GND1
Figure 15. ISO7640FM With DIP Switches
6.3
Onboard Relay
As Figure 16 shows, the TIDA-00440 reference design uses one relay for connecting and disconnecting
the end equipment from the measurement circuit. The normally closed (NC) contacts of the relay are
connected to a calibration resistor R35. Banana terminals J3 and J4 are used for connecting the end
equipment that requires insulation measurements. The relay is driven using a simple BJT, which is
controlled by the signal RELAY originating from the digital isolator IS07640FM. Because the application
requires a high voltage of 500 V, selecting the relay with the proper creepage and clearances is important.
5V_VCC1
K1
1SS315TPH3F
C44
0.1µF
RELAY
R36
D1
1
J3
R35
100Meg
J4
G2RL-2 DC5
Q3
2DD1664R-13
GND2
3
0
MID
7
6
5
8
2,4
GND1
2
3
4
1
GND1
Figure 16. Relay for On-the-Fly Connection of Insulation Resistance to Measurement Circuit
14
Leakage Current Measurement Reference Design for Determining Insulation
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6.4
Calculation of Power Consumption for All Components
Figure 17 shows the scheme for the power supply. The operating input voltage range for the Fly-Buck
power supply is 10-V DC to 20-V DC. The 3.3 V (required to power the non-isolated side) generates from
the primary winding of the Fly-Buck. Two +6-V outputs generated from the Fly-Buck transformer are
converted to +5-V outputs, each using two different LDOs. The +5V_VCC1 is used to power the
measurement circuit for the current-shunt approach and the relay. The +5V_VCC2 is used to power the
measurement circuit for the resistive divider approach.
15 V Nominal
(10 V to 20 V)
LDO
5V_VCC1
LDO
5V_VCC2
Fly-buck
3V3 Pri
(non-iso)
Figure 17. Scheme for Power Supply Section
Table 3 shows the total power consumption calculation for the design.
Table 3. Calculation of Power for Each Onboard Device
NAME OF THE IC
POWER
SUPPLY
USED
MAX CURRENT
TAKEN BY IC
(IN A)
SUPPLY
VOLTAGE
(IN V)
POWER
CONSUMPTION
(IN W)
1
INA333
5V_VCC(2)
0.01
5
0.05
2
AMC1200
(resistive divider
approach) primary
5V_VCC(2)
0.065
5
0.325
3
AMC1200 (500-V
DC sensing)
primary
5V_VCC(2)
0.065
5
0.325
4
INA225
5V_VCC(1)
0.03
5
0.15
5
AMC1200 (current
shunt approach)
primary
5V_VCC(1)
0.065
5
0.325
6
TS5A23157
5V_VCC(1)
0.02
5
0.1
7
ISO7640FM
secondary
5V_VCC(1)
0.04249
5
0.21245
8
Relay
5V_VCC(1)
0.08
5
0.4
9
AMC1200
(resistive divider
approach)
secondary
3V3_Pri (noniso)
0.06
3.3
0.198
10
AMC1200 (current
shunt approach)
secondary
3V3_Pri (noniso)
0.06
3.3
0.198
11
AMC1200 (500-V
DC sensing)
secondary
3V3_Pri (noniso)
0.06
3.3
0.198
12
ISO7640FM
primary
3V3_Pri (noniso)
0.0063749
3.3
0.02103717
SR.
NO.
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TOTAL
OUTPUT
CURRENT
(IN A)
SELECTED LDO
SHOULD HAVE
OUTPUT
CURRENT OF
0.14
0.15
0.23749
0.25
0.02103717
0.2
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Circuit Design
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For the calculation of individual devices, refer to the specific datasheet. Table 4 shows the selection of
LDOs, which is based on the output currents and the power levels required.
Table 4. Final Selection of LDOs
LDO SELECTION
6.5
POWER SUPPLY
NAME ON BOARD
INPUT
VOLTAGE
OUTPUT
VOLTAGE
OUTPUT
CURRENT
5V_VCC(1)
6
5
0.25
TLV1117-50
8 SON
5V_VCC(2)
6
5
0.15
LP2985A-50
SOT-23
3V3
15 (20 V max)
3.3
3.3
–
–
PART NUMBER
PACKAGE
Design of Fly-Buck Power Supply Using LM5160
The primary goal of this design is to provide a high-performance, cost-effective, and easy-to-design
isolated power supply solution. The Fly-Buck is basically a buck regulator with couple windings added to
the inductor. The coupled windings can generate isolated outputs. View more details about this topology in
Appendix A—Fly-Buck Power Supply.
6.5.1
Setting the Primary Side Output Voltage
The primary-side regulation (PSR) of the Fly-Buck topology is realized through the coupled winding of the
transformer, as the primary output clamps the secondary outputs during the duty-off time. Setting the
primary output is the first step in a Fly-Buck converter design. Having the duty cycle below 50% is optimal
because the Fly-Buck secondary outputs transfer the energy in off-time; and having a duty cycle too high
affects the energy flow. Based on VPRI = D × VIN, the primary side output is initially set at 3.3 V, which
gives 33% of D at the minimum of VIN = 10 V. Then the secondary-to-primary turns ratio of the transformer
can be estimated as N = VSEC / VPRI = 1.91, and the primary-side average current at full-load is roughly
iopri + 2(N × iosec) = 1.155 A, accounting for a 250-mA current on each of the secondary outputs. These
parameters must be tuned and adjusted during the design process. In the final design, the primary output
voltage is settled at 3.3 V, as Figure 18 shows.
4 T1
11
3
12
15
fsw = 250kHz
3
R49
J5
VIN+
GND
2
1
C28
10µF
5
145k
C29
0.1µF
4
282834-2
6
R51
19.6k
Vin(nom) = 15V DC
Vin range = 10V to
20V DC
BST
RON
SW
SW
EN/UVLO
FPWM
SS
VCC
C11
0.01µF
1
2
13
GND
VIN
FB
AGND
PGND
PAD
GND
8
750342773
SW
U6
R46
126k
10
C22
0.01µF
12
11
SW
7
R48
35.2k
9
C24
3V3
R50
12.7k
0.01µF
C31
1000pF
C32
22µF
C33
22µF
8
D6
Green
R52
20.0k
C34
1µF
V(PRI)
R1
1.00k
1
10BQ040TRPBF
2
D4
LM5160ADNTR
2ms Soft Start
GND
GND
GND
GND
GND
Figure 18. Primary Section of Fly-Buck Using LM5160
6.5.2
Transformer Design
The desirable transformer turns ratio is calculated based on the secondary-to-primary output ratio, which
is 1.91:1. The rectifier diode forward voltage and winding data capture record (DCR) drop must be taken
into account. The turns-ratio also has a certain granularity limit subject to the actual winding turn count. To
accommodate that granularity limit, adjust the primary output voltage accordingly.
The primary side inductance determines the current ripple in the transformer. The LM5160 device limits
the peak current to approximately 2.1 A, and from the estimated 1.155-A average current level, there is
plenty of ripple margin.
16
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The transformer used in this design is built with an EPW15-core through-hole package by Wurth
Elektronik and the part number is 750342773. The transformer specification has a secondary-to-primary
turns ratio of 1.91:1, and both the secondary windings have the same turn count. The primary inductance
is 60 μH. Figure 19 shows the symbol for this transformer. The following list shows the isolation levels:
1. Between primary and secondary: Creepage (9.2 mm) and clearance (8 mm)
2. Between primary and secondary: 1.5-kV AC, one-minute isolation (dielectric rating) between primary
and secondary
3. Isolation between primary and secondary pass: 7.4 kV impulse test voltage (1.2/50 µsec)
4. Isolation between two secondaries: Clearance (5.5 mm) and type test = 1.8 kVRMS
4
11
SEC
6V
0.4 A
PRI
3
12
15
SEC
6V
0.4 A
8
Figure 19. Fly-Buck Transformer Symbol
6.5.3
Shutdown Function
The LM5160 has an undervoltage lock out (UVLO) pin for the low voltage shutdown, which can be utilized
as an enable function pin. External circuitry can be used to pull the UVLO pin to ground to shut down the
operation of the power supply.
6.5.4
Generating the Output Voltages
The total output voltage from the secondary winding is 6 V on each winding. Figure 20 shows the
secondary section of the schematic.
6V_VCC1
D2
10BQ040TRPBF
C16
4 T1
11
3
12
C17
10µF
1µF
15
GND2
C21
6V_VCC2
10µF
8
750342773
D3
10BQ040TRPBF
C23
1µF
Figure 20. Secondary Section of Fly-Buck Using LM5160
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Generating 5V_VCC1 and 5V_VCC2
Each of the rails from the two isolated, 6-V rails (generated from the LM5160 Fly-Buck section) are
converted to 5 V by using two fixed output linear regulators TLV1117-50 and LP2985A-50.
The TLV1117-50 is a fixed, 5-V output, LDO regulator designed to provide up to 800 mA of output current.
A 0.1-uF cap and a 1-uF cap are connected on both the input as well as the output sides of the LDO. The
light-emitting diode (LED) D7 indicates when the +5V_VCC1 is available. Figure 21 shows the schematic
capture for the TLV1117-50 section.
6V_VCC1
D2
U7
2
3
4
8
10BQ040TRPBF
C16
C17
10µF
1µF
C18
0.1µF
5V_VCC1
5V_VCC1
5
6
7
9
R53
1.00k
C19
0.1µF
TLV1117-50IDRJR
C20
1µF
1
11
VOUT
VOUT
VOUT
VOUT
GND
1
4 T1
VIN
VIN
VIN
NC
3
D7
Green
12
2
15
GND1
8
750342773
GND1
Figure 21. TLV1117-50 for 5V_VCC1
LP2985A-50 is a fixed 5-V output, LDO regulator designed to provide up to 150 mA of output current. A
0.1-uF cap and a 1-uF cap are connected on both the input as well as the output sides of the LDO. The
D8 LED indicates when the +5V_VCC2 is available. Figure 22 shows the schematic capture for the
LP2985A-50 section.
4 T1
11
3
12
15
GND2
C21
6V_VCC2
10µF
8
750342773
D3
U8
1
10BQ040TRPBF
R47 0 3
C23
OUT
ON/OFF
CBYP
GND
5V_VCC2
5V_VCC2
5
4
LP2985AIM5-5.0
C30
1000pF
C26
0.1µF
R54
1.00k
C27
1µF
1
2
1µF
C25
0.1µF
IN
GND2
2
D8
Green
GND2
Figure 22. LP2985A-50 for 5V_VCC2
18
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6.7
Design of Flyback Power Supply Using UCC28711 (TIDA-00440DB Daughter Board)
6.7.1
Requirements of the Power Supply
The requirements of the main isolated power supply to be used in insulation measurement are as follows:
1. Input range: 150-V DC to 800-V DC
2. Output voltage: 500-V DC
3. Output current: 2 mA (max)
4. < 1% output ripple voltage
5. Isolation: Functional
6. Regulation: < 5%
7. Size: As compact as possible
8. Controller must be able to shut down the power supply when a measurement is not made
6.7.2
Circuit Design
To translate the Section 6.7.1 Requirements of Power Supply to the sub-system level, Section 6.7.2.1
through Section 6.7.2.3 lists the requirements of the PWM controller, MOSFETs, and transformer.
6.7.2.1
PWM Controller
Because a ±5% regulation is acceptable, a PSR controller is feasible for this task. The primary-side
feedback eliminates the requirement of using optocoupler feedback circuits. A device with discontinuous
conduction mode with valley switching can minimize switching losses. The UCC28711 is a suitable
controller for this application. The UCC28711 device is a flyback power-supply controller, which provides
accurate voltage and constant current regulation with primary-side feedback. The modulation scheme is a
combination of frequency and primary peak-current modulation to provide high conversion efficiency
across the load range. The controller has a maximum switching frequency of 106 kHz and allows for a
shut-down operation using the NTC pin.
6.7.2.2
Transformer Design
The transformer design has the following specifications:
1. Input: 100-V DC to 850-V DC
2. Frequency: 70 kHz (min)
3. Ambient temperature: 60°C (max)
4. Output: Split into two secondaries – each of 250-V DC at 25 mA
5. Max. operating duration: 30 min
6. Topology: Flyback (DCM)
7. Controller to be used: UCC28711
8. Preferred core size: EE16 (EE16 core is required due to winding accommodation)
9. Insulation: Functional
10. Auxiliary winding: 15 V at 30 mA
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Figure 23 shows the symbol for this transformer. The transformer used in this design is built with a
EE16-core through-hole package by Wurth Elektronik, and the part number is 750342792. The
transformer specification has a secondary-to-primary turns ratio of 2.88:1, and both the secondary
windings have the same turn count. The secondary-to-auxiliary turns ratio is 15.76:1. The primary
inductance is 736 μH.
1
5
PRI
100-V DC to
580-V DC
70 kHz
SEC 1
250-V DC
25 mA
2
6
3
7
AUX
15-V DC
30 mA
SEC 2
250-V DC
25 mA
8
4
Figure 23. Fly-Buck Transformer Symbol
6.7.2.3
Power MOSFET
The power MOSFET must have a rated drain to source voltage VDS ≥ 1100 V to support an 800-V DC
input and the power MOSFET must also support a 0.25-A (minimum) drain current. This reference design
uses the IXTA06N120P, which is a 1200-V device with a drain current of 0.6 A.
6.7.2.4
Primary-Side Regulation
In primary-side control, the output voltage is sensed on the auxiliary winding during the transfer of
transformer energy to the secondary. Appendix B—PSR Flyback Power Supply provides more details on
the component selection.
Figure 24 shows the schematic section of the primary feedback.
VDD
D8
D9
VFB
R6
6.80k
D-1N4002
A
2
1N4937-E3
600V
LD1
Green
C4
10 µF
C5
1µF
C
D10
1N4937-E3 R7
100
600V
R8
43.0k
1
C6
1000pF
PGND
U1
PGND
1
PGND
VDD
2
NTC
HV
8
VS
3
4
NTC
DRV
GND
CS
6
5
UCC28711D
R13
15.0k
PGND
Figure 24. Primary Feedback
20
Leakage Current Measurement Reference Design for Determining Insulation
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The output overvoltage function is determined by the voltage feedback on the VS pin. If the voltage
sample on VS exceeds 115% of the nominal VOUT, the device stops switching and also stops the internal
current consumption of IFAULT. Stopping the internal current consumption of IFAULT discharges the VDD
capacitor to the UVLO turn-off threshold. After this discharge, the device returns to the start state and a
start-up sequence ensues.
Protection is included in the event of component failures on the VS pin. If complete loss of feedback
information on the VS pin occurs, the controller stops switching and restarts.
6.7.2.5
Current Sensing
For this reference design, a 0.75-Ω resistor is selected based on a nominal maximum current-sense signal
of 0.75 V. Figure 25 shows the current sense circuit of the schematic.
U1
3
4
VDD
HV
8
HV_START
4
2
VS
NTC
DRV
GND
CS
6
5
R10
Q1
IXTA06N120P
1
10
R12
10k
3
1
UCC28711D
PGND
R14
390
R15
0.75
C7
5100pF
PGND
Figure 25. Current Sense
6.7.2.6
Power-On and HV Start-Up
Figure 26 shows the power-on sequence for the UCC28711 device. When the VDD pin of the UCC28711
reaches the VVDD_ON threshold, the device generates three initial drive pulses for the MOSFET. These drive
pulses turn on the PWM controller with the help of a high-voltage startup (HV) pin.
VVDD_ON = 21 V
VVDD
3 Initial DRV Pulses After VDD(ON)
VVDD_OFF = 8 V
DRV
0V
Figure 26. Power-On Sequence
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The UCC28711 device has an internal 700-V startup switch. Because the DC bus can be as high as
800-V DC, an external Zener voltage regulator is used to limit the voltage at the HV pin to about
550-V DC. The typical startup current is approximately 300 μA, which provides fast charging of the VDD
capacitor. The internal HV startup device is active until VDD exceeds the turn-on UVLO threshold of 21 V,
at which time the HV startup device is turned off. In the off state, the leakage current is very low to
minimize standby losses of the controller. When the VDD falls below the 8.1-V UVLO turn-off threshold,
the HV startup device is turned on. Figure 27 shows the HV startup circuit.
JD1
1
2
D1
DC+
61300211121
1N4007
1000V
R1
470k
C1
0.22µF
R2
470k
PGND
R3
470k
R5
470k
HV_START
D6
P4KE550
PGND
Figure 27. HV Startup
6.7.2.7
MOSFET Gate Drive
The DRV pin of the UCC28711 device is connected to the MOSFET gate pin through a series resistor.
The gate driver provides a gate drive signal limited to 14 V. The turnon characteristic of the driver is a
25-mA current source, which limits the turnon dv/dt of the MOSFET drain. This characteristic reduces the
leading-edge current spike, but still provides a gate drive current to overcome the Miller plateau. The gatedrive turnoff current is determined by the low-side driver RDS_ON and any external gate-drive resistance.
Figure 28 shows the gate drive for MOSFET.
U1
3
4
HV
8
HV_START
4
2
VDD
VS
NTC
DRV
GND
CS
6
5
R10
Q1
IXTA06N120P
1
10
R12
10k
3
1
UCC28711D
PGND
Figure 28. MOSFET Gate Drive
22
Leakage Current Measurement Reference Design for Determining Insulation
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6.7.2.8
Shutdown Mechanism for UCC28711
The NTC pin of the UCC28711 device can be pulled down to shut down the PWM operation of the device.
Figure 29 shows the isolated shutdown mechanism for the UCC28711 using an optocoupler. In situations
that do not require measuring the insulation resistance, use a SHUTDOWN signal coming from any
available MCU in the application to shut off the 500-V DC output.
R9
NTC
100
U2
J1
2
1
1
4
2
3
R11
100k
61300211121
ACPL-217-56AE
GND
PGND
PGND
Figure 29. Isolated Shutdown for UCC28711
6.7.2.9
Generating Isolated 500-V DC Output
The two secondary windings of the transformer produce 250 V each while regulating. To generate 500 V,
use a simple voltage doubler, as Figure 30 shows. In the case of a no-load condition, or during any
abnormal condition, if the output tries to go much higher, a 550-V Zener (connected across the output)
protects the output from going out of regulation.
D3
1
PRI
VFB
T1
GP02-30-E3/73
3kV
R18
1.02M
5
SEC1
2
3
AUX
6
7
SEC2
4
8
C3
0.47µF
R16
0
D4
C9
0.47µF
D7
P4KE550
GP02-30-E3/73
3kV
R19
1.02M
750342792
C8
0.47µF
PGND
GND_ISO
Figure 30. Generation of 500-V Output Using Voltage Doubler
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Applications
7
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Applications
Insulation measurement is important for a number of applications. Some of the applications include
transformers, solar inverters, industrial motor drives (variable speed AC/DC drives, servo drives), and so
forth. Figure 31 and Figure 32 show two of these applications.
Connect to any
one terminal
T1
T2
TIDA-00440
Earth
Figure 31. Measurement of Insulation Resistance for HV Transformer
xxHP30
ACIM
Frame
Earth
F
T1
T2
T3
Connect to any
one terminal
Connect to
motor frame
TIDA-00440
Figure 32. Measurement of Insulation Resistance for Motor
24
Leakage Current Measurement Reference Design for Determining Insulation
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8
Test Data
The design is tested in all three configurations as explained in the following Section 8.1 through
Section 8.3.
8.1
Multiple-Shunt Approach
As Section 5.1.2 explains, based on the insulation resistance, different shunt resistor values may be
required. To implement this change, resistors R11, R12, and R13 are switched using MOSFETs Q1 and
Q2. Figure 33 shows the measurement accuracy for this approach.
1.2%
0.9%
Accuracy
0.6%
0.3%
0
-0.3%
-0.6%
-0.9%
-1.2%
0x100
20x106
40x106
60x106
Insulation Resistor (Ω)
80x106
100x106
Figure 33. Accuracy for Multiple Switchable Shunt Approach
As Table 5 shows, the shunt resistor value changes on-the-fly (using SW1 and SW2 signals), while the
output of the AMC1200 must not go below 200 mV at any time.
1. For an insulation resistance between 0 Ω and 3 MΩ, the value of shunt resistor is 220 kΩ || 2.7 kΩ ||
261 Ω || 28.02 kΩ.
2. For an insulation resistance between 3.1 MΩ and 39.6 MΩ, the value of shunt resistor is 220 kΩ ||
2.7kΩ || 28.02 kΩ.
3. For an insulation resistance between 39.7 MΩ and 98.4 MΩ, the value of shunt resistor is 220 kΩ ||
28.02 kΩ.
The accuracy graph in Figure 33 highlights the three options using different colors.
One important point to note here is the 28.02-kΩ resistance in parallel with each of the combinations,
which is the input impedance of the AMC1200 device. The accuracy numbers are calibrated and account
for the change in input impedance of the AMC1200.
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Table 5. Accuracy and Measurement Table for Multiple-Shunt Approach
(1)
26
INSULATION
RESISTOR (IN MΩ)
% ACCURACY
(UNCALIBRATED)
MEASURED OUTPUT W/O
INA
0.00E+00
0.41%
1.9014
9.98E+03
0.41%
1.8642
9.97E+04
0.70%
1.5844
6.00E+05
0.51%
0.86354
9.89E+05
0.84%
0.63813
2.25E+06
0.91%
0.346
3.00E+06
0.16%
0.27282
5.99E+06
0.12%
1.489
8.97E+06
0.45%
1.02242
1.53E+07
0.58%
0.6148
2.24E+07
0.60%
0.42361
2.99E+07
0.47%
0.31913
3.96E+07
0.03%
0.24146
4.96E+07
–10.07%
–0.37%
(calibrated)
1.9842
1.8169
(calibrated)
5.93E+07
–10.24%
–0.80%
(calibrated)
1.6618
1.5159
(calibrated)
6.92E+07
–9.99%
–0.76%
(calibrated)
1.4254
1.3006
(calibrated)
7.90E+07
–10.02%
–0.96%
(calibrated)
1.2496
1.138
(calibrated)
8.87E+07
–10.08%
–1.14%
(calibrated)
1.1142
1.01292
(calibrated)
9.84E+07
–9.23%
–1.18%
(calibrated)
1.0049
0.9122
(calibrated)
(1)
VALUE OF SHUNT RESISTOR
220 kΩ || 2.7 kΩ || 261 Ω || 28.02 kΩ
220 kΩ || 2.7 kΩ || 28.02 kΩ
220 kΩ || 25.75 kΩ
The accuracy numbers are calibrated and take care of the change in input impedance of the AMC1200.
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8.2
Single-Shunt Approach
As Section 5.1.1 explains, the circuit can also be tested with a single shunt resistor. Figure 34 shows the
accuracy results for a single-shunt approach.
-1%
-1.5%
Accuracy
-2%
-2.5%
-3%
-3.5%
-4%
-4.5%
0x100
20x106
40x106
60x106
Insulation Resistor (Ω)
80x106
100x106
Figure 34. Accuracy for Single-Shunt Approach
As Table 6 shows, the shunt resistor value is fixed at 22 Ω. In this method, the gain of INA225 varies
on-the-fly. The accuracy graph in Figure 34 shows both of the gain settings highlighted with different
colors.
Table 6. Accuracy and Measurement Table for Single-Shunt Approach
INSULATION RESISTOR
(IN MΩ)
% ACCURACY
(UNCALIBRATED)
MEASURED O/UTPUT W/O INA
6.00E+05
–3.26%
1.9371
9.89E+05
–1.82%
1.4515
2.25E+06
–1.73%
0.78564
3.00E+06
–1.66%
0.61874
5.99E+06
–1.78%
0.333
8.97E+06
–1.44%
0.229
1.53E+07
–2.43%
1.089
2.24E+07
–2.55%
0.749
2.99E+07
–2.68%
0.564
3.96E+07
–3.17%
0.425
4.96E+07
–3.26%
0.34
5.93E+07
–3.51%
0.284
6.92E+07
–3.74%
0.243
7.90E+07
–3.75%
0.213
8.87E+07
–4.21%
0.189
9.84E+07
–4.47%
0.17
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VALUE OF SHUNT
RESISTOR
22 Ω (INA225 gain = 25 V/V)
22 Ω (INA225 gain = 200 V/V)
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Test Data
8.3
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Resistive Divider Approach
As Section 5.2 explains, the circuit has an option to measure the insulation resistance using the resistive
divider approach. Figure 35 shows the accuracy results using the resistive divider approach,
Accuracy (Callibrated)
0.2%
0
-0.2%
-0.4%
-0.6%
0x100
5x106
10x106
15x106
Insulation Resistance (Ω)
20x106
Figure 35. Accuracy for Resistive Divider Approach
As Table 7 shows, the % accuracy is < 1% for a range of 0 Ω to 22.49 MΩ, but the measured output is
almost 3 mV to 4 mV different from the previous value. This difference in value means that a highresolution ADC is required when using the resistive divider approach.
Table 7. Accuracy and Measurement Table for Resistive Divider Approach
INSULATION RESISTOR (IN MΩ)
MEASURED OUTPUT VOLTAGE (IN V)
% ACCURACY (CALIBRATED)
10000
0.0253
-0.56%
100000
0.20254
-0.09%
600000
0.65263
-0.15%
990000
0.79271
-0.11%
2250000
0.97345
0.02%
3000000
1.0186
0.01%
6000000
1.09569
0.06%
9000000
1.1235
0.03%
14100000
1.14537
0.08%
15300000
1.14847
0.09%
22490000
1.1599
0.09%
To summarize the accuracy graphs, the multiple-shunt approach provides good accuracy with the entire
range covered for the insulation resistance.
28
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8.4
Testing Fly-Buck Power Supply
Figure 36 shows the switch node waveform at VIN = 15 V and Figure 37 shows the voltage output (3.3 V)
from the non-isolated primary side of the Fly-Buck converter.
Figure 36. Switch Node Waveform at VIN = 15 V
Figure 37. 3.3-V Waveform on Primary Side of LM5160 Fly-Buck Design
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Test Data
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Figure 38 shows the voltage output (6V_VCC1) from the isolated secondary side of the Fly-Buck
converter. Figure 39 shows the 5V_VCC1 derived from 6V_VCC1 using the TLV1117-50 device.
Figure 38. 6V_VCC1 Waveform
Figure 39. 5V_VCC1 Waveform
30
Leakage Current Measurement Reference Design for Determining Insulation
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Figure 40 shows the voltage output (6V_VCC2) from the isolated secondary side of the Fly-Buck
converter. Figure 41 shows the 5V_VCC2 derived from 6V_VCC2 using the LP2985A-5.0 device.
Figure 40. 6V_VCC2 Waveform
Figure 41. 5V_VCC2 Waveform
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Test Data
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Now view the ripple voltage on each of the outputs. Figure 42 shows the ripple measured on a 3.3-V
output on the primary side of the Fly-Buck converter.
Figure 42. Ripple Measured on 3.3-V Output
32
Leakage Current Measurement Reference Design for Determining Insulation
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Figure 43 and Figure 44 show the ripple on 6V_VCC1 and 5V_VCC1 respectively.
Figure 43. Ripple Measured on 6V_VCC1 Output
Figure 44. Ripple Measured on 5V_VCC1 Output
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Test Data
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Figure 45 and Figure 46 show the ripple on 6V_VCC2 and 5V_VCC2 respectively.
Figure 45. Ripple on 6V_VCC2 Output
Figure 46. Ripple Measured on 5V_VCC2 Output
34
Leakage Current Measurement Reference Design for Determining Insulation
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8.5
Testing TIDA-00440DB Flyback Power Supply
The flyback design was tested for line regulation at no-load condition and at a load of 1.5 mA. Figure 47
shows the regulation during no-load condition:
0.4%
0.3%
0.2%
Regulation
0.1%
0
-0.1%
-0.2%
-0.3%
-0.4%
-0.5%
-0.6%
100
200
300
400
500
Input Voltage (V)
600
700
800
Figure 47. Line Regulation at No Load
Regulation
Figure 48 shows the regulation with a load of 1.5 mA:
1.15%
1.1%
1.05%
1%
0.95%
0.9%
0.85%
0.8%
0.75%
0.7%
0.65%
0.6%
0.55%
0.5%
0.45%
0.4%
0.35%
100
200
300
400
500
Input Voltage (V)
600
700
800
Figure 48. Line Regulation at Load = 1.5 mA
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Figure 49 shows the output ripple at the no-load condition.
Figure 49. Output Ripple Waveform at No-Load
Figure 50 shows the output ripple at a load current of 1.5 mA.
Figure 50. Output Ripple Waveform at Load = 1.5 mA
36
Leakage Current Measurement Reference Design for Determining Insulation
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8.6
Testing With 2HP 3-Ph AC Induction Motor
As Figure 51 shows, the TIDA-00440 reference design was tested with a motor. The insulation resistance
measurement takes place between one of the motor terminals (yellow wire in this example ), and the
frame of the motor (black wire). Figure 52 shows a zoomed-in version of the motor section. The motor
used for this experiment is a 2-hp, three-phase AC induction motor. The insulation resistance of this motor
(measured with high-resistance measurement equipment from Keithley) is 547 MΩ.
For the sake of measurement, one 100-MΩ resistance is connected in parallel with the motor insulation.
The parallel combination is measured with the TIDA-00440 device. After doing this check, the insulation
resistance is 547 MΩ || 100 MΩ = 84.54 MΩ (theoretically). Table 8 shows the actual values of insulation
resistance measured with the single-shunt approach and the multiple-shunt approach.
Table 8. Insulation Resistance Measured With Motor
TEST CONDITION
Single-shunt approach (INA225 gain = 200, RSHUNT = 22 Ω)
Multiple-shunt approach (RSHUNT = 220 kΩ || 2.7 kΩ || 261 Ω),
MUX = 1, removed 10-Ω resistors from the front filter of
INA225)
Figure 51. Motor Used for Testing TIDA-00440
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VOLTAGE OUTPUT
MEASURED
CORRESPONDING INSULATION
RESISTANCE
0.20953 V
83.497 MΩ
1.154 V
85.65 MΩ
Figure 52. Zoomed-In Photo of of Motor Used for Testing
TIDA-00440
Leakage Current Measurement Reference Design for Determining Insulation
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37
Design Files
9
Design Files
9.1
Schematics
www.ti.com
To download the schematics for each board, see the design files at http://www.ti.com/tool/TIDA-00440.
9.2
Bill of Materials
To download the bill of materials (BOM), see the design files at http://www.ti.com/tool/TIDA-00440.
9.3
PCB Layout Recommendations
An important thing to note is that the design contains high voltages up to 500 V and 800 V. The layout
must be done with extreme care.
9.3.1
Layout Recommendations for TIDA-00440MB
The total size of the main board is 124.46 mm x 110 mm. Banana jacks J1 and J2 are used for an input
voltage of 150-V DC to 800-V DC. J3 and J4 are used to connect the insulation resistance. Figure 53
shows how the clearances are provided on the PCB for the isolations.
Figure 53. Clearance for Isolation
9.3.2
Layout Recommendations for LM5160 Fly-Buck Power Supply
A proper layout is essential for optimum performance of the circuit. Figure 54 shows the layout of the
LM5160 Fly-Buck section.
Figure 54. Layout for Fly-Buck Power Supply Section
38
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In particular, the following guidelines must be observed:
• The loop consisting of the input capacitor, VIN pin, and PGND pin carries the switching current.
Therefore, the input capacitor must be placed close to the IC, directly across the VIN and PGND pins.
The connections to these two pins must be direct to minimize the loop area. In general, placing all of
the input capacitances near the IC is not a possibilty. A good practice is to use a 0.1- to 0.47-μF
capacitor directly across the VIN and PGND pins as close as possible to the IC with the remaining bulk
capacitor.
• The VCC and bootstrap (BST) bypass capacitors supply switching currents to the high and low-side
gate drivers. These two capacitors must also be placed as close to the IC as possible, and the
connecting trace length and loop area must be minimized.
• The feedback trace carries the output voltage information and a small ripple component that is
necessary for proper operation of the LM5160 device. Therefore, take care while routing the feedback
trace to avoid coupling any noise into the feedback (FB) pin. In particular, the feedback trace must not
run close to magnetic components, or parallel to any other switching trace.
• SW trace: The SW node switches rapidly between VIN and GND every cycle and is therefore a source
of noise. The SW node area must be minimized. In particular, the SW node must not be inadvertently
connected to a copper plane or pour.
Figure 55 shows a zoomed-in image of components near the LM5160 device.
Figure 55. Component Placements Near LM5160
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Design Files
9.3.3
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Layout Recommendations for TIDA-00440DB
A good layout is critical for proper functioning of the power supply. Figure 56 shows the overall layout of
the daughter board. The total size of the daughter board is 75 mm x 52 mm.
Some critical points to note for the UCC28711 device are:
1. The loop of the current sense resistor, power MOSFET, transformer, and input bulk cap must be as
small as possible (see Figure 57).
2. There must be a single point ground for the controller IC.
3. The control ground and power ground must be connected at a single point, which is the input bulk
capacitor (see Figure 58 and Figure 59).
Figure 56. Layout for TIDA-00440DB
Figure 57. Power Loop Shown With White Line
40
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Figure 58. Single-Point Ground (Bottom Layer)
Figure 59. Single-Point Ground (Top Layer)
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Design Files
9.4
www.ti.com
Layout Prints
To download the layout prints for each board, see the design files at http://www.ti.com/tool/TIDA-00440.
9.5
Altium Project
To download the Altium project files, see the design files at http://www.ti.com/tool/TIDA-00440.
9.6
Gerber Files
To download the Gerber files, see the design files at http://www.ti.com/tool/TIDA-00440.
9.7
Assembly Drawings
To download the assembly drawings, see the design files at http://www.ti.com/tool/TIDA-00440.
9.8
Software Files
To download the software files, see the design files at http://www.ti.com/tool/TIDA-00440.
10
References
1. IEEE.org, IEEE Standards Association, 43-2000 - IEEE Recommended Practice for Testing Insulation
Resistance of Rotating Machinery
2. Chafai, Mahfoud; Refoufi, Larbi; Bentarzi, Hamid; Signals and Systems Laboratory (SisyLab),
Medium Induction Motor Winding Insulation Protection System Reliability Evaluation and Im provement
Using Predictive Analysis , DGEE, FSI, University of Boumerdes, Algeria
11
About the Author
SANJAY PITHADIA is a Systems Engineer at Texas Instruments where he is responsible for developing
subsystem design solutions for the Industrial Motor Drive segment. Sanjay has been with TI since 2008
and has been involved in designing products related to Energy and Smart Grid. Sanjay brings to this role
his experience in analog design, mixed signal design, industrial interfaces and power supplies. Sanjay
earned his Bachelor of Technology in Electronics Engineering at VJTI, Mumbai.
PAWAN NAYAK is a Systems Engineer at Texas Instruments where he is responsible for developing
reference design solutions for the Motor Drive segment within Industrial Systems. Pawan brings to this
role his experience in analog system design, mixed signal design and power supplies. Pawan earned his
Bachelor of Engineering in Electronics and Communication Engineering from Visvesvaraya Technological
University, India.
N. NAVANEETH KUMAR is a Systems Architect at Texas Instruments, where he is responsible for
developing subsystem solutions for motor controls within Industrial Systems. N. Navaneeth brings to this
role his extensive experience in power electronics, EMC, Analog, and mixed signal designs. He has
system-level product design experience in drives, solar inverters, UPS, and protection relays. N.
Navaneeth earned his Bachelor of Electronics and Communication Engineering from Bharathiar
University, India and his Master of Science in Electronic Product Development from Bolton University, UK.
42
Leakage Current Measurement Reference Design for Determining Insulation
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Appendix A—Fly-Buck Power Supply
The Fly-Buck is basically a buck regulator with couple windings added to the inductor. The coupled
windings can generate isolated outputs. The physical appearance of the Fly-Buck resembles a
combination of a buck and flyback converter, hence the name Fly-Buck (Figure 60). The operation on the
primary side is similar to the buck, while the secondary side output is clamped by the primary output. The
Fly-Buck operation in a switching cycle can be divided into on-time and off-time, as Figure 61 shows.
Buck
VIN
Fly-Buck
+
+
-
VOUT
VSEC
VIN
N
=
VPRI
1
Figure 60. From Buck to Fly-Buck
VDA
VSEC
VIN
iOSEC
N
VDA
VPRI
iPRI
iOSEC
ISEC
N
iGND
1
VSW
VSEC
VIN
VSW
iOPRI
1
VPRI
iPRI
GND
a) During TON
iGND
iOPRI
GND
b) During TOFF
Figure 61. The Fly-Buck in ON and OFF time
During TON, the rectifier diode is in reverse bias, so the secondary side is cut off from the primary. The
primary side operates similarly as it does in a buck regulator; the transformer primary current rises linearly.
The primary output voltage is Vpri = D × VIN. During TOFF, the diode is forward biased and conducts. The
current can flow in the primary and secondary side simultaneously; however, the magnetizing current in
the transformer is still in the triangle waveform, which can be calculated as the combination of the primary
and secondary winding current as defined by Equation 2:
i m = i PRI + NiSEC
(2)
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The primary side output clamps the secondary output voltage, VSEC = N × VPRI. View the steady-state
operation waveforms of a Fly-Buck in Figure 62.
VIN
VSW
GND
t
TON
TOFF
VSEC
VDA
t
iGND
-n(VIN-VPRI)
im=iPRI+NiSEC
iOPRI+niOSEC
iPRI
iOPRI
iSEC
t
t
iOSEC
0A
t
Figure 62. Fly-Buck Operation Waveform
From the preceding analysis, the magnetizing current ripple can be derived as Equation 3:
V
1- D
Di m = PRI
LPRI f SW
where
•
•
•
LPRI = Primary inductance
D = TON / (TON + TOFF) = Duty cycle
fSW = Switching frequency
(3)
Equation 4 calculates the peak current of the primary side as:
1
1
i m _ PEAK = i m + Di m = i opri + (N ´ i o sec ) + Di m
2
2
where
•
•
iopri = Average primary output current
iosec = Average secondary output current
(4)
If multiple outputs are involved, each secondary output must be converted to the primary side by
multiplying the corresponding turns-ratio — Equation 2 is still applicable.
44
Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
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Appendix B—PSR Flyback Power Supply
The UCC28711 is a PSR flyback controller. In primary-side control, the output voltage is sensed on the
auxiliary winding during the transfer of transformer energy to the secondary. To achieve an accurate
representation of the secondary output voltage on the auxiliary winding, the discriminator (inside
UCC28711) reliably blocks the leakage inductance reset and ringing, continuously samples the auxiliary
voltage during the down slope after the ringing is diminished, and captures the error signal at the time the
secondary winding reaches zero current. The internal reference on VS is 4.05 V; and VS is connected to a
resistor divider from the auxiliary winding to the ground. The output-voltage feedback information is
sampled at the end of the transformer secondary-current demagnetization time to provide an accurate
representation of the output voltage. Timing information to achieve valley switching and to control the duty
cycle of the secondary transformer current is determined by the waveform on the VS pin. TI does not
recommend to place a filter capacitor on this input, which would interfere with accurate sensing of this
waveform. The VS pin senses the bulk-capacitor voltage to provide for AC-input run and stop thresholds.
The VS pin also compensates the current-sense threshold across the AC-input range. The VS pin
information is sensed during the MOSFET on-time. For the AC-input run or stop function, the run threshold
on VS is 225 μA and the stop threshold is 80 μA. A wide separation of run and stop thresholds allows
clean startup and shutdown of the power supply with the line voltage. The values for the auxiliary voltage
divider upper-resistor RS1 and lower-resistor RS2 can be determined by Equation 5 and Equation 6.
VIN _ RUN
RS1 =
NPA ´ I VSL _ RUN
where
•
•
•
RS2 =
NPA is the transformer primary-to-auxiliary turns ratio
VIN_RUN is the converter input start-up (run) voltage
IVSL_RUN is the run threshold for the current pulled out of the VS pin during the MOSFET on-time (equal to 220
μA max from the UCC28711 data sheet)
(5)
NAS
RS1 ´ VVSR
´ (V OCV + VF ) - VVSR
where
•
•
•
•
•
VOCV is the regulated output voltage of the converter
VF is the secondary rectifier forward voltage drop at near-zero current
NAS is the transformer auxiliary-to-secondary turns ratio
RS1 is the VS divider high-side resistance
VVSR is the CV regulating level at the VS input (equal to 4.05 V typical from the UCC28711 data sheet)
(6)
The UCC28711 device operates with cycle-by-cycle primary-peak current control. The normal operating
range of the CS pin is 0.78 V to 0.195 V. There is additional protection if the CS pin reaches 1.5 V, which
results in a UVLO reset and restart sequence. The current-sense (CS) pin is connected through a series
resistor (RLC) to the current-sense resistor (RCS). The current-sense threshold is 0.75 V for IPP_MAX and
0.25 V for IPP_MIN. The series resistor RLC provides the function of feed-forward line compensation to
eliminate any change in IPP due to change in di/dt and the propagation delay of the internal comparator
and MOSFET turnoff time. There is an internal leading-edge blanking time of 235 ns to eliminate
sensitivity to the MOSFET turn-on current spike. The value of RCS is determined by the target output
current in constant-current (CC) regulation, as Equation 7 shows. The value of RLC is determined by
Equation 8.
V
´ NPS
RCS = CCR
´ hXFMR
2IOCC
where
•
•
•
•
•
RCS is the current sense resistor value
VCCR is the current regulation constant (equal to 330 mV typical from the UCC28711 data sheet)
NPS is the transformer primary-to-secondary turns ratio
IOCC is the target output current in constant-current regulation
ηXFMR is the transformer efficiency
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Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
(7)
45
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RLC =
KLC ´ RS1 ´ RCS ´ TD ´ NPA
LP
where
•
•
•
•
•
•
•
46
RLC is the line compensation resistor
RS1 is the VS pin high-side resistor value
RCS is the current-sense resistor value
TD is the current-sense delay including MOSFET turn-off delay (add 50 ns to the MOSFET delay)
NPA is the transformer primary-to-auxiliary turns ratio
LP is the transformer primary inductance
KLC is the current-scaling constant (equal to 25 A/A according to the data sheet of UCC28711)
Leakage Current Measurement Reference Design for Determining Insulation
Resistance
Copyright © 2015, Texas Instruments Incorporated
(8)
TIDU873A – April 2015 – Revised April 2015
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