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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 1, JANUARY 2013
Nonlinear Electrothermal GaN HEMT Model
Applied to High-Efficiency Power Amplifier Design
Justin B. King, Student Member, IEEE, and Thomas J. Brazil, Fellow, IEEE
Abstract—Gallium Nitride (GaN) high electron-mobility transistors (HEMTs) can operate at very high power-density levels,
which may cause a significant temperature rise in the transistor
channel. In addition, surface and substrate energy levels, or
“traps,” can cause strong dispersion effects from pulsed –
down to dc timescales. Such effects, for both simulation accuracy
and device reliability purposes, must be accounted for in any nonlinear device model. In this paper, a novel nonlinear high-power
GaN HEMT equivalent circuit electrothermal model is described.
Features of the model include a nonlinear thermal subnetwork
that is capable of capturing the well-known inherent nonlinear
thermal resistance and capacitance of GaN material. Also included
is a comprehensive dispersion model that can be extracted and
modeled from simple measurements. The model can very accurately predict the pulsed – curves at different pulse widths and
duty cycles from isothermal up to the safe-operating area limit.
Large-signal one-tone, two-tone, and frequency sweep tests show
excellent agreement with measurements. Finally, a continuous
class-F amplifier is fabricated, and large-signal frequency sweeps
are performed. Comparison between the measured and modeled
amplifier metrics demonstrate that the model remains accurate
over a 50% bandwidth under real-world conditions.
Index Terms—Electrothermal effects, equivalent circuits, gallium nitride (GaN), high-electron mobility transistors (HEMTs),
power amplifiers (PAs), thermal resistance.
I. INTRODUCTION
G
ALLIUM nitride (GaN) is often regarded as the most
promising semiconductor technology for high-frequency
and high-power applications [1]–[4]. While these unique properties of GaN were known as far back as the 1980s, it was only
in the early 1990s, due to the search for new LED technologies, that the ability to produce high-quality GaN material, necessary for the development of active devices, became a reality
[2]. These unique properties enable GaN to achieve an order
of magnitude improvement in power density when compared
with traditional compound semiconductors, such as gallium arsenide (GaAs) [5]. One such property is the high-breakdown
electric field
4 M V/cm due to the large bandgap inherent in AlGaN/GaN devices
3.4 eV [3]. This permits
a much larger voltage swing across the device output terminals
Manuscript received July 10, 2012; revised October 19, 2012; accepted October 23, 2012. Date of publication December 24, 2012; date of current version
January 17, 2013. This work was supported in part by Science Foundation Ireland. This paper is an expanded paper from the IEEE MTT-S International Microwave Symposium, Montreal, QC, Canada, June 17–22, 2012.
The authors are with the School of Electrical, Electronic and Communications Engineering, University College Dublin, 4 Dublin, Ireland (e-mail: justin.
king@ucd.ie; tom.brazil@ucd.ie).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TMTT.2012.2229712
compared with traditional technologies—which is necessary for
the design of certain classes of highly efficient power amplifiers
(PAs), such as the inverse [6] or continuous [7] class-F. In addition, fabrication of the device on high-thermal-conductivity
4.5 W/cm K [8] ensubstrate, e.g., silicon carbide
ables improved power-dissipation capabilities and thermal stability under increasingly challenging thermal operating conditions [9].
Together with these material improvements and the other advantages associated with GaN just described, it is clear that there
is a need for equally refined nonlinear device models. This is
true for a number of reasons. First, in order to take advantage
of the performance gains of GaN technology, high-fidelity device models capable of accurately predicting performance, particularly when devices are pushed to their limits, as in modern
broadband high-efficiency power PAs, are a necessity. Second,
from the point of view of the device manufacturer, an accurate,
“first-pass” design-capable large-signal model can be a significant advantage when it comes to having a particular device
considered by the industry for new designs. Finally, GaN technology, while continuing to advance, nevertheless has a number
of outstanding performance issues that must also be modeled.
Such issues include dispersion effects, that is, the large difference which invariably exists between the pulsed – (PIV)
curves and the dc drain characteristics.
Dispersion due to traps—surface/substrate energy levels
that can “trap” charge—is often ignored in commercial device
models. However, these effects can have a large impact on
nonlinear device performance, even under continuous wave
(CW) excitation. This is noted in [10], where the simulated and
measured output load trajectories from a GaN device show a
marked difference when trapping effects are taken into account.
Clearly, this will also affect the harmonic distortion predicted
from the model.
Thermal effects are of particular significance in GaN-based
devices, due largely to their operation at both high current and
voltage values, i.e., high-power dissipation levels. Most GaN
models today have temperature as a variable in their defining
equations, however, there is a considerable difference in a static
temperature dependency that is simply specified as constant environment value by the user in a circuit simulator and a fully
self-consistent electrothermal model. Thermal modeling is important in devices used for high-efficiency amplifier design in
order to determine correctly the dc quiescent point—which will
change with increasing input power due to rectification effects.
This, in turn, is necessary to calculate the correct power dissipated for accurate calculation of performance metrics, such as
power-added efficiency (PAE). Also, applications that involve
0018-9480/$31.00 © 2012 IEEE
KING AND BRAZIL: NONLINEAR ELECTROTHERMAL GaN HEMT MODEL APPLIED TO HIGH-EFFICIENCY PA DESIGN
pulsed operation, such as radar, require accurate thermal resistance and capacitance modeling. Often, even when a full electrothermal model is implemented, thermal dispersion is only
taken into account in a large-signal model by way of a singlepole linear thermal RC subnetwork, e.g., [11]. Clearly, lumping
the entire thermal dynamics of a multilayered high-electron mobility transistor (HEMT) device into such a simple network is
often an oversimplification. Moreover, it is well known that
GaN material has a thermal resistivity that is dependent on temperature [12], implying a nonlinear absolute thermal resistance.
Some initial work has been completed in this area with respect
to GaN devices [13], [14].
In this paper, we report on the efficacy of a new nonlinear
GaN HEMT model. The equivalent circuit described within
has been extracted for the CREE CGH40010F 10-W transistor
and has been verified as valid up to at least a frequency of 10
GHz and a drain–source voltage of 60 V. The simple procedure
given in [15] has been extended in order to extract a nonlinear
thermal resistance and capacitance. For the first time, the
familiar thermal subnetwork approach is used to implement
these nonlinearities—with nonlinear resistance and capacitance
elements making up the first pole of a three-pole network.
In Section II, the trapping-related dispersion model is discussed, and the modified Angelov/Chalmers model equations
are given along with the extracted parameter values. Section III
focuses on the nonlinear thermal resistance measurement procedure, and the extraction method for the standard equivalent
circuit elements is explained briefly. Results on an unmatched
device are given in Section IV, including comparisons between
measured and simulated one-tone, two-tone, PIV, and broadband frequency sweep tests. In Section V, the basic theory of the
continuous class-F amplifier is reviewed, and frequency sweep
measurements performed on a fabricated PA are compared with
model predictions. Finally, a summary of the model accomplishments concludes this work.
II. MODEL DEVELOPMENT
The intrinsic topology of the model is shown in Fig. 1. As can
be seen, this model contains two drain-source current generators: a dc-coupled source
and a capacitively coupled source
. Under dc conditions, the
source is the only contributor
to the drain–source current—this allows accurate fitting of the
dc drain characteristic to some appropriate analytical or table
function
Under fast, i.e., RF or pulsed excitation, the second
source
also contributes because the large coupling capacitor
now
acts as a short circuit. Since the parallel connection means that
the dc and PIV currents now combine, we cannot simply fit the
function to the PIV curves—this would yield an incorrect
current in the model (i.e., an overestimate). Hence, the following
approach is used: directly fit the PIV curves to an intermediate
function
(1)
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Fig. 1. Intrinsic topology of the model with main nonlinearities included. The
thermal subcircuit may be seen in more detail in Fig. 2. The two drain sources
and PIV
allow the model to account for the difference between the dc
drain characteristics.
where the pulsed measurements are taken sufficiently fast that
thermal and trapping effects are negligible, and the gate and
drain bias before pulsing is at the cold field-effect transistor
(FET) condition
(0 V, 0 V . Now, set the
second current generator to
(2)
This means that, under PIV behavior, the second current source
adds exactly the right correction, and, since both dc and PIV
curves are fit separately using functions with distinct parameters, both characteristics are fit accurately and simply. As will
be seen, this dual current-source technique allows very accurate
modeling of the drain characteristics over a wide range of frequencies/pulse widths.
The thermal one-port network included in Fig. 1 as a subcircuit may been seen in expanded version in Fig. 2. Here, the controlled current-source supplies a current into the network that is
equal in magnitude to the power dissipated in the device
.
The network then determines the instantaneous device temperature increase above ambient as the voltage developed across the
current-source terminals
. The PIV drain–source current is
now extended from (1) to be dependent on this temperature, as
will be described in detail in the next section, and shown as
The notation for symbols in this paper is as follows:
uppercase variables refer to dc/quiescent quantities (e.g.,
), whereas lower case variables refer to total excitation values, dc, and pulsed (e.g.,
).
A. Nonlinear Drain–Source Current Model
The importance of accurate – modeling, in particular,
a true representation of the transconductance curve (and its
derivatives), has been well documented [16]. Unfortunately,
this task can be quite difficult in GaN devices, with – curves
often showing “kinks” between the linear and saturation regions
[17]. This behavior, combined with the high voltages at which
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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 1, JANUARY 2013
TABLE I
ANGELOV DRAIN–CURRENT PARAMETERS
Fig. 2. One-port thermal subnetwork which calculates the temperature increase
(above ambient) and causes a corresponding reduction in
of the device
. The first pole, which represents the channel, is
the drain–source current
determined by nonlinear R and C elements.
GaN devices may be operated (60 V in this work), means that
somewhat elaborate – functions are generally needed to
describe the – curves in high-power GaN devices. One such
function is a modified version of the Angelov–Chalmers model,
with a total of 24 parameters. This model is defined as [18]
(3)
where
consistent fashion from the thermal subcircuit of Fig. 2. This
modification can be justified via the mechanism of carrier mobility degradation due to phonon scattering [20].
An additional change to the
parameter should also be
added so as the model can account for the effects of drain–source
breakdown. This additional factor redefines (4) as
(5)
is the breakdown voltage (120 V for this device) and
where
is an empirical constant specific to the shape of the –
curves at breakdown in a particular device.
B. Dispersion Model
As can be seen, (3) is quite an involved function capable of capturing the PIV characteristic over the full bias plane of the 10-W
GaN device discussed in this paper. The extracted coefficients
for this function are given in Table I. More details on the extraction procedure may be found in [19]. The variable
in (3) is
termed an effective voltage and is used to allow the drain characteristic to take account of bias-dependent dispersion. The full
details of the trapping-related dispersion model are described in
Section II-B below.
The thermal model interacts with the drain–source current by
replacing the constant
in (3) above, with the function
Due to trapping and thermal effects, the shape of the PIV
curves depend on the dc steady-state quiescent point before
pulsing. The thermal aspect of the model is taken care of via the
thermal subcircuit visible in Fig. 1, as described in Section II-A
above. The trapping effects, which give rise to phenomena
referred to in the literature as knee walkout, current collapse,
and gate lag [21][22][23], may be added (embedded) from
isothermal isotrap PIV measurements taken from a cold-FET
quiescent point of
(0 V, 0 V , similar to the
approach in [18], where they are de-embedded from pulsed-gate
– (PGIV) measurements. The effective voltage used in (1) is
calculated from the filter network outputs (Fig. 3) which make
a calculated average, or quiescent, voltage automatically available from both intrinsic gate–source and drain–source voltages.
More information on these filter networks may be found in
[24]. The equation used to calculate the effective voltage is
(4)
where
and
are the channel and ambient temperatures,
respectively. This parameter is now a function of the instantaneous temperature of the device, which is calculated in a self-
(6)
KING AND BRAZIL: NONLINEAR ELECTROTHERMAL GaN HEMT MODEL APPLIED TO HIGH-EFFICIENCY PA DESIGN
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Fig. 3. Model containing two filter networks such as this, one at the gate and
one at the drain. These networks take in the intrinsic voltages, as shown in Fig. 1,
and a slow
and splits them into two voltages, a fast-changing RF component
. Subscript x (X) can be g (G) for gate or
changing quiescent, or dc term
d (D) for drain.
TABLE II
TRAP EMPIRICAL PARAMETERS
where the constants are empirical fitting parameters that depend
on the number and location of the trap energy levels in the device. The values extracted for this device via optimization may
be seen in Table II. This formulation allows the shape of the
PIV curves to vary according to the average gate and drain voltages. The results of this can be seen for two different cutoff bias
points in Fig. 4. The final PIV drain characteristic equation has
now become
(7)
which is substituted into (2), as described above. When the device is subject to an active quiescent point, the thermal model
must calculate the corresponding increase in channel temperature , and (7) must reduce the current accordingly. The measured and modeled drain currents at two such active bias points
may be seen in Fig. 5.
Fig. 4. PIV curves modeled by the Angelov function, with (6) describing the
4.00 V with
0 V. (b)
change with bias. (a)
4.00 V with
60 V. Identical drain–pulse and gate–pulse voltage
sweeps are used for each measurement.
function of both
and
, hence it has been set to a constant
value of 1 pF. The remaining capacitance
simply acts as
a dc block, hence it is set to a reasonably constant high value,
e.g., 1 mF. For some GaN devices, peaking may be observed
in the extracted capacitances, and different functions have been
used to describe such effects [26].
D. Diode and Resistance Models
The values of the diodes were extracted from simple forwardbiased measurements (care must be taken not to damage the
gate terminal due to excessive forward dc current). The standard
Shockley ideal diode equation
(9)
C. Nonlinear Capacitance Model
The nonlinear functions chosen to fit the extracted
gate–source and gate–drain capacitance data are based on
the equations given in [25]. These capacitance equations may
be obtained as elements of the gradient of a single gate charge
function, and thus they obey the desirable property of charge
conservation. The exact description is
(8a)
(8b)
The value of the constants used by (8) for the capacitances
implemented in this model may be seen in Table III. The
drain–source capacitance
is determined to be a very weak
is used for both gate–drain and gate–source diodes, with
1.512 and
5.373 fA. The resistances in series with the
diodes are quite large,
1.2 k and
876 ,
nevertheless, these are necessary to adequately limit the current
as the forward bias voltage across the diodes is increased. The
shunt leakage conductances often added across the diode terminals were found to be negligible in this case. The remaining
elements shown in Fig. 1 are the nonquasistatic resistances
and
which are set to constant values of 2.71 and 1.66 ,
respectively. A reverse bias breakdown model may be added
to the basic Shockley equation (particularly for the gate–drain
diode) if necessary.
III. MODEL EXTRACTION
Here, we give an overview of the extraction of the model.
First, we focus on the extraction of the nonlinear thermal resis-
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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 1, JANUARY 2013
Fig. 6. Reduction in maximum current
due to external heating. At each
temperature (25 C to 200 C) the gate and drain voltages were pulsed from
0 V to
1 V and
pulsed
cold-FET conditions
to between 0 and 15 V. The pulse width was 350 ns at a duty cycle of 0.01%.
Fig. 5. PIV curves of modeled versus measured data for two active quiescent
2.50 V with
28 V. (b)
2.20 V with
points. (a)
28 V. The current axis scale is the same as Fig. 4 for comparison.
where
is the externally forced channel temperature. In the
second step (or “measurement step”), the external heating is replaced by self-heating due to the device quiescent point, which
is no longer at the cold-FET condition, but instead biased at increasing levels of power dissipation. This step therefore relates
power dissipated to
, i.e., another function
TABLE III
CAPACITANCE PARAMETERS
The outcome of this step is shown in Fig. 7(a). Hence, by combining the results of the two steps as
tance, and then we discuss the general equivalent circuit model
extraction.
then the channel temperature may be related to the dissipated
power, as demonstrated by the crosses
in Fig. 7(b). This
represents a nonlinear thermal resistance in the channel of the
device, shown as
in Fig. 2, and is present due to the nonlinear thermal properties of GaN material [12]. This nonlinear
resistance is implemented in the simulator using a polynomial
function
A. Thermal Resistance Extraction
The extraction procedure mentioned in [15] consists of two
steps. The first step (or “calibration step”) applies external
heating to the device, which is biased at the cold-FET condition
0 V , and observes the maximum PIV
current that may be obtained, which is
. This maximum
current is due to subjecting the device to a very high pulsed
current condition, e.g., in this work,
1 V and
is
pulsed to between
0 V and
15 V. The external
temperature is then increased, and the process is repeated until
the maximum safe-operating channel temperature is reached.
The results of this calibration step may be seen in Fig. 6. These
data are then used to create a lookup table (LUT) of channel
temperature versus
, i.e., effectively a function
(10)
and the parameters are given in Table IV, which give a thermal
resistance variation between about 8 and 14 K/W between 0
and 15 W, respectively. Since polynomials effectively behave as
power functions for large values of their independent variable, it
can help simulator convergence if we restrict (10) to a constant
value, in a smooth fashion, at high powers. A
function is
ideal for this purpose. Constant thermal resistance and thermal
capacitance values are used for the second and third poles, as
these are considered to represent the die attach and the device
package, respectively. The remaining element, the nonlinear capacitance, may now be fit using an optimization approach after
examining the drain current step response across a range of bias
points (e.g., see Fig. 8). The parameters of this nonlinear capacitance, which is identical in form to (10), are given in Table V.
KING AND BRAZIL: NONLINEAR ELECTROTHERMAL GaN HEMT MODEL APPLIED TO HIGH-EFFICIENCY PA DESIGN
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TABLE V
NONLINEAR CAPACITANCE PARAMETERS
Fig. 7. (a) Reduction in
due to self-heating is shown. Each point represents the maximum current obtained under the same pulsed conditions as per
Fig. 6, but different quiescent voltages. The quiescent points are chosen such
that the dissipated power increases from 0 to 15 W. (b) Extracted channel temand fitted model (line).
perature versus power dissipated
TABLE IV
NONLINEAR RESISTANCE PARAMETERS
Fig. 9. Measured
10 GHz, at
and modeled (line) -parameters for
3.20 V and
28 V.
500 MHz to
circuit, i.e., the intrinsic elements are assumed to be dispersionless—at least over a reasonable mid-frequency range. The modeled and measured -parameters at a typical bias point may be
seen in Fig. 9.
IV. DEVICE MODEL VERIFICATION
A. PIV Measurements
Fig. 8. Measured and modeled PIV curves at a quiescent point of
3.20 V and
28 V with
pulsed from 0 to 60 V in 0.5-V steps,
pulsed from 4.00 to 0 V in 1-V steps. The pulse widths and duty cycles
and
respectively are (a) 5 s, 0.05%, (b) 50 s, 0.5%, and (c) 500 s, 5%, and (d) dc
(after 1 s), 100%, with power contour of 15 W.
In higher power devices, it may be necessary to add further
poles to account for the thermal dynamics of a (possibly nonlinear) substrate material, e.g., silicon carbide.
B. Small-Signal Model Extraction
The first step in generating a small-signal model is the extraction of the parasitic elements. Direct extraction can prove difficult for high-powered packaged devices [24], so here we use a
hybrid direct/optimization approach. This technique is based on
standard cold-FET measurements [27], [28], combined with the
method described in [29]. This latter idea is based on choosing
the parasitic element values to minimize the error between measured and modeled -parameters, while at the same time minimizing the variance of the intrinsic element values over frequency. For example, the value of the intrinsic gate–source capacitance is expected to remain constant when extracted from
the -parameters of the intrinsic (de-embedded) small-signal
The efficacy of the modeling approach described in this paper
may be seen in Fig. 8. Here, we demonstrate measured and modeled snapshots of the drain current obtained at several time instants, including dc. The transistor is set at a class-AB bias point
(
3.20 V,
28 V) and PIV curves at increasing
pulse widths and duty cycles are measured. Identical pulse conditions are applied to the GaN model by used of a PIV test
bench created in a commercial simulator. As can be seen, excellent fits have been obtained across the bias plane at all times.
The quality of the fit for the first three plots of Fig. 8(a)–(c) is
largely due to the comprehensive thermal subcircuit. The fact
that dc can simultaneously be captured by the same model is
due to the dispersion modeling approach by (2). Achieving the
same fit with standard dispersion-modeling approaches would
be exceedingly difficult. Also, it can be seen that the longest
pulsed characteristic still has a noticeable difference to the final
dc characteristic—note the somewhat elongated knee region of
8(c) compared with that of 8(d)—necessitating the use of two
voltage-dependent current generators in the model.
B. One Tone Measurement
A one-tone test was carried out on an unmatched device. The
resulting output at two different bias points is given in Fig. 10.
Both tests show very good fits for all harmonics. There is also
a good correspondence between the measured and modeled dc
drain–current versus input power, which can be seen in Fig. 11.
C. Two-Tone Measurement
The results of the two-tone test are visible in Fig. 12. Here,
the device was subject to two tones of equal power and phase. A
digital predistortion system was used to ensure a two-tone input-
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Fig. 10. Measured
2 GHz at a bias of
2.20 V.
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 1, JANUARY 2013
versus modeled (line) one-tone-test results for
28 V with (a)
3.20 V and (b)
Fig. 13. One-tone frequency sweeps on an unmatched 10-W device placed in
a test fixture. Shown are transducer gain, output power, and power-added efficiency measurements and model results over a sweep ranging from 1.5 to 2.5
30 dBm.
GHz in 50-MHz steps, with
Fig. 11. Measured
and modeled (line) quiescent drain current versus RF
28 V. (a)
input power. The device is intentionally biased at
3.2 V and (b)
2.2 V.
Fig. 14. One-tone power sweeps on an unmatched 10-W device placed in a test
fixture. Shown are transducer gain, output power, and power-added efficiency
measurements and model results over a sweep ranging from 20 to 30 dBm,
2 GHz.
with
E. Power Sweep
Gain, output power, and power-added efficiency data, and
model results, may be seen in Fig. 14 as the power available
at the device-under-test (DUT) input is swept from 20 to
30 dBm.
V. CONTINUOUS CLASS-F PA THEORY
Fig. 12. Measured versus modeled (lines) two-tone test results for
2.14 GHz
2.25 MHz at a bias of
28 V,
3.20 V.
, third
, and fifth
upper IMD products are shown.
The first
free from intermodulation products (IMD) over the complete
range of available swept power, from 0 up to 30 dBm (with an
IMD power of less than 60 dBc over this range).
D. Frequency Sweep
Gain, output power, and power-added efficiency data, as well
as model results, may be seen in Fig. 13 over a frequency range
of 1 GHz.
A. Introduction
Modern amplifiers that fall into the high-efficiency category,
such as the traditional class-F amplifier, are often based on
so-called “waveform engineering.” This involves shaping of
the output loadline, that is, both the drain–source voltage and
the drain–source current, in such a way as to minimize average
power dissipation inside the device and maximize efficiency.
In order to validate the model performance under real-world
conditions, a continuous class-F PA circuit was designed and
fabricated. Here, we review briefly the relevant PA theory and
then describe how the model compares with measurements
performed on the physical circuit.
KING AND BRAZIL: NONLINEAR ELECTROTHERMAL GaN HEMT MODEL APPLIED TO HIGH-EFFICIENCY PA DESIGN
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B. Traditional Class-F
As noted in [30], there are a broad range of amplifiers that are
often attributed the class-F nomenclature. The traditional ideal
class-F idea focuses on biasing the device at the cutoff point
(i.e., a class-B bias point) thus generating a half-wave rectified
sinusoid at the output. This waveform can be described by its
Fourier expansion as
(11)
The internal drain terminal is then presented with an open
impedance termination to all of the odd harmonics of the drain
current fundamental frequency, while the even harmonics
see a short-circuit termination. Hence, in a transconductance
amplifier, the current flowing through these resonators will
generate only odd harmonics in the drain–source voltage. If all
odd harmonics are present in the correct ratio, this will generate
a square wave for the drain–source voltage that is nonzero
only during the off half-cycle of the half-wave rectified drain
current. This implies no power dissipated in the transistor. The
use of pure short and open impedances for all harmonics above
the fundamental ensures that power is only generated at the
fundamental, resulting in an ideal class-F efficiency of 100%.
For real transistor devices, it is impossible to control the generation of an infinite number of harmonics. Therefore, the general approach has been to consider just the first few voltage overtones and assume the remainder are not present due to effective
short-circuit terminations from the matching network and/or the
device parasitics at these frequencies [31]. The drain–source
voltage when limited to just the third harmonic can be written
as
Fig. 15. Ideal class-F
and continuous class-F
waveforms
from a normalized model, e.g., as described in [30]. It can be seen that, for the
continuous class-F case, there is a significant increase in peak voltage, which
levels higher than usual must be accurately modeled by the drain
implies
current (3). All waveforms maintain ideal class-F efficiency of 90.7%.
the voltage equation, which now requires control up to the fourth
harmonic, as
(13)
and quadrature
where the location of in-phase
terms in (11) and (13) indicate terminations that are complex at
the fundamental, purely reactive at the second harmonic, open
circuit at the third harmonic, and purely reactive at the fourth
harmonic. The precise derivation of the amplitude ratios, which
may be derived from the Rhodes singularity condition [32],
can be found in [33] and specify the following fundamental
impedance termination at the internal drain
(12)
where the minus signs are due to the direction of current flow
through the load network. The inclusion of the third harmonic
brings about a significant advantage—a reduction in negative
swing of the drain–source voltage. This reduction allows an
increase in the fundamental voltage component to occur while
keeping the drain–source voltage always positive. This can
be achieved by increasing the fundamental load resistance,
and since the dc terms remain unaffected by this, it delivers
an efficiency increase by a factor of
above that of the
ideal class-B amplifier. Ultimately, this corresponds to drain
efficiency of 90.7% for this category of class-F amplifier [30].
(14)
where
fined as
is the optimum class-B fundamental resistance de-
(15)
with the harmonic impedance terminations given by
(16)
C. Continuous Class-F Amplifier
Unfortunately, engineering [see (12)] at the internal drain requires very precise impedance terminations to be maintained
over the desired amplifier bandwidth, which is not feasible in
practice over any reasonably broad frequency range. To overcome this bandwidth limitation problem, the continuous class-F
was devised [31]. This idea introduces a degree of freedom into
This generates a family of waveforms, all with the traditional
ideal class-F efficiency of 90.7%, but with a wider design
space for impedance terminations. These ideal waveforms may
be seen in Fig. 15, where the gate characteristic used has a
sharp turn on at
, and then an extremely weak third-order
nonlinear transconductance to generate the required amount of
third harmonic in the drain–source voltage.
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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 1, JANUARY 2013
Fig. 16. Actual size diagram of fabricated continuous class-F PA. All dimensions are given.
Fig. 17. Synthesized target -parameters (lines) and measured output
matching network -parameters (marked lines) i.e. looking into output
matching network at external drain package plane.
Fig. 18. Simulated continuous class-F waveforms for a midband frequency of
2 GHz. The third-harmonic dip around the peak of the voltage waveform can be seen, while the drain current waveform deviates from the ideal
case (Fig. 15) due to additional nonlinearities present in the GaN HEMT model
presented in this paper, e.g., current saturation, drain current knee region, and
nonlinear capacitances.
VI. PRACTICAL CONTINUOUS CLASS-F DESIGN
For design of the continuous class-F amplifier, the general
procedure given in our previous work [33] is followed. The
first step is to determine the optimum fundamental impedance
for a class-B design. Next, by tuning the third-harmonic
impedance a standard class-F design is obtained. Finally,
(14)–(16) are applied to extend the design space into the continuous class-F regime. Once these impedance terminations
at the internal drain are found, the device parasitics are then
embedded, and the required terminations at the package drain
terminal can be determined. The simplified real frequency technique (SRFT) may then be used to synthesize this impedance
specification across the full bandwidth [34]. The target package
plane impedance terminations, along with the actual measured
values from the output matching network, are shown in Fig. 17.
When the model is simulated with the target impedance values,
the waveforms shown in Fig. 18 are obtained at the internal
drain.
Fig. 19. Photograph of fabricated continuous class-F amplifier. The device
cover has been removed and the CREE CGH40010F transistor is visible in the
center.
A. PA Layout and Results
Once the input and output matching networks are determined,
they, along with the bias network, are fabricated on Taconic
RF35 microstrip board. This board has a substrate height of
1.52 mm, a copper thickness of 35 m and a relative permittivity
of
3.5. The final fabricated microstrip layout is shown in
Fig. 16, with an image of the actual amplifier shown in Fig. 19.
KING AND BRAZIL: NONLINEAR ELECTROTHERMAL GaN HEMT MODEL APPLIED TO HIGH-EFFICIENCY PA DESIGN
453
Fig. 20. Continuous class-F PA measured and modeled results.
The results of a frequency sweep performed on the amplifier are
shown in Fig. 20. The corresponding output of the model is also
displayed. The amplifier shows an average PAE of 70.21%, for
an average output power of 41.08 dBm, and an average gain of
11.9 dB across the displayed band. An excellent match between
the model and measurements is seen for output power and gain,
while the efficiency match compares favorably to other work at
lower frequency [7].
VII. CONCLUSION
This paper presents a comprehensive large-signal equivalent
circuit model for a 10-W GaN HEMT device. Dispersion
effects are extensively modeled by use of two drain–source
current generators (trap-related dispersion) and a nonlinear
three-pole thermal network (thermal dispersion). The efficacy
of this approach is seen in Fig. 9, where the drain characteristics are captured from fast PIV measurements down to dc
timescales. Figs. 4 and 5 show how the model can capture
the dispersion effects associated with pulsing from different
quiescent conditions.
Large-signal results are also given, which show excellent
agreement under single-tone excitation for multiple bias points
(Fig. 10), and those results under two-tone excitation also show
good fit to IM1 and IM3 products while a decent fit to the
exacting IM5 product is also visible (Fig. 12).
Finally, to test the model under challenging real-world conditions, the results of measurements performed on a high-efficiency continuous class-F amplifier are reported. The output
matching network, which is designed via the simplified real frequency technique [33], [34], is measured and shows good agreement to the required impedance terminations at the external
drain (Fig. 17). Frequency sweeps detailing output power, gain,
and efficiency show very good agreement between the modeled
amplifier results and measured amplifier data.
ACKNOWLEDGMENT
The authors would like to thank B. Merrick and Dr. N. Tuffy.
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Justin B. King (S’04) received the B.E. and Ph.D.
degrees in electronic engineering from University
College Dublin, Dublin, Ireland, in 2006 and 2012,
respectively.
His current research interests include nonlinear
electrothermal device characterization, with emphasis on high-power GaN transistor modeling
for modern PA design. He is also interested in
device physics, nonlinear simulation algorithms, and
impedance synthesis techniques.
Thomas J. Brazil (M’86–SM’02–F’04) received the
Ph.D. degree in electronic engineering from the National University of Ireland, Galway, Ireland, in 1977.
He subsequently worked on microwave subsystem
development with Plessey Research, Caswell, U.K.,
before joining University College Dublin (UCD),
Dublin, Ireland, in 1980. He currently holds the
Chair of Electronic Engineering at UCD and is Head
of the School of Electrical, Electronic and Communications Engineering. His research interests are
nonlinear modeling and characterization techniques
at the device, circuit, and system level within high-frequency electronics.
He also has interests in nonlinear simulation algorithms and several areas of
microwave subsystem design and applications. He is Head of the Microwave
Research Group, UCD.
Prof. Brazil is an elected member of the IEEE Microwave Theory and Techniques Society (MTT-S) AdCom and the Royal Irish Academy (RIA). He was
elected to the Council of the RIA in 2006 and elected Secretary of the Academy
in 2009. He was elected to the Senate of the National University of Ireland in
2012.