Reading
MOSFET Internal Capacitances
S&S (5ed): Sec. 4.8, 4.9, 6.4, 6.6
S&S (6ed): Sec. 9.1, 9.2.1, 9.3.1, 9.4-9.5
The current-voltage relationships we have discussed thus far for the MOSFET capture the
behavior at low and moderate frequencies. However, similar to the diode, at high frequencies,
there are a number of capacitive effects that come into play. These effects can be modeled by
adding various capacitors to the MOSFET large and small signal models we have used thus far.
For now, lets consider generic signals (could be large or small).
First, there is some overlap between the gate and S/D. This overlap capacitance is given by
C ov = W ⋅ Lov ⋅ Cox
With a self-aligned process, these overlap capacitances can be made very small
(Lov ≈ 0.05 .. 0.1 L). The reason is that the gate itself serves as the mask when implanting the S
and D regions.
In addition, there is a capacitance between the gate and the induced channel. The value of this
gate capacitance is
C gate = W ⋅ L ⋅ Cox
How this gate capacitive effect manifests itself depends
on the operation mode of the transistor.
1
C gs = ⋅ C gate + Cov
2
triode
1
C gd = ⋅ C gate + Cov
2
saturation
C gs =
2
⋅ C gate + C ov
3
C gd = C ov
(due to tapered channel)
cutoff
C gs = C gd = Cov
C gb = C gate
(there is no channel)
Finally, there is also the junction capacitance associated with the S-B and D-B diodes. These
diodes are reverse biased. From our discussion of diodes, we know:
C sb = C j (VSB )
C db = C j (VDB )
ECE102 Lecture Notes (Winter 2010)
8-1
The equations above capture the capacitive effects for a MOSFET for a generic signal, large or
small. In this course, we are mainly interested in the small signal behavior.
For small signals, the capacitive effects manifest themselves as small signal capacitors that are
added to the small signal model. Remember, for small signals, we will assume the MOSFET is
biased in saturation. The resulting high-frequency small-signal model for the MOSFET in
saturation now looks as follows:
If S is connected to B (which is typically the case in this course), this simplifies to:
C gs =
2
⋅ C gate + C ov
3
C gd = C ov
Cdb =
Cdb 0
V
1 + DB
V0
ECE102 Lecture Notes (Winter 2010)
8-2
High Frequency Analysis of the CS Amplifier
Mathematical derivation
We will study a CS amplifier with a capacitive load added.
Note that Cdb has been lumped together with CL.
RL′ = RL // ro
Using KVL, KCL:
[
1 − cs
Vout
= [− g m ⋅ RL′ ]⋅ 2
Vsig
as + bs + 1
][
a = RL′ ⋅ Rsig ⋅ C L ⋅ C gs + C L ⋅ C gd + C gs ⋅ C gd
]
b = (1 + g m ⋅ RL′ ) ⋅ Rsig ⋅ C gd + Rsig ⋅ C gs + RL′ ⋅ (C L + C gd )
c=
C gd
gm
At low frequencies (s Æ 0), the gain corresponds to what we calculated before (without
including capacitive effects):
Vout
= − g m ⋅ RL′
Vsig
When looking at the transfer function when capacitors are included, we notice that it has one
(positive) zero and two poles.
Why are we interested in this transfer function? The reason is that it gives us the frequency
response of the amplifier. For many applications, it is important to know how good the amplifier
works over different frequency ranges.
ECE102 Lecture Notes (Winter 2010)
8-3
An important parameter of interest is the 3-dB bandwidth (often ‘bandwidth’ for short). It
indicates the frequency where the (actual) gain is 3 dB (factor of √2 in amplitude) below the low
frequency gain.
|H| (dB)
3 dB
ω3dB
ω (log scale)
We also know Bode plots, which give us a graphical approximation of the actual frequency
response using line segments.
|H| (dB)
|H0|
GBW
ω3dB
ωp1
ωp2
ω (log scale)
Dominant pole approximation for the CS amplifier
Dominant pole approximation: If the poles are separated sufficiently far apart, the bandwidth
corresponds approximate to the location of the first pole (understand why). In that case, we
refer to the first pole as the dominant pole.
ω p1 << ω p 2
→
ω p1 ≈ ω3 dB
Side note: Often we are interested in the product of the low frequency gain and the bandwidth,
rather than gain or bandwidth individually. The reason is that when using the
amplifier in feedback, we can trade gain off versus bandwidth, but the product
remains the same. An important design metric for amplifiers is therefore this
product, which is called the gain-bandwidth (GBW):
GBW = H 0 ⋅ ω3dB
On the Bode plot, we can also see the gain bandwidth as the frequency where the
1st-order part of the curve intersects the 0 dB-axis (understand why).
ECE102 Lecture Notes (Winter 2010)
8-4
Let us now go back to the CS amplifier. We found a second order transfer function. To find the
poles:
⎛ 1
⎞
⎛ s
⎞ ⎛ s
1 ⎞⎟
s2
⋅ s +1
+⎜
+
+ 1⎟ =
as 2 + bs + 1 = ⎜
+ 1⎟ ⋅ ⎜
⎜
⎟
⎟
⎜ω
⎟ ⎜
⎝ p1 ⎠ ⎝ ω p1 ⎠ ω p1 ⋅ ω p 2 ⎝ ω p1 ω p 2 ⎠
Assume we have a dominant pole: ω p1 << ω p 2
as 2 + bs + 1 ≈
ω p1 ≈
s2
s
+
+1
ω p 1 ⋅ ω p 2 ω p1
1 1
1
= =
b τ (1 + g m ⋅ RL′ ) ⋅ Rsig ⋅ C gd + Rsig ⋅ C gs + RL′ ⋅ (C L + C gd )
So the dominant pole is given by the first order term of the denominator of the transfer
function.
From the dominant pole approximation earlier, we also know this dominant pole is also
approximately equal to the bandwidth:
ω p1 ≈ ω3 dB
The value of this dominant pole depends on a large number of circuit elements. To gain some
intuition, let is study the cases when only one of the capacitances is non-zero.
• The actual time constant τ (see above) is the sum of these individual time constants
• If one of them dominates, it allows us to easily calculate the first pole. In this case, the
dominant pole is associated with one capacitor and the ‘resistance it sees’. We will revisit
this shortly.
Only Cgs:
ω p1 =
1
τ
Only CL:
ω p1 =
Only Cgd:
ω p1 =
1
τ
1
τ
=
=
=
1
Rsig ⋅ C gs
1
τ
1
RL′ ⋅ C L
=
1
∑τ
1
(1 + g m ⋅ RL′ ) ⋅ Rsig ⋅ C gd + RL′ ⋅ C gd
ω p1 ≈
ECE102 Lecture Notes (Winter 2010)
1 1
1
= =
b τ (1 + g m ⋅ RL′ ) ⋅ Rsig ⋅ C gd + Rsig ⋅ C gs + RL′ ⋅ (C L + C gd )
8-5
Dominant pole approximation in general
We can generalize the dominant pole approximation when the transfer function is of higher order
(e.g. for more complex amplifier configurations that the CS):
denominator of the transfer function:
⎛ s
⎞ ⎛ s
⎞ ⎛ s
⎞
1 + b1 ⋅ s + b2 ⋅ s 2 + .. + bn s n = ⎜
+ 1⎟ ⋅ ⎜
+ 1⎟...⎜
+ 1⎟
⎜ω
⎟ ⎜
⎟ ⎜
⎟
⎝ p1 ⎠ ⎝ ω p 2 ⎠ ⎝ ω pn ⎠
1
1
1
b1 =
+
+ ... +
ω p1
ω p2
ω pn
when one pole is dominant:
1. The inverse of the first order coefficient corresponds approximately equal to the
dominant pole
2. The dominant pole is approximately equal to the bandwidth
1
≈ ω p1 ≈ ω3dB
b1
How to find b1
Gray and Searle (1969) have shown that the first order coefficient (i.e., b1 in the transfer
function above) can be obtained as follows (this is always true, but is especially useful when
the dominant pole approximation holds since it says something about the bandwidth in that
case):
n
n
i =1
i =1
b1 = ∑ τ i = ∑ Ci ⋅ Rio
The Ci (i = 1..n) are the capacitances in the circuit. Rio is the resistance that this capacitance
‘sees’, i.e. it is the equivalent resistance (like for Thevenin) between the terminals of the
capacitance (when all other capacitors are taken out).
ECE102 Lecture Notes (Winter 2010)
8-6
Procedure: Obtain the contribution from each capacitance by setting all other capacitances to
zero (i.e. they become an open), settings all independent sources to zero, and determining the
resistance seen by the capacitance. These contributions, called the open-circuit time
constants, are then summed together.
τ 1 = Rsig ⋅ C gs
τ 2 = RL′ ⋅ C L
τ 3 = (1 + g m ⋅ RL′ ) ⋅ Rsig ⋅ C gd + RL′ ⋅ C gd
(Miller capacitance)
b1 = τ 1 + τ 2 + τ 3
(Gray & Searle)
1
≈ ω p1 ≈ ω3dB
b1
(dominant pole approximation)
ECE102 Lecture Notes (Winter 2010)
8-7
Miller effect
The capacitance Cgd is the CS amplifier displays what is known as the ‘Miller effect’.
As an example, consider the following circuit (amplifier A has infinite input resistance, i.e. zero
input current):
I1 =
A
+
V1
-
+
-
I1 =
I2
R1
_
VS
V2 = A ⋅ V1
Z
I1
+
V2
-
V1
Z /(1 − A)
V1 − V2 (1 − A) ⋅ V1
=
Z
Z
I 2 = − I1 = −
I2 =
(1 − A) ⋅ V1
(1 − A) ⋅ V2
=−
Z
A⋅ Z
V2
Z ⋅ A /( A − 1)
This circuit behaves the same (i.e. has the same currents and voltages) as:
R1
_
VS +-
V1
A
Z1 =
Z2 I2
Z1
I1
V2
Z
1− A
Z2 =
Z
1−
1
A
This is called the Miller theorem. This holds in general:
V2 = A ⋅V1
+
Z
V2 = A ⋅V1
+
V1
V2
-
-
+
Z1 V1
-
Z1 =
Z
1− A
+
V2 Z2
-
Z2 =
Z
1−
1
A
When the gain A is large (|A| >> 1):
Z1 =
Z
1− A
Z2 =
Z
1
1−
A
≈Z
E.g., if the impedances are capacitors, we can transform a circuit with a floating capacitor to one
with two grounded capacitors.
ECE102 Lecture Notes (Winter 2010)
8-8
We observed this Miller effect for the Cgd in the CS amplifier.
A = − g m ⋅ RL′
Z=
Z1 =
Z2 =
Z
1
1
=
=
1 − A s ⋅ C gd ⋅ (1 + g m ⋅ RL′ ) s ⋅ Ceq
Z
1−
1
A
≈Z =
1
s ⋅ C gd
Ceq = C gd ⋅ (1 + g m ⋅ RL′ )
1
s ⋅ C gd
Due to the Miller effect, the Cgd appears on the input node as a much larger capacitance Ceq.
Calculating the associated open-loop time constant:
τ = Rsig ⋅ Ceq + RL′ ⋅ C gd = (1 + g m ⋅ RL′ ) ⋅ Rsig ⋅ C gd + RL′ ⋅ C gd
Often, the last term is much smaller:
τ ≈ Rsig ⋅ Ceq = (1 + g m ⋅ RL′ ) ⋅ C gd ⋅ Rsig
This is a well-known result: a capacitor between the input and output gives rise to a so-called
Miller pole. In essence, the capacitor behaves as if it were a much larger capacitor.
ECE102 Lecture Notes (Winter 2010)
8-9
Design
In amplifier design, a typical specification is a well-defined GBW (often maximized). This
ensures that the amplifier is well-behaved when used in a feedback configuration (remember, it
is the GBW that is constant, independent of the amount of feedback).
To achieve this, the designer will try to ensure the presence of a dominant pole. This simplifies
the design, as we can use the dominant pole analysis.
n
n
i =1
i =1
b1 = ∑ τ i = ∑ Ci ⋅ Rio
ω3dB ≈ ω p1 ≈
1
b1
(Gray & Searle)
ω3dB ≈
(dominant pole approx)
1
∑τ
≈
i
1
∑ Ci ⋅ Rio
The easiest way to create a dominant pole is to make one of the open-loop time constants very
large. This can be done by deliberately placing a large well-defined capacitor in the circuit. If
one were to rely simply on the internal capacitances of the devices, poles would not be welldefined (i.e. process dependent) and typically no one pole would be dominant.
n
∑τ
i =1
i
≈ max(τ i ) = τ k = C k ⋅ Rko (make one time constant dominant)
ω3dB ≈
1
∑τ
≈
i
1
∑ Ci ⋅ Rio
(dominant pole approx + Gray&Searle)
ω3dB ≈
1
τk
≈
1
Ck ⋅ Rko
This indeed results in a well-defined GBW:
ω3dB ≈
1
Ck ⋅ Rko
H 0 = g m ⋅ R L′
GBW = H 0 ⋅ ω3dB =
g m RL′
⋅
Ck Rko
ECE102 Lecture Notes (Winter 2010)
8 - 10
Where to place this external capacitor? Typical places are (1) at the output or (2) as a Miller
capacitance (since a smaller capacitor will do in that case, as we benefit from the Miller effect).
Often you will find that the circuit will have one large capacitor inserted for this reason (in onestage or multi-stage amplifiers).
CB
CA
ω3dB ≈
1
C A ⋅ RL′
ω3dB ≈
H 0 = g m ⋅ R L′
GBW = H 0 ⋅ ω3dB =
1
C B ⋅ Rsig ⋅ (1 + g m ⋅ RL′ )
H 0 = g m ⋅ R L′
gm
CA
ECE102 Lecture Notes (Winter 2010)
GBW = H 0 ⋅ ω3dB =
gm
R′
⋅ L
C B ⋅ (1 + g m ⋅ RL′ ) Rsig
8 - 11