Autotuning Techniques for Digitally-Controlled Point-of

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DIGITAL
CONTROL OF POWER CONVERTERS
4 Advanced controllers
Autotuning
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Autotuning Techniques for Digitally-Controlled Point-of-Load Converters
with Wide Range of Capacitive Loads
Shirazi, M. Zane, R. Maksimovic, D. Corradini, L. Mattavelli, P. APEC 2007
Design challenges in PoL Converters
•Number, types and values of load
decoupling capacitors often unknown
to the designer
•Component tolerances
•Temperature variations or aging
Equivalent C and ESR can vary
orders of magnitude
Digital control of Power Converters
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Autotuning Techniques for Digitally-Controlled Point-of-Load Converters
with Wide Range of Capacitive Loads
Shirazi, M. Zane, R. Maksimovic, D. Corradini, L. Mattavelli, P. APEC 2007
Digital control of Power Converters
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Self-tuning digital PID controller
▪ Objective of the tuning algorithm:
▪ determine the PID parameters (K,z1,z2) to maximize closed-loop
bandwidth while meeting stability margins and dynamic
performance specifications
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Theoretical basics
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The dc-dc converter can be viewed as a linear, time invariant system
impulse response
output voltage
duty cycle
noise and
perturbations
Input-output cross correlation
A Modified Cross-Correlation Method for System Identification
of Power Converters with Digital Control
Botao Miao, R.egan Zane, Dragan
DigitalMaksimovic
control of Power Converters
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Theoretical basics II
▪ if u(k) is white noise
▪ So, the cross correlation is the impulse response
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Theoretical basics III
▪ How to generate white noise
PSRBS (Pseudo-Ramdom Binary Sequence)
The data length for one period of an n-bit
maximum length PRBS is given by M = 2n - 1 , and the
signal itself has only two possible values:+/- e
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Limit cycle based autotuning
typical limit cycle oscillation
▪ Limit cycle oscillations are caused by non-linear quantization effects
▪
in ACD and DPWM.
When the resolution of the DPWM is low (compared to ADC)the
quantized output cannot result in zero error
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Limit cycle based autotuning
typical limit cycle oscillation
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frequency
Not desirable in steady-state
Contain valuable information
Characterized by Amax, Amin, TLC
In a digitally controlled power supply they depend
on the inductance, capacitance and load (they
depend on the digital controller and the input
voltage)
Only three parameters can be determined
In this case only the TLC and the peak to peak
amplitude will be used to calculate the C0 and the
load
amplitude
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Limit cycle based autotuning
Auto-tuner block diagram
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Not desirable in steady-state
Contain valuable information
Characterized by Amax, Amin, TLC
In a digitally controlled power supply they depend
on the inductance, capacitance and load (they
depend on the digital controller and the input
voltage)
Only three parameters can be determined
In this case only the TLC and the peak to peak
amplitude will be used to calculate the C0 and the
load
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Limit cycle based autotuning
▪ When LCO is steadily excited the
total loop has a gain of 1 and a
phase shift of 180 degrees
NDPWM(ALC, ε) describes the gain of the DPWM
to obtain the gain of the DPWM
we use describing functions [53]
[53] H. Peng, D. Maksimovi´c, A. Prodi´c, and E. Alarcon,
“Modeling of quantization effects in digitally controlled DCDC converters,” in Proc. IEEE Power Electronics Specialist Conference, 2004, pp. 4312–4318.
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Limit cycle based autotuning
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▪ The power stage of the system is:


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200 mV/div-ac
12V-to-5V, 10W buck converter
Fs 200 kHz.
All functional blocks of the digital
controller but DPWM are
realized using an Analog
Devices ADMC-401 DSP Board.
An Altera 10K FPGA system is
used for the DPWM
▪ DPWM resolution


steady-state 8 bits
Identification 4 bits
▪ Pre-stored PID coefficients are
placed in three 30 word 10-bit
look-up tables
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PEF (Predictor Error Filter) based Autotuning
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