IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 8, AUGUST 2011
3567
A Three-Phase Step-Up DC–DC Converter With
a Three-Phase High-Frequency Transformer for
DC Renewable Power Source Applications
Sérgio Vidal Garcia Oliveira, Member, IEEE, and Ivo Barbi, Fellow, IEEE
Abstract—This paper presents a new three-phase step-up dc–dc
converter with a three-phase high-frequency (HF) isolation transformer in an average current-mode controlled closed loop. This
converter was developed for industrial applications where the dc
input voltage is lower than the output voltage, for instance, in
installations fed by battery units, photovoltaic arrays, or fuel cell
systems. The converter’s main characteristics are reduced input
ripple current, step-up voltage, HF transformer, reduced outputvoltage ripple due to three-pulse output current, and the presence
of only three active switches connected to the same reference, this
being a main advantage of this converter. By means of a specific
switch modulation, the converter allows two operational regions,
each one depending upon the number of switches in overlapping
conditions—if there are two switches, it is called R2 region, and
if there are three switches, it is called R3 region. An average
current-mode control strategy is applied to input-current and
output-voltage regulation. Theoretical expressions and experimental results are presented for a 6.8-kW prototype, operating in
the R2 region, and for a 3.4-kW prototype, operating in the
R3 region, both in continuous conduction mode.
Index Terms—Average current-mode control, dc–dc power conversion, dc–dc step-up converter, high-frequency (HF) three-phase
transformer, installations fed by dc power sources.
I. I NTRODUCTION
T
HE great necessity in several areas, particularly the industrial sector, for switch mode power converters with
larger power ratings in the end of the 80s was the starting point
for the appearance of high-frequency (HF) three-phase dc–dc
converter. Since the first three-phase dc–dc isolated converter
introduced by Prazad et al. in 1988 [1], the three-phase dc–dc
development follows two paths, both with the same goal: to
increase the electronic power density ratings. The new topologies are from the first path and have important propositions
[1]–[9]. The second path is the soft commutation with its main
contributions given in [10]–[12].
The typical architecture of an HF three-phase dc–dc isolated
converter is shown in Fig. 1. In the input stage, the most
Manuscript received July 1, 2009; revised December 4, 2009 and
February 12, 2010; accepted March 26, 2010. Date of publication October 7,
2010; date of current version July 13, 2011. This work was supported
in part by the Coordenação de Aperfeiçoamento de Pessoal de Nível
Superior and in part by the Conselho Nacional de Desenvolvimento Científico
e Tecnológico (CNPq).
S. V. G. Oliveira is with the Universidade Regional de Blumenau–FURB,
Blumenau 89030-000, Brazil (e-mail: sergio_vidal@ ieee.org).
I. Barbi is with the Instituto de Eletrônica de Potência, Universidade Federal de Santa Catarina, Florianópolis 88040-970, Brazil (e-mail: ivobarbi@
inep.ufsc.br).
Digital Object Identifier 10.1109/TIE.2010.2084971
common configuration is this stage to operate as a voltage
source, while the output stage has current source characteristics
like in [1], [3], [4], [6], [9], [11], and [12]. The advantages of
three-phase dc–dc isolated solutions are as follows:
1) reduction of the input and output filters’ volume, as
well as the reduction of weight and size of the isolation
transformers;
2) lower rms current levels through the power components,
when compared to single-phase solutions for the same
power ratings.
With the increasing threat of the fast depletion of resources
such as petroleum, coal, and natural gas forces, people seek
renewable energy sources, such as solar, wind, geothermal, and
hydraulic energies. In recent years, fuel cell (FC) research and
development have received special attention for their higher
energy-conversion efficiency and lower CO2 emissions than
thermal engines in the processes of converting fuel into usable
energies. For these systems, different power converter topologies can be used for the power electronic interface between
them and the load. Basically, low-voltage high-current structures are needed because of its electrical characteristics. In
these systems, a classical boost converter is often selected as
a possible converter. However, a classical boost converter will
be limited when the power increases (greater than 4.5 kW) or
for higher step-up ratios (greater than two times). The major
problems of using a single dc/dc converter connected with
FC in high-power applications are the difficulty of the design
of magnetic component and high FC ripple current, which
may lead to the reduction of its stack lifetime. To overcome
these limitations, the use of paralleling power converters with
interleaved technique is also applied and may offer some better
performances [13]–[19]. In industrial applications, the inverter
systems, together with dc–dc high-voltage-ratio converters, that
feed electrical power from low-voltage-level systems into the
grid must convert their direct current into alternating current
for the grid.
In [20], a study focusing on this, offering a comparative view
of some dc–dc converters applied in systems in the medium
power range of 20 kW and higher, is presented.
The three-phase step-up dc–dc isolated converter presented
in this paper, Fig. 2, has all of the main advantages of the
three-phase solutions presented up until now. Moreover, the
reduced number of switches, if compared with other topologies,
such as presented in [21], and the voltage step-up characteristic improve the efficiency and reduce, along with a high
0278-0046/$26.00 © 2010 IEEE
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Fig. 1. Typical three-phase dc–dc converter architecture.
Fig. 2. Three-phase step-up dc–dc isolated converter.
TABLE I
O PERATION R EGIONS FOR THE C ONVERTER
switching frequency, the output filter volume, respectively.
Furthermore, due to the input-current-source characteristic or
nonpulsed input current, this topology can be adopted in all
types of applications supplied by alternative energy sources,
such as battery or photovoltaic (PV) arrays and, the more recent,
FC systems. In this way, for the proposed converter, three
converter operation regions are defined, each one depending
upon the number of switches in overlapping conditions, Table I.
Theoretical expressions and experimental results are presented
for a 6.8-kW prototype, operating in region R2 , and for a
3.4 kW-prototype, operating in region R3 , both in continuous
conduction mode (CCM).
and three switches connected to a dc link. The right side of
the circuit is a traditional three-branch six-diode rectifier with a
capacitive output filter. An HF three-phase transformer links to
both sides.
The three-phase step-up dc–dc isolated converter characteristics are as follows.
1) The proposed three-phase inverter (left-side) circuit
presents a low input ripple current, because it acts as
nonpulsed current source, independent of both operation
modes and regions of the converter.
2) The output-voltage ripple is reduced due to the threepulse output current; consequently, a small capacitance
value is required.
3) Only the three switches connected to the same reference
attribute simplicity to the drive and control circuits.
4) The voltage level applied across the switches is reduced
due to the employed transformer.
B. Analysis of Operation
II. P ROPOSED C ONVERTER AND
THE O PERATION P RINCIPLE
A. Circuit Description
Fig. 2 shows the power stage of the proposed circuit [7].
The left side of the circuit (inverter) comprises three inductors
To facilitate the analysis of the circuit operation, Fig. 2 shows
a simplified circuit diagram. In the simplified circuit, Tr1 is
modeled as an ideal transformer with turns ratio n = 1. It is
assumed that its magnetizing inductance is large enough that
it can be neglected. Moreover, it is assumed that the filter
capacitor C is large enough and, thus, its output-voltage ripple
OLIVEIRA AND BARBI: STEP-UP DC–DC CONVERTER WITH HF TRANSFORMER FOR POWER SOURCE APPLICATIONS
Fig. 3.
Power switch driving signals for region R2 .
is small compared to its dc voltage. Finally, it is assumed
that all semiconductor components are ideal, i.e., they present
zero impedance when on and infinite impedance when off.
The power flux transfer and the output/input voltage ratio are
controlled by the duty ratio D of the switches.
A PWM technique is used for switches S1 , S2 , and S3 . The
duty ratio D is defined by (1), where tON is the on-time interval
of the switches and TS is the switching period
D=
tON
.
TS
(1)
C. Operation Regions
The circuit proposed has three different operation regions
according to Table I. Each one differs from each other by
the number of switches in the ON state at the same time
(overlapping). For each region, the duty cycle ratio can assume
different values. Due to the converter’s input-current-source
characteristic, at least one switch must always be on. Hence,
the first region, R1 is forbidden. Fig. 3 shows a modulation of
the switches for the converter operation in region R2 .
D. Steady-State Stage Operations for Region R2
Fig. 4 shows the six topological stages of the converter’s
operation at R2 region during a switching period.
1) First Stage (t0 , t1 )—Fig. 4(a): In t0 , switch S1 is turned
on and conducts along with switch S3 . Inductances L1 and
L3 store energy from source E. The energy stored in L2 is
transferred to the load through D2 , D4 , and D6 . Currents
iD4 (t) and iD6 (t) are added to iS1 (t) and iS3 (t), respectively.
This stage finishes in t1 when S3 is turned off.
2) Second Stage (t1 , t2 )—Fig. 4(b): In t1 , S3 is turned off,
and the energy stored in L2 and L3 is transferred to the load
through D3 , D2 , and D4 . Current iD4 (t) is added to iS1 (t).
This stage finishes in t2 when S2 is turned on.
3) Third Stage (t2 , t3 )—Fig. 4(c): In t2 , the energy of
source E is stored in inductances L1 and L2 . The energy stored
in L3 continues to be transferred to the load through D3 , D4 ,
and D5 . This stage finishes in t3 when S1 is turned off.
4) Fourth stage (t3 , t4 )—Fig. 4(d): In t3 , the energy stored
in L1 and L3 is transferred to the load through D1 , D3 , and
D5 . Current iD5 (t) is added to iS2 (t). This stage finishes in t4
when S3 is turned on.
Fig. 4. Topological stages of the converter in region R2 .
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 8, AUGUST 2011
Fig. 5. Power switch driving signals for region R3 .
5) Fifth Stage (t4 , t5 )—Fig. 4(e): In t4 , the energy of source
E is stored in inductances L2 and L3 . The energy stored in L1
continues to be transferred to the load through D1 , D5 , and D6 .
This stage finishes in t5 when S2 is turned off.
6) Sixth Stage (t5 , t6 )—Fig. 4(f): The converter’s last stage
of operation in a TS switching period starts at t5 , when S2 is
turned off. The energy from source E stored in inductances
L2 and L1 is then transferred to the load through D1 , D2 , and
D6 . iD6 (t) is added to switch current iS3 (t). In t6 , a switching
period is finished.
E. Steady-State Stage Operations for Region R3
Fig. 5 shows the modulation of the switches for the converter’s operation in region R3 . Fig. 6 shows the topological
stages of the converter’s operation in R3 region.
1) First Stage (t0 , t1 )—Fig. 6(a): In t0 , switch S1 is turned
on and conducts along with switches S2 and S3 . Inductances
L1 , L2 , and L3 stored energy from source E. This stage finishes
in t1 when S2 is turned off.
2) Second Stage (t1 , t2 )–Fig. 6(b): In t1 , S2 is turned off,
and the energy stored in L2 is transferred to the load through
diodes D2 , D4 , and D6 . Currents iD4 (t) and iD6 (t) are added
to currents iS1 (t) and iS3 (t), respectively. This stage finishes
in t2 when S2 is turned on.
3) Third Stage (t2 , t3 )—Fig. 6(a): In t2 , S2 is turned on, and
the first stage is repeated, with the energy of the source being
stored in inductances L1 , L2 , and L3 . This stage finishes in t3
when S3 is turned off.
4) Fourth Stage (t3 , t4 )—Fig. 6(c): When S3 is turned off,
the energy stored in L3 is transferred to the load through D3 ,
D4 , and D5 . Currents iD4 (t) and iD5 (t) are added to switch
currents iS1 (t) and iS2 (t), respectively. This stage finishes in
t4 when S3 is turned on again.
5) Fifth Stage (t4 , t5 )—Fig. 6(a): In t4 , S3 is turned on, and
the first stage is repeated, with the energy off the source being
stored in inductances L1 , L2 , and L3 . This stage finishes in t5
when S1 is turned off.
6) Sixth Stage (t5 , t6 )—Fig. 6(d): The last stage starts at t5 ,
with S1 being turned off and the energy stored in inductance L1
being transferred to the load through diodes D1 , D5 , and D6 .
Diode currents iD5 (t) and iD6 (t) are added to switch currents
iS2 (t) and iS3 (t), respectively. In t6 , one period of switching
operation is concluded.
Fig. 6.
Topological stages of the converter in operational region R3 .
III. P OWER S TAGE D ESIGN P ROCEDURE
The main equations (2)–(9) are used to design the power
stage of the converter. Equation (2) gives the normalized output
current, and (3) gives the turns ratio. By means of (4) and (5),
the designer can determine the minimum value of inductances
OLIVEIRA AND BARBI: STEP-UP DC–DC CONVERTER WITH HF TRANSFORMER FOR POWER SOURCE APPLICATIONS
Fig. 7.
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Normalized input ripple current for both R2 and R3 operation regions.
to maintain the converter operation in CCM for a specific
condition of load current.
Equation (6), plotted in Fig. 7, can be used to define the
minimum inductances’ values to guarantee a maximum ripple
in the input current for 1/3 ≤ D ≤ 1. In the Appendix, more
detailed equations are shown to facilitate comprehension and
the design of converter. Equations (7) and (8) can be used to
determine the output capacitance and input inductance values
in CCM, respectively
Io =
Io · fs · L
E
(2)
n=
Ns
Np
(3)
ΔiL =
Vo D(1 − D)
Vo q − n
·
=
·
f sL
n
f sL
q2
ΔiL =
q−n
D(1 − D)
=
n
q2
(4)
⎧
ΔiL(n;0.5)
Vo
⎪
· f s·ΔiL
⎨ LCr =
n
Vo
3
LCr = 16·n2 · Io ·f s
⎪
⎩
3
LCr = LCr · IoV·fo s = 16·n
2
⎧
⎪
Δi · LfS
⎪
⎨ E Vo
1 9n(q−n)−2q 2
ΔiE =
→ R2
2
3
nq
⎪
⎪
⎩ 3n−q → R
q2
C=
Lmin =
(5)
(6)
Fig. 8. DC transfer function of the proposed converter as a function of both
duty cycle and normalized output current for n = 5.
3
(2q−3n)(3n−q)
Io
9nq ·
fS ΔV o
(q−3n)
Io
·
3q fS ΔV o → R3
Vo
1
·
.
12 · n ΔiE · fS
→ R2
IV. DC T RANSFER F UNCTION
(7)
(8)
Fig. 8 shows the three operation regions related to the output
characteristic of the proposed converter. There, the three modes
of conduction of the converter can be observed. The output/
input voltage gain q or the dc transfer function for operation
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 8, AUGUST 2011
area R2 in CCM is limited to a maximum of three times the
transformer’s turns ratio. Otherwise, in region R3 , the minimum value of the output voltage in CCM is three times the
transformer’s turns ratio. The gain q for the three modes and
two regions of converter operation is given by (9), detailed in
the Appendix, and is shown in Fig. 8, highlighting that the duty
cycle must be higher than 33% for the correct functionality of
the converter.
Equation (9) was obtained applying the inductor voltage–
second balance described in [22] and [23]. Figs. 9 and 10 show
the theoretical waveforms for both regions of operation R2
and R3
1 ⎧
q
=
n
CCM
⎪
1−D
⎪
⎪
⎪
⎨
1
q
3
±
=
9
−
24nI
CrCM
o
q=
(9)
4Io
⎪
⎪
⎪
⎪
2
⎩
qDCM = n + 32 DI .
o
V. C ONTROL D ESIGN
The control transfer functions Gi (s) and Gv (s) are described
by (10) and (11), respectively. Other modeling equations are
presented at the Appendix
(S + ωZi )
IE (S)
= Gid 2
Gi (S) =
S
S
VC (S)
+1
2 +
ωo
(1 − D)
ωo = √
LC
Gv (S) =
ωP v =
1
.
(R + Rse )C
ωZv =
1
Rse C
(11)
VI. P ROTOTYPE D ESCRIPTION AND E XPERIMENTATION
The goal of this analysis is to show the advantages of using
the proposed converter. The experimental results are obtained
for a system with the following specifications:
1) P o = 3.4 and 6.8 = kW, output power;
2) V o = 450 V, rated output voltage;
3) E = 27 and 47 V dc, rated input voltages;
4) f s = 20 kHz, switching frequency;
5) n = 21/4, transformer’s turns-ratio;
6) ΔV o ≤ 9 V, output ripple voltage;
7) ΔIE ≤ 3 A, input ripple current.
From the output and input rated voltages, the gain q is
given by
q=
450V
= 9.57.
47V
(12)
B. Duty Ratio
The duty cycle ratio is given by
D=
q−n
9.57 − 5.25 ∼
=
= 0.45.
q
9.57
(13)
C. Input Inductances
The values of the inductances were defined, taking into
account that the converter keeps operating in CCM, even with
10% of the rated power. Under these conditions, the inductance
values are given by
L1,2,3 ≥ 10LCr ·
A. Control Design Equations
Vo · C
Vs (1 − D)2
R · Rse (1 − D)
(R + Rse )n
A. DC Voltage Gain
In this section, the average current-mode control technique
applied to the regulation of both input current and output
voltage of the converter is described [24]. Fig. 11 shows the
feedback loop for input-current and output-voltage regulation.
There are two loops, namely, inner current loop and outer voltage loop. Gi (s) is the control-to-input-current transfer function,
where the controlled variable is the input current IE (s) and
the control variable is the duty ratio d(s). Gv (s) is the lineto-output or input-current-to-output-voltage transfer function.
Ci (s) and Cv (s) are the current and voltage compensators,
respectively. Vref and Iref are the references to be reached.
The inner loop imposes an input current IE (s) as a function of
the reference current generated by the outer loop. The current
compensation network is designed as a function of the control
criterion and by the response of the system.
The output-voltage control-loop action must change the
input-current reference slowly, in relation to the current controlloop action in order to avoid the interference of the outer control
loop.
Gid =
Gvo =
Vo ∼
= 134 μH.
fs · Io
(14)
D. Output Capacitance
The value of output capacitance is obtained using (7). However, due to its rms current stress, it was changed to 2000 μF/
500 V.
ωo Q
2
RC
L
Q=
R(1 − D)
C
E. Controller Design
ωZi =
(S + ωZv )
Vo (S)
= Gvo
IE (S)
S(S + ωP v )
The implementation of the compensators for input current
and output voltage is realized by
(10)
(S + ωZci )
Vc (S)
= Ki
ViHall (S)
S(S + ωP ci )
1
= 555556
Ki =
Rci C2f i
Ci (S) =
OLIVEIRA AND BARBI: STEP-UP DC–DC CONVERTER WITH HF TRANSFORMER FOR POWER SOURCE APPLICATIONS
3573
Fig. 9. Theoretical waveforms in R2 for D = 0.5. (a) Command pulses. (b) L1 inductor current. (c) L2 inductor voltage. (d) D1 output diode current. (e) D5
and D6 diode currents. (f) S1 switch current. (g) Output capacitor current. (h) Primary winding voltage. (i) Primary winding current.
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 8, AUGUST 2011
Fig. 10. Theoretical waveforms in R3 for D = 0.83. (a) Command pulses. (b) L1 inductor current. (c) L2 inductor voltage. (d) D1 output diode current.
(e) D5 and D6 diode currents. (f) S1 switch current. (g) Output capacitor current. (h) Primary winding voltage. (i) Primary winding current.
OLIVEIRA AND BARBI: STEP-UP DC–DC CONVERTER WITH HF TRANSFORMER FOR POWER SOURCE APPLICATIONS
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Fig. 11. Feedback loop for input-current and output-voltage regulation.
1
rad
= 1191
Rf i C1f i
s
C1f i + C2f i
rad
ωP i =
ωZi = 100397
C2f i
s
(S + ωZcv )
IRe f (S)
= Kv
Cv (S) =
VvHall (S)
S(S + ωP cv )
1
= 60.6
Kv =
Rcv C2f v
1
rad
= 1250
ωZcv =
Rf v C1f v
s
C1f v + C2f v
rad
.
ωP cv =
ωZc = 3230
C2f v
s
ωZi =
(15)
(16)
The crossover frequencies obtained from the current control
and the voltage control loop are 12.2 and 1.8 kHz, respectively.
The crossover frequency must be lower than the switching frequency, and a phase margin near to 45◦ provides good response
with very little output-voltage overshoot. The conventional
phase-margin and gain-margin stability criteria are applied to
maintain the system stable.
F. Prototype Description
Using the design equations, a 6.8-kW prototype was implemented, as shown in Fig. 12. The main power components
employed were three 134-μH inductors built in a toroidal core
of Kool μ material, two output capacitors with 1000 μF/500 V
(2XB43510) from Epcos, and three MOSFET switches SKM
121AR. The output rectifier diodes are the HFA15TB60
from IR.
The modulation strategy and the gate drives are allowed by
the TMS320F2812 DSP Starter Kit. Three single-phase trans-
Fig. 12. Photograph of the prototype.
formers in Y–Y connection operating as a three-phase HF transformer are employed; they use two ferrite cores 80-38-20 in
parallel per phase of TSF 7070 material. The inductor currents are measured by three Hall-effect sensors LA100P
from LEM.
The snubber circuit in Fig. 13 is adapted from [25] and,
containing Ds, Rs, and Cs, is used to control the overvoltage
across the switches due to the leakage inductances (Ldp). It was
implemented using Rs = 50 Ω/50 W, Cs = 1 μF/250 V, and
Ds = HFA15TB60. Other details of the prototype and more
experimental results for a 3.4-kW prototype operating in R3
are presented.
G. Experimental Results
In Fig. 14, the three inductor currents of the Hall sensors, as well as the output voltage, are depicted. The currents
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 8, AUGUST 2011
Fig. 13. Prototype schematic implemented.
Fig. 14. (Ch4) Output voltage and inductor currents.
through the inductors are obtained by the conversion iL =
100 A · (vsensored /13.5 V). The input current is the sum of
the inductor currents. In Fig. 15, the commutation of switch
S1 on the rated power of the converter operation is shown.
Fig. 16 shows the waveforms for a duty ratio of D = 0.7, i.e.,
the proposed converter is operating in region R3 . It is possible
to verify the commutation of S1 switch and both rated input and
output voltages, respectively.
In Fig. 17, the converter’s efficiency in the R2 region is
shown. The converter’s efficiency is close to 87%.
Fig. 18 shows the output-voltage dynamic response for a load
increment from 3.4 to 6.8 kW. Moreover, Fig. 19 shows the
output-voltage variation for a reduction of the output power
from 6.8 to 3.4 kW. In both transient responses, P2 represents
the rated load power, and P1 denotes the 50% rated load power.
The output-voltage overshoot is lower than 1% of the rated
voltage.
Fig. 15. Commutation of S1 , (Ch1) voltage (with 50 V/div), and (Ch3) current
(with 50 A/div), plus the rated (Ch2) input and (Ch4) output voltages.
VII. C ONCLUSION
In order to develop a topology that presents greater efficiency with reduced weight and size, the three-phase step-up
dc–dc isolated converter controlled by an average current-mode
strategy has been presented. With these characteristics, this
converter contains only three controlled switches and an HF
transformer. The input and output filters are fed by three times
the switching frequency, which will reduce their volume. This
converter can be used in all applications that require a reduced
input ripple current, e.g., in industrial applications where the
dc input voltage is lower than the output voltage, for instance,
in installations fed by battery units, PV arrays, or FC systems,
since some of the features expected for these systems, such
as nonpulsed input current and higher step-up ratios, can be
obtained. The control model employed was the same with that
of the classical boost dc–dc converter. Its simplicity joins with
its very satisfactory results.
OLIVEIRA AND BARBI: STEP-UP DC–DC CONVERTER WITH HF TRANSFORMER FOR POWER SOURCE APPLICATIONS
Fig. 16. Experimental results for operational region R3 : Commutation of S1 ,
(Ch1) voltage (with 50 V/div) and (Ch3) current (with 50 A/div), plus the rated
(Ch2) input and (Ch4) output voltages.
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Fig. 19. Output voltage for a reduction of 50% in the output power.
tation. With the goal of performing tests in both operational
regions using the same prototype, in region R3 , results were
obtained for a 3.4-kW output power and a 27-V input voltage
for the same rated output voltage.
A PPENDIX
A. DC Transfer Function
Fig. 17. Output converter’s experimental efficiency on R2 .
In the following equations, the load variations are represented by means of the normalized output current I o . According
to the converter’s operational steps, the average output current
is the sum of the average currents of the diodes (D1 , D2 , and
D3 ) given by (17). Using (18) and (19), (20), which evaluates
the average load current, is obtained. From that, the normalized
output current I o is obtained by means of (21)
Io = 3ID1 =
iL max =
Δtd =
Io =
Δtd
3
iLmax
2
TS
(17)
Vo D
·
f sL q
(18)
iL max · n · L
Vo − nE
(19)
E
3 D2
·
·
2 q − n fs · L
(20)
Io = Io ·
3 D2
fs · L
= ·
.
E
2 q−n
(21)
Fig. 18. Output voltage for an increment of 50% in the output power.
During the converter assembly, special care was taken in
the construction of the transformer, mainly with respect to the
reduction of its leakage inductance. This characteristic is an
important constraint for choosing switching frequency.
The obtained efficiency for the converter operating at region
R2 was close to 87%; it can be considered high, considering
its rated power and that it works with hard-switching commu-
From (21), the dc voltage gain in discontinuous conduction mode (DCM)(qDCM) ) can be obtained by means of the
following:
3 D2
qDCM = n +
.
(22)
2 Io
In the critical conduction mode (CrCM), i.e., the boundary
between the CCM and DCM, both qCCM and qDCM are equal,
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 8, AUGUST 2011
and qCrCM is described by means of (23). Thus, (9) synthesizes
the voltage gain relations for all operational modes
qMCC = qMCD
3 D2
n
=n+ ·
1−D
2 Io
qCrCM −n
D=
qCrCM
2
2Io qCrCM
−3qCrCM +3n = 0
1
· 3 ± 9−24nIo .
qCrCM =
4Io
(23)
B. Modeling and Control
The adopted modeling is based on the development of the
state-space equations for both nonlinear and linear models
of the converter. The small-signal perturbations around the
equilibrium values of the states are applied in the determination
of both input-current and output-voltage control transfer functions. The models obtained show that they are very similar to
the conventional dc–dc boost converter, for instance, traditional
linear control strategies can be used to control it.
The state-space set of equations is defined in (24). The states
x1 , x2 , and x3 represent the inductors’ currents, and the input
current xE is obtained by the instantaneous sum of them. The
voltage across the output capacitor is represented by the state
xC , and the output variable y is the output voltage applied to the
load. Equations (25) and (26) are used to represent the converter
during the energy storage stages and the energy transfer stages,
respectively
x1 = iL1 (t) → ẋ1 =
x2 = iL2 (t) → ẋ2 =
x3 = iL3 (t) → ẋ3 =
xC = vC (t) → ẋC =
diL1 (t)
dt
diL2 (t)
dt
diL3 (t)
dt
dvC (t)
dt
⎧
D
L · ẋ1 + rL · x1 = E − Y +2V
⎪
n
⎪
⎪
⎪
D
⎪
L · ẋ2 + rL · x2 = E − Y +2V
⎪
n
⎪
⎪
⎪
Y + 2VD
⎪
⎪
⎪ L · ẋ3 + rL · x3 = E −
⎪
⎨
n
3
⎪
L·ẋE +rL ·xE = n
[nE−(Y +2VD )]
⎪
⎪
⎪
⎪
L · ẋE + rL · xE = n3 [nE − (Y + 2VD )]
⎪
⎪
⎪
1
⎪
⎪
(R · xE − xC n)
C · ẋC = C·n·(R+Rse)
⎪
⎪
⎪
⎩Y =
R
n(R+Rse) (Rse · xE − xC n).
Equation (27) describes the switched state-space model of
the converter in terms of the switching function f . For the design of conventional feedback control compensation, it requires
a model describing the converter’s response to the modulating
signal or the duty ratio d(t)
⎧
[(3E−rL xE )n2 (R+rC )−3R(1−f )(rC xE +nxC )]
⎪
⎪ ẋE =
n2 L(R+rC )
⎨
(1−f )xE −nxC
(27)
ẋC = nC(R+rC )
⎪
⎪
⎩
)rC xE +nxC ]
y = R[(1−f
.
n(R+rC )
In (28), d represents the local average value of function
f (t) in a switching period. Applying the same concepts for all
variables in (27), (29) is obtained, where the notation (∧ ) means
that the variables are represented by their local average value
ˆ = 1
d(t)
TS
t
f (τ )d(τ )
t−TS
dˆ = fˆ(t)
⎧
2
)(rC x
−rL x
(3E
E )n (R+rC )−3R(1−d
E +nx
C)
⎪
⎪
ẋ
=
⎪
E
n2 L(R+rC )
⎪
⎨
(1−
d
)
x
−nx
E
C
ẋ
C = nC(R+rC )
⎪
⎪
⎪
⎪
)rC x
R (1−d
E +nx
C
⎩
y =
.
n(R+rC )
(28)
(29)
To allow that the linear averaged models plus small perturbations around it represent the dynamic of the converter, the
dˆ variable must be described in terms of its rated value (D)
ˆ From these assumptions, (30)
and of its small perturbations d.
represents the control variable modeled by its instantaneous
average value
xE = x1 + x2 + x3
d (iL1 (t) + iL2 (t) + iL3 (t))
= ẋ1 + ẋ2 + ẋ3
ẋE =
dt
y = vo (t)
(24)
⎧ L · ẋ + r · x = E
1
L
1
⎪
⎪
⎪
⎪
⎪
L · ẋ2 + rL · x2 = E
⎪
⎪
⎪
⎪
⎪
L · ẋ3 + rL · x3 = E
⎪
⎪
⎨
L·ẋE +rL ·xE =3E
(25)
⎪
⎪
L
·
ẋ
+
r
·
x
−
3E
=
0
⎪
E
L
E
⎪
⎪
⎪
⎪
1
⎪ C · ẋC + (R+Rse)
· xC = 0
⎪
⎪
⎪
⎪
⎩
R
Y − xC (R+Rse)
=0
(26)
d = d + D.
(30)
The equilibrium values of the states can be computed by (31).
It was determined doing the ẋ
E and ẋC in (29) equal zero
xE = IE =
xC = Vo =
rL·n2 (R
3nVo (1 − D)(R+Rse)
+ Rse)+3R(1 − D) [Rse + R(1 − D)]
IE R(1 − D)
.
n
(31)
Extending the concepts of small perturbations (∼), applied
in (30), to all variables of the system described in (31), the
nonconservative linearized converter model is obtained, as described in (32), shown on top of the next page.
OLIVEIRA AND BARBI: STEP-UP DC–DC CONVERTER WITH HF TRANSFORMER FOR POWER SOURCE APPLICATIONS
3579
x
E = IE + x
E
x
C = Vo + x
C
d = D + d
⎧
rL n2 (R+rC )+3RrC (1−D)
3R(rC IE +nVo ) 3R(1−D)
⎪
˙E
−
−
2 L(R+r )
x
⎪
x
E
n
nL(R+r
)
n2 L(R+rC )
C
C
⎪
⎪
·
· d
+
⎨ x
RIE
˙C =
R(1−D)
1
x
C
−
− C(R+rC )
nC(R+rC )
nC(R+rC )
⎪
RrC (1−D)
⎪
xE
⎪
RrC IE
R
⎪
· d
Y = n(R+rC ) (R+rC ) ·
+ − n(R+r
⎩
)
C
xC
S + ωZi
2
S
+ ωSo Q + 1
ωo
GI (S) =
xE (S)
= Gpi d(S)
GV (S) =
xC (S)
= Gpv d(S)
(32)
S − ωZv
2
S
+ ωSo Q + 1
ωo
(33)
rL n2 (R + rC ) + 3R(1 − D) [R(1 − D) + rC ]
LC
√
LC [n(R + rC )] rL n2 (R + rC ) + 3R(1 − D) [R(1 − D) + rC ]
Q=
(R + rC ) {n2 [rL C(R + rC ) + L] + 3RCrC (1 − D)} rL n2 (R + rC ) + 3R(1 − D) [R(1 − D) + rC ]
2
9RVo n(1 − D)(R + rC ) C 2RrC + R2 (1 − D) − RDrC + rC
Gpi =
{rL n2 (R + rC ) + 3R(1 − D) [R(1 − D) + rC ]}2
1
ωo =
n(R + rC )
2R(1 − D) + rC
2]
C [2RrC + R2 (1 − D) − RDrC + rC
3Vo R(R + rC )(1 − D) n2 L(R + rC )
Gpv = −
{rL n2 (R + rC ) + 3R(1 − D) [R(1 − D) + rC ]}2
ωZi =
ωZv =
3R2 (1 − D)2 − rL n2 (R + rC )
n2 L(R + rC )
Applying the Laplace transformation concepts on (31) and
(32), (33) and (34), shown on top of the page, are obtained.
These ones, considering nonidealities like the series resistances
of both input inductors (rL ) and output capacitor (rC ), are
very similar to the conventional dc–dc boost converter transfer
function.
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Sérgio Vidal Garcia Oliveira (S’00–M’05) was
born in Lages, Brazil, in 1974. He received the B.S.
degree in electrical engineering from Universidade
Regional de Blumenau–FURB, Blumenau, Brazil, in
1999 and the M.Sc. and Ph.D. degrees in electrical engineering from the Universidade Federal de
Santa Catarina, Florianopolis, Brazil, in 2001 and
2006, respectively.
Since 2005, he has been a Lecturer on power
electronics and electric drives with the Universidade
Regional de Blumenau–FURB. His research topics
of interests are ac–ac and dc–dc power converters, adjustable speed drives, distributed generation systems, and converters applied to hybrid vehicle electronic
systems and to embedded systems.
Dr. Oliveira is a member of the Brazilian Power Electronics Society
(SOBRAEP).
Ivo Barbi (M’78–SM’90–F’11) was born in Gaspar,
Brazil, in 1949. He received the B.S. and M.S. degrees in electrical engineering from the Universidade
Federal de Santa Catarina (UFSC), Florianopolis,
Brazil, in 1973 and 1976, respectively, and the
Dr.Ing. degree from the Institut National Polytechnique de Toulouse, Toulouse, France, in 1979.
He is the Founder of the Power Electronics Institute, UFSC, where he is currently a Professor and the
Leader of the Power Electronics Program.
Dr. Barbi has served on the IEEE Industrial Electronics Society as an Associate Editor of the IEEE T RANSACTIONS ON
I NDUSTRIAL E LECTRONICS in the power converter area. He is the Founder
of the Brazilian Power Electronics Society.