The University Of Texas At Tyler Pspice Archive

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AC 2008-995: THE UNIVERSITY OF TEXAS AT TYLER PSPICE ARCHIVE
David Beams, University of Texas at Tyler
DAVID M. BEAMS is an Associate Professor of Electrical Engineering at the University of
Texas at Tyler. He received his BS and MS degrees from the University of Illinois at
Urbana-Champaign in and the Ph.D. from the University of Wisconsin-Madison. He has had over
16 years of industrial experience in addition to his 10 years with UT-Tyler. He is a licensed
professional engineer in Wisconsin and Texas and holds or shares four patents.
Page 13.1277.1
© American Society for Engineering Education, 2008
The University of Texas at Tyler PSpice Archive
Abstract
PSpice (Cadence, San Jose, CA), has become a de facto standard for courses in electric and
electronic circuits. Its popularity stems from the ready availability of the evaluation (student)
version and the inclusion of the evaluation version with a number of widely-used textbooks in
these courses. Many textbooks also provide access to example circuit files either in CD form or
through a companion web site. However, faculty at the University of Texas at Tyler have
frequently found it valuable to develop their own analyses to better illustrate particular topics or
to simulate circuits found in laboratory courses. These analyses include standard types of
circuits (e.g., simple operational amplifier circuits, LRC circuits) and more-advanced ones (e.g.,
a current-feedback operational amplifier implemented at the transistor level). These circuit
analyses had been accumulating over a period of some years; a recently-initiated effort aims to
rationalize their organization and to document the resources available in the archive with the
intention of making the archive publicly available. This paper describes the organization of the
archive, the resources available, and its incorporation into the curriculum.
Introduction
PSpice is a de facto standard circuit-analysis package for courses in electric and electronic
circuits. Its popularity is attested by the fact that searching the “books” category of Amazon.com
for the keyword “PSpice” produced 520 “hits.” (By comparison, a similar search for
“Electronics Workbench” produced 312 “hits”). The evaluation version of PSpice is frequently
bundled with textbooks. Examples of these include texts on general circuit analysis 1, general
electronics 2,3, communication systems 4,5, power electronics 6, and photovoltaic systems 7.
There are also textbooks intended as primers or introductions to PSpice itself 8,9,10,11. Publishers
often support web sites that provide worked-out examples from the textbooks.
However, it is often easier to create one’s own additional PSpice examples rather than to sift
through the mountain of available resources. This was the genesis of the PSpice Archive of the
University of Texas at Tyler. The collection began as an ad hoc effort to provide educational
resources to students in courses in electronics and instrumentation systems and had no particular
organization. As the number of examples grew, however, the need became apparent to give the
archive a rational structure and logical organization, and it has since been organized into
categories (e.g., diodes and applications, MOSFETS, and amplifier circuits).
Organization of the PSpice Archive
The archive is a work in progress and is continually being modified. At the end of the fall
semester of 2007, however, the PSpice Archive was organized into the categories outlined in
Table 1 below.
Page 13.1277.2
Table 1. Organization of the PSpice Archive (December, 2007)
Section
Diodes
BJTs
MOSFETs
Amplifiers
Oscillators
Active filters
Logic
General circuits
Description of available analyses
I-V curves vs. temperature; half- and full-wave rectifiers; clamp
circuit; voltage doubler; zener voltage regulator; triangle-to-sine
converter; varactor diode.
I-V characteristics; bias circuits; common-emitter and commonbase amplifiers; emitter follower; cascode amplifier.
I-V characteristics; MOS digital inverters; common-gate and
common-source amplifiers; source follower
Midband and high-frequency analyses of the BJT differential pair;
instrumentation amplifier; op amp macromodels; bipolar op amp
(constructed in EENG 4109 laboratory); CMOS op amp; currentfeedback op amp; ac model of the emitter follower.
Astable multivibrator; Colpitts oscillator; Pierce oscillator; phaseshift oscillator; Wein bridge oscillator; crystal oscillator
Two-pole low-pass filter (LPF); 5th-order Butterworth LPF; KHN
biquad circuit (state-variable filter); Tow-Thomas biquad;
capacitance multiplication and inductor synthesis with a
generalized impedance converter (GIC); bandpass and band-reject
filters using GICs.
Transient analysis of PMOS, NMOS, and CMOS inverters;
pseudo-NMOS inverter; pass-transistor logic; edge-triggered Dtype flip-flop
Current mirrors; two-port network; Wheatstone bridge; quartz
crystal ac model; impedance matching with pi-networks; threeterminal linear voltage regulator (similar to LM340); multiplying
and switching phase-sensitive demodulation; ground-referenced
current source; Fourier-series analyses
Total:
Total
analyses
9
6
5
9
7
10
5
17
68
All schematics for the circuits listed above were drawn with OrCAD Capture and simulated with
the evaluation version of PSpice 9.2. It was vital that analyses be within the capabilities of the
evaluation version of PSpice since few students have access to the professional version. This
restriction imposes limits on the models available, but this also provides an opportunity for
illustrating to students how to make and edit their own models.
Example: I-V characteristics of MOSFETs
Page 13.1277.3
The following examples illustrate some of the analyses available within the PSpice archive.
Figure 1 below from the MOSFETs section of the archive is for determining the I-V
characteristics of MOSFETs. The two MOSFETs have electrical characteristics given by Sedra
and Smith typical of a 5µm CMOS process12. This particular circuit includes eight separate dc
sweep analysis profiles, four for each device (NMOS and PMOS):
•
•
•
•
determination of ID vs VDS;
determination of transconductance gm;
determination of small-signal channel resistance rd;
determination of the body effect on ID vs. VDS characteristics.
PARAMETERS:
WN = 5u
LN = 5u
MN = 10
WP = 5u
LP = 5u
MP = 10
W = {WN}
L = {LN}
M = {MN}
I
Vdeltan
DC = 10
AC =
TRAN =
0
0
M2
MPSED
DC = 0
AC =
TRAN =
VGN
DC = 5
AC =
TRAN =
VDDP
DC = -10
AC =
TRAN =
Vdeltap
M1
MNSED
DC = 0
AC =
TRAN =
W = {WP}
L = {WP}
M = {MP}
VDDN
VBP
VGP
DC = -5
AC =
TRAN =
VBN
DC = 0
AC =
TRAN =
0
0
0
AC =
TRAN =
DC = 0
0
0
0
Fig. 1. PSpice archive circuit for determination of electrical characteristics of MOSFETs.
Figure 2 shows the results of simulation of the ID vs VDS characteristics of the NMOS device with
gate-to-source voltages swept from 1.5V to 5.0V in increments of 0.5V.
I D vs V DS Characteristics for NMOS device
4.0E-03
Drain current, A__
3.5E-03
3.0E-03
2.5E-03
2.0E-03
1.5E-03
1.0E-03
5.0E-04
0.0E+00
0
2.5
5
7.5
10
Drain-to-source voltage, V
Page 13.1277.4
Fig. 2. Drain current vs. drain-to-source voltage characteristics of the NMOS transistor in Fig. 1.
Results were copied from the Probe graphics post-processor into Excel for graphing.
Figure 3 shows results of the body effect in the NMOS transistor. The gate-to-source voltage
(VGN in Fig. 1) was fixed at 5.0V and the drain current was recorded as the drain-to-source
voltage (VDDN in Fig. 1) was swept from 0 to 10V for substrate-to-source voltages (VBN in
Fig. 1) from 0V to –2.5V in increments of –0.5V.
I D-V DS characteristics vs. V BS for NMOS device
V BS = 0 to -2.5V in increments of -0.5V
Drain current, A__
4.0E-03
3.5E-03
3.0E-03
2.5E-03
2.0E-03
1.5E-03
1.0E-03
5.0E-04
0.0E+00
0.0
5.0
10.0
Drain-to-source voltage, V
Fig. 3. Illustration of the body effect in the NMOS device of Fig. 1. The traces show drain
current vs. drain-to-source voltage characteristics as body-to-substrate voltage varies in
increments of –0.5V from 0V (top trace) to –2.5V (bottom trace).
Example: open- and closed-loop analysis of a Pierce oscillator
The Pierce oscillator shown in Fig. 4 is found in the Oscillators section of the archive. This
circuit consists of a CMOS inverter operating as a linear amplifier and a feedback network
consisting of capacitors C1 and C2 and inductor L1.
Page 13.1277.5
Two simulation profiles have been created for this circuit. One profile performs ac analysis from
100kHz to 100MHz with the feedback loop open to determine whether the loop gain meets the
Barkhausen criterion for oscillation at any frequency. The other performs transient analysis with
the feedback loop closed to determine whether the circuit manifests steady-state oscillatory
behavior. It is of particular pedagogical interest to compare the findings of the ac analysis of
loop gain with the transient response. The ac analysis profile includes a parametric sweep in
which the value of parameter TRAN in Fig. 4 is set to a value of 0. This causes the computed
value of resistor R7 to become very small (10mΩ), short-circuiting the output of the CMOS
inverter to ground through capacitor C6 (whose reactance is negligible at the analysis
frequencies). At the same time, computed parameter AC takes on the value of 1 causing resistor
R6 to become very large (10MΩ). This opens the feedback loop. Current source I2 provides the
ac stimulus; the response is the current flowing through C6. By giving I2 a value of 1A, the
magnitude and phase of the current in C6 are numerically equal to the magnitude and phase of
the loop gain.
C3
C1
10n
470pF
I3
TD = 0
TF = 10n
PW = 1u
PER = 1
I1 = 0
I2 = 0
TR = 10n
0
L1
Vdd
10uH
MP4007 M2
R1
10K
0Adc
1Aac
0
R6
0
0
L = 7u
W = 50u
R3
I2
{10e6*AC+1m}
Vdd
V1
2.2MEG
M1
C2
W = 25u
L = 7u
C6
10uF
5V
I
MN4007
R7
{10e6*TRAN+10m}
470pF
0
0
0
0
P ARAM ET ERS:
AC = {1-TRAN}
TRAN = 0
Fig. 4. Pierce oscillator circuit based upon a CMOS inverter. The MOSFET models were
derived from laboratory measurements of CD4007 devices.
Figure 5 shows the loop gain of the Pierce oscillator. The phase of the loop gain passes through
0˚ at 3.277MHz; at this frequency, the magnitude of the loop gain is 8.85dB.
Pierce oscillator loop gain
Gain, dB
Phase, deg
20
150
Loop gain, dB__
0
100
-10
-20
50
-30
-40
0
-50
-60
Loop phase, degrees__
10
-50
-70
-80
1.0E+05
1.0E+06
1.0E+07
-100
1.0E+08
Frequency, Hz
Page 13.1277.6
Fig. 5. Loop gain plot produced by ac sweep analysis of the Pierce oscillator of Fig. 4. The plot
indicates that oscillation should take place at a frequency of 3.277MHz when the loop is closed.
Selecting the transient analysis profile sets parameter TRAN to 1 and causes parameter AC to
take on the value of 0. These make the value of R7 very large (10MΩ) and the value of R6 very
small (1mΩ); the ac short-circuit to ground through C6 and R7 is removed and the feedback loop
is closed. A transient current source (I3 in Fig. 4) is used to provide initial energy to start the
oscillation. Figure 6 shows the results of transient simulation of the circuit of Fig. 4.
Measurement of the period of the sinusoidal waveform in Fig. 6 gives an output frequency of
3.235MHz, which agrees well with the oscillation frequency predicted by ac analysis of the loop
gain. The analyses of Figs. 5 and 6 may be repeated with various values of components (e.g.,
load resistor R1 in Fig. 4) or FET parameters (e.g, channel width W) to illustrate the application
of the Barkhausen criterion to determine under what conditions this circuit will become a selfsustaining oscillator.
Pierce oscillator transient response
Output voltage, V__
3
2
1
0
-1
-2
-3
248
248.2
248.4
248.6
248.8
249
249.2
249.4
249.6
249.8
250
Time, us
Fig. 6. Steady-state transient response of the Pierce oscillator of Fig. 4.
Example: simple operational amplifier
Page 13.1277.7
One of the experiments in EENG 4109 (Electronic Circuit Analysis II Laboratory) is the
construction and test of a simple operational amplifier using LM3086 matched-transistor arrays.
A PSpice model of this amplifier whose schematic is given in Fig. 7 was developed for
comparison with measured performance. The model parameters for the LM3086 and 2N4401
devices were obtained from commercial on-line sources and the PSpice model editor was used to
create the LM3086 and Q2N4401 models from the generic QBreakN NPN transistor model. The
circuit of Fig. 7 shows the operational amplifier configured with external resistors R7 and R8 as
a noninverting amplifier with a nominal closed-loop gain of +11. The signal voltages for the
amplifier are either a 20kHz square wave or a sinusoidal ac source. The simulation profiles
created for this circuit are ac response and transient response. Parametric sweep is enabled in
both profiles to perform the analyses with values for compensation capacitor C1 of 1pF, 10pF,
and 100pF.
R2
R3
1k
1k
PARAM ET ERS:
Vcc
Ccomp = 10pF
15V
Q2N3906
Q10
Q2N3906
Q9
Q8
R6
Q2N3906
47K
Q6
C1
Q2N4401
{Ccomp}
D1
Q1
LM3086
Q2
LM3086
D3
0
R4
D1N4148
100
D2
R5
D1N4148
D1N4148
Output
V
100
Q7
D4
Q2N3906
D1N4148
Q4
Q5
Vee
15V
LM3086
LM3086
Q3
LM3086
Noninverting
input
R9
470
R1
470
V-
R7
10k
0
R10 470
V+
V1
R8
Inverting input
100K
1Vac
0Vdc
V1 = 0
V2 = 1
TD = 0
TR = 100n
TF = 100n
PW = 24.9u
PER = 50u
V4
0
Fig. 7. Schematic diagram of a simple operational amplifier constructed in EENG 4109. Also
included is a resistive feedback network (R7 and R8) and driving-point sources for ac and
transient analyses.
A command file for the Probe graphics post-processor displays the open-loop voltage gain of the
operational amplifier. Fig. 8 shows the magnitude and phase of the open-loop voltage gain of the
circuit of Fig. 7 with a compensation capacitor C1 of 10pF. The simulation gives an
approximate dc open-loop gain of 87dB (22,000) with a gain-bandwidth product of 26MHz.
The dc open-loop gain measured by experiment is typically close to this value, although lower
gain-bandwidth products are usually noted (typically 18MHz). Figure 8 also shows that the
operational amplifier should be stable at unity gain with a gain margin of approximately 9dB.
Computation of open-loop gain vs. frequency allows the determination of closed-loop phase and
gain margins, and these may in turn be related to transient response. Figure 9 shows the
predicted transient response of the simple operational amplifier with a compensation capacitor of
10pF configured as a nonverting amplifier with a nominal gain of 11. The transient response
shows little overshoot or ringing, commensurate with an estimated gain margin in this circuit of
29dB.
Page 13.1277.8
Open-loop gain, dB_
Open-loop gain of simple operational amplifier
100
45
80
0
60
-45
40
-90
20
-135
0
-180
-20
-225
AVOL, dB
Phase
-40
1.0E+00
1.0E+01
1.0E+02
1.0E+03
1.0E+04
1.0E+05
1.0E+06
1.0E+07
-270
1.0E+08
Frequency, Hz
Fig. 8. Computed open-loop voltage gain vs. frequency for the simple operational amplifier of
Fig. 7 with a compensation capacitor of 10pF. This plot shows that the simple operational
amplifier with unity feedback would have a gain margin of 9dB and would be unity-gain stable.
This agrees with laboratory experience.
Transient response of simple operational amplifier
Input
Output
15
12.5
Voltage, V_
10
7.5
5
2.5
0
-2.5
0
20
40
60
80
100
Time, us
Page 13.1277.9
Fig. 9. Transient response of the simple operational amplifier configured as a noninverting
amplifier with voltage gain of +11. The open-loop gain vs. frequency of the operational
amplifier is shown in Fig. 8.
Curricular use
The analyses represented in the PSpice Archive have been accumulated over a period of some
years, but there was no effort to systematize the circuits until 2007. The PSpice archive has
since been integrated into both EENG 3306 (Electronics I) and EENG 4309 (Electronics II) and
their companion laboratory courses. Students find the archive to be a valuable asset; for
example, 10 students in Electronics I in the fall semester of 2007 gave the PSpice archive as an
instructional resource a mean rating of 2.6 on a scale from 0 (useless) to 3 (essential).
Assessment data from EENG 4309 will be obtained at the end of the current semester.
It is not the intention to present the PSpice Archive as a closed canon; it instead should be
regarded as an ongoing work-in-progress. To this end, additional circuits and additional analyses
of existing circuits are solicited, and submissions included in the PSpice Archive will be credited
to their originators.
Conclusion
The PSpice Archive has been developed to illustrate both a wide range of circuits and analysis
techniques. It has shown itself useful as a pedagogical tool in demonstrating both the principles
underlying the circuits and techniques for using PSpice. The archive is a work in progress and is
constantly under revision and expansion, and example circuits from other contributors for
inclusion in the archive are welcomed. Index files (in the form of Word documents) are being
added to the archive sections to explain what circuits and analyses are available. The current
edition of the PSpice Archive is available for download as .zip files from the following URL:
http://ee.uttyler.edu/David_Beams/Projects/pspice archives/PSpice Archives.htm
Bibliography
1. Nilsson, J., and Riedel, S. Electric Circuits, 8th Edition. Prentice-Hall, 2007.
2. Hambley, A. Electronics, 2nd Edition. Prentice-Hall, 2000.
3. Sedra, A., and Smith, K. Microelectronic Circuits, 5th Edition. New York: Oxford University Press, 2003.
4. Tobin, P. PSpice for Digital Communications Engineering. Morgan and Claypool, 2007.
5. Tobin, P. PSpice for Analog Communications Engineering. Morgan and Claypool, 2007.
6. Rashid, M., and Rashid, H. SPICE for Power Electronics and Electric Power, 2nd Edition. Boca Raton, FL:
CRC Press, 2006.
7. Castaner, L., and Silvestre, S. Modelling Photovoltaic Systems Using PSpice. John Wiley, 2003.
8. Rashid, M. Introduction to PSpice Using OrCAD for Circuits and Electronics, 3rd Edition. Prentice-Hall, 2003.
9. Nilsson, J., and Riedel, S. Introduction to Pspice Manual: Electric Circuits : Using Orcad Release 9.1.
Prentice-Hall, 1999.
10. Tront, J.G., and Tront, J. PSpice for Basic Circuit Analysis. McGraw-Hill, 2004.
11. Attia, J.O. PSPICE and MATLAB for Electronics: An Integrated Approach. Boca Raton, FL: CRC Press, 2002.
12. Sedra, A., and Smith, K., op. cit., p. 355.
Page 13.1277.10
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