Complex Data Acquisition System Uses Few Components

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Complex Data Acquisition System Uses Few Components
Design Note 24
Richard Markell
Introduction
Sophisticated filter system designs frequently demand
expensive printed circuit boards chock-full of operational amplifiers and precision capacitors. Digital filters
require fewer but more expensive devices and a lot of
software. However, advances in switched capacitor
filters have made the design of elegant filter systems
cheaper, easier and much smaller. The system shown
in block diagram form in Figure 1 is a good example. It
is a typical system for filtering transducer signals. Its
input is a DC-to-20kHz signal; its output allows signals
to be analyzed in three frequency bands.
INPUT
DC-20kHz
400Hz HPF
10kHz LPF
OUTPUT 1
400Hz–10kHz
BPF
1kHz LPF
OUTPUT 2
10Hz–1000Hz
BPF
100Hz LPF
OUTPUT 3
10Hz–100Hz
BPF
10Hz HPF
400Hz 10kHz
10Hz 1000Hz
10Hz 100Hz
DN024 F01
Figure 1. Filter System Block Diagram
Implementation
A system implemented using switched capacitor
filters is shown in schematic form in Figure 2. This
implementation uses two LTC®1064 quad switched
capacitor building blocks and one LTC1062 5th order
Butterworth lowpass filter. The system requires the use
of one operational amplifier, an LT®1007.
Filter Design Specifications and Test Results
Filter 1 – a 400Hz-to-10kHz bandpass filter, with passband ripple of 1dB and passband noise of 200μVRMS,
Figure 3.
Filter 2 – a 10Hz-to-100Hz bandpass filter, with passband
ripple of 1dB and passband noise of 500μVRMS, Figure 4.
Filter 3 – a 10Hz-to-1kHz bandpass filter, with passband
ripple of 1dB and passband noise of 390μVRMS, Figure 5.
These wideband filters are made by cascading 4th
order elliptic lowpass and highpass filters. The single
exception is the 5th order Butterworth lowpass filter
used in the 400Hz-to-10kHz section.
System Considerations
The LTC1064 quad switched capacitor filters used are
building blocks capable of implementing up to 8th
order filters. One LTC1064 implements both a 4-pole
elliptic 400Hz highpass filter and a 4-pole elliptic 1kHz
lowpass filter. The other LTC1064 implements a 4-pole
elliptic 100Hz lowpass filter and a 4-pole elliptic 10Hz
highpass filter. The LTC1062 is a 5-pole Butterworth
lowpass filter set at 10kHz.
Resistors R11A to RH2A implement the 400Hz elliptic
highpass filter in Device A. The 1kHz elliptic lowpass filter
in Device A is implemented by R13A to R44A. Resistors
R11B1 to R42B implement the 10Hz elliptic highpass filter
in Device B. The 100Hz elliptic lowpass filter in Device B
is implemented by R13B through R44B. The LTC1062 is
hardware programmed for 10kHz by R50 and C50.
The 8th order LTC1064 devices allow the use of two sections in the 100:1 clock-to-center frequency mode and
two sections in the 50:1 mode. (Resistor programming
can then be used to further extend the clock-to-center
frequency range to 25:1 for two sections and 250:1
for the other two sections.) This allows decade-wide
bandpass filters to be built using only one LTC1064 at
one clock frequency.
Conclusion
This is only one use of the new switched capacitor
building blocks, the LTC1064 family of quad switched
capacitor filters. These filters have wide flexibility. For
example, the 10Hz-to-100Hz filter could be used at
20Hz-to-200Hz simply by doubling the clock, which
sets the filter frequency. Similarly, bans of interest could
be inspected by sweeping the clock. The devices work
with center frequencies as high as 100kHz in circuits
with similar simplicity.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
07/89/24_conv
FROM 10Hz
HP OUT
(PIN 14 – DEVICE “B”)
FROM 10Hz
HP OUT
(PIN 14 – DEVICE “B”)
R13-A
6.8k
RH3-A
53.6k
R43-A
10.2k
R33-A
33.2k
R13-B
25.5k
LTC1064–DEVICE “A”
TOP VIEW
R23-A
10.0k
R24-A
11.3k
INV C 24
1 INV B
R34-A
16.2k
RH3-B
215k
R44-A
38.3k
R43-B
10.0k
R33-B
53.6k
R23-B
39.2k
3 BPB
BPC 22
4 LPB
LPC 21
1kHz
LPF (50:1)
R41-A
15.4k
R31-A
44.2k
R21-A
10.0k
10Hz–1000Hz
BPF OUTPUT
100Hz
LPF (50:1)
7 V+
CLK 18
8 SA
50/100 17
9 LPA
LPD 16
10 RFA
RFD 15
11 HPA
HPD 14
12 INV A
INV D 13
10Hz 1000Hz
50kHz CMOS/TTL
RL2-A
1.82M
10Hz
HPF (100:1)
RG2-A
16.2k
R22-A
34.8k
TO R11-A
SYSTEM
INPUT
R32-A
18.2k
R42-A
15.4k
C50
0.001μF
5%
TO R11-B
0 400Hz
400Hz
HPF OUTPUT
(4-POLE)
–
+
LT1007
1 FB
3 V–
0.1 AT EACH
DEVICE
+
V
4 ÷
SYSTEM
INPUT
400Hz 10kHz
BOUT 8
2 AGND
FILTERS AND OP AMP V+
R41-B
63.4k
R50
25.5k
LTC1062
8V
10μF
TANT
BPC 22
4 LPB
LPC 21
5 SB
SC 20
R44-B
162k
OUT 7
V+ 6
COSC 5
RH1-B1
16.2k
R31-B
88.7k
R21-B
10.0k
CLK 18
8 SA
50/100 17
RFD 15
11 HPA
HPD 14
12 INV A
INV D 13
INPUT
ANTI-ALIAS
C18 = 430pF 5% FILTER
10Hz 100Hz
2.5kHz CMOS/TTL
LPD 16
10 RFA
R11-B2
210k
10Hz–100Hz
BPF OUTPUT
V– 19
7 V+
9 LPA
RH2-A
10.0k
RH1-A
10.0k
R11-A
56.2k
3 BPB
6 AGND
V– 19
6 AGND
400Hz
HPF (100:1)
R34-B
133k
2 HPB/NB HPC/NC 23
RL3-B
10.0k
SC 20
5 SB
R24-B
191k
INV C 24
1 INV B
2 HPB/NB HPC/NC 23
RL3-A
10.0k
LTC1064–DEVICE “B”
TOP VIEW
TO R13-B
R22-B
34.8k
R32-B
36.5k
R42-B
63.4k
TO R13-A
DN024 F02b
RH1-B
10.0k
0 10Hz
10Hz
HPF OUTPUT
(4-POLE)
ALL RESISTORS 1%
BUFFERED
OUTPUT
400Hz-10kHz
1MHz CLOCK
INPUT
(–5V TO 5V)
DN024 F02a
–8V
10μF
TANT
0.1 AT EACH
DEVICE
FILTERS AND OP AMP V–
Figure 2. Schematic Diagram
0
–26dBV
AMPLITUDE (dB)
AMPLITUDE (dB)
–5
–10
–15
–20
–25
10dB/DIV
–106
START: 1Hz
–30
–35
DN024 F04
2Hz 2.5Hz
–48.8dB
–40
5Hz
10Hz 12Hz 20Hz
50Hz
100Hz
200Hz 260Hz STOP: 450Hz
0.6dB
0.02dB
–49.0dB
FREQUENCY
–45
100
1k
10k
FREQUENCY (Hz)
100k
Figure 4. 10Hz-100Hz BPF Amplitude Response
DN024 F03
Figure 3. 400Hz-10kHz BP Filter
Amplitude Response
AMPLITUDE (dB)
–26dBV
10dB/DIV
–106
START: 1Hz 2Hz
–41.1dB
DN024 F05
5Hz 10Hz 20Hz
50Hz 100Hz
–2.7dB
–33.8dB
200Hz
500
1k
–0.4dB
2k
–37dB
5k STOP: 10 400Hz
–44dB
FREQUENCY
Figure 5. 10Hz-1000Hz BPF Amplitude Response
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