Jpn. J. Appl. Phys. Vol. 38 (1999) pp. 1200–1203
Part 1, No. 2B, February 1999
c
°1999
Publication Board, Japanese Journal of Applied Physics
Fabrication and Characterization of InP Heterojunction Bipolar Transistors
with Emitter Edges Parallel to [001] and [010] Crystal Orientations
Noureddine M ATINE1,2, ∗ , Martin W. DVORAK1 , Jean-Luc P ELOUARD2 , Fabrice PARDO2 ,
and Colombo R. B OLOGNESI1
1 Compound
Semiconductor Device Laboratory (CSDL) Simon Fraser University, Burnaby, British Columbia, Canada, V5A 1S6
196 Av. H. Ravéra-92225 Bagneux Cedex, France
2 L2M-CNRS,
(Received June 22, 1998; accepted for publication August 3, 1998)
We present a study of fully-self aligned InP-based heterojunction bipolar transistors (HBTs) with the emitter edges oriented
parallel to the [0,0,1] and [0,1,0] crystal orientations. A technology based on vertical and lateral wet etching of InP was
developed to fabricate emitter-up and collector-up InP/InGaAs HBTs with reduced parasitic resistances and capacitances. For
emitter-up HBTs, the undercut distance between the base contact and the emitter active area was <0.3 µm in all directions, and
high frequency performance of f T = 105 GHz and f MAX = 82 GHz were obtained for a 4 × 12 µm2 emitter area. For collectorup metal HBTs (MHBTs), emitter widths as small as 0.5 µm were formed by lateral wet etching with a relative area fluctuation
less than 10%, and high frequency performance of f T = 40 GHz and f MAX = 160 GHz were obtained for a 0.5 × 52 µm2
emitter area.
KEYWORDS: HBT, collector-up, InP, crystal orientation, selective wet etching, self-alignment
1. Introduction
Impressive high-frequency results have been reported for
InP-based heterojunction bipolar transistors (HBTs)1, 2) due to
their excellent transport properties: The small base bandgap
provides low turn-on voltage for low power consumption,
and the large 0-L intervalley separation in InGaAs and InP
collectors allow a high carrier velocity overshoot and thus
high speed in both single and double heterojunction devices.
InP/InGaAs abrupt emitters can be used while maintaining
high injection efficiency, and lead to a quasi-ballistic transport across the base. However, to take full advantage of these
favorable conditions and achieve a superior high-speed performance, it is crucial to reduce device parasitics.
In this work, we present a study of fully-self aligned InPbased HBTs with the emitter edges parallel to the [0, 0, 1] and
[0, 1, 0] crystal orientations. A technology based on vertical
and lateral wet etching of InP using HCl:H3 PO4 -based solutions was developed and then applied to fabricate emitter-up
and collector-up InP/InGaAs HBTs. DC performances and
technology characterization for InP/InGaAs emitter-up HBTs
are presented. We also show the high frequency performances
obtained for both emitter-up and collector-up transistors fabricated using these techniques.
2. Self-Aligned InP/InGaAs Emitter-Up HBTs
The layer structure of the emitter-up HBT was grown on
a semi-insulating InP substrate by metal-organic molecular
beam epitaxy (MOMBE).3) The emitter consists of 250 nm
thick InGaAs and 60 nm thick InP heavily doped with Si at
n = 2 × 1019 cm−3 , and a 180 nm thick InP active region
doped to n = 3 × 1017 cm−3 . The base region consists of
a 6 nm undoped InGaAs spacer layer, followed by a 75 nm
thick InGaAs layer doped with Be to p = 3 × 1019 cm−3 . The
collector consists of 600 nm thick InGaAs doped at n = 2 ×
1016 cm−3 , followed by a 300 nm thick InGaAs subcollector
and 200 nm thick InP buffer doped at n = 2 × 1019 cm−3 .
Devices were fabricated using a fully self-aligned triplemesa process by conventional optical contact lithography
∗ E-mail
(AB-M contact aligner). The edges of the emitter electrode
were oriented parallel to the [001] and [010] crystal directions4, 5) to allow the use of rectangular emitters while maintaining a suitable undercut in each direction.6) The emitter
electrode was formed using the lift-off technique by e-beam
evaporation of Ni/Ge/Ni/Au metal. Next, selective wetetching of the InGaAs cap layer (H2 O2 /H3 PO4 /H2 O) was
performed using the emitter electrode as a mask. The InP
emitter layer was then etched using a 1:9 HCl:H3 PO4 solution at 40◦ C, which was found to be the minimum temperature for adequately homogenous etching.6) The Pt/Ti/Pt/Au
base metal was deposited by e-beam evaporation self-aligned
to the emitter contact, using the lift-off technique. The
base/collector mesa was formed by selective wet-etching of
the InGaAs using the base metal as a mask. Just as for the
base metal, the Ni/Ge/Ni/Au collector metal was deposited
by e-beam evaporation self-aligned to the base contact. Finally, individual devices were isolated by deep mesa etching,
and coplanar pads were connected to the HBT electrodes by
an air-bridge technique7) (Fig. 1).
Following the emitter mesa formation, SEM observation
revealed that the minimum undercut of the InP under the InGaAs cap layer was ∼0.1 µm in all directions, and the surface
condition and homogeneity were adequate.
In DC measurements, the maximum current gain β for a
80 × 80 µm2 device was about 100 (Fig. 2). The collector and base ideality factors were n c = 1.02 and n b = 1.2
respectively. Gummel plots and emitter-base diode currents
obtained using 4-probe measurements (Fig. 3) were used to
extract the DC base resistance. Figure 4 shows this base resistance as a function of the reciprocal emitter perimeter for
emitter sizes from 640 × 80 µm2 to 4 × 12 µm2 .
A linear fit of this resistance to an expression of the form:
R = R0 + R1 /P
(1)
gives least-squares fit parameter values of R0 = 0.03±0.05 Ä
and R1 = (175 × 10−4 ± 3 × 10−4 ) Ä·cm. The base resistance
can be approximated by:
address: matine@cs.sfu.ca
1200
Jpn. J. Appl. Phys. Vol. 38 (1999) Pt. 1, No. 2B
Fig. 1.
N. M ATINE et al.
1201
SEM view of fully self-aligned emitter-up HBT.
Fig. 4. Measured emitter-up HBT base resistance (lozenges) versus
1/(emitter perimeter) with best fit line. Contact and access resistance contributions to base resistance are also shown.
Fig. 2. Gummel plot for self-aligned 80 × 80 µm2 emitter-up InP/InGaAs
HBT.
δ
√
rS ρC coth
rS
L t rS 1
RB =
+
+
(2)
P
P
32β
where P is the perimeter, rS is the sheet resistance, ρC is the
specific contact resistivity, δ is the ohmic contact length, L t
is the characteristic contact length, 1 is distance between the
base contact and the base-emitter active region, and β is the
gain of the HBT. Using the values obtained from transmission
line method (TLM) measurements of ρC = 7 × 10−8 Ä·cm2
and rS = 463 Ä/sq, we extract an undercut of 1 = 0.26 µm.
This value agrees well with the undercut measured by scanning election microscopy (SEM), which comprised contributions of ∼0.15 µm for the InGaAs cap layer beneath the emitter metal and ∼0.1 µm for the InP emitter layer beneath the
InGaAs cap.
High frequency S-parameter measurements were performed using an HP 8510B network analyzer from 0.045
to 40 GHz using GGB 40A PicoProbes on 50 Ä coplanar
waveguide pads in the ground-signal-ground configuration.
The cut-off frequency f T and the maximum frequency of oscillation f MAX were estimated by extrapolating the current
gain (|H21 |2 ) and Mason’s unilateral gain (U) respectively at
−20 dB/dec. No de-embedding of pad parasitics was performed. Values of f T = 105 GHz and f MAX = 82 GHz were
obtained for a 4 × 12 µm2 emitter area device at a collector
current density of 70 kA/cm2 and Vce = 1.6 V (Fig. 5).
Further improvement of this self-aligned technology and
better performances will be obtained by scaling the emitter
width to ∼1 µm. For aggressively scaled devices, it will be
equally important to reduce the access resistance contribution
to the base resistance by using a combined wet and dry etching technique that minimizes the undercut distance.2)
3. Self-Aligned InP/InGaAs Collector-Up MHBTs
Fig. 3. Typical collector current from Gummel plot and emitter-base diode
characteristic for 8 × 10 µm emitter size HBT.
For the collector-up MHBT, a detailed description of the
fabrication process and layer structure used was given in
refs. 5 and 8. Briefly, the emitter consists of a 100 nm
thick InP active region, and a 300 nm thick heavily doped
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Jpn. J. Appl. Phys. Vol. 38 (1999) Pt. 1, No. 2B
Fig. 5. Maximum current gain and unilateral gain of 4 × 12 µm2
InP/InGaAs HBT. The −20 dB/dec lines show extrapolated f T = 105 GHz,
f max = 82 GHz
N. M ATINE et al.
Fig. 7. Measured collector-up MHBT base resistance (lozenges) versus
1/(emitterăperimeter) with best fit line. Inset shows distance 1 between
the emitter and the base metallization.
Fig. 6. Side-on SEM view of collector-up MHBT with extrinsic InP emitter removed by lateral wet etching.
InP sub-emitter, grown on a heavily doped InGaAs buffer.
The base region consists of 150 nm heavily p-doped InGaAs
and 450 nm undoped InGaAs forms the active collector. The
Schottky collector contact is a 300 nm tungsten layer deposited by sputtering, and the base metallization is 10 nm of
Mn and 100 nm of Au.
Devices were fabricated using a fully self-aligned process
with the edges of the mask parallel to the [001] and [010]
crystal directions. In collector-up technology, electron injection into the extrinsic base-emitter region must be suppressed.
In our technology we simply remove the extrinsic emitter by
lateral wet etching of InP beneath the base so that the emitter
area equals the collector area. This is only possible because of
the choice of mask orientation and the use of fully self-aligned
technology. If the mask edges are parallel to the principal
crystal directions, the lack of undercut on the edges parallel to
the [011̄] direction makes it impossible to remove the entire
extrinsic area without massive overetching. In the MHBTs,
the lateral etching of the 400 nm thick extrinsic emitter was
performed using a 1:9 HCl:H3 PO4 solution at 60◦ C (Fig. 6).6)
MHBTs with several emitter lengths and widths ranging from
2.5 µm to 52 µm and 0.5 µm to 4 µm respectively, were fabricated.
Fig. 8. Distribution of lateral undercut distance measured using SEM for
53 collector-up MHBTs.
The base resistance determined using the same extraction
techniques as for the emitter-up HBTs is plotted versus the
reciprocal emitter perimeter in Fig. 7. A linear fit to eq. (1)
gives least-squares fit parameter values of R0 = 9.5 ± 2.0 Ä
and R1 = (1411 × 10−4 ± 75 × 10−4 ) Ä·cm. The resistance
is larger than for the emitter-up HBTs, in part because of the
larger base sheet resistance (rS = 851 Ä/sq) and the larger
contact resistivity (ρC = 1.7 × 10−5 Ä·cm2 ). However, the
extracted distance between the emitter and the base contact
(1 = 0.3 µm) is comparable to that obtained for emitter-up
HBTs. The large value for the resistance axis intercept comes
from the finite base metal sheet resistance because of the thin
base contact metallization.
As it is known that wet etching introduces variations of the
etch depth, it is necessary to characterize the statistical fluctuation of the transistor junction areas obtained after lateral wet
etching. A histogram of the lateral etch distance of the emitter
is shown in Fig. 8. The Gaussian profile of the etch distance
N. M ATINE et al.
Jpn. J. Appl. Phys. Vol. 38 (1999) Pt. 1, No. 2B
1203
tion dimension bigger than 0.5 µm.
The fabricated MHBTs have demonstrated high frequency
performances of f T = 40 GHz and f MAX = 160 GHz for
emitter dimensions of 0.5 × 52 µm2 (Fig. 10). Despite the
low cut-off frequency due to the large transit time through
the thick collector and base layers, very high maximum oscillation frequencies were obtained thanks to the sub-micron
emitter width and a very small collector capacitance associated with collector-up technology.
4. Conclusion
Fig. 9. Measured relative fluctuation of junction (markers) vs. emitter-base
mesa width. Curve indicates expected 1/(width) fluctuation law.
Fig. 10. Cut-off frequency and maximum oscillation frequency as a function of collector current density for collector-up MHBTs with 0.5×52 µm2
emitter area.
indicates a true random distribution and the etch distance was
found to be independent of the device dimensions.
The relative fluctuations 1S/S in the emitter area obtained
following the lateral etch are shown in Fig. 9. We notice that
the relative area fluctuation does not exceed 10% for a junc-
We performed a study of InP-based HBTs with the emitter
edges parallel to the [0, 0, 1] and [0, 1, 0] crystal orientations
applied to fully-self aligned emitter-up and collector-up devices. For emitter-up HBTs, a maximum current gain β of
about 100 was obtained, and the collector and base ideality
factors were n C = 1.02 and n b = 1.2 respectively. Selfaligned collector-up MHBTs were fabricated with sub-micron
(to 0.5 µm) emitter widths defined by lateral wet etching. The
fluctuation in emitter area using this technique remained below 10% for emitter sizes greater than 0.5 µm. SEM observation and DC electrical characterization showed that the distance between the base contact and the emitter active area was
<0.3 µm in all directions for both emitter-up and collector up
HBTs. High frequency performances of f T = 105 GHz and
f MAX = 82 GHz were obtained for a 4 × 12 µm2 emitter-up
HBTs, and f T = 40 GHz and f MAX = 160 GHz were obtained for a 0.5 × 52 µm2 emitter area collector-up MHBTs.
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