ECE 221 Electrical Devices and Circuits Laboratory 4:MOSFET

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ECE 221 Electrical Devices and Circuits
Laboratory 4:MOSFET amplifier circuits
Prelab:
1. Familiarize yourselves with datasheets for the CD4007 MOSFET array.
2. For the circuit shown in Figure 2 find the formula that relates Vss with the drain
current, Vt, and µnCoxW/L.
3. For the circuit shown in Figure 2, find the voltage gain (include r0).
4. For the circuit shown in Figure 3, find the voltage gain (include r0).
Experiments:
1. MOSFET characteristics: The CD4007 array contains three N-channel and three
P-channel FETs packaged in a 14-pin dual-in-line package (DIP). The pin out for
the array is shown in the datasheet. In this lab, only one NMOS transistor is used.
Chose your transistor and notate its pins. The saturation characteristics of the
NMOS will be examined with the circuit shown in Figure 1.
Warning: Pin 14 is the N-substrate connection and must be connected to the most
positive DC voltage in the circuit to avoid the possibility of forward bias, which
could destroy the chip. Similarly, the P-well connection, Pin 7, should always go
to the most negative power supply voltage.
Figure 1: Circuit for measuring MOSFET characteristics
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Put the ammeter in series with the source. Increase the gate voltage slowly until
the current becomes non-zero(around 1V). Begin recording values of current for
voltage steps of 0.25 above this point.
• Plot the sqrt of the measured current against the gate voltage. This should be
nearly straight line. The x-intercept is the threshold voltage Vt. The MOSFET
transconductance (µnCoxW/L ) is 2 times the slope squared.
• To determine the output resistance r0, we use the same circuit, and:
o Set the gate voltage such that the drain current is approximately 2mA.
o Record this VGS
o Without changing VGS, vary VDS from 0V through 10V in 1V steps.
Record and plot ID for each step.
o From the slope of the ID – VDS curve in saturation estimate r0. (r0 = ∆
VDS/∆ ID). Make sure that the data points are taken in the saturation
region.
2. Common-source (CS) MOS amplifier.
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For the CS amplifier shown in Figure 2, determine the Vss value such that ID
is equal to 1mA (use values for Vt and µnCoxW/L obtained in the previous
steps). Assume that VG=0V (DC gate voltage value). Calculate the
transconductance gm.
Calculate the voltage gain by using formula obtained in prelab.
Build the circuit shown in Figure 2 while using the transistor from step 1.
Verify that drain current is around 1mA. Measure VGS (where VGS= 0 - VS)
voltage and verify it with its calculated value.
Connect 1kHz sine wave with 0.1V amplitude to the gate of the MOSFET.
Measure the amplitude of the output signal taken at the MOSFET drain. What
is measured voltage gain? Compare measured value with calculated value.
Increase the frequency of the input signal from 1kHz (midband) until the
voltage gain is reduced by a factor of sqrt(2) with respect to midband gain.
Note this frequency (amplifier’s -3dB rolloff frequency).
Figure 2: Common-source amplifier
3. Common-drain (Source follower) amplifier
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If we remove 10µC bypass capacitor from the circuit shown in Figure 2, connect
the drain directly to Vdd, and take the output from the source node, the resulting
circuit is the source follower circuit (shown in Figure 3).
Calculate the drain current, VOV, transconductance gm, and voltage gain using the
formula obtained in prelab.
Build the circuit shown in Figure 3. Verify that the drain current and VGS are
close to the calculated values.
Connect 1kHz sine wave with 0.1V amplitude to the gate of the MOSFET.
Measure the amplitude of the output sine signal taken at the MOSFET source.
What is measured voltage gain? Compare measured value with calculated value.
Increase the frequency of the input signal from 1kHz (midband) until the voltage
gain is reduced by a factor of sqrt(2) with respect to midband gain. Note this
frequency (amplifier’s -3dB rolloff frequency).
Figure 3: Source follower
Postlab:
Submit a written report.
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