128
IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 23, NO. 1, MARCH 2008
Universal Single-Stage Grid-Connected Inverter
Balaji Siva Prasad, Sachin Jain, and Vivek Agarwal, Senior Member, IEEE
Abstract—A new single-stage grid-connected inverter, suitable
for distributed generation applications, is proposed. The inverter
is universal in the sense that it can be switched between buck,
boost, and buck–boost configurations by appropriately altering the
pulse width modular (PWM) control. Discontinuous current mode
(DCM) operation is implemented to facilitate shuffling between
configurations during the converter operation. Such flexibility ensures maximum benefit of the buck, boost, and the buck–boost operations (e.g., low device stresses, higher efficiency, higher boosting
capability, etc.). The PWM is achieved by comparing a high frequency carrier (triangular) waveform with a suitable reference
waveform, which is not necessarily sinusoidal, but has a shape specific to the individual configuration and is derived by equating the
power fed into the grid with that extracted from the source during each switching cycle. The values of the components (inductors
and capacitors) need to be optimized so that DCM is maintained
and the required amount of energy is transferred to the grid in all
the three configurations during their respective operation. All the
design expressions have been derived. A salient feature of this inverter is its compatibility with various types of sources (PV array,
fuel cell, etc.) with varying voltage levels and control requirements.
Being single-stage, the proposed topology offers additional advantages like modularity, compactness, and low cost. All the details of
simulation and experimental work are presented.
Index Terms—Boost, buck, buck–boost, grid-connected inverter,
single-stage topology.
I. INTRODUCTION
HE INCREASING concern about the available fossil fuel
reserves and the environmental aspects has given a high
impetus to the use of renewable energy sources in the present
scenario of power generation [1]. Also the rate, at which the
demand for electrical energy is increasing, restricts the planning and installation of large, centralized power plants, resulting in distributed energy sources and power generation. The
high cost of these sources, especially the nonconventional ones,
has prompted major efforts in the development of efficient and
low cost power conditioning units (PCU) to serve as interface
between the source and the grid [2]. The PCU conditions the
source energy appropriately to meet the grid requirements. Indeed, a PCU forms an integral part of any distributed generation
system.
The operation of a PCU depends upon the voltage magnitude
and characteristics of the source being interfaced to the grid.
Depending on the voltage level, the PCU may be required to
“buck” or “boost” the available dc voltage to meet the grid voltage requirements. In addition to this, it should also condition
the available dc power into high quality ac required to perform
T
Manuscript received January 24, 2006; revised January 19, 2007. Paper no.
TEC-00026-2006.
The authors are with the Applied Power Electronics Laboratory, Department of Electrical Engineering, Indian Institute of Technology-Bombay, Powai,
Mumbai 400 076, India (e-mail: agarwal@ee.iitb.ac.in).
Digital Object Identifier 10.1109/TEC.2007.905066
specific functions such as reactive power control [3] and maximum power point tracking (MPPT) [4] (as in PV systems).
Depending on the number of power stages used, a PCU may
be a single- or multistage configuration. Multistage PCUs offer
a higher degree of freedom (more control variables), enabling
easy implementation of several control functions (e.g., MPPT,
reactive power compensation, active power filtering, etc.). For
example, the multistage PCU proposed by Bose et al., [4] provides both MPPT and high quality sinusoidal grid current. Using
the multistage (two-stage) buck inverter configuration, proposed
by Yang and Sen [5], power can be fed into the grid from a source
whose voltage is greater than the peak grid voltage. Some other
two-stage topologies have been proposed [6] which consist of
a buck–boost converter cascaded in series with an H-bridge inverter operating at the grid frequency and providing sinusoidal
power to the grid. Other two-stage topologies [7], [8] consist of
a boost converter stage cascaded with an H-bridge inverter.
In spite of all the advantages offered by a multistage PCU,
the presence of more number of power stages undermines the
overall efficiency, reliability and compactness of the system
besides increasing the cost. Therefore, today the trend is towards the integration of the various stages of a multistage PCU
into a single-stage system with as many desirable features of
multistage systems [9], [10] as possible. Though a single-stage
PCU offers reduced control options (resulting in increased control complexity), these configurations have the advantages of
low cost, high efficiency and reliability, modularity, and compactness. It is not surprising that the single-stage topologies
are becoming increasingly popular as compared to the multistage units, particularly for interfacing nonconventional energy
sources with the grid. A single-stage PCU is essentially a singlestage grid connected inverter, capable of performing several
desirable functions (boosting, bucking, inversion, MPPT, etc.),
hitherto performed by multistage units. This paper is concerned
with a new, 1−φ, single-stage, PCU, which is referred to as a
single-stage grid connected inverter in the rest of this paper.
From the available literature, it is observed that many singlestage grid connected inverter topologies have been proposed
[11]. Both discontinuous current mode (DCM) [12], [13] and
continuous current mode (CCM) operations [14] have been reported. CCM offers low inductor current stress but the values
of the L, C components are large, making the system bulky. In
DCM, the peak inductor current levels are high, but the component values are small and this mode provides a more stable
operation compared to CCM. A brief review of the available,
single-stage, grid connected buck, boost, and buck–boost inverter topologies is presented next.
The single-stage buck inverter operation is typically achieved
by a simple H-bridge inverter [14]–[16]. However, in order
to ensure sinusoidal power output, the converter must be operated with pulse width modulation (PWM) technique which
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PRASAD et al.: UNIVERSAL SINGLE-STAGE GRID-CONNECTED INVERTER
requires switching of the devices at high frequency. This leads
to higher switching losses. Also, in this configuration, the source
directly supplies energy to the grid through an inductor during
the switch-ON interval. Thus, there is no isolation1 between the
source and the grid. Other buck inverter configurations [5] exist,
but they are multistage.
Many single-stage buck–boost inverter configurations have
also been proposed [10], [17], [18]. These configurations feed
sinusoidal power into the grid with lower total harmonic distortion (THD) in the grid current and interface nicely with the grid.
They also provide an inherent isolation1 between the source
and the grid in the sense that there is an inductor that stores the
energy from the source during switch-ON interval and delivers
it to the grid during OFF interval without any direct connection between the source and the grid. However, the buck–boost
inverter configurations suffer from high peak inductor current
stress which is a result of the fact that the entire energy that
is transferred to the grid in a switching cycle is stored in the
inductor during the ON time of the switching cycle and only
this stored energy is supplied to the grid during the OFF time of
the switching cycle. This restricts its use to low power applications. Further, this configuration has lower boosting capability
as compared to a boost inverter.
The boost inverter operation, as achieved by Caseres
et al. [19] and Liang et al., [20], renders reduced peak inductor
current. Here, the dc source and the boost inductor supply energy to the load when the main switch is OFF. Hence, there is
no isolation1 between the source and the grid in case of a boost
inverter. It is important to note that the boost operation alone
is not feasible for grid connected applications. Buck operation
should also be available. The available configurations [19], [20]
can achieve buck operation by complementary switching of the
constituent boost converters, resulting in increased control complexity. Further, the configuration has lower boosting capability
compared to natural boost converter due to its complementary
operation of two boost converters and implementing techniques
like MPPT will be complicated.
The ongoing discussion leads to the following conclusions:
1) A grid connected inverter should be able to work with a
wide range of input dc voltage. Hence, it must be capable
of providing both buck and boost operations.
2) Each of the three types of inverter configurations, the buck,
the boost, and the buck–boost has its own merits and demerits. For example, the buck–boost configuration can
provide both buck and boost operations and offers simple control and lower grid current THD, but the losses
are more because of high peak inductor current. However, boost and buck systems, under identical operating
conditions, offer better efficiency.
3) Maximum benefit can be derived if the operation can
be shuffled between buck, boost, and buck–boost modes
while the inverter is in operation.
4) If (3) has to be implemented, the selection and design of the
L, C components should be so optimized that the shuffling
1 Isolation ⇒ Disturbances on the grid and the source do not directly affect
each other.
129
Fig. 1. Circuit diagram of the proposed configuration. All the independent
nodes are marked for referencing purpose.
between buck, boost, and buck–boost configurations is
possible and provides the desired output.
Taking a cue from the above observations, this paper presents
a new single-stage, grid-connected inverter topology (Fig. 1)
which can be made to operate as a shuffle between a buck, boost
or buck–boost inverter configuration even while the converter is
in operation. This is achieved by DCM operation using PWM,
generated by comparing a suitable reference waveform, r(t)
with a high frequency triangular waveform, c(t). The proposed
topology offers the following desirable features and associated
advantages:
1) Smooth shuffling between various configurations, when
the inverter is in operation, helps in extracting all the
advantages (and minimize the disadvantages) of the three
basic configurations.
2) The peak inductor currents, resulting from the operation of
the buck–boost(boost) inverter2 when the dc side voltage is
lower than the instantaneous grid voltage, especially at the
peak grid voltage, are significantly reduced by switching
the buck–boost inverter to boost inverter configuration.
3) With respect to (2), switching over to boost configuration
ensures lower on-state and switching losses and hence,
improved efficiency.
4) The topology can operate with a wide range of input dc
voltage as it can work in all the three basic configurations.
5) Control of the inverter can be altered to suit the particular
application depending upon the available source like in the
case of a PV source; it is required to control the inverter
such that the maximum power is extracted from the source.
Rest of this paper is organized as follows: Section II presents
the detailed analysis and working of the proposed inverter in
the three configurations and the derivations of the respective
reference waveforms. Section III describes the shuffling between the three configurations and their possible combinations
for grid connected applications. Section IV includes the design
details of the L, C components for various configurations and
the choice of optimum values to suit shuffling between configurations. Simulation results and the major observations are
included in Section V. The main conclusions of this work are
summarized in Section VI.
2 Buck-boost(yy) inverter ⇒ Buck-boost inverter in yy mode where yy ⇒
buck or boost.
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IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 23, NO. 1, MARCH 2008
planation of the working of the proposed inverter in the three
configurations is given in the next section. Expressions for the
duty cycle and the reference waveforms are also derived.
A. Buck Configuration
Fig. 2. Continuous and discrete time domain waveforms of grid power, current, and voltage used in the analysis of the proposed topology.
II. ANALYSIS AND WORKING OF THE PROPOSED TOPOLOGY IN
VARIOUS CONFIGURATIONS
The proposed topology acts as a current source inverter
feeding sinusoidal current into the grid and shuffling appropriately between the three configurations, depending upon the
dc side and grid voltages. As stated previously, the inverter is
controlled by using PWM. The pulse widths are modulated by
comparing a reference waveform, r(t) with a high frequency
triangular waveform, c(t). Where as the magnitude of c(t) is
held constant, that of r(t) varies with time, in accordance with
the grid voltage. The reference waveform depends upon the
configuration in which the inverter is being operated and must
be determined analytically.
As mentioned earlier, the DCM operation has many advantages over CCM operation, the most important being the facilitation of smooth transition from one configuration to another while
the system is in operation. Assuming DCM operation, equating
the input and output energy during a high frequency switching cycle provides expressions for the reference waveforms of
the three configurations, as shown later in this section. This
reference waveform is compared with a triangular waveform,
whose frequency (fs = 1/Ts ) is “2n” times the grid frequency.
Therefore, one-half cycle of the grid voltage can be considered
divided into “n” (where “n” is an odd integer) divisions. The
energy drawn from the source during the kth high frequency
switching cycle (k = 1, 2, . . .., n) is equal to the energy transferred to the grid during the kth cycle.
Energy transferred to the grid during the kth switching
cycle [21] considering sinusoidal grid current and unity power
factor (UPF) operation (Fig. 2), is given by
Eg k = Vm Im sin2 (π k/n)Ts
(1)
where Vm and Im are the peak values of the grid voltage and
current, respectively. Expression for energy drawn from the
source depends upon the configuration in which the inverter is
operating.
The switching pattern of the switches S1 , S2 , S3 , S4 , and
S5 determine the operating configuration (i.e., buck, boost, or
buck–boost). The states of all the devices and active current
paths in different configurations, during the positive half cycle
of the grid voltage are shown in Table I. Intervals I, II, and
III represent inductor charging, discharging, and zero current
intervals respectively for a given configuration. A detailed ex-
In this configuration, the states of the various devices and the
active current paths in the three intervals are shown in Table I.
It can be verified that the operation is similar to that of a buck
inverter where the source supplies energy to the capacitor (C)
through the inductor (L) when the main switch is ON and the
inductor current (iL ) free-wheels when the main switch is OFF.
The duty ratio of switch S5 is controlled such that a sinusoidal
current at UPF is fed into the grid. The expression for the required duty cycle during the kth switching cycle for the buck
case (Dk (B U ) ) is derived as follows:
Energy drawn from the source during the kth switching cycle:
(Eik (B U ) ) = (Vi /2L)(Vi − Vm sin(πk/n))Dk2 (B U ) Ts2 . (2)
Equating (1) and (2) and solving for Dk (B U ) yields
Dk (B U )
= (2Vm Im L sin2 (πk/n))/(Vi (Vi − Vm sin(πk/n))Ts ).
(3)
If (3) is considered in continuous time domain, the duty cycle
varies proportionately with the magnitude of r(t), since the
magnitude of c(t) is fixed. Therefore, as k varies from “1” to
“n” in one-half cycle of the grid voltage, variation of r(t) in the
continuous time domain can be obtained by replacing (πk/n)
with (ω t) and taking the modulus of the grid voltage expression
in (3), as follows:
r(t) =
(2Vm Im L sin2 (ωt))/(Vi (Vi − |Vm sin(ωt)|)Ts ).
(4)
Fig. 3(a) shows the reference waveform plotted for one-half
cycle of the grid voltage for comparison with the high frequency
triangular waveform.
B. Boost Configuration
In a boost converter, when the main switch is ON, the inductor
appears across the source and gets energized and the capacitor
supplies energy to the load during this period. The output diode
gets forward biased when the main switch is turned OFF. The
inductor, along with the source supplies energy during this period. The operation of the proposed topology as a boost inverter
is achieved by controlling the switching devices in the manner
shown in Table I.
The expression for duty ratio in the kth switching cycle,
considering sinusoidal power at UPF is fed into the grid, is
derived as follows:
Energy drawn from the source during kth switching cycle:
(Eik (B O ) ) = Vi2 (Dk2 (B O ) Ts2 )
× (Vm sin(πk/n))/(2L(Vm sin(πk/n)−Vi )).
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(5)
PRASAD et al.: UNIVERSAL SINGLE-STAGE GRID-CONNECTED INVERTER
131
TABLE I
STATES OF THE DEVICES AND ACTIVE CURRENT PATHS IN THE THREE MODES OF OPERATION
Fig. 3. Reference waveforms used in PWM for (a) buck, (b) boost and,
(c) buck-boost configurations.
Fig. 4. Input dc source and rectified grid voltage waveforms showing (a) case
I and (b) case II.
Equating (1) and (5) and solving for Dk (B O ) yields,
Dk (B O ) = (2Im L(Vm sin(πk/n)−Vi ) sin(πk/n))/(Vi2 Ts ).
(6)
Using the same explanation as in the buck case, equation (6)
in continuous time domain yields an expression for the reference
waveform r(t) as given below:
r(t) = 2Im L(|Vm sin(ωt)| − Vi )| sin(ωt)|/(Vi2 Ts ). (7)
Boost operation comes into picture only at the instant when
grid voltage exceeds the dc source voltage, before which the
inverter is operated either in buck configuration or in buck–
boost(buck) configuration. The reference waveform for the
boost configuration for grid voltage greater than the dc source
voltage is shown in Fig. 3(b).
C. Buck–Boost Configuration
In a basic buck–boost operation, during main switch turn-ON
interval, the inductor appears across the source and during turnOFF interval the inductor transfers the stored energy to the load.
When the inductor current goes to zero, the capacitor supplies
the energy. In the same manner, the proposed topology can be
operated in buck–boost configuration by following the switching
pattern shown in Table I.
In grid connected mode, for injecting sinusoidal current into
the grid, the expression for duty ratio Dk (B B ) required in the
kth switching cycle is derived as follows:
Energy drawn from the source during kth switching cycle
(Eik (B B ) ) = Vi2 Dk2 (B B ) Ts2 /2L.
(8)
Equating (1) and (8) and solving for Dk (B B ) yields,
Dk (B B ) = (2Vm Im L sin2 (πk/n))/(Vi2 Ts ).
(9)
As before, equation (9) in continuous time domain yields an
expression for reference waveform r(t) given by:
r(t) = (2Vm Im L sin2 (ωt))/(Vi2 Ts ).
(10)
The reference waveform for buck–boost configuration is
shown in Fig. 3(c).
III. SHUFFLING BETWEEN CONFIGURATIONS
The cutting edge of the proposed topology is its ability to
shuffle between configurations while the inverter is in operation. This transition between configurations may be useful for
the case when the dc side voltage is less than the peak grid
voltage as it helps in maximizing the benefits from the available configurations. The various configurations, in which the
inverter can be operated under different conditions (value of the
dc source relative to the grid voltage) can be grouped into two
cases as shown in Fig. 4.
A. Vi > Vm (Case I)
When the dc source voltage is greater than the peak grid voltage, the inverter must always buck the dc voltage to suit the grid
voltage requirement and at the same time pump the desired sinusoidal power into the grid. Therefore, in this case the inverter can
be operated either as a buck inverter or as a buck–boost(buck)
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IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 23, NO. 1, MARCH 2008
TABLE II
POSSIBLE SHUFFLING COMBINATIONS IN CASE I AND CASE II WITH LO P T M
The values of Lg and C are designed taking into consideration
the allowable ripple content in output current and voltage.
A. Design of Inductor (L) for Various Configurations
inverter. However, the following choice should be taken into
the account. For the same power, the peak inductor current in
buck configuration is significantly lower as compared to that
in buck–boost(buck) configuration. Though the buck configuration requires a special, nonsinusoidal reference waveform
(which might need a DSP for its synthesis), it is still more advantageous at high power levels because of the reduced currents.
In low power applications, however, the buck–boost(buck) configuration has the edge because of the ease of control it offers.
The grid current THD in both the cases is reasonably lower than
that specified by the standards (IEEE-519).
B. Vi < Vm (Case II)
The significance of the proposed topology and the shuffling
concept becomes apparent when the source voltage is less than
the peak grid voltage. In this case, the converter is required
to buck the dc voltage till the grid voltage is less than the dc
voltage. When the grid voltage exceeds the dc voltage level,
the inverter must boost the dc source voltage. A buck–boost inverter can serve the purpose by operating in buck mode as long
as Vi > Vm sin ωt, and in boost mode when Vi < Vm sin ωt.
But, as mentioned earlier, the inherent disadvantage of this configuration is its high peak inductor current. Hence, shuffling
between various configurations is desirable for improving the
performance of the inverter. In this case, the inverter can be
shuffled as per the following four possibilities:
1) buck to boost and vice versa;
2) buck to buck–boost(boost) and vice versa;
3) buck–boost(buck) to boost and vice versa;
4) buck–boost(buck) to buck–boost(boost) and vice versa.
All the possible shuffling configurations in the two cases are
summarized in Table II.
IV. DESIGN OF L, C COMPONENTS FOR THE UNIVERSAL
INVERTER
In all the three configurations, the design of L, Lg , and C
depends upon various factors. The value of L is so chosen that
the inverter operates in DCM over the entire cycle of the grid
voltage and transfers the required amount of energy in each
switching cycle so that the desired sinusoidal power is fed into
the grid. This can be ensured by choosing L < Lcrit where Lcrit
is the critical inductance value below which DCM is ensured.
The inductor is designed based on the assumption that the
average power (P ) (Fig. 2) is fed into the grid at unity power
factor. If the inductor current is discontinuous in the switching
cycle corresponding to peak power transfer (at the peak grid
voltage i.e., k = (n + 1)/2), then the inverter operates in DCM
over the entire grid voltage cycle. The expression for the energy
transferred during the (n + 1)/2th switching cycle is used in
the design of L. DCM operation ensures complete transfer of
input energy in each switching cycle, which is modulated such
that it feeds sinusoidal power into the grid. Energy (Eg (n +1)/2 )
supplied to the grid during (n + 1)/2th switching cycle is given
by
(Eg (n +1)/2 ) = Vm Im sin2 (π(n + 1)/2n)Ts ∼
= 2P Ts . (11)
For a buck configuration, the energy drawn from the source
during (n+ 1)/2th switching cycle is given by
2
2
Ei((n +1)/2)(B U ) = Vi (Vi − Vm )D((n
+1)/2)(B U ) Ts /2L(B U )
(12)
where L(B U ) is the value of L for buck configuration. Equating
(11) and (12), we have,
2
2
Vi (Vi − Vm )D((n
+1)/2)(B U ) Ts /2L(B U ) = 2P Ts .
(13)
Also in steady state, the average voltage across inductor L
over a switching cycle is zero. This gives the following relation:
(Vi − Vm )D((n +1)/2)(B U ) Ts − Vm D((n
+1)/2)(B U ) Ts = 0
(14)
where D((n +1)/2)(B U ) T s corresponds to interval-II (Table I).
Also, for just DCM operation, and using (13) and (14), we have
L(B U ) = (Vi − Vm )Vm2 Ts /4P Vi .
(15)
Similarly, an expression for L can be derived for the buck–
boost and boost configurations, as given below:
L(B B ) = Vm2 Vi2 Ts /4P (Vi + Vm )2
(16)
L(B O ) = Vi2 Ts (1 − (Vi /Vm ))/4P.
(17)
It is important to note that (15), (16), and (17), give the
critical values of L(B U ) L(B B ) , and L(B O ) for the respective
configuration. It must also be pointed out that the expression
for L(B U ) derived above is valid for case I only. When buck
operation is required in case II, the peak power is handled by
the buck configuration at VT , the transition voltage (where VT
≈Vi = Vm sin ωt). Accordingly, the expression for critical value
of L(B U ) in case II, is given by:
L(B U ) = (Vi − VT )Vm2 Ts /4P Vi .
(18)
B. Optimum Inductor Values
Though the individual configurations have their own values of
inductors, an optimum value of inductance (Loptm ) is required,
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133
for a given power, which would suffice even when the operation
is shuffled between the configurations. This optimum value of
L must satisfy the following conditions:
1) Desired energy transfer to the grid is ensured.
2) DCM operation is ensured over the entire operating range.
For the two possible cases described in Section III, the selection of Loptm is discussed next. A lower value of L will
ensure DCM operation and the desired energy transfer since energy stored in the inductor L for a given duty cycle is inversely
proportional to L.
1) Case I: In this case, the value of the inductor to be used
for a given power has to suit both buck as well as buck–boost
configurations. So, comparing (15) and (16) the following expression results:
In case-II(c), using (16) and (17) for buck–boost(buck) and
boost combinations respectively yields;
y1 = L(B U ) − L(B B ) = Vm2 Ts (1 − x − (1 + x)−2 )/4P (19)
Design values of Lg and C are based on the filtering
requirements at the inverter output. These values will hold
good for all the three configurations. Value of C depends on
the allowable ripple voltage (∆V ), peak power transferred and
other factors. Maximum ripple voltage occurs near the peak of
the grid voltage in the switching interval when peak power is
transferred. Equating the energy transferred during (n+ 1)/2th
switching cycle with the change in the capacitor energy yields
where x = vm /vi . Equating (19) to zero and solving for x results
in the threshold ratio x = 0.618. Thus, y1 becomes negative for
x > 0.618, implying that L(B U ) < L(B B ) and positive for x <
0.618, implying L(B B ) < L(B U ) . The energy extracted from the
source in a switching cycle with a given duty ratio is inversely
proportional to the inductor value L. Thus, selection of a lower
value of L ensures required energy by appropriately varying
duty ratio along with DCM operation. Hence, Loptm = L(B U )
for x > 0.618 and Loptm = L(B B ) for x < 0.618. Depending
on the power to be delivered to the grid, the operation can be
switched between buck–boost(buck) (for lower power levels)
and the buck (for higher power) configuration. This situation
can typically occur in PV fed systems where power levels show
a large variation depending on the insolation and temperature.
2) Case II: In this case, the design of the inductor is crucial.
In case-II(a), the transition is between buck and boost configurations. An optimum value of L is obtained by comparing L(B O )
and L(B U ) from (17) and (18), as given below:
y2 = L(B U ) − L(B O )
Ts Vm2
V2
V3
VT
=
− i2 + i3 ≤ 0.
1−
4P
Vi
Vm
Vm
(20)
Since (Vi /Vm ≤ 1 ; VT /Vm ≤ 1 and VT ≈ V i ) for case-II, the
quantity (1 − (VT /Vi ) − (Vi2 /Vm2 ) + (Vi3 /Vm3 )) in (20) is always ≤ 0. Hence, y2 is always negative. This implies that L(B U )
< L(B O ) . Loptm is taken = L(B U ) considering that L(B U ) ensures the desired energy transfer and DCM operation throughout
the grid cycle.
In case-II(b) the optimum value of L is selected by comparing the values of L(B B ) and L(B U ) from (16) and (18), which
gives:
y3 = L(B B ) − L(B U )
Ts Vm2
Vi2
VT
=
−
+
1
≥0
4P
(Vi + Vm )2
Vm
which implies that Loptm = L(B U ) .
(21)
y4 = L(B O ) − L(B B ) = Vi2 Ts (1 − z − (1 + z)−2 )/4P
(22)
where z = Vi /Vm < 1. Here, Loptm = L(B O ) for z > 0.618
and Loptm = L(B B ) for z < 0.618 . Case II(d) has an obvious
result i.e., Loptm = L(B B ) . It can be concluded that for case
II, L(B U ) is the most optimum value applicable to all the four
sub-cases.
The criteria upon which the value of inductance depends in the
various combinations and the optimum values of the inductance
for the two cases are summarized in Table II.
C. Design Values of Lg and C
2P T s = C[(Vm + ∆V )2 − (Vm − ∆V )2 ]/2
.
. . C = (2P Ts )/(Vm ∆V ).
(23)
(24)
Given a value of C, the value of Lg determines the minimum
current ripple frequency (fhl ) component present in the grid
current which is governed by the power quality standards such
as the IEEE-519. The value of Lg is given by
Lg = 1/(2πfhl )2 C.
(25)
V. SIMULATION RESULTS AND OBSERVATIONS
The proposed universal inverter is simulated in MATLAB/SIMULINK [22]. An output power of ≈ 500W at a slightly
distorted grid voltage (similar to the actual grid voltage supply)
of 90 and 230 V, 50 Hz is considered for case I and case II, respectively. The input dc voltage is 200 V for case I and 100 V for
case II. Simulations have been carried out for all the three configurations and also for all possible shuffling combinations in case
I and case II. For PWM, a triangular carrier waveform, having a
switching frequency = 10 kHz and a peak of 10 V, has been considered. Considering ∆V = 50 V and fhl = 800 Hz for both case
I and case II, the values of the filter components, Lg and C, are
obtained using (24) and (25) as 10 mH and 3.85 µF, respectively.
In case I, the buck operation of the topology is simulated for
buck configuration and buck–boost(buck) configuration with
the same values of L, Lg , and C, showing the flexibility of
control provided by the inverter. Using (15), the value of L is
determined to be 0.8 mH. The simulation waveforms are shown
in Fig. 5. Following are the observations from the results shown
in Fig. 5(a) and (b).
1) It is seen that the inductor current is higher in buck–
boost(buck) configuration than that in buck configuration (about 50% of the peak value in buck–boost
configuration).
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4) Case II(d) results show minimum THD in grid current
while case II(a) shows highest THD.
For case II(d), in which the topology is operated in buck–boost
configuration (for both buck and boost operations), simulations
were also performed assuming the grid voltage to be pure sine
wave, using SPICE circuit simulator so that more realistic models of the devices and components can be used. The SPICE
results are shown in Fig. 7.
VI. EXPERIMENTAL RESULTS
Fig. 5. Simulation results for case I: (a) Proposed topology as buck inverter
(b) As buck-boost (buck) inverter.
2) The reference waveform would just be a rectified sinusoidal waveform in the case of buck–boost configuration
as per (10), if the grid voltage was sinusoidal. In buck
configuration, the generation of reference waveform requires complex calculations necessitating the use of a fast
controller (e.g., DSP).
The four possible combinations in case II are also simulated
and the results are shown in Fig. 6. It is possible to use the
optimum inductor values of the four individual subcases of case
II as described in Table II or the overall optimum value L(B U ) .
For the second option, using (18), L turns out to be 0.1 mH.
Following observations are made from the simulation results
shown in Fig. 6 for this case:
1) Peak inductor current is higher for case II(b) and II(d)
where the inverter is operated as a buck–boost(boost) inverter as compared to case II(a) and II(c) where inverter
is operated as a boost inverter.
2) Reactive power fed into the grid is highest in case II(b).
3) The transition between configurations in case II(b) and
II(c) is smoother as compared to case II(a) because, buck–
boost configuration can overlap with both buck and boost
modes, unlike case II(a) where a dead time is to be provided between buck and boost transition as there can be
no overlap between the two configurations.
The proposed configuration is capable of operating with a
variety of input sources and is compatible with a wide range
of input dc voltage. Wide variations in dc voltage are common,
for example, in a PV source, due to its dependence on external
environmental conditions (insolation, temperature), power
drawn, etc. PV sources are extensively used in distributed
generation systems. Keeping in mind the applications of this
type, various experiments have been performed on a 500 W
laboratory prototype of the proposed topology with a variable
dc voltage source (which varies over a range of 100–200 V).
All possible tests have been done. The inverter output is tied
to a 1 − φ grid ac voltage which is adjustable with the help
of an auto-transformer. The triangular carrier waveform has a
switching frequency of 10 kHz and a peak of 10 V. Reference
waveforms, r(t), corresponding to various configurations are
generated using TMS320LF2407 DSP. Pulse width modulated
control of the inverter is implemented by comparing r(t) with
the triangular carrier waveform c(t).
Various specifications of the laboratory prototype are: L ≈
610 µH; Cf ≈ 4.0 µF, and Lf ≈ 8 mH. MOSFETs IRFP460
are used as the controllable devices while CSD20060 are used
as power diodes. Fig. 8 shows a photograph of the fabricated
experimental setup. Input dc voltage is sensed using TI ISO122
chip while the grid voltage is sensed through a step down transformer. Waveforms for various cases were obtained using Agilent’s infiniium oscilloscope (model no. 54810A). Figs. 9 and
10 show the operation of the inverter in buck and buck–boost
configurations, respectively.
The significance of the inverter lies in its ability to shuffle
between configurations, taking into account the advantages of
all the three basic configurations. Figs. 11, 12, and 13 show
the experimental results of shuffling between various configurations. Figs. 11 and 12 show the transitions between buck and
boost configurations and buck and buck–boost configurations
respectively. It is observed that grid current distortion during
shuffling in Fig. 11 is higher than that in Fig. 12. From Fig. 13,
it can be seen that if the operation of the inverter is continued in
buck–boost configuration, the peak of the inductor current will
be greater than that with operation in boost configuration. This
results in reduced losses.
Smooth shuffling between configurations is achieved by making the transition at an instant where the inductor current is zero.
This condition is realized by proper design of the inductor, L
(which ensures DCM operation under all operating conditions)
and by effecting the shuffling only at the start of a high frequency
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PRASAD et al.: UNIVERSAL SINGLE-STAGE GRID-CONNECTED INVERTER
135
Fig. 6. Simulation results for case II: Shuffling between (a) buck and boost configurations; (b) buck configuration and buck-boost (boost) configuration;
(c) buck-boost (buck) configuration and boost configuration; (d) buck-boost (buck) configuration and buck-boost (boost) configuration.
Fig. 7.
PSPICE simulation results for buck–boost configuration [case II(d)].
Fig. 8.
switching cycle. This is shown in Fig. 14, which contains a
magnified view of the transition of inverter operation from buck
to buck–boost configuration.
Photograph of the experimental setup.
VII. CONCLUSION
A universal, single-stage grid compatible inverter topology,
which can assume any of the three basic forms i.e., the buck, the
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136
Fig. 9. Experimental results of the proposed topology operating in buck configuration [case I(a)] with input dc voltage of 200 V.
Fig. 10. Experimental results showing the topology’s operation in buck–boost
configuration [case II(d)] with input dc voltage of 200 V.
Fig. 11. Experimental results showing the shuffling between buck and boost
configurations for case II(a) with input dc voltage of 100 V.
IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 23, NO. 1, MARCH 2008
Fig. 12. Experimental results showing shuffling between buck and buck–
boost(boost) configurations for case II(b) with input dc voltage of 100 V.
Fig. 13. Experimental results showing the shuffling between buck–boost
(buck) and boost configurations for case II(c) with input dc voltage of 100 V.
Fig. 14. Experimental results showing inductor current and capacitor voltage
waveforms for case II(b), with input dc voltage of 100 V. Magnified view of the
waveforms during shuffling is also shown in the enclosed box.
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PRASAD et al.: UNIVERSAL SINGLE-STAGE GRID-CONNECTED INVERTER
boost, and the buck–boost inverter, has been presented. With the
help of this topology, a new concept has been proposed in which
the system’s configuration can be changed during the operation.
With optimally designed L, C components, this inverter can
operate in various configurations and can swiftly and smoothly
transition between them. This provides the ability to extract
maximum benefits of the individual configuration like higher
boosting and bucking ability, low peak inductor currents, lower
grid current THD, and higher efficiency. In fact, the efficiency
can be further improved if S1 and S4 are replaced by thyristors,
in which case the protection diode D1 can be eliminated.
The experimental results show a distorted current being fed
into the grid. This can be attributed to distortion in the grid voltage itself and its utilization in the PWM control circuit. Quality
of the grid current will be highly improved if the grid voltage
distortion reduces. This fact is substantiated by the PSPICE
results shown in Fig. 7 with ideal grid voltage.
In applications where the dc source voltage is greater than the
peak grid voltage, it is recommended that the inverter should
be operated in buck configuration for high power applications,
resulting in reduced peak inductor current levels, and in buck–
boost(buck) for low power application taking the advantage of
simple control and lower grid current THD. When the dc voltage
is less than the grid voltage, four combinations are possible. Out
of these, the combination of buck–boost(buck) and boost shows
the best results. This combination has many advantages like
smooth transition from one configuration to another, reasonably
low grid current THD and reduced peak inductor currents.
In this work, ideal grid conditions have been assumed to
simplify the analysis and synthesis of reference waveforms.
However, for nonideal conditions, such as variations in grid
voltage and frequency, a suitable voltage estimation technique
(observer) and a PLL would be required [23] and the control
scheme would need appropriate modification.
The versatility of the proposed topology has been demonstrated by showing its compatibility with a wide range of
input dc voltage levels and its ability to handle a wide power
range. Computer simulations and experimental verification
have shown encouraging results and it is felt that the proposed
topology has good potential for applications in distributed
generation systems.
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Balaji Siva Prasad received the B.E. degree from Gayatri Vidya Parishad
College of Engg., JNT University, Hyderabad, India, in 2004. He received the
M.E. degree in power electronics and power systems from Indian Institute of
Technology-Bombay, Mumbai, India.
Currently, he is with Delphi Automotive Systems, in Bangalore, India, working as an Electrical Analysis Engineer. His areas of interest include design
and analysis of new power-electronic converter topologies for interfacing grid
connected and stand alone nonconventional energy sources. He is working on
design, analysis, and simulation of electric circuits for automobiles.
Sachin Jain received the B.E. degree from B.I.T. Engineering College, Pt.
Ravishankar Shukla University, Bhilai, India, in 2000. He completed the M.E.
degree in integrated power systems from V.N.I.T., Nagpur, in 2002. Currently,
he is pursuing the Ph.D. degree in electrical engineering at the Indian Institute
of Technology-Bombay, Mumbai, India. His research interests include power
electronics applications in nonconventional energy conditioning, power quality,
and distributed generation.
Vivek Agarwal (SM’01) received the B.Sc. degree in physics from St. Stephen’s
College, Delhi University, Delhi, India. He then obtained an integrated M.Sc.
degree in electrical engineering from the Indian Institute of Science, Bangalore,
India. He received the Ph.D. degree in electrical and computer engineering from
the University of Victoria, Canada. He worked briefly for Statpower Technologies, Burnaby, Canada as a Research Engineer. In 1995, he joined the Department of Electrical Engineering, Indian Institute of Technology-Bombay, where
he is currently a Professor. His main field of interest is power electronics. He
works on the modeling and simulation of new power converter configurations,
intelligent and hybrid control of power electronic systems, power quality issues,
EMI/EMC issues, and conditioning of energy from nonconventional sources.
Dr. Agarwal is a Fellow of IETE and a Life Member of ISTE.
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