FAN7631
Advanced Pulse Frequency Modulation (PFM)
Controller for Half-Bridge Resonant Converters
Features
Description

Variable Frequency Control with 50% Duty Cycle
for Half-Bridge Resonant Converter Topologies






High Efficiency with Zero-Voltage-Switching (ZVS)
The FAN7631 is a pulse-frequency modulation controller
for high-efficiency half-bridge resonant converters that
includes a high-side gate drive circuit, an accurate
current-controlled oscillator, and various protection
functions. The FAN7631 features include variable dead
time, high operating frequency up to 600kHz, protections
such as LUVLO, and a selectable latch or A/R protection
using the LS pin for user convenience.

Simple Remote On/Off Control with Latch or AutoRestart (A/R) Using FI or LS Pin

Protection Functions: Over-Voltage Protection
(OVP), Overload Protection (OLP), Over-Current
Protection (OCP), Abnormal Over-Current Protection
(AOCP), Internal Thermal Shutdown (TSD), and
High Precise Line Under Voltage Lockout (LUVLO)

Level-Change OCP Function During Startup
Up to 600kHz Operating Frequency
Built-in High-Side Gate Driver
High Gate-Driving Current: +500mA/-1000mA
Programmable Dead Time with a Resistor
Pulse Skipping and Burst Operation for Frequency
Limit (Programmable) at Light-Load Condition
Applications





The Zero-Voltage-Switching (ZVS) technique reduces the
switching losses and improves the efficiency significantly.
ZVS also reduces the switching noise noticeably, which
allows a small Electromagnetic Interference (EMI) filter.
Offering everything necessary to build a reliable and
robust resonant converter, the FAN7631 simplifies
designs and improves productivity and performance. The
FAN7631 can be applied to resonant converter
topologies such as series resonant, parallel resonant,
and LLC resonant converters.
Related Resources
AN4151 — Half-bridge LLC Resonant Converter Design
using FSFR-Series Fairchild Power Switch (FPS™)
PDP and LCD TVs
Desktop PCs and Servers
Video Game Consoles
Adapters
Telecom Power Supplies
Ordering Information
Part Number
Operating Junction
Temperature
FAN7631SJ
FAN7631SJX
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
-40C ~ 130C
Package
16-Lead, Small-Outline Package (SOP)
Packaging
Method
Tube
Tape & Reel
www.fairchildsemi.com
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
February 2012
Figure 1.
Typical Application Circuit (Resonant Half-Bridge Converter)
Block Diagram
Figure 2.
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Application Circuit Diagram
Internal Block Diagram
www.fairchildsemi.com
2
Figure 3.
Package Pin Assignments (16SOP)
Pin Definitions
Pin #
Name
Description
1
CON
This pin is for protection and enabling/disabling the control IC. When the voltage of this pin is
above 0.6V, the IC operation is enabled. When the voltage of this pin drops below 0.4V, gate
drive signals for both MOSFETs are disabled.
2
RT
This pin programs the switching frequency. Typically, an opto-coupler is connected to control
the switching frequency for the output voltage regulation.
3
SS
This pin is used for producing the upper threshold signal for the current controlled oscillator.
Usually, a small capacitor is connected on this pin, which guarantees an OLP delay and softstart duration even with a fast on/off test.
4
DT
This pin is for adjusting the dead time using an external resistor.
5
NC
No connection
6
FI
User protection function / fault input. This pin can be used as a latch protection, which is
operated when a voltage applied to this pin is higher than 4VDC.
7
SG
This pin is the ground of the control part.
8
LS
This pin senses the line voltage to trigger line under-voltage lockout (LUVLO).
9
CS
This pin senses the current flowing through the main MOSFET. Typically, negative voltage is
applied on this pin.
10
PG
This pin is the power ground. This pin is connected to the source of the low-side MOSFET.
11
LO
This pin produces the low-side gate-driving signal.
12
LVCC
13
NC
14
CTR
This pin is connected to the drain of the low-side MOSFET. Typically, a transformer is
connected to this pin.
15
HO
This pin produces the high-side gate-driving signal.
16
HVCC
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Pin Configuration
This pin is the supply voltage of the control IC and low-side gate-driving circuit.
No connection
This pin is the supply voltage of the high-side gate-driving circuit.
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions. Extended exposure to stresses above the recommended
operating conditions may affect device reliability so that any test which is stressing the parts to these levels is not
recommended. The absolute maximum ratings are stress ratings only. TA=25C unless otherwise specified.
Symbol
Parameter
Min.
HVCC to VCTR High-Side VCC Pin to Center Voltage
HVCC
VHO
Max.
Unit
-0.3
25.0
V
-0.3
625.0
V
High-Side Gate\-Driving Voltage
VCTR-0.3
HVCC+0.3
V
High-Side Offset Voltage
High-Side Floating Supply Voltage
HVCC-25
HVCC+0.3
V
Allowable Negative VCTR at 15VDC Applied HVCC to CTR Pin
-9.8
-7.0
V
Low-Side Supply Voltage
-0.3
25.0
V
VLO
Low-Side Gate Driving Voltage
-0.3
LVCC
V
VCON
Control Pin Input Voltage
-0.3
LVCC
V
VCS
Current Sense (CS) Pin Input Voltage
-5.0
1.0
V
VRT
RT Pin Input Voltage
-0.3
5.0
V
VCTR
LVCC
fsw
Recommended Switching Frequency
10
600
kHz
VLS
LS Pin Input Voltage
-0.3
LVCC
V
VFI
FI Pin Input Voltage
-0.3
LVCC
V
VSS
SS Pin Input Voltage
-0.3
Internally
(1)
Clamped
V
VDT
DT Pin Input Voltage
-0.3
Internally
(1)
Clamped
V
50
V/ns
1.24
W
dVCTR/dt
PD
Allowable CTR Voltage Slew Rate
Total Power Dissipation
(2)
TJ
TSTG
Maximum Junction Temperature
+150
Recommended Operating Junction Temperature
Storage Temperature Range
(2)
-40
+130
-55
+150
C
C
Notes:
1. VSS and VDT are internally clamped at 5.0V, which has a tolerance between 4.75V and 5.25V.
2. The maximum value of the recommended operating junction temperature is limited by thermal shutdown.
Thermal Impedance
Symbol
θJA
Parameter
Junction-to-Ambient Thermal Impedance
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
Value
Unit
102
ºC/W
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Absolute Maximum Ratings
www.fairchildsemi.com
4
TA=25C and LVCC=17V unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Supply Section
ILK
Offset Supply Leakage Current
HVCC=VCTR
50
μA
IQHVCC
Quiescent HVCC Supply Current
HVCC,START- 0.1V, VCTR=0V
50
120
μA
IQLVCC
Quiescent LVCC Supply Current
LVCC,START - 0.1V, VCTR=0V
100
200
μA
fOSC=100kHz, CLoad=1nF,
VCON > 0.6V, VCTR=0V
3.0
4.5
mA
fOSC=300kHz, CLoad=1nF,
VCON > 0.6V, VCTR=0V
8
10
mA
100
200
μA
fOSC=100kHz, CLoad=1nF
VCON > 0.6V, VCTR=0V
5
7
mA
fOSC=300kHz, CLoad=1nF,
VCON > 0.6V, VCTR=0V
10
14
mA
fOSC=300kHz, VCON < 0.4V,
VCTR=0V (No Switching)
2.6
3.5
mA
V
IOHVCC
Operating HVCC Supply Current
(3)
(RMS Value)
fOSC=300kHz, VCON < 0.4V,
VCTR=0V (No Switching)
IOLVCC
Operating LVCC Supply Current
(3)
(RMS Value)
UVLO Section
LVCC,START
LVCC UVLO Turn-On Threshold
11.2
12.5
13.8
LVCC,STOP
LVCC UVLO Turn-Off Threshold
8.9
10.0
11.1
LVCC,HYS
LVCC UVLO Hysteresis
2.5
V
V
HVCC,START
HVCC UVLO Turn-On Threshold
8.2
9.2
10.2
V
HVCC,STOP
HVCC UVLO Turn-Off Threshold
7.8
8.7
9.6
V
HVCC,HYS
HVCC UVLO Hysteresis
0.5
V
Oscillator & Feedback Section
VBH
Pulse Skip Disable Threshold Voltage
0.54
0.60
0.66
V
VBL
Pulse Skip Enable Threshold Voltage
0.36
0.40
0.44
V
VRT
Regulated RT Voltage
1.5
2.0
2.5
V
fOSC
Output Oscillation Frequency
RT=11.6kΩ, CSS=1nF
48
50
52
RT=2.7kΩ, CSS=1nF
188
200
212
DC
Output Duty Cycle
RT=11.6kΩ, CLoad=100pF
49
50
51
RT=2.7kΩ, CLoad=100pF
48
50
52
kHz
%
Soft-Start and Restart Section
ISS1
Soft-Start Current 1
VCSS=0V, LVCC=17V
3
ISS2
Soft-Start Current 2
VCSS=1.6V, LVCC=17V
25
30
35
μA
Soft-Start Start Voltage
CSS=1nF, VCON=3V
1.5
1.6
1.7
V
VSS_START
VSS_END
VSSC
mA
Soft-Start End Voltage
CSS=1nF, VCON=3V
4.0
4.2
4.4
V
Clamped Soft-Start Voltage
CSS=1nF, VCON=3V
4.75
5.00
5.25
V
fOSC_SS
Initial Output Oscillation Frequency
During Soft-Start
VRT-CON
RT-CON Voltage for Startup
RT=11.6kΩVCSS=1.6V
300
RT=5.8kΩ
530
RT=2.7kΩ
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Electrical Characteristics
kHz
600
60
120
mV
Continued on the following page…
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
www.fairchildsemi.com
5
TA=25C and LVCC=17V unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Output Section
Isource
Isink
Peak Sourcing Current
LVCC=HVCC=17V,
TJ=-40C ~ 130C
500
mA
Peak Sinking Current
HVCC=17V,
TJ=-40C ~ 130C
1000
mA
tr
Rising Time
tf
Falling Time
HVCC=17V, CLoad=1nF
VHOH
High Level of High-Side Gate Signal
(VHVCC-VHO)
VHOL
Low Level of High-Side Gate Signal
VLOH
High Level of Low-Side Gate Signal
(VLVCC-VLO)
VLOL
Low Level of Low-Side Gate Signal
40
ns
20
ns
IO=20mA
1.0
V
0.6
V
1.0
V
0.6
V
μA
Protection Section
IOLP
OLP Sink Current
VOLP
OLP Threshold Voltage
tBOL
OLP Blanking Time(3)
VOCP
OCP Threshold Voltage
tBO
VAOCP
(3)
OCP Blanking Time
AOCP Threshold Voltage
25
30
35
-0.42
-0.37
-0.32
V
150
200
250
ns
-0.62
-0.56
-0.50
V
150
200
250
ns
-1.21
-1.10
-0.99
V
(3)
tBAO
AOCP Blanking Time
50
tDA
Delay Time (Low Side) Detecting from
(3)
VAOCP to Switch Off
250
400
ns
21
23
25
V
2.88
3.00
3.12
V
9
10
11
μA
VOVP
LVCC Over-Voltage Protection
VLINE
Line UVLO Threshold Voltage
ILINE
Line UVLO Hysteresis Current
VLS Sweep, -40C ~ 130C
VLS=2V
(3)
ns
TSD
Thermal Shutdown Temperature
130
140
150
C
VFI
Fault Input Threshold Voltage for Latch
Operation
3.8
4.0
4.2
V
ILR
Latch-Protection Sustain LVCC Supply
Current
100
150
μA
VLR
Latch-Protection Reset LVCC Supply
Voltage
LVCC=7.5V
5
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Electrical Characteristics (Continued)
V
Dead-Time Control Section
DT
Dead Time
RDT=2.7k, CLoad=1nF
100
150
200
RTD=18k, CLoad=1nF
250
350
450
Short, CLoad=1nF
50
Open, CLoad=1nF
1000
Recommended Dead Time Range
100
ns
600
Note:
3. This parameter, although guaranteed, is not tested in production.
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
www.fairchildsemi.com
6
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
These characteristic graphs are normalized at TA=25ºC.
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [ ]
LVCC Start Voltage vs. Temperature
Figure 5.
1.20
1.20
1.15
1.15
1.10
1.10
1.05
1.00
0.95
75
100
120
LVCC Stop Voltage vs. Temperature
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [ ]
Figure 6.
25
50
75
100
120
Temperature [ ]
HVCC Start Voltage vs. Temperature
Figure 7.
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
50
Temperature [ ]
Normalized
Normalized
Figure 4.
25
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
HVCC Stop Voltage vs. Temperature
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics
0.80
-40
-20
0
25
50
75
100
120
-40
Temperature [ ]
0
25
50
75
100
120
Temperature [ ]
Figure 8. Pulse Skip Disable Voltage vs. Temperature
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
-20
Figure 9. Pulse Skip Enable Voltage vs. Temperature
www.fairchildsemi.com
7
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
These characteristic graphs are normalized at TA=25ºC.
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
-40
120
-20
0
Figure 10. Regulated RT Voltage vs. Temperature
50
75
100
120
Figure 11. Output Oscillation Frequency (RT=11.6k)
vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
25
Temperature [ ]
Temperature [ ]
1.05
1.00
0.95
0.90
0.85
1.05
1.00
0.95
0.90
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [ ]
25
50
75
100
120
Temperature [ ]
Figure 12. Output Oscillation Frequency (RT=2.7k)
vs. Temperature
Figure 13. Output Duty Cycle (RT=11.6k)
vs. Temperature
1.30
1.20
1.15
1.20
Normalized
Normalized
1.10
1.05
1.00
0.95
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics (Continued)
1.10
1.00
0.90
0.90
0.80
0.85
0.80
0.70
-40
-20
0
25
50
75
100
120
-40
Temperature [ ]
0
25
50
75
100
120
Temperature [ ]
Figure 15. ISS1 vs. Temperature
Figure 14. Output Duty Cycle (RT=2.7k)
vs. Temperature
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
-20
www.fairchildsemi.com
8
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
These characteristic graphs are normalized at TA=25ºC.
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [ ]
50
75
100
120
Figure 17. fOSC_SS (RT=11.6kΩ) vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
Figure 16. ISS2 vs. Temperature
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
-40
120
-20
0
25
50
75
100
120
Temperature [ ]
Temperature [ ]
Figure 19. VOLP vs. Temperature
Figure 18. fOSC_SS (RT=2.7kΩ) vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
25
Temperature [ ]
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics (Continued)
0.80
-40
-20
0
25
50
75
100
120
-40
Temperature [ ]
0
25
50
75
100
120
Temperature [ ]
Figure 20. IOLP vs. Temperature
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
-20
Figure 21. VOCP vs. Temperature
www.fairchildsemi.com
9
These characteristic graphs are normalized at TA=25ºC.
1.15
1.10
1.10
Normalized
1.20
1.15
Normalized
1.20
1.05
1.05
1.00
1.00
0.95
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [ ]
50
75
100
120
Figure 23. VOVP vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
1.05
1.05
Normalized
Normalized
Figure 22. VAOCP vs. Temperature
1.00
0.95
0.90
1.00
0.95
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
-40
120
-20
0
25
50
75
100
120
Temperature [ ]
Temperature [ ]
Figure 24. VLINE vs. Temperature
Figure 25. ILINE vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
25
Temperature [ ]
1.05
1.05
1.00
1.00
0.95
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
-40
120
-20
0
25
50
75
100
120
Temperature [ ]
Temperature [ ]
Figure 26. VFI vs. Temperature
Figure 27. Dead Time (DT=150ns) vs. Temperature
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics (Continued)
1.20
1.15
Normalized
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-40
-20
0
25
50
75
100
120
Temperature [ ]
Figure 28. Dead Time (DT=350ns) vs. Temperature
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
www.fairchildsemi.com
10
Even if it is shorted to the ground node or open, the dead
time is limited to 50ns (ground) and 1000ns (open).
1. Basic Structure
FAN7631 is designed to drive high-side and low-side
MOSFETs complementarily with 50% duty cycle for halfbridge resonant converters. The major internal circuits
consist of the oscillator, soft-start circuit, protections, lowside and 600V-rated high-side gate driver.
The dead time can be determined by the graph below.
Dead time(ns)
600
LVCC(12), HVCC (16), and SG (7) are assigned for the
supply voltage and ground pins, respectively. LO (11),
HO (15), CTR (14), and PG (10) are pins that connect to
the MOSFETs externally.
500
400
Regarding the protections, CON(1) is used for BurstMode operation, FI(6) is for external Latch-Mode
protection, LS(8) is for line-UVLO (brownout), and CS is
used for sensing drain current.
300
Finally, RT(2), CSS(3), and DT(4) are assigned for
programming the operating frequency, soft-start, and
dead-time (respectively).
0
200
100
0
10
20
30
40
50
60
Dead time resistor (RDT, KΩ)
Figure 30. Dead Time vs. RDT
2. Gate Driver and Dead Time Programming
The IC employs high-current gate drive circuit (source:
0.5A / sink: 1A) to cover a variety of applications. Each
gate signal generated by the gate drive circuit is
complementarily 50% duty cycle, including the dead time,
as shown in Figure 29. The operating frequency of the
gate drive circuit is controlled by a current flowing out of
the RT pin.
3. Internal Oscillator
3.1. Current Controlled Oscillator
Figure 31 shows a highly accurate current-controlled
oscillator and typical circuit configuration for the RT pin.
Internally, the voltage on the RT pin is regulated at 2V by
the V/I converter. The charging / discharging current for
the oscillator capacitor, CT, is obtained by mirroring the
current flowing out of the RT pin (ICTC). VCT increases and
decreases between VTL and VTH constantly, which
generates a saw-tooth waveform, VCT. Finally, the SR
filp-flop VCT generates the clock signal. Therefore, the
switching frequency increases as ICTC increases.
Dead time
HO output
LO output
time
Figure 29. Gate Driving Signals
The dead time can be programmed by the resistor, RDT,
from 150ns to 600ns as shown in Figure 30. Internally,
the voltage on the DT pin is regulated at 1.4V by the V/I
converter and IDT can be set by RDT. IDT is transmitted to
the dead time generator through the current driver. In the
dead time generator, the dead time is determined by the
transmitted IDT, which is proportional to RDT. Dead time
increases as RDT increases. To improve the noise
immunity of the dead time circuit against the high dv/dt
switching transient, a sample and hold circuit is
implemented. However, severe noises can affect the
dead time circuit and the maximum range of dead time
could be reduced. It is recommended to use a capacitor
of around 10nF in parallel with the DT pin. In addition,
shunt-resistors RDT,Short and RDT,Open are internally
connected to the DT pin. These are preparations for
abnormal cases, such as a dead time pin open or short.
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Functional Description
Figure 31. Current Controlled Oscillator
3.2. Minimum & Maximum Frequency Setting
As can be seen in Figure 31, the opto-coupler transistor
is connected to the RT pin through Rmax to modulate the
switching frequency. During an overload condition, the
opto-coupler is fully turned off so that ICTC is fixed by Rmin,
which can determine the minimum frequency. On the
contrary, the maximum switching frequency is introduced
when the opto-coupler is fully turned on. Practically, the
saturation voltage of the opto-coupler’s transistor is 0.2V,
maximally. Considering the saturation voltage, the
maximum frequency can be set by Rmax and Rmin.
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fmin
fmax =
11.6k
R min
11.6k
R
voltage) reaches the RT pin voltage. At the beginning of
startup, only ISS1 (3mA) is enabled by Q1 and rapidly lifts
VSS up to VSS_START (1.6V) for preparation of initial
switching frequency, but none of the switches turn on.
The initial switching frequency is set as six times the
minimum switching frequency set previously and limited
to 600kHz. Then ISS2 (30µA) is enabled by Q2, but ISS1 is
disabled. During tSS, VTH is synchronized with VSS by Q4
and VCT is generated by comparing VSS with VTL in the
oscillator circuit. While ISS2 raises VSS smoothly, the
switching frequency decreases. When VSS reaches
VSS_END (4.2V), soft-start ends. VTH is synchronized with
VSS_END by Q4. VSS increases until it reaches VSSC (5V).
50 kHz
(1)
10.4k
R
50 kHz
4. Soft-Start and Self Auto-Restart
Generally, the output voltage gain of a resonant
converter is inversely proportional to the switching
frequency in the ZVS region. The conventional soft-start
method is implemented by sweeping the operating
frequency from HIGH to LOW. Soft-start is conventional,
using the SS pin, which is also used for auto-restart, as
shown in Figure 32 and Figure 33.
4.2. Self Auto-Restart
Once the IC enters overload condition, ISS2 is disabled
and VSS starts to be discharged by IOLP (30µA) until it is
out of the overload condition. If the condition remains,
VSS is continuously decreased until it reaches VSS_START
and the switching operation stops. This duration is
overload protection delay, tOLP. After switching stops, VSS
goes up and down four times by complementary
operation of ISS2 and IOLP. IC restarts as in soft-start
operation. The operation is self auto-restart. If other
protections are triggered (except for AOCP and TSD),
switching stops instantly and the IC can perform the self
auto-restart.
The soft-start time, tSS, self auto-restart time, tAR, and
OLP delay time, tOLP, can be estimated by the following:
tss =Css ·
Figure 32. Soft-Start and Self Auto-Restart Circuit
4.1. Soft-Start
The switching frequency decrease is inversely
proportional to VSS during the soft-start duration. To
minimize the frequency variation while the output
capacitance of the opto-transistor is charged, soft-start is
disabled until CON pin voltage (opto-coupler transistor
tAR =8 Css ·
tOLP =Css ·
ISS1
Driving
I
Current SS1
ISS2
ISS2
2.6[V]
[s]
30[µA]
2.6[V]
[s]
30[µA]
(2)
3.4[V]
[s]
30[µA]
Switching Stops at AOCP or OCP
IOLP ISS2
IOLP ISS2 IOLP
ISS2
VSSC
VSS_END
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
The maximum and minimum switching frequency can
be determined as:
VCT
VSS
VSS_START
VTL
tOLP
0V
tAR
tSS
No Switching
S/S End
(a) (b)
(a or c)
Switching Stops at OLP
S/S Resumes
(a) Overload Condition (b) Normal Condition (c) OCP or AOCP Enable
Figure 33. Soft-Start and Auto-Restart Waveforms
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
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The FAN7631 provides the pulse-skip function to prevent
a situation in which the output voltage could be increased
at no-load condition by the voltage-gain distortion. Figure
34 shows the internal block diagram for the control
(CON) pin and its external configuration. The CON pin is
typically connected to the collector terminal of the optocoupler and the IC stops switching when the control pin
voltage drops below 0.4V and resumes switching when
the control pin voltage rises above 0.6V. The frequency
that causes pulse skipping is given as:
fskip =
5.8k
R
4.6k
R
100 kHz
If VCON is lower than 1V, OLP is disabled.
6.2. Over-Current Protection (OCP)
When the sensed voltage through the CS pin drops
below VOCP (-0.54V) for longer than the OCP blanking
time, tBO (200ns); OCP is triggered and the switching
stops instantly.
(3)
6.3. Abnormal Over-Current Protection (AOCP)
If the secondary-side rectifier diodes are shorted, large
current with extremely high di/dt can flow through the
MOSFET before OCP is triggered. AOCP is triggered
with a short blanking time of 50ns, tBAO, as soon as the
sensed voltage drops below -1.10V, and switching
stops immediately.
6.4. Level-Change Over-Current Protection (OCP)
During soft-start duration, OCP is disabled and AOCP is
enabled in Auto-Restart Mode instead of Latch Mode.
Figure 34. Pulse Skipping Circuit
6. Protection Circuit
6.5. Over-Voltage Protection (OVP)
When the LVCC reaches 23V, OVP is triggered. This
protection is used when auxiliary winding of the
transformer is utilized to supply VCC to the FPS™.
The FAN7631 has several self-protective functions: levelchange OCP operates only during the soft-start duration,
Overload Protection (OLP), Over-Current Protection
(OCP), Abnormal Over-Current Protection (AOCP), OverVoltage Protection (OVP), Thermal Shutdown (TSD), and
Line Under-Voltage Lockout (also called LUVLO or
brownout). Level-change OCP, OLP, OCP, OVP, and
LUVLO are Auto-Restart Mode protections and AOCP,
TSD, and fault input are Latch Mode protections, as
shown in Figure 35.
6.6. Thermal Shutdown (TSD)
Generally, temperature of the gate drive circuit in a
controller increases in proportion to the rise in the
switching frequency. The thermal shutdown function is
built in to detect abnormal over-temperature, such as
ambient temperature or over driving of the IC internally. If
the temperature exceeds approximately TSD (130C),
thermal shutdown triggers in Latch Mode.
In Auto-Restart Mode protections, once a fault condition is
detected; the switching is instantly terminated and the
MOSFETs remain off. In case of OLP, it needs tOLP as
mentioned above to stop the switching. When LVCC falls to
the LVCC,STOP (10V), the protection is reset. For LatchMode protections, it can be reset when LVCC drops to VLR
(5V). The IC resumes normal operation when LVCC
reaches LVCC,START (12.5V).
6.7. Line-UVLO
FAN7631 includes a precise line-UVLO (or brownout)
function with programmable hysteresis voltage, as can
be seen in Figure 36. This function can start or restart the
IC when VLS is higher than VLINE = 3V and vice versa. A
hysteresis voltage between the start and stop voltage of
the IC is programmable by ILINE. In normal operation, the
comparator’s output is HIGH and ILINE is deactivated so
that the voltage on LS pin, VLS, can be obtained as a
divided voltage by R1 and R2. On the contrary, ILINE is
activated when the comparator’s output is LOW. VLS is
generated by the difference in the current through R1
and ILINE.
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
6.1. Overload Protection (OLP)
When the sensed voltage through the CS pin drops
below VOLP (-0.37V) and lasts for more than OLP
blanking time, tBOL (200ns); CSS starts to be discharged
by IOLP until VSS across SS pin reaches VSS_START (1.6V).
Then OLP is triggered and the MOSFETs are turned off.
However, if the OLP condition is removed, CSS is not
discharged; instead, it is charged quickly by ISS1.
5. Pulse Skip Operation
If necessary, CFilter can be used to reduce noise induced
by transformer or switching transition. Generally,
hundreds of pico-farad to tens of nano-farad is adequate;
depending on the quantity of noise.
Figure 35. Protection Blocks
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
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13
Vdclink ,STOP
R1  R 2
 VLINE 
R2
8. Current Sensing Methods
FAN7631 employs a negative voltage sensing method to
sense the drain current of MOSFET. This allows the IC to
ignore the low-side MOSFET’s driving current so that the
resistive sensing method using a filter of low timeconstant is allowed. The capacitive sensing method is
also available.
(4)
Vdclink,START  Vdclink,STOP  I LINE  R1
8.1. Resistive Sensing Method
The IC can sense drain current as a negative voltage, as
shown in Figure 38. For a time constant range of the
filter, 1/30~1/10 of the operating period, is reasonable.
Figure 36. Line-UVLO
7. Simple Remote-On/Off
The power stage can be shut down with Latch Mode or
Auto-Restart Mode, as shown in Figure 37.
In the Latch Mode protection circuit, the FI pin is used,
which stops the switching instantly once the voltage on FI
pin is pulled up to VFI (4V) using an opto-coupler.
Figure 38. Resistive Sensing
8.2. Capacitive Sensing Method
The drain current can be sensed using an additional
capacitor parallel with the resonant capacitor, as shown
in Figure 39. During the low-side switch turn on, the
current, ICB through CB makes VSENSE across RSENSE. The
ICB is scale-down of Ip by the impedance ratio of Cr and
CB. Generally, 1/100~1/1000 is adequate for the ratio of
CB against Cr. RD is used as a damper for reducing noise
generated by the switching transition. Several hundreds
of ohm to a few of kilo-ohms can be used.
To configure an external protection with Auto-Restart
Mode, an opto-coupler and the LS pin are used. When
voltage on the LS pin is pulled below VLINE (3V), the IC
stops during the status holds. However, when the optocoupler stops pulling down, the IC can perform the AutoRestart operation itself.
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
The start and stop input-voltage can be calculated as:
Figure 39. Capacitive Sensing
VSENSE can be estimated as:
Figure 37. External Protection Circuits
(Top: Latch Mode, Bottom: A/R Mode)
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
Vsense  I Cr
pk
CB
 Rsense
Cr
(5)
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Physical Dimensions
Figure 40. 16-Lead, Small-Outline Package (SOP)
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without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.1
www.fairchildsemi.com
16