Electrical Performance of High Speed Signaling in
Coupled Microstrip Lines
Differential (DIFF) transmission lines are perhaps one of the most commonly used passive interconnect structures for high
speed data transmission. Typically there are two configurations of DIFF transmission lines used to transfer signals in printed
circuit boards (PCBs) and/or packages: stripline and microstrip line. A stripline represents a guiding structure which provides a
pure transverse electromagnetic (TEM) mode of propagation. The transmission line is shielded between two metal layers
(typically the power and ground plane), and therefore also provides excellent performance in terms of EMC/EMI. A microstrip
line is routed on a dielectric substrate and referenced to a ground plane. Because of the inhomogeneous substrate/air
interface, only a quasi TEM propagation mode develops in the line. This can produce larger signal degradation in high speed
signals and also cause higher radiation levels because of the absence of shielding.
In this work [1], the modal propagation characteristics and the corresponding effect on the signal integrity (SI) performance of a
coupled DIFF microstrip line pair is analyzed. First, a test prototype is built for model-to-hardware correlation. The DIFF net is
15 inches long, 4.7 mils wide, has a copper thickness of 1.18 mils and it is routed on the bottom layer of a 10-layer PCB, as
illustrated in Figure 1 along with the port numbering.
Figure 1: Test board used for the correlation study with the DIFF microstrip line highlighted
Due to the complexity of the original board and for the purpose of only validating the numerical code, a small section around
the DIFF net of interest is chosen. This assumption is no longer valid in presence of very dense routing nets in combination
with small dimensions and at very high frequencies. However in this particular case the impact of the size of the power
structure on the numerically evaluated results is negligible.
An nth higher order Debye model is used to model the electrical properties of the dielectric substrate (4 points were originally
available). Surface roughness was also taken into account by means of the Hammerstad and Jensen formulation based on the
calculation of an additional element for the attenuation coefficient, which results in an increased value for the metal losses.
Electrical Performance of High Speed Signaling in Coupled Microstrip Lines
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Results of the calculated S-parameters are illustrated in Figure 2 and a very good agreement between measured data and
CST MWS simulation results is achieved in the considered frequency range 0-12 GHz.
Figure 2: Measured vs. simulated S-parameters: return loss (S11), insertion loss (S21), NEXT (S31) and FEXT
(S41)
A dip (cancellation frequency) can be observed in the insertion loss profile at around 6.7 GHz in the single-ended (SE)
excitation case. On the other hand, the mixed mode (DIFF) insertion loss shows a straight profile, as shown in Figure 3. The
fairly large difference between the modal group delays of the even/odd modes for the DIFF pair can also be observed.
Figure 3: Insertion loss (S21) for SE excitation vs. mixed mode DIFF excitation (left), Even and odd-mode group
delay (right)
This behavior is related to the fact that the even and odd modes propagate at different speeds due to the non-homogenous
nature of the microstrip interconnect. As these two independent modes propagate along the line, there are locations and
frequencies, where the phase difference will reach odd multiples of 180 degrees. At these frequencies and locations a
cancellation of the nodal voltages is observed. By computing the modal propagation delay difference, multiplying by the trace
length and calculating the mean of the result as a general approximation for all frequencies, a certain delta propagation delay
(tpd) for the entire trace length can be obtained. The cancellation frequencies (fr), can be calculated by the following
approximation [2]:
fr = (2n+1) / 2tpd
Electrical Performance of High Speed Signaling in Coupled Microstrip Lines
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Applying the above formula to the measured group delay results for the test board gives a delta propagation delay of 75 ps
which equates to a cancellation frequency of 6.67 GHz. This agrees very well with the measured/simulated value of 6.7 GHz
as shown in Figure 2-3.
In order to gain further insight into the dip in the SE insertion loss response of the DIFF microstrip line, a simplified version of
the original geometry is developed as shown in Figure 4. The DIFF microstrip traces are designed for a differential impedance
of 100 ohms with a trace width of 0.3 mm, a spacing of 0.7 mm, conductor (copper) thickness of 1 oz and a substrate (FR-4,
permittivity = 4.3) thickness of 30 mils. The trace length considered is 3.15 inches while the board size is 3.94 0.4 inches.
Figure 4: Section of the simplified DIFF microstrip trace geometry
The simulated SE S-parameter results for the simplified DIFF trace demonstrate a significant dip in the insertion loss curve at
around 9.64 GHz (not shown). This model is henceforth used as a baseline for the subsequent sensitivity analysis. It should be
noted that a solder mask layer with a variable thickness and dielectric permittivity is added to the base model for future
simulations.
The first parametric study looks at the effect of varying the permittivity of the solder mask material within a range of 1-10. The
thickness of the solder mask layer is fixed at 3.93 mils. From the SE insertion loss results presented in Figure 5 the
cancellation frequency is seen to shift higher in frequency as the permittivity of the solder mask is increased. For permittivity
values of 7 and greater it is pushed out beyond the 20 GHz frequency range of interest and results in a straight insertion loss
profile.
Figure 5: SE insertion loss for different solder mask permittivity (eps_solder) values
Electrical Performance of High Speed Signaling in Coupled Microstrip Lines
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This behavior can be explained by observing the modal group delay for the even and odd modes. The SE insertion loss curves
for the base model (Case A) and the case where the solder mask dielectric constant is set to a value of 8 (Case B) are plotted
together in Figure 6 for clarity along with the respective group delay curves for the even and odd modes. It can be observed
that including a high permittivity solder mask layer causes a significant decrease in the odd mode phase velocity while the
even mode phase velocity also decreases by a smaller amount. The net effect is that the group delay for the two modes ends
up being almost equal for Case B. Based on these results the delta propagation delay for Case A is calculated to be 53.76 ps
which corresponds to a cancellation frequency of 9.3 GHz. This is in agreement with the simulated result of 9.64 GHz.
Similarly, the delta propagation delay for Case B is found to be 9.8 ps which corresponds to a cancellation frequency of 51
GHz. This frequency lies outside the frequency band of interest thereby resulting in a straight insertion loss profile for this case
as seen in Figure 6.
Figure 6: SE insertion loss for Case A and Case B (left), Corresponding group delay curves for the even and
odd modes (right)
By observing the propagation phase for the two modes as shown in Figure 7 for Case A and Case B, a 180 degree phase
difference at 9.64 GHz for Case A can be observed which corresponds to the location of the cancellation frequency. However
for Case B there is a negligible phase difference between the two modes within the simulated frequency range.
The second parametric sweep looks at the effect of varying the thickness of the solder mask layer. A permittivity of 4.3 which
matches the permittivity of the substrate is used for this set of simulations. As can be observed from the SE insertion loss
results presented in Figure 8, the cancellation frequency is increased as the solder mask layer thickness increases. This is due
to the fact that a thicker solder mask layer with a sufficiently high permittivity value will encapsulate a larger portion of the fields
associated with the odd propagation mode and therefore reduce the odd mode propagation velocity. This in turn reduces the
difference between the even and odd mode phase velocities resulting in a lower delta propagation delay value which translates
to a higher cancellation frequency as shown earlier.
The effect of varying the spacing between the DIFF traces is investigated next. No solder mask layer is considered for these
simulations. It can be seen (Figure 8) that the cancellation frequency increases as the spacing between the traces is
increased. This is because the coupling between the traces decreases as the spacing increases and this reduced coupling
results in reduction in the difference between the even and odd mode phase velocities thereby leading to a lower delta
propagation delay value. This is turn causes the cancellation frequency to increase.
Electrical Performance of High Speed Signaling in Coupled Microstrip Lines
© 2016 CST AG - http://www.cst.com
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Figure 7: Group delay (phase) curves for the even and odd modes for (a) Case A (b) Case B
Figure 8: SE insertion loss for different solder mask thickness (t_mask) values (top), SE insertion loss for
different spacing (gap) values (bottom)
Finally, the variation of the differential impedance of the DIFF traces as a result of the three sensitivity studies is shown in
Figure 9. It can be seen that the variation in the DIFF impedance is relatively small for the cases where the solder mask
permittivity and the thickness are changed. However there is a large variation for the case where the gap between the DIFF
traces is changed. These results demonstrate that the differential impedance is less sensitive to the electrical properties of the
solder mask layer than to changing the spacing between the DIFF traces. Therefore careful selection of the dielectric material
and thickness of the solder mask layer can help improve the insertion loss response of coupled microstrip DIFF pairs, thereby
leading to improved signal integrity performance.
Electrical Performance of High Speed Signaling in Coupled Microstrip Lines
© 2016 CST AG - http://www.cst.com
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Figure 9: DIFF trace impedance for variable solder mask permittivity (top left), solder mask layer thickness (top
right), DIFF trace spacing (bottom)
[1] D. Kostka, A.C. Scogna, F. Paglia, B. Mutnury, "Electrical performance of high speed signaling in coupled microstrip lines,"
in Proc. of IEEE Electrical Performance of Electronic Packaging and Systems (EPEPS), 2011.
[2] G. Blando, G. Miller, I. Novak, Losses induced by asymmetry in differential transmission lines, in Proc. of DesignCon,
2007.
Electrical Performance of High Speed Signaling in Coupled Microstrip Lines
© 2016 CST AG - http://www.cst.com
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