Novel Compact Synchronous Rectifier with Power Factor Correction
Zhao Liang1, Zhang Bo2, Ma Huasheng1
1
2
ASTEC Lab, South China University of Technology, Guangzhou 510640, China
Electric Power College, South China University of Technology, Guangzhou 510640, China
Abstract—Sheppard-Taylor(S-T) topology was presented
to reduce the output current ripple of DC-DC converters. In
this paper, we modified the S-T circuit into AC-DC converter with functions of synchronous rectifier (SR) and
power factor correction (PFC). Firstly, we made a comparison between several topologies to show the advantages of
AC-DC S-T circuit for our design aim. Then we built up the
math model of this AC-DC converter according to the statespace average and the power balance to calculate the equipment parameters and design the control circuit, which were
different with DC-DC model. And we corrected the circuit
by the computer simulation in details. Finally, a prototype of
AC-DC Sheppard-Taylor circuit with 110V input and
1.5V/30A output was completed and actually worked with
the expectant aims.
So we conclude that the converter can achieve high
power factors, low voltage/high current output, high efficiency and compact with few electric components by proper
design. We also emphasize some committed steps for the
AC-DC S-T converter design in the paper.
Keywords—Power factor correction, Synchronous rectifier, Insulation, Energy balance
operating intervals during a switching period when S-T
topology operates under DCM-CCM.
Interval I [0- DTS ]
During this interval, energy stores in the input inductor, and the energy in the capacitor C1 transfers to output
stage, the current following is shown in Fig.1.
Interval II [ DTS - D1TS ]
During this interval, the energy stored in the inductor
transfer to the capacitor C1 , output diode D9 is the flywheel diode of the output current. The current flowing is
shown in Fig.2.
Interval III [ D1TS - TS ]
During this interval, primary side input current L1 is
resonating without damp. Diode D9 is the fly-wheel diode of the output current, as shown in Fig.3.
I. INTRODUCTION
Sheppard and Taylor proposed Sheppard-Taylor circuit in 1983[1]. The main aim is to improve DC-DC input
and output current ripper. S-T topology may be regarded
as an evolution topology of the Cuk topology. The energy
of Cuk circuit is bidirectional, but the S-T circuit transformer works in forward[2][3][4]. This is a distinct point
between them. The input and output sides respectively
have an inductance in S-T circuit with different conduction mode: the input inductance works in discontinuous
current mode (DCM) while output inductance works in
continuous current mode (CCM); or input inductance
works in CCM while output inductance works in DCM.
So the topology may be used in PFC converter with different control method[5]. When the working mode is
DCM-CCM, The control circuit may use the tradition fix
frequency chip[6]. The power factor correction method is
voltage following mode in the input side[7]. If circuit
works in CCM-DCM mode, frequency modulated control
should be valid, but complex. The control circuit adopts
DCM-CCM working mode to get the simple control circuit and low cost.
Fig.1 Interval I
Fig.2 Interval II
II. AC-DC S-T CONVERTER WORK PRINCIPLE
According to the voltage following Single stage PFC
principle, if input current is DCM and voltage follows to
the current automatically, high power factor can be
achieved. And when the output current is CCM, high current and low voltage output is feasible. So there are three
Fig.3 Interval III
The high voltage stress of Sheppard-Taylor circuit is
VC1 , the voltage of the energy storage capacitance. This
capacitance can absorb the transformer leakage voltage.
So the voltage stress is lower than of Cuk because of
Cuk’s transformer leakage and transformer second wind-
1318
ing returning voltage[8]. Hence it reduces the components
voltage tension in PFC converter, which can choose more
appropriate components to accomplish the experiment.
Sheppard-Taylor's circuit still has an advantage of the
inside degaussing loop, so the additional degaussing circuit can be saved. Cuk circuit also has inside degaussing
circuit, but it utilizes capacitance voltage reflection returning from second winding, which can obtain better
effect when output high voltage(For the transformer second voltage reflects back as the primary degauss voltage).Yet when output voltage reduces very much, second
winding voltage is low than energy storage capacitance
voltage. On the basis of the transformer voltage-second
rule, the degauss time is too long. In other words, the
largest duty cycle becomes very small. For example: if
two voltage differences is 20 times, the largest duty will
be smaller than 0.05. Working in that way couldn’t meet
the circuit demand. So Cuk circuit can’t be used in low
voltage output. The voltage stress of power device is kept
at the voltage of energy storage capacitance in SheppardTaylor's electric circuit to eliminate the leakage inductance voltage. Simultaneous degauss voltage is energy
storage capacitance voltage, and the stimulating magnetism voltage also is capacitance voltage. Hence the max
duty cycle may be up to 0.5, which can meet the control
demand of the circuit.
According to the DCM-CCM work status, the Fig.4 is
as follow:
I L1− AVG (t ) =
=
1
( DTS + D1TS ) I L1− PK
2TS
VC1 + v1 (t ) 2
D TS + nI O D
2 L1
(4)
D 2TS
D 2TS
v1 (t ) +
VC1 + nI O D
2 L1
2 L1
n —Ratio of the transformer;
D —Conduction time during a single switching period;
D1 —Energy releasing time;
TS —Switching period;
=
I O —Output current;
VC1 —Voltage of energy storing capacitor C1 ;
v1 (t ) —Input voltage;
In the above equation (4), the later two items is approximate constant, V-I characteristic based on equation
(4) is shown in Fig.5.
Fig.5 Input AC voltage and current
Fig.4 Input inductor current and storage capacitor current
According to the charge balance law, the following
approximate formula can be obtained
1
(1)
nI o DTS = I L1− PK D1Ts
2
The current pike I L1− PK of input inductor during a single switching period is
V + v (t )
I L1− PK = C1 1 DTS
(2)
L1
Replacing I L1− PK in equation (1) by (2), D1 can be
achieved as following
2nI o L1
D1 =
(3)
[v1 (t ) + VC1 ]TS
So the average input current I L1− AVG (t ) during a single
switching period is I L1− AVG (t ) ,
From Fig.5, we can see that the input current an abnormal when is passes zero. The main reason is that a DC
component ( D 2TS / 2 L1 )VC1 + nI O D has been added to the
average input current. This aberration is the type of Cuk,
Sepic and Zeta topology. So it can be concluded that,
theoretically, the topologies derived from Cuk topology
have the same input power factor of Cuk topology.
Due to the continuous input current, the high frequencies components can be eliminated and only the fundamental component is remained by adding a LC low pass
LC filter on the input stage, the power factor correction
can realized.
In the low output voltage high output current application, the required voltage level can be achieved with a
transformer. High efficiency can be achieved in low output voltage high output current application if the diode
D8 and D9 are replaced by synchronous rectifier MOSFETs.
III. STATE SPACE AVERAGE
It is well known that power electronic topology is an
non-linear system. The analysis is very complex. Middle
Brook has presented an important method: Average during a cycle.
In brief, the system component of steady state and dynamic state is decided by the follow equations:
1319
Steady state component：
0 = [ DA1 + kDA2 + (1 − D − kD) A3 ] X
+ [ DB1 + kDB2 + (1 − D − kD) B3 ]U
Substitute (8) into (6):
2
3
+ (− d − k d ) B ⎤ U + ...
+ ⎡ B1 d + k dB
2
3⎦
⎣
According to the three operating interval, we can get:
⎡
⎢ 0
⎢
⎢ 1
⎢− C
A1 = ⎢ 1
⎢
⎢ 0
⎢
⎢
⎢ 0
⎢⎣
⎡
⎢0
⎢
⎢1
⎢C
A2 = ⎢ 1
⎢
⎢0
⎢
⎢
⎢0
⎣⎢
1
L1
0
−
0
−
n
C1
n
L2
0
0
1
C2
1
L1
0
0
0
0
0
0
1
C2
⎤
0 ⎥
⎥
⎥
0 ⎥
⎥
1 ⎥
− ⎥
L2 ⎥
1 ⎥
− ⎥
C2 ⎥⎦
⎡1⎤
⎢L ⎥
⎢ 1⎥
B1 = ⎢ 0 ⎥
⎢ ⎥
⎢0⎥
⎢⎣ 0 ⎥⎦
⎤
0 ⎥
⎥
⎥
0 ⎥
⎥
1 ⎥
− ⎥
L2 ⎥
1 ⎥
− ⎥
C2 ⎦⎥
IV. ENERGY BALANCE ANALYSIS
Firstly define the voltage transfer ratio m(t ) of the
converter and intermediate voltage transfer ratio m / (t ) as
following:
V
VO
M
m(t ) = O =
=
v1 V1 sin( wt )
sin( wt )
m / (t ) =
⎡1⎤
⎢L ⎥
⎢ 1⎥
B2 = ⎢ 0 ⎥
⎢ ⎥
⎢0⎥
⎢⎣ 0 ⎥⎦
iL1 (t / , t ) =
(6)
VO
RL
For the current in the input inductor is DCM, according to volt-second balance:
VC1 + V1
V −V
(7)
DTS = C1 1 D1TS
L1
L1
IL2 =
So the freewheel time of the input inductor L1 is：
D1 =
VC1 + V1
D
VC1 − V1
VC1
VC1
M/
=
=
sin( wt )
v1 V1 sin( wt )
Where M and M / are voltage transfer and intermediate transfer ratio at the time of pike voltage respectively,
that is to say, the value is the minimum voltage ratio.
When 0 < t / < dTS ，the current of inductor L1 is,
0 ⎤
⎡0 0 0
⎢0 0 0
0 ⎥⎥
⎡0⎤
⎢
⎢0⎥
⎢
1 ⎥
A3 = ⎢ 0 0 0 − ⎥
B3 = ⎢ ⎥
⎢0⎥
L2 ⎥
⎢
⎢ ⎥
⎢
⎥
1
1
⎣⎢ 0 ⎦⎥
−
0
0
⎢
⎥
C2
C2 ⎥⎦
⎢⎣
Substituted A1 , A2 , A3 , B1 , B2 , B3 into steady function,
the steady component can be derived. RL is the load resistor.
( D1 − D )VC1 = ( D + D1 )V1
( D1 − D ) I L1 = nDI L 2
nDVC1 = VO
2V1
nI L 2
VC1 − V1
nDVC1 = VO
(9)
V
IL2 = O
RL
From equation (9), the Sheppard-Taylor output circuit
is very similar with Buck converter and the input parameters can be calculated from equation (9). The above derivation is about DC/DC, but when the input is AC, the
equation will be not correct. So the energy balance is a
good way to get the primary side parameters when input
is AC.
Dynamic state component：
d x = [ DA1 + kDA2 + (1 − D − kD ) A3 ] x
dt
+ ⎡ d A1 + k d A2 + (− d − k d ) A3 ⎤ X
⎣
⎦
+ [ DB + kDB + (1 − D − kD) B ] u
1
I L1 =
(5)
(8)
V1 sin( wt ) + VC1
L1
t/
(10)
The current pike of inductor L1 can be calculated as,
iL1− P (t / , t ) =
V1 sin( wt ) + VC1
L1
DTS
(11)
Define continuous current time of inductor L1 as
d1 (t ) , according to volt-second balance, the following
equation can be achieved,
(V1 + VC1 ) D = (VC1 − V1 )d1 (t )
(12)
According to the definition of transfer ratio, we can
get,
VC1 = M /V1
(13)
VO = MV1
(14)
VC1 is capacitor voltage of C1 , VO is output voltage,
applying equation (13) to equation (12), we can get,
V + V sin( wt )
M / + sin( wt )
d1 (t ) = C1 1
D= /
D (15)
VC1 − V1 sin( wt )
M − sin( wt )
So the average input current during a switching period
can be calculated as following equation,
M / + sin( wt )
1
I L1 (t ) = iL1− P (t / , t ) ⋅ [ D + /
D] (16)
2
M − sin( wt )
Applying equation (11) to (16), we can get,
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I L1 (t ) =
/
/
V1 D 2TS M ( M + sin( wt ) )
L1
M / − sin( wt )
(17)
In equation (17), the distortion of the input current is
hidden.
From equation (12), we can get
d (t ) + D
M/ = 1
(18)
d1 (t ) − D
When input inductance is on the bound between DCM
and CCM, d1 (t ) = 1 − D . Then, the intermediate ratio can
be calculated by the following equation.
1
(19)
M B/ =
1 − 2D
Boundary of input and output ratio is:
D
(20)
MB =
1 − 2D
During a half period of input voltage, the power transferred from the input power network to the transformer is
1 π
PIN = ∫ I L1Vin sin( wt ) d ( wt )
(21)
π
0
Applying equation (17) to (21), we can get
PIN =
V12 D 2Ts
2 L1π
π
[ M / ( M / + sin( wt ) )] ⋅ sin( wt )
0
M / − sin( wt )
∫
d ( wt )
V 2 D 2Ts
f (M / )
= 1
2 L1π
Where,
/
/
π [ M ( M + sin( wt ) )] ⋅ sin( wt )
f (M / ) = ∫
d ( wt )
0
M / − sin( wt )
(22)
When 0 < t / < DTS , the pike of the current flowing
through L2 is
VC1 − VO
DTS + iL 2 − 0
(28)
L2
So, when output inductor operates at the bound between CCM and DCM, the average current flowing
through L2 is
iL 2 − P =
V
1
I L 2 = iL 2 − P = I O = O
RL
2
(29)
From equation (25) and (26), iL 2 − 0 = 0 , the boundary
condition of L2 can be achieved as,
2 L2
= 1− D
(30)
RLTS
From equation (26) and (30), boundary values of input
inductance and output inductance can be achieved. Input
inductance should be less than boundary value due to the
operation at DCM in primary side, output inductance
should be more than boundary value due to the operation
at CCM in the secondary side. Thus the whole circuit operates at DCM-CCM.
L1
L2
and K CRiIT
versus duty ratio
The curve of M , KCRIT
can be plotted according to equation (19), (26) and (30).
From these, we can see the duty ratio should be no more
than 0.5.
L2
K CRIT
=
is the function of intermediate transfer ratio.
Average output power of the transformer is POUT ,
VO2 ( MV1 ) 2
=
(23)
RL
RL
Then the system efficiency η can be calculated as follows η ,
η PIN = POUT
(24)
Applying equation (22) and (23) to (24), we can get
2 L1 η 1
K L1 =
=
f (M / )
(25)
RLTS π ( M / ) 2
When input voltage is maximum, input inductor
L1 operates at the bound of DCM and CCM, applying
equation (19) to (25), we can get the boundary condition
of L1 as
POUT =
2 L1 η
1
= (1 − 2 D) 2 f (
) (26)
RLTS π
1 − 2D
According to equation (23), the relation of duty ratio
and L1−CRIT can be achieved.
The boundary condition of L2 is calculated as follows,
Since,
POUT = I L 2VO
(27)
L1
K CRIT
=
L1
L2
Fig.6 M , K CRIT
and K CRiIT
curves about duty cycle D
When it comes to the case with insulation transformer,
we should take the transformer ratio into account and
achieve the boundary values of L1 and L2 as follows:
K nL−1CRIT =
2 L1
1
n 2η
=
(1 − 2 D)2 f (
)
π
RLTS
1 − 2D
(31)
2 L2
= 1− D
(32)
RLTS
From equation (26) and (30) to (32), we can see that
transformer ratio n only affects the input inductance. The
boundary value of Input inductance and output inductance
in the case with isolated transformer can be achieved using the boundary curve in Fig.6. Note that Fig.6 is based
on the case without isolated transformer, so the boundary
value should be multiplied by n 2 .
When designing closed-loop, the transfer function of
output voltage as the conduction ratio should be given.
Then, the Bode graphic of open loop can be achieved
based on the classical control theory. It can be compensated by PID regulator.
If use the RMS of the AC input as DC input value, the
state space average could be used in AC/DC analysis.
1321
K nL−2CRIT =
According to state space average, substitute the parameters, x / d is got. Parameter x includes U C 2 and
U C 2 = U O , so the transfer function about VO and D is
derived. Because A1 , A2 , A3 , B1 , B2 , B3 are four orders,
the transfer function is also four orders. By calculation of
the matrix, transfer functions of VO and D are shown as:
G( s) =
N (s) =
N (s)
M (s)
(33)
nVC1 2
nD
s +
[(k − 1) I L1 − nI L 2 ]s
C2 L2
L2 C1C2
(k − 1) 2 D 2
(k − 1)nD 2
+
nVC1 +
[(1 − k )VC1 + (1 + k )V1 ]
L1 L2 C1C2
L1 L2 C1C2
M (s) = s 4 +
+[
1 3
1
n 2 D 2 (k − 1) 2 D 2 2
s +[
]s
+
+
RL C2
L2 C2 L2 C1
L1C1
(34)
2. Simplified control, only a voltage loop is required.
3. The topology includes inner degaussing circuit;
demagnetizing voltage is the voltage of energy storing
capacitor. The duty ratio can be equal to 0.5 according to
volt-second balance.
4. The voltage stress is acceptable.
5. Sheppard-Taylor circuit can be self-decoupled. Input and output inductor operates at DCM and CCM respectively.
6. Output stage operates at CCM, and output voltage
ripple is small.
Of course, AC-DC Sheppard-Taylor converter has
some disadvantages such as more power devices and input current aberration in theory analysis. And the two
power switches should operate in synchronism.
I o ( A)
(35)
( k − 1) D
(k − 1) D
n D
]s +
+
L2 C1C2 RL L1 RL C1C2
L1 L2 C1C2
Analyzing the active components, C1 L1 C2 L2 , we
2
2
2
2
2
2
can conclude that the input inductor L1 and energy capacitor C1 have little affection to the output.
Output characters are mainly decided by inductor L2
and capacitor C2 . That’s to say, zero-points and poles of
the system are decided by them. Furthermore the output
characteristic is almost the same as Buck topology operating at CCM. So close-loop compensation can be designed
referred on Buck circuit.
V. EXPERIMENT AND CONCLUSION
Based on above analysis and simulation adjustment,
the main experiment equipments are as follow:
Input: 110Vac;
Output: 1.5Vdc/30A;
L1: 240uH, 0.2mm*28, RM12air-gap;
L2: 7uH AWG13*3, T80-52 core;
C1: 470uF/450V Energy storage capacitor;
C2: 2200uF;
Chip: TL494;
MOSFET: SPW20N60S5*2;
SR MOSFET: STP80NF03L-04*2;
Rectification Bridge: GBU4J*4;
Diode: MUR1560;
In order to improve the efficiency, the SR MOSFETs
operate in separate-excitation mode to take the place of
output Schottky diodes. Other synchronous excitation
modes can also be adopted, such as the self-excitation
method by the secondary voltage of transformer, which
may make the circuit simpler and more compact [9]. The
following research and experiment will go on.
The experiment datasheet at stable operation is shown
in the Table.I. This circuit has following advantages when
operating at DCM-CCM:
1. Input stage operates at DCM; PFC can be realized
automatically employing VF-PFC.
Table I Experiment Datasheet
Vo (V )
Pin (W )
PF
31
30
29
28
27
26
25
24
1.493
1.493
1.494
1.494
1.496
1.496
1.497
1.499
55.86
54. 67
54.05
53.90
53.45
53.10
52.84
52.58
0.979
0.978
0.978
0.977
0.976
0.975
0.975
0.974
23
1.501
52.10
0.973
22
1.502
51.46
0.972
21
1.504
51.13
0.970
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