Sequential Circuits Timing Diagram Example by Theo Chakkapark
(theo@suteki.nu)
Tuesday, October 09, 2007
2:48 PM
Note: The Y' is not y prime; it's simply y. There was a printing error in the quiz.
Given the following circuit diagram, complete the timing table.
1. We're going to start out with our Excitation Table. We are NOT going to read from the timing diagram
for any initial states.
I
Q1
Q0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Q1+
Q0+
Y
2. We need to derive the equations for the circuit. This will be significantly faster to derive the next states,
Q1+, Q0+, and the output Y, which will be the answers we will be applying to our timing diagram.
a. Find the output, Y
i. Y is the output of NAND, which has input (I, Q0)
ii. Turning this into an equation, we have
b. Find the output of the T-FF, which will be Q1+
i. Notice that Q1' from the D-FF is the input to the T-FF
ii. Turning this into an equation, we have
c. Find the output of the D-FF, which will be Q0+
i. The D-FF takes in an input that consists of NAND and NAND
1) NAND takes in an input of Q1 and the output of NAND
2) NAND takes in an input of I and Q0
ii. Turning this into an equation, we have
3. We will now use the equations to fill in the table for the first row.
Comp Architecture Page 1
I
Q1
Q0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Q1+
Q0+
Y
a. Let's start with the first row, where I=0, Q1=0, Q0=1. It does not matter which equation we start
out with, so let's just use the equations in the order they were discovered.
b. Fill in the table with the new values.
I
Q1
Q0
Q1+
Q0+
Y
0
0
0
1
1
1
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
4. Find the values for the second row.
I=0, Q1=0, Q0=1
I
Q1
Q0
Q1+
Q0+
Y
0
0
0
1
1
1
0
0
1
1
1
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
5. Now for the third row.
I=0, Q1=1, Q0=0
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I
Q1
Q0
Q1+
Q0+
Y
0
0
0
1
1
1
0
0
1
1
1
1
0
1
0
0
0
1
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
6. I hope you're getting the hang of this! I am going to quickly finish the table off so we can move onto the
timing diagram.
I
Q1
Q0
Q1+
Q0+
Y
0
0
0
1
1
1
0
0
1
1
1
1
0
1
0
0
0
1
0
1
1
0
0
1
1
0
0
1
1
1
1
0
1
1
1
0
1
1
0
0
0
1
1
1
1
1
0
0
Going to randomly check here that the equation applies to all rows. Let's check the second to the last
row.
Great, it holds true.
7. Let's use the table to now fill in the timing diagram. I want to note one thing that is extremely important.
The input, I, is NOT affected by the clock cycle!
The clock has no connection to I whatsoever! We need to make note of this when filling in the diagram, which means we cannot just evaluate to the
next positive edge trigger if I is not constant. We have to evaluate I at every rise and drop of the clock if it changes in b etween.
I
Q1
Q0
Q1+
Q0+
Y
0
0
0
1
1
1
0
0
1
1
1
1
0
1
0
0
0
1
0
1
1
0
0
1
1
0
0
1
1
1
1
0
1
1
1
0
Comp Architecture Page 3
1
0
1
1
1
0
1
1
0
0
0
1
1
1
1
1
0
0
8. Let's begin with position 0 to 2. I is constant the entire way.
The initial state of the timing graph begins with I=0, Q1=0, Q0=0, Y=1.
What in the table matches that?
I
Q1
Q0
Q1+
Q0+
Y
0
0
0
1
1
1
9. Now, let's work with 2 - 3.
Look at our previous cycle results:
Q1 = 1, Q0= 1
Our current I = 0 at position 2.
Is there somewhere in the table where Q1=1, and Q0=1, and I=0 (obtained from position 2)?
I
Q1
Q0
Q1+
Q0+
Y
0
1
1
0
0
1
So the next state will be Q1=0, Q0=0.
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10. Now let's work with 3-4. Mid-cycle, from position 2 to position 3, I has shifted from low to high.
Let's note that 3-4 is mid-cycle. Although we've been drawing out the lines as we go along the positions, know
that these positions are not final until the next positive edge trigger in the circuit. For example, although from
position 2-3, Q1 and Q0 are both 0, the circuit itself has not registered those values; instead, we are still going to
look at the previous cycle, which is 1-2.
Y will change because Y is partially affected by I, and Q0.
I and Q0 are inputs to the NAND that outputs Y.
Since the previous cycle (position 1-2) Q0 was 1 (high), and input I just got flipped to 1 (high), output Y will now
become 0 (Low).
11. Let's now look at position 4-6. We're not concerned with any mid-cycles since I does not change.
We have current input I with 1 (high), and Q1=Q0=0 (Low)
What values in our table where I=1, Q1=0, Q0=0?
I
Q1
Q0
Q1+
Q0+
Y
1
0
0
1
1
1
So our next Q1, Q0 will be both 1, with Y outputting 1
12. Now let's work with 6-7. Remember that this is only half a cycle, since 7-8 has a shift in input, and will be dealt
with in the next step.
At position 6, Q1 = Q0 = 1
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Position 7 has I=1
Going from 6 to 7, let's find out in our table where I=1, Q1=1, Q0=1
I
Q1
Q0
Q1+
Q0+
Y
1
1
1
1
0
0
So, 6-7 will be Q1=1, Q0=0, Y=0
13. let's now work with position 7-8. Input I drops to 0 between position 7 and 8, but this will not affect Y in any
way, since the NAND that outputs Y, if one of the inputs are 0, then Y will always be 1.
14. Let's look at positions 8-10. From 8-10, I stays at 0. To determine our next state, we look at the previous cycle
value, which is at position 8.
At position 8, Q1 = 1, Q0 = 0
What in our table will have I=0, Q1=1, Q0=0 ?
I
Q1
Q0
Q1+
Q0+
Y
0
1
0
0
0
1
15. Let's look at 10-11. It's a mid-cycle where I goes from 0 to 1. However, we need to look at the portion where I
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15. Let's look at 10-11. It's a mid-cycle where I goes from 0 to 1. However, we need to look at the portion where I
still is 0.
a. The section we are looking at has been boxed and shaded in green. To find this portion, let's look at
the previous cycle's Q1 and Q0, which is at position 10.
@ position 10, Q1 = 0, Q0 = 0
So, where in our table can we find where I=0 (from green shaded area), Q1 = 0, Q0 = 0?
I
Q1
Q0
Q1+
Q0+
Y
0
0
0
1
1
1
So, our next mini-state is Q1=1, Q0=1, Y=1
16. Now we need to look at what happens when I=1 between 10-11. However, since I does not change after that,
we can extend the next state until the next cycle (11-12).
Remember, we are looking at the previous cycle values for Q1 and Q0, which lies at position 9-10. (I did not say
position 10 in this case, because you might have been confused with the recent addition, where Q1= Q0 = 1,
which is part of the current cycle, and not the previous.)
@ position 9-10
Q1 = 0
Q0 = 0
So, where in our table where I=1, Q1=0, Q0=0?
I
Q1
Q0
Q1+
Q0+
Y
1
0
0
1
1
1
It seems the current Q1, Q0, Y will remain at 1.
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17. Now, let's look at 12-14. The current I is 1, while the previous cycle's Q1, Q0 are 1
I
Q1
Q0
Q1+
Q0+
Y
1
1
1
1
0
0
And we are done!
Don't believe the answers? Maybe you should check out the LogicWorks 5 representation of this circuit and run
the timing diagram from it. It should match what we've worked though here.
example
(If you're lucky, this file will be embedded into the PDF!)
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