Impulse Switching of Ferrites

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Impulse Switching of Ferrites
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EMORY designs at present reflect
either the applications, size, or environment of the memory. Many desired
memory characteristics oppose each other
in the determination of the memory design
and there has been no general solution to
the basic problems associated with magnetic storage. Lincoln Laboratory's concern primarily has been to improve the
memory speed, and hopefully obtain improved efficiency and design freedom. It
has only recently become clear that these
three factors, speed, efficiency, and design 'flexibility, are closely related and in
fact lead to generalized memory designs.
Efforts at memory improvements have
been concentrated in two areas; the magnetic elements, which is called the elemental approach, and the nonelemental
sections or memory proper, called memory
methods.
Recent memory methods include techniques such as Load Sharing,t Set a
Line,? Anticoincident Current, and Linear
Selection schemes.
The elemental approach includes the
work on thin films, Twistors 3 and multiaperture devices. 4
M
Memory Improvements
In order to obtain improved speed capabilities, 1inear selection memory designs
have been utilized. There are also other
important advantages of linear selection
that have accelerated its use. However, it
was clear that memory methods alone
would not provide the speed improvements desired. An elemental approach
that has been named Impulse Switching
has provided added memory speeds that
are an order of magnitude improved over
previous methods. To evaluate the technique, ferrite cores are currently being
used as the magnetic element; however,
impulse switching is a mode of operation
not restricted to ferrites.
Basically, impulse switching utilizes
current drives that are controlled in both
amplitude and width. By adjusting these
parameters it is possible. to control how
much of the core switches, and in effect,
there is a partial switching of the core.
In the 5O-30-mil size core, for example,
there is 10 mils of material available for
complete switching, but switching may be
restricted to as little as 1 mil of material.
This technique might be described by
saying that impulse currents electrically,
rather than physically reduce the size of
the core to improve the speed.
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50- 30 CORE
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Impulse Switching Characteristics
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The general characteristics obtained by
impulse switching will best describe its
capabilities and application. The switching constant (Sw) for impulse driven cores
shows an effective decrease relative to the
Sw obtained with normal drive currents.
Fig. 1 shows the Sw curve for both cases.
There is, in practice, a family of Sw
curves representing different degrees of
partial switching. The switching time ts
is defined as
where
Hm = applied field
Ho = threshold field for irreversible domain
wall motion and is approximately
equal to He, the coercive force.
A reduction of Sw as shown in Fig. 1 provides a proportional decrease in the
switching time.
There is also an apparent change in coercive force He when impulse currents are
applied. As the drive current widths are
decreased, the current magnitude necessary to initiate switching increases proportionately. This improves the speed still
further, since the switching time is inversely proportional to the applied field.
The pulse characteristics are obtained
by applying a write current variable in
magnitude and width. An additional
current called an exciter (opposite to the
normal inhibit) is applied coincidently
with the write current. The exciter current is set below the coercive field and is
slightly wider than the write current.
The coincidence of a write and exciter
current cause partial switching during
this interval. However, the absence of
the exciter of course does not allow switching. The write current is first set at a
particular value while the width is reduced to small values causing partial
switching. There is a decrease in switching time for both the read and write core
outputs and a decrease in core output
voltage. A new value of write current is
chosen and again the current width is reduced to obtain switching time and output voltage data. Curves of this sort are
shown in Figs. 2 and 3. Fig. 4 shows the
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Ts
Fig. 1.
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Applied field versus switching time
signal-to-noise ratio for these data.
Additional data are taken with the read
current set at a new value and again varying the write current in magnitude and
width. Figs. 2, 3, and 4 are taken for a
read current of 1.0 ampere. Additional
curves for read currents of 0.5 ampere, 1.5
amperes, and 2 amperes will change switching time, output voltage, and signal-tonoise ratios considerably. In Fig. 4, the
signal-to-noise ratio is obtained by applying a program of partial write and exciter
currents in a manner similar to that used
in normal core testing. It is observed
that in many cases improved signal-tonoise ratios (U v1 , d vz ) are possible for the
impulse mode.
In Fig. 3 the reduction of read output to
zero for a write current of 0.6 ampere at a
width of 0.1 microsecond (usec) is an example of the apparent increase in coercive
field for decreasing current width. For
a write current of 0.6 ampere no switching
will occur below O.l-p,sec width. At this
width, however, the curves indicate
switching will occur if the current is raised
to 0.8 ampere. The regions below
70-mpsec (millimicroseconds) widths in
Figs. 2, 3, and 4 are difficult to measure
because of current rise time limitations.
It is also difficult to show a composite picture of these curves, but the following generalizations can be made.
1. Variable core voltage outputs
possible at almost any switching time.
are
2. Switching times as low as 20-50 mJ.tsec
are possible with good signal-to-noise ratio.
3. The write interval switching time is
approximately equal to the read switching
time.
R. E. McMAHON was with Lincoln Laboratory,
Massachusetts Institute of Technology, Lexington,
Mass., and is now with Transistor Applications,
Inc., Boston, Mass.
The work reported here was performed at Lincoln
Laboratory, a technical center operated by Massachusetts Institute of Technology with the joint
support of the United States Army, Navy, and Air
Force.
McMahon-Impulse Switching of Ferrites
From the collection of the Computer History Museum (www.computerhistory.org)
31
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Fig. 2 (left). Read
switching time versus
write width
EXCITER CURRENT
250 MA @ .8p.s
READ CURRENT
1 AMP @ .4
EXCITER CURRENT
250 MA @.8p.s
READ CURRENT
1 AMP@.4p.s
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CURRENT WIDTH (p.s)
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SigFig. 4 (right).
nal-to-noise
ratio
versus write current
width
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WRITE CURRENT
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WIDTH (p.s)
General Advantages
These three facts represent the advantages of impulse switching, and in
fact, demonstrate that memory speed,
efficiency, and design flexibility are controllable for the impulse switching mode.
Since the voltage output level of the core
is adjustable at any speed setting, the input power required for a particular switching speed and the input power required
for a particular voltage output are effectively separated. If, for example, a
memory design requires a read switching
time of 0.1 J.lsec, and an output voltage
level of 15 mv (millivolts) is satisfactory,
then by choosing a proper current and
width relation, this may be obtained.
The total power required is less than
would be the case for obtaining this speed
by simple overdrive methods. In overdriving methods, an unnecessary output
voltage level of 500 mv would result indicating waste power.
The write interval switching time in
impulse switching is approximately equal
to the read switching time. The degree of
partial switching is controlled during the
write time and the function of the read
current is simply to read out completely.
The fast switching speed during the write
time represents an improvement in power
efficiency as well as speed. Previously,
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WRITE
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300
CURRENT
memory speeds were improved by overdriving during the read time while the
write operation being of a coincident nature, allowed no overdrive. The read
switching time could be an order of magnitude faster than the write time indicating the large power applied during the
read time is wasted if the complete memory cycle time is considered. The average memory power of impulse switching
is also low even at cycle times of 0.5 J.lsec
because partial switching results in lower
duty cycles. Calculations of peak and
average power indicates that impulse
switching compared with other elemental
or memory methods (at comparable signal
levels) requires much less power.
The switching times in the region of
2(}-50 m,usec, although almost unusable
with present memory circuitry, represents
possible memory cycle times of 0.1 to 0.2
usec. Switching times below these values
for ferrites represent the crossover point
between wall motion and rotation. a Nondestructive read out conditions exist in the
speed region below 20 m,usec and is worthy
of further considerations.
The previous discussion should also suggest added design flexibility of the memory circuitry-. Previously, driver limitations imposed design restrictions on the
memory size. Using impulse switching,
VALUES
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~ 200
{EXCITER CURRENT}
250 MA@.SILS
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150
{READ CURRENT}
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WRITE
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CURRENT
WIDTH
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Fig. 3 (left). Core read output voltage versus write width
the memory element operation is variable
and may be used to eliminate driver design problems. The variable output voltage level can also be adjusted to provide
sense amplifier design freedom or overcome system noise level difficulties.
Related Problems
A program has been initiated to provide
a better understanding of impulse switching and in particular, the mode of operation and the mechanism that are involved.
Recent experiments indicate that the
model of partial switching assumed is
valid. The impulse switching process has
been experimentally observed to initiate
at the core center and expand outward.
The physical amount of core material involved in the switching process is directly
controlled by the current amplitude and
width. Experimental observations indicate that irreversible domain wall motion
is the major contribution to this mode of
operation. The rate of wall motion and
consequently the distance moved is proportional to the applied field and the duration of the field. Calculations of the average distance moved by domain walls
agrees with experimental evidence of the
amount of material switched. s
Reversible wall motion occurs if either
the current amplitude or width is below a
critical value. The applied energy must
be sufficient to move the walls beyond certain potential levels or reversible motion
results. This accounts for the nonswitching conditions described earlier at current
amplitudes and widths below critical values. In addition at very small current
widths (below 20 m.usec), no switching
will occur until the current amplitude is
increased orders of magnitude above the
expected or calculated value. There is no
wall motion possible below a critical current WIdth. The mode of operation ob-
McMahon-Impulse Switching of Perrites
From the collection of the Computer History Museum (www.computerhistory.org)
tained for current widths below 20 m,usec
and very large current amplitude is one of
rotation. The switching control and
modes of operation that exists are providing an excellent study method for magnetic phenomenon.
The current width control and its effect on margins has so far not been a problem. There is considerable variation possible in the current width at a particular
speed setting, without a decrease in margins.
The heat problem presumed to exist at
these speeds has been found to be greatly
reduced in the impUlse mode of operation.
The power associated with the core may
be expressed as,
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80 CORES
400 rna
PNPN
TRIGGER
PULSE
PNPN
20V @ 20 p-a
Fig. 5.
P-n-p-n sequential driver
where
V = volume of material switched
j=frequen'2Y of operation
Vout = core output voltage
1m = applied current
ts = switching time
1 amp .2fLs
For impulse switching, the volume of
material and the switching time are very
small compared to their values for normal
high speed methods. For example, the
power for an 51 50-30 core at one megacycle using standard overdrive methods is
40 milliwatts (mw) , while at the same
speed, utilizing impulse switching, the
power is 0.3 mw even with an output voltage of 50 mv. This low power level results in very small temperature increases.
The memory circuitry required for the
impulse switching has presented some
problems. To obtain maximum operation, current rise times of 10-40 m.usec are
necessary at current levels of 0.5 to 1.0
ampere. At present the circuit of Fig. 5
using p-n-p-n elements is used to provide
this current. The circuit is restricted to
repetition rates of about 30 kc, but is in
use in a sequential I,OOO-word 80-bit 0.5
,usee memory under construction. The
circuit of Fig. 6 will operate above one
megacycle and will be used for random
access memory applications.
References
1. A LOAD SHARING MATRIX SWITCH, G. Constantine, Jr. I.B.M. Journal of Research and
Development, New York, N". Y., Jul. 1958, pp. 20411.
2. FERRITE APERTURED PLATE FOR RANDOM
ACCESS MEMORY,
A. R?jchman. Proceedings,
J.
Institute of Radio Engineers, New York, N. Y.,
vol. 45, no. 3, Mar. 1957.
3. THE TWISTOR, A. H. Bobeck. The Bell System
Technical Journal, New York, K. Y., Kov. 19.57.
lvlcA,fahon-Irnpulse Switt;hi:ng
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Fig. 6.
Random access driver
4. A HIGH-SPEED LOGIC SYSTEM USING MAGNETIC ·ELEMENTS AND CONNECTING WIRE ONLY,
H •. D, Cran~. Stanford Research Institute Report,
Stanford, Calif.
5. THE UTILIZATION OF DOMAIN WALL VISCOSITY
IN DATA-;HANDLING DEVICES, Vernon L. Newhouse.
1957 Western Computer Conference.
6.
NUCLEATION OF DOMAINS OF REVERSE MAGNETIZATION AND SWITCHING CHARACTERISTICS OF
MAGNETIC MATERIALS,
B. Goodenough, N.
J.
Menyuk. Engineering· Note E-532, Digital Computer Laboratory, Massachusetts Institute of Technology, Lexington, Mass.
Discussion
Lloyd Lambert (Aeronutronic Systems Inc.):
If you write continuously, do you tend to
walk up the loop?
Mr. McMahon: Continuous partial write
currents will fully switch the core; however
in a linear selection memory only one write
current is possible before the next read out,
so that this is not a problem. In addition
the improved signal-to-noise ratios indicate
that this one write current and any number
of successive exciter currents will not disturb
the core.
The use of impulse switching in coincident
current applications has not been attempted
although preliminary work indicates it
could be done. Core matrix selection
switches have .been designed using impulse
switching with excellent results.
. G. M. Hyde (Lincoln Laboratories): To
your knowledge, is anyone working on a
program for a computer to determine the
optimum value of switching time and
amplitUde?
Mr. McMahon: No, but we intuitively
know the values of currents and widths.
We hope to do some work along these lines
later.
W. Lawrence, Jr. (International Business
Machines Corporation): How critical are
pulse widths at O.I-microsecond switching
time? .
Mr. McMahon: The width variation is of .
course the control which allows us to obtain
this design flexibility. It can also contribute to a reduction of margins if it varies
considerably. We have found that all the
circuits so far designed to produce impulse
currents display very small variations in
current width and no unfaXQ1,<l.ble reduction.
in margins exist.
r! Ferrit£:$
From the collection of the Computer History Museum (www.computerhistory.org)
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