18
Network Theorems (ac)
18.1
INTRODUCTION
This chapter will parallel Chapter 9, which dealt with network theorems
as applied to dc networks. It would be time well spent to review each
theorem in Chapter 9 before beginning this chapter because many of the
comments offered there will not be repeated.
Due to the need for developing confidence in the application of the
various theorems to networks with controlled (dependent) sources,
some sections have been divided into two parts: independent sources
and dependent sources.
Theorems to be considered in detail include the superposition theorem, Thévenin’s and Norton’s theorems, and the maximum power theorem. The substitution and reciprocity theorems and Millman’s theorem
are not discussed in detail here because a review of Chapter 9 will
enable you to apply them to sinusoidal ac networks with little difficulty.
18.2
SUPERPOSITION THEOREM
You will recall from Chapter 9 that the superposition theorem eliminated the need for solving simultaneous linear equations by considering
the effects of each source independently. To consider the effects of each
source, we had to remove the remaining sources. This was accomplished by setting voltage sources to zero (short-circuit representation)
and current sources to zero (open-circuit representation). The current
through, or voltage across, a portion of the network produced by each
source was then added algebraically to find the total solution for the
current or voltage.
The only variation in applying this method to ac networks with independent sources is that we will now be working with impedances and
phasors instead of just resistors and real numbers.
The superposition theorem is not applicable to power effects in ac
networks since we are still dealing with a nonlinear relationship. It can
be applied to networks with sources of different frequencies only if
Th
792

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NETWORK THEOREMS (ac)
the total response for each frequency is found independently and the
results are expanded in a nonsinusoidal expression, as appearing in
Chapter 25.
One of the most frequent applications of the superposition theorem
is to electronic systems in which the dc and ac analyses are treated separately and the total solution is the sum of the two. It is an important
application of the theorem because the impact of the reactive elements
changes dramatically in response to the two types of independent
sources. In addition, the dc analysis of an electronic system can often
define important parameters for the ac analysis. Example 18.4 will
demonstrate the impact of the applied source on the general configuration of the network.
We will first consider networks with only independent sources to
provide a close association with the analysis of Chapter 9.
Independent Sources
EXAMPLE 18.1 Using the superposition theorem, find the current I
through the 4- reactance (XL2 ) of Fig. 18.1.
XL1
I
4
XL2
XC
4
+
E1 = 10 V ∠ 0°
3
–
E2 = 5 V ∠ 0°
+
–
FIG. 18.1
Example 18.1.
Solution:
For the redrawn circuit (Fig. 18.2),
I
Z1
Z1 j XL1 j 4 Z2 j XL2 j 4 Z3 j XC j 3 Z3
Z2
–
+
E1
E2
+
Considering the effects of the voltage source E1 (Fig. 18.3), we have
Z 2Z3
12 ( j 4 )(j 3 )
Z23 j 12 Z 2 Z3
j4 j3
j
–
FIG. 18.2
Assigning the subscripted impedances to the
network of Fig. 18.1.
12 90°
E1
10 V 0°
10 V 0°
Is1 Z23 Z1
j 12 j 4 8 90°
1.25 A 90°
and
Z3 Is1
I′ Z2 Z3
(current divider rule)
3.75 A
(j 3 )( j 1.25 A)
3.75 A 90°
j1
j4j3
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SUPERPOSITION THEOREM
Is1

793
Is1
I
Z1
Z3
Z1
Z2
Z23
+
+
E1
E1
–
–
FIG. 18.3
Determining the effect of the voltage source E1 on the current I of the network of Fig. 18.1.
Considering the effects of the voltage source E2 (Fig. 18.4), we have
Z1
Z3
Z2
Z3
Z12
–
I
E2
Is2
–
Is2
+
E2
+
FIG. 18.4
Determining the effect of the voltage source E 2 on the current I of the network
of Fig. 18.1.
Z
j4
Z12 1 j 2 N
2
E2
5 V 0°
5 V 0°
Is2 5 A 90°
Z12 Z3
j2j3
1 90°
Is
I″ 2 2.5 A 90°
2
and
XL2
The resultant current through the 4- reactance XL2 (Fig. 18.5) is
I I′ I″
3.75 A 90° 2.50 A 90° j 3.75 A j 2.50 A
j 6.25 A
I 6.25 A 90°
EXAMPLE 18.2 Using superposition, find the current I through the
6- resistor of Fig. 18.6.
I
+
E1 = 20 V ∠ 30°
XL = 6 R = 6
I1
–
FIG. 18.6
Example 18.2.
2 A ∠ 0°
I′
XC = 8 4
I
I′′
FIG. 18.5
Determining the resultant current for the
network of Fig. 18.1.
794

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NETWORK THEOREMS (ac)
Z1
Solution:
Z2
+
Z1 j 6 I
E1
For the redrawn circuit (Fig. 18.7),
Z2 6 j 8 Consider the effects of the current source (Fig. 18.8). Applying the current divider rule, we have
I1
–
Z1I1
j 12 A
( j 6 )(2 A)
I′ 6j2
Z1 Z 2
j66j8
12 A 90°
6.32 18.43°
FIG. 18.7
Assigning the subscripted impedances to the
network of Fig. 18.6.
Z1
Z2
I
I′ 1.9 A 108.43°
Consider the effects of the voltage source (Fig. 18.9). Applying Ohm’s
law gives us
E
E1
20 V 30°
I″ 1 ZT
Z1 Z 2
6.32 18.43°
3.16 A 48.43°
I1
The total current through the 6- resistor (Fig. 18.10) is
I I′ I″
1.9 A 108.43° 3.16 A 48.43°
(0.60 A j 1.80 A) (2.10 A j 2.36 A)
1.50 A j 4.16 A
I 4.42 A 70.2°
FIG. 18.8
Determining the effect of the current source I1
on the current I of the network of Fig. 18.6.
Z2
Z1
+
I
E1
EXAMPLE 18.3 Using superposition, find the voltage across the 6-
resistor in Fig. 18.6. Check the results against V6 I(6 ), where I
is the current found through the 6- resistor in Example 18.2.
Solution:
–
For the current source,
V′6 I′(6 ) (1.9 A 108.43°)(6 ) 11.4 V 108.43°
For the voltage source,
FIG. 18.9
Determining the effect of the voltage source
E1 on the current I of the network of
Fig. 18.6.
R
I′
6
I′′
I
FIG. 18.10
Determining the resultant current I for the
network of Fig. 18.6.
V″6 I″(6) (3.16 A 48.43°)(6 ) 18.96 V 48.43°
The total voltage across the 6- resistor (Fig. 18.11) is
V6 V′6 V″6
11.4 V 108.43° 18.96 V 48.43°
(3.60 V j 10.82 V) (12.58 V j 14.18 V)
8.98 V j 25.0 V
V6 26.5 V 70.2°
Checking the result, we have
V6 I(6 ) (4.42 A 70.2°)(6 )
26.5 V 70.2° (checks)
+
V′6Ω
–
+
V′′6Ω
–
R
6
+
V6Ω
–
FIG. 18.11
Determining the resultant voltage V6 for the network of Fig. 18.6.
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SUPERPOSITION THEOREM

795
EXAMPLE 18.4 For the network of Fig. 18.12, determine the sinusoidal expression for the voltage v3 using superposition.
E1 = 12 V
R2
+
E2 = 4 V ∠0°
1 k
R1
XL
0.5 k
2 k
+
XC
–
10 k
R3
3 k v3
–
FIG. 18.12
Example 18.4.
E1 = 12 V
Solution: For the dc source, recall that for dc analysis, in the steady
state the capacitor can be replaced by an open-circuit equivalent, and
the inductor by a short-circuit equivalent. The result is the network of
Fig. 18.13.
The resistors R1 and R3 are then in parallel, and the voltage V3 can
be determined using the voltage divider rule:
R2
1 k
R1
0.5 k
+
R′ R1 R3 0.5 k 3 k 0.429 k
R3
3 k V3
–
R′E1
V3 R′ R2
and
5.148 V
(0.429 k)(12 V)
1.429
0.429 k 1 k
V3 3.6 V
For ac analysis, the dc source is set to zero and the network is
redrawn, as shown in Fig. 18.14.
+
E2 = 4 V ∠0°
R1
XL
0.5 k
2 k
R2 = 1 k
XC = 10 k
FIG. 18.13
Determining the effect of the dc voltage source
E1 on the voltage v3 of the network of
Fig. 18.12.
+
R3 = 3 k V3
–
–
FIG. 18.14
Redrawing the network of Fig. 18.12 to determine the effect of the ac voltage
source E2.
+
The block impedances are then defined as in Fig. 18.15, and seriesparallel techniques are applied as follows:
Z1 0.5 k 0°
Z2 (R2 0° (XC 90°)
(1 k 0°)(10 k 90°)
10 k 90°
1 k j 10 k
10.05 84.29°
0.995 k 5.71°
I3
Z1
+
Is
Z2
E2
–
Z3
V3
–
ZT
FIG. 18.15
Assigning the subscripted impedances to the
network of Fig. 18.14.
796

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NETWORK THEOREMS (ac)
Z3 R3 j XL 3 k j 2 k 3.61 k 33.69°
and
ZT Z1 Z2 Z3
0.5 k (0.995 k 5.71°) (3.61 k 33.69°)
1.312 k 1.57°
Calculator Performing the above on the TI-86 calculator gives the
following result:
(0.5,0)((0.9955.71)*(3.6133.69))/((0.9955.71)(3.6133.69)) Enter
(1.311E0,35.373E3)
Ans Pol
(1.312E01.545E0)
CALC. 18.1
E
4 V 0°
Is 2 3.05 mA 1.57°
ZT
1.312 k 1.57°
Current divider rule:
Z2Is
(0.995 k 5.71°)(3.05 mA 1.57°)
I3 Z2 Z3
0.995 k 5.71° 3.61 k 33.69°
0.686 mA 32.74°
with
V3 (I3 v)(R3 0°)
(0.686 mA 32.74°)(3 k 0°)
2.06 V 32.74°
The total solution:
v3 v3 (dc) v3 (ac)
3.6 V 2.06 V 32.74°
v3 3.6 2.91 sin(qt 32.74°)
The result is a sinusoidal voltage having a peak value of 2.91 V riding on an average value of 3.6 V, as shown in Fig. 18.16.
v3
32.74°
6.51 V
3.6 V
0.69 V
0
qt
FIG. 18.16
The resultant voltage v3 for the network of Fig. 18.12.
Dependent Sources
For dependent sources in which the controlling variable is not determined by the network to which the superposition theorem is to be
applied, the application of the theorem is basically the same as for inde-
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SUPERPOSITION THEOREM

797
pendent sources. The solution obtained will simply be in terms of the
controlling variables.
EXAMPLE 18.5 Using the superposition theorem, determine the current I2 for the network of Fig. 18.17. The quantities m and h are constants.
+
V
–
R1
I2
4
I
+
V
R2
6
XL
8
hI
–
FIG. 18.17
Example 18.5.
Z1
I2
+
V
Solution:
With a portion of the system redrawn (Fig. 18.18),
Z1 R1 4 Z2
hI
–
Z2 R2 j XL 6 j 8 For the voltage source (Fig. 18.19),
mV
mV
mV
I′ Z1 Z 2
46j8
10 j 8 mV
0.078 mV/ 38.66°
12.8 38.66°
FIG. 18.18
Assigning the subscripted impedances to the
network of Fig. 18.17.
Z1
For the current source (Fig. 18.20),
Z1(hI)
(4 )(hI)
I″ 4(0.078)hI 38.66°
Z1 Z 2
12.8 38.66°
0.312hI 38.66°
+
I
V
Z2
–
The current I2 is
I2 I′ I″
0.078 mV/ 38.66° 0.312hI 38.66°
For V 10 V 0°, I 20 mA 0°, m 20, and h 100,
I2 0.078(20)(10 V 0°)/ 38.66°
0.312(100)(20 mA 0°)38.66°
15.60 A 38.66° 0.62 A 38.66°
I2 16.22 A 38.66°
For dependent sources in which the controlling variable is determined by the network to which the theorem is to be applied, the dependent source cannot be set to zero unless the controlling variable is also
zero. For networks containing dependent sources such as indicated in
Example 18.5 and dependent sources of the type just introduced above,
the superposition theorem is applied for each independent source and
each dependent source not having a controlling variable in the portions
of the network under investigation. It must be reemphasized that depen-
FIG. 18.19
Determining the effect of the
voltage-controlled voltage source on the
current I2 for the network of Fig. 18.17.
Z1
I
hI1
Z2
FIG. 18.20
Determining the effect of the
current-controlled current source on the
current I2 for the network of Fig. 18.17.
798

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NETWORK THEOREMS (ac)
dent sources are not sources of energy in the sense that, if all independent sources are removed from a system, all currents and voltages must
be zero.
EXAMPLE 18.6 Determine the current IL through the resistor RL of
Fig. 18.21.
– mV +
I1
IL
+
I
R1
RL
V
–
FIG. 18.21
Example 18.6.
Solution: Note that the controlling variable V is determined by the
network to be analyzed. From the above discussions, it is understood
that the dependent source cannot be set to zero unless V is zero. If we
set I to zero, the network lacks a source of voltage, and V 0 with
mV 0. The resulting IL under this condition is zero. Obviously, therefore, the network must be analyzed as it appears in Fig. 18.21, with the
result that neither source can be eliminated, as is normally done using
the superposition theorem.
Applying Kirchhoff’s voltage law, we have
VL V mV (1 m)V
(1 m)V
VL
IL RL
RL
and
The result, however, must be found in terms of I since V and mV are
only dependent variables.
Applying Kirchhoff’s current law gives us
(1 m)V
V
I I1 IL R1
RL
1m
1
IV R1
RL
and
I
V (1/R1) [(1 m)/RL ]
or
Substituting into the above yields
I
(1 m)
(1 m)V
IL (1/R1) [(1 m)/RL]
RL
RL
Therefore,
18.3
(1 m)R1I
IL RL (1 m)R1
THÉVENIN’S THEOREM
Thévenin’s theorem, as stated for sinusoidal ac circuits, is changed
only to include the term impedance instead of resistance; that is,
ZTh
+
ETh
–
FIG. 18.22
Thévenin equivalent circuit for ac networks.
any two-terminal linear ac network can be replaced with an
equivalent circuit consisting of a voltage source and an impedance in
series, as shown in Fig. 18.22.
Since the reactances of a circuit are frequency dependent, the Thévenin
circuit found for a particular network is applicable only at one frequency.
The steps required to apply this method to dc circuits are repeated
here with changes for sinusoidal ac circuits. As before, the only change
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THÉVENIN’S THEOREM

799
is the replacement of the term resistance with impedance. Again,
dependent and independent sources will be treated separately.
Example 18.9, the last example of the independent source section,
will include a network with dc and ac sources to establish the groundwork for possible use in the electronics area.
Independent Sources
1. Remove that portion of the network across which the Thévenin
equivalent circuit is to be found.
2. Mark (, ●, and so on) the terminals of the remaining two-terminal
network.
3. Calculate ZTh by first setting all voltage and current sources to
zero (short circuit and open circuit, respectively) and then finding
the resulting impedance between the two marked terminals.
4. Calculate ETh by first replacing the voltage and current sources
and then finding the open-circuit voltage between the marked
terminals.
5. Draw the Thévenin equivalent circuit with the portion of the
circuit previously removed replaced between the terminals of the
Thévenin equivalent circuit.
EXAMPLE 18.7 Find the Thévenin equivalent circuit for the network
external to resistor R in Fig. 18.23.
XL = 8 +
E = 10 V ∠ 0°
2
XC
R
–
Thévenin
FIG. 18.23
Example 18.7.
Solution:
Steps 1 and 2 (Fig. 18.24):
Z1
+
E = 10 V ∠ 0°
Z2
–
Z1
Thévenin
FIG. 18.24
Assigning the subscripted impedances to the network of Fig. 18.23.
Z1 j XL j 8 Step 3 (Fig. 18.25):
Z2 j XC j 2 Z2
ZTh
FIG. 18.25
Determining the Thévenin impedance for the
network of Fig. 18.23.
800

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NETWORK THEOREMS (ac)
Z1
Z1Z 2
( j 8 )(j 2 )
j 216 16 ZTh Z1 Z 2
j8j2
j6
6 90°
2.67 90°
+
+
Z2
E
ETh
–
Step 4 (Fig. 18.26):
–
Z2E
ETh Z1 Z2
FIG. 18.26
Determining the open-circuit Thévenin
voltage for the network of Fig. 18.23.
(voltage divider rule)
(j 2 )(10 V)
j 20 V
3.33 V 180°
j8j2
j6
Step 5: The Thévenin equivalent circuit is shown in Fig. 18.27.
ZTh = 2.67 ∠ –90°
ZTh
+
XC = 2.67 +
ETh = 3.33 V ∠ – 180°
ETh = 3.33 V ∠ – 180°
R
–
R
–
FIG. 18.27
The Thévenin equivalent circuit for the network of Fig. 18.23.
EXAMPLE 18.8 Find the Thévenin equivalent circuit for the network
external to branch a-a′ in Fig. 18.28.
+
R1
XL1
6
8
–
a
R3
7
R2
10 V ∠ 0°
E1
XL2 = 5 XC
3
+
30 V ∠ 15°
E2
–
4
a Thévenin
FIG. 18.28
Example 18.8.
Solution:
Steps 1 and 2 (Fig. 18.29): Note the reduced complexity with subscripted impedances:
Z3
Z1
a
+
10 V ∠ 0°
E1
Z2
–
a Thévenin
FIG. 18.29
Assigning the subscripted impedances to the network of Fig. 18.28.
Th
THÉVENIN’S THEOREM
Z1 R1 j XL1 6 j 8 Z2 R2 j XC 3 j 4 Z3 j XL2 j 5 Step 3 (Fig. 18.30):
Z1Z2
(10 53.13°)(5 53.13°)
ZTh Z3 j 5 Z1 Z2
(6 j 8 ) (3 j 4 )
50 0°
50 0°
j 5 j 5 9j4
9.85 23.96°
j 5 5.08 23.96° j 5 4.64 j 2.06
ZTh 4.64 j 2.94 5.49 32.36°
Z3
Z1
Z2
a
ZTh
a
FIG. 18.30
Determining the Thévenin impedance for the network of Fig. 18.28.
Step 4 (Fig. 18.31): Since a-a′ is an open circuit, IZ3 0. Then ETh is
the voltage drop across Z2:
Z 2E
ETh Z2 Z1
(voltage divider rule)
(5 53.13°)(10 V 0°)
9.85 23.96°
50 V 53.13°
ETh 5.08 V 77.09°
9.85 23.96°
Z3
Z1
+
Z2
E1
IZ3 = 0
a
+
ETh
–
–
a
FIG. 18.31
Determining the open-circuit Thévenin voltage for the network of Fig. 18.28.

801
802

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NETWORK THEOREMS (ac)
Step 5: The Thévenin equivalent circuit is shown in Fig. 18.32.
a
ZTh
+
R3
7
4.64 + j2.94 +
+
ETh
30 V ∠ 15°
E2
–
XL
4.64 2.94 a
R3
7
+
5.08 V ∠ –77.09°
ETh
30 V ∠ 15°
E2
–
–
5.08 V ∠ –77.09°
R
–
a′
a′
FIG. 18.32
The Thévenin equivalent circuit for the network of Fig. 18.28.
The next example demonstrates how superposition is applied to electronic circuits to permit a separation of the dc and ac analyses. The fact
that the controlling variable in this analysis is not in the portion of the network connected directly to the terminals of interest permits an analysis of
the network in the same manner as applied above for independent sources.
EXAMPLE 18.9 Determine the Thévenin equivalent circuit for the
transistor network external to the resistor RL in the network of Fig.
18.33. Then determine VL.
12 V
RC
RB
Rs
2 k
C2
1 M
C1
10 Transistor
+
0.5 k
Thévenin
10 +
RL = 1 k VL
Ei
–
–
FIG. 18.33
Example 18.9.
Solution:
Applying superposition.
dc Conditions Substituting the open-circuit equivalent for the coupling capacitor C2 will isolate the dc source and the resulting currents
from the load resistor. The result is that for dc conditions, VL 0 V.
Although the output dc voltage is zero, the application of the dc voltage
is important to the basic operation of the transistor in a number of
important ways, one of which is to determine the parameters of the
“equivalent circuit” to appear in the ac analysis to follow.
ac Conditions For the ac analysis, an equivalent circuit is substituted for the transistor, as established by the dc conditions above, that
Th
THÉVENIN’S THEOREM

803
will behave like the actual transistor. A great deal more will be said
about equivalent circuits and the operations performed to obtain the network of Fig. 18.34, but for now let us limit our attention to the manner
in which the Thévenin equivalent circuit is obtained. Note in Fig. 18.34
that the equivalent circuit includes a resistor of 2.3 k and a controlled
current source whose magnitude is determined by the product of a factor of 100 and the current I1 in another part of the network.
Rs
I1
0.5 k
+
Ei
+
RB
1 M
100I1
2.3 k
RC
2 k RL
1 k VL
–
–
Transistor equivalent
circuit
Thévenin
FIG. 18.34
The ac equivalent network for the transistor amplifier of Fig. 18.33.
Note in Fig. 18.34 the absence of the coupling capacitors for the ac
analysis. In general, coupling capacitors are designed to be open circuits for dc analysis and short circuits for ac analysis. The short-circuit
equivalent is valid because the other impedances in series with the coupling capacitors are so much larger in magnitude that the effect of the
coupling capacitors can be ignored. Both RB and RC are now tied to
ground because the dc source was set to zero volts (superposition) and
replaced by a short-circuit equivalent to ground.
For the analysis to follow, the effect of the resistor RB will be
ignored since it is so much larger than the parallel 2.3-k resistor.
2 k
RC
ZTh
FIG. 18.35
Determining the Thévenin impedance for the
network of Fig. 18.34.
ZTh When Ei is set to zero volts, the current I1 will be zero amperes,
and the controlled source 100I1 will be zero amperes also. The result is
an open-circuit equivalent for the source, as appearing in Fig. 18.35.
It is fairly obvious from Fig. 18.35 that
+
–
100I1
RC
2 k
ETh
–
+
ZTh 2 k
ETh For ETh, the current I1 of Fig. 18.34 will be
Ei
Ei
Ei
I1 Rs 2.3 k
0.5 k 2.3 k
2.8 k
RTh
Ei
100I1 (100) 35.71 103/ Ei
2.8 k
ETh (100I1)RC
(35.71 103/ Ei )(2 103 )
ETh 71.42Ei
The Thévenin equivalent circuit appears in Fig. 18.37 with the original load RL.
2 k
71.42Ei
ETh
+
Referring to Fig. 18.36, we find that
–
and
FIG. 18.36
Determining the Thévenin voltage for the network of Fig. 18.34.
+
RL
1 k VL
–
FIG. 18.37
The Thévenin equivalent circuit for the network of Fig. 18.34.
804

Th
NETWORK THEOREMS (ac)
Output Voltage VL
RLETh
(1 k)(71.42Ei)
VL RL ZTh
1 k 2 k
and
VL 23.81Ei
revealing that the output voltage is 23.81 times the applied voltage with
a phase shift of 180° due to the minus sign.
Dependent Sources
For dependent sources with a controlling variable not in the network
under investigation, the procedure indicated above can be applied. However, for dependent sources of the other type, where the controlling variable is part of the network to which the theorem is to be applied, another
approach must be employed. The necessity for a different approach will be
demonstrated in an example to follow. The method is not limited to dependent sources of the latter type. It can also be applied to any dc or sinusoidal
ac network. However, for networks of independent sources, the method of
application employed in Chapter 9 and presented in the first portion of this
section is generally more direct, with the usual savings in time and errors.
The new approach to Thévenin’s theorem can best be introduced at
this stage in the development by considering the Thévenin equivalent
circuit of Fig. 18.38(a). As indicated in Fig. 18.38(b), the open-circuit
terminal voltage (Eoc) of the Thévenin equivalent circuit is the Thévenin
equivalent voltage; that is,
ZTh
+
ETh
–
Eoc ETh
(18.1)
If the external terminals are short circuited as in Fig. 18.38(c), the
resulting short-circuit current is determined by
(a)
ZTh
+
E
Isc Th
ZTh
+
ETh
Eoc = ETh
(18.2)
–
–
or, rearranged,
ETh
ZTh Isc
(b)
ZTh
+
ETh
Isc
–
ETh
=
ZTh
(c)
FIG. 18.38
Defining an alternative approach for
determining the Thévenin impedance.
and
Eoc
ZTh Isc
(18.3)
Equations (18.1) and (18.3) indicate that for any linear bilateral dc or
ac network with or without dependent sources of any type, if the opencircuit terminal voltage of a portion of a network can be determined
along with the short-circuit current between the same two terminals, the
Thévenin equivalent circuit is effectively known. A few examples will
make the method quite clear. The advantage of the method, which was
stressed earlier in this section for independent sources, should now be
more obvious. The current Isc, which is necessary to find ZTh, is in general more difficult to obtain since all of the sources are present.
There is a third approach to the Thévenin equivalent circuit that is
also useful from a practical viewpoint. The Thévenin voltage is found
as in the two previous methods. However, the Thévenin impedance is
Th
THÉVENIN’S THEOREM
ZTh
805
Ig
obtained by applying a source of voltage to the terminals of interest and
determining the source current as indicated in Fig. 18.39. For this
method, the source voltage of the original network is set to zero. The
Thévenin impedance is then determined by the following equation:
+
Network
Eg
ZTh
Eg
Ig

–
(18.4)
FIG. 18.39
Determining ZTh using the approach
ZTh Eg / Ig.
Note that for each technique, ETh Eoc, but the Thévenin impedance is
found in different ways.
XC
R1
+
–
V
R2
+
EXAMPLE 18.10 Using each of the three techniques described in this
section, determine the Thévenin equivalent circuit for the network of
Fig. 18.40.
Solution: Since for each approach the Thévenin voltage is found in
exactly the same manner, it will be determined first. From Fig. 18.40,
where IXC 0,
–
Thévenin
FIG. 18.40
Example 18.10.
Due to the polarity for V and
defined terminal polarities
R2(mV)
mR2V
VR1 ETh Eoc R1 R2
R1 R2
XC
R1
The following three methods for determining the Thévenin impedance appear in the order in which they were introduced in this section.
ZTh
R2
Method 1: See Fig. 18.41.
ZTh R1 R2 j XC
Method 2: See Fig. 18.42. Converting the voltage source to a current
source (Fig. 18.43), we have (current divider rule)
mV
mV
R1R2
(R1 R2)
R1
R
R
R1
1
2
——
Isc (R1 R2) j XC ——
(R1 R2) j XC
mR2V
FIG. 18.41
Determining the Thévenin impedance for the
network of Fig. 18.40.
XC
R1
R1 R2
——
(R1 R2) j XC
V
+
XC
R1
R2
R2
Isc
FIG. 18.42
Determining the short-circuit current for the
network of Fig. 18.40.
Isc
V
R1
Isc
–
Isc
FIG. 18.43
Converting the voltage source of Fig. 18.42 to a current source.
806

Th
NETWORK THEOREMS (ac)
and
mR2V
ZTh
R1 R2
1
––––
Eoc
––––
mR2V
1
Isc
R1 R2
(R1 R2) j XC
(R1 R2) j XC
R1 R2 j XC
XC
R1
Ig
Method 3: See Fig. 18.44.
Eg
Ig (R1 R2) j XC
+
Eg
R2
–
Eg
ZTh R1 R2 j XC
Ig
and
ZTh
FIG. 18.44
Determining the Thévenin impedance for the
network of Fig. 18.40 using the approach
ZTh Eg / Ig.
In each case, the Thévenin impedance is the same. The resulting
Thévenin equivalent circuit is shown in Fig. 18.45.
ZTh = R1 R2 – jXC
+
ETh =
R2V
R1 + R2
–
Thévenin
+
–
FIG. 18.45
The Thévenin equivalent circuit for the network of Fig. 18.40.
XC
R1
hI
EXAMPLE 18.11 Repeat Example 18.10 for the network of Fig.
18.46.
R2
Thévenin
Solution:
From Fig. 18.46, ETh is
hR1R2I
ETh Eoc hI(R1 R2) R1 R2
FIG. 18.46
Example 18.11.
Method 1: See Fig. 18.47.
XC
ZTh R1 R2 j XC
Note the similarity between this solution and that obtained for the previous example.
R1
R2
ZTh = R1 R2 – jXC
Method 2: See Fig. 18.48.
(R1 R2)hI
Isc (R1 R2) j XC
FIG. 18.47
Determining the Thévenin impedance for the
network of Fig. 18.46.
and
hI(R1 R2)
Eoc
ZTh ——
(R1 R2)hI R1 R2 j XC
Isc
(R1 R2) j XC
Th

THÉVENIN’S THEOREM
Method 3: See Fig. 18.49.
XC
Eg
Ig (R1 R2) j XC
Isc
Eg
ZTh R1 R2 j XC
Ig
and
807
The following example has a dependent source that will not permit
the use of the method described at the beginning of this section for
independent sources. All three methods will be applied, however, so
that the results can be compared.
R1
hI
Isc
R2
FIG. 18.48
Determining the short-circuit current for the
network of Fig. 18.46.
EXAMPLE 18.12 For the network of Fig. 18.50 (introduced in Example 18.6), determine the Thévenin equivalent circuit between the indicated terminals using each method described in this section. Compare
your results.
XC
Ig
+
R1
R2
Eg
–
–
V
+
ZTh
+
I
R1
FIG. 18.49
Determining the Thévenin impedance using
the approach ZTh Eg / Ig.
V
–
Thévenin
FIG. 18.50
Example 18.12.
V = 0
–
Solution: First, using Kirchhoff’s voltage law, ETh (which is the
same for each method) is written
+
R1
ETh V mV (1 m)V
However,
so
+
V = 0
–
V IR1
ETh (1 m)IR1
ZTh
ZTh
FIG. 18.51
Determining ZTh incorrectly.
Method 1: See Fig. 18.51. Since I 0, V and mV 0, and
ZTh R1
(incorrect)
–
Method 2: See Fig. 18.52. Kirchhoff’s voltage law around the indicated
loop gives us
V mV 0
and
V(1 m) 0
Since m is a positive constant, the above equation can be satisfied
only when V 0. Substitution of this result into Fig. 18.52 will yield
the configuration of Fig. 18.53, and
Isc I
+
I
R1
V
–
V
+
Isc
Isc
FIG. 18.52
Determining Isc for the network of Fig. 18.50.
808

Th
NETWORK THEOREMS (ac)
I1 = 0
with
Isc
(1 m)IR1
Eoc
ZTh (1 m)R1
I
Isc
+
R1
I
Isc
V = 0
–
(correct)
Method 3: See Fig. 18.54.
Eg V mV (1 m)V
FIG. 18.53
Substituting V 0 into the network of Fig.
18.52.
Eg
V
1m
Eg
V
Ig R1
(1 m)R1
or
and
V
–
Ig
+
+
R1
Eg
ZTh (1 m)R1
Ig
and
V
The Thévenin equivalent circuit appears in Fig. 18.55, and
Eg
(1 m)R1I
IL RL (1 m)R1
–
ZTh
which compares with the result of Example 18.6.
FIG. 18.54
Determining ZTh using the approach ZTh Eg / Ig.
(1 + m)R1
+
ETh = (1 + m)IR1
(correct)
IL
The network of Fig. 18.56 is the basic configuration of the transistor
equivalent circuit applied most frequently today (although most texts in
electronics will use the circle rather than the diamond outline for the
source). Obviously, it is necessary to know its characteristics and to be
adept in its use. Note that there are both a controlled voltage and a controlled current source, each controlled by variables in the configuration.
RL
R1
–
+
+ I
+
Vi
k1V2
Thévenin
k2I
R2
V2
–
FIG. 18.55
The Thévenin equivalent circuit for the
network of Fig. 18.50.
–
–
FIG. 18.56
Example 18.13: Transistor equivalent network.
EXAMPLE 18.13 Determine the Thévenin equivalent circuit for the
indicated terminals of the network of Fig. 18.56.
Solution:
Apply the second method introduced in this section.
ETh
Eoc V2
Vi k1V2
Vi k1Eoc
I R1
R1
and
Vi k1Eoc
Eoc k2IR2 k2R2 R1
k1k2R2Eoc
k2R2Vi
R1
R1
Th
THÉVENIN’S THEOREM 809
k1k2R2
k2R2Vi
Eoc 1 R1
R1
or
and
k2R2Vi
R1 k1k2R2
Eoc R1
R1
so
k2R2Vi
Eoc ETh
R1 k1k2R2
Isc
(18.5)
For the network of Fig. 18.57, where
V2 0
and
so
ZTh
k1V2 0
Vi
I
R1
k2Vi
Isc k2I R
k2R2Vi 1
R1k1k2R2
–––
R1R2
Eoc
k2Vi ——
Isc
R1k1k2R2
R1
ZTh and
R2
k1k2R2
1 R1
(18.6)
R1
+ I
Isc
k2I
Vi
R2
Isc
–
FIG. 18.57
Determining Isc for the network of Fig. 18.56.
Frequently, the approximation k1 0 is applied. Then the Thévenin
voltage and impedance are
k R2Vi
ETh 2 R1
ZTh R2
k1 0
k1 0
Apply ZTh Eg/Ig to the network of Fig. 18.58, where
k1V2
I
R1
But
V2 Eg
so
k1Eg
I
R1
(18.7)
(18.8)
810

Th
NETWORK THEOREMS (ac)
R1
Ig
I
+
+
k1V2
k2I
ZTh
R2
Eg
–
–
FIG. 18.58
Determining ZTh using the procedure ZTh Eg / Ig.
Applying Kirchhoff’s current law, we have
Eg
k1Eg
Eg
Ig k2I k2 R2
R1
R2
1
k1k2
Eg R2
R1
Ig
R1 k1k2R2
R1R2
Eg
and
Eg
R1R2
ZTh R1 k1k2R2
Ig
or
as obtained above.
The last two methods presented in this section were applied only to
networks in which the magnitudes of the controlled sources were
dependent on a variable within the network for which the Thévenin
equivalent circuit was to be obtained. Understand that both of these
methods can also be applied to any dc or sinusoidal ac network containing only independent sources or dependent sources of the other
kind.
18.4
IN
ZN
FIG. 18.59
The Norton equivalent circuit for ac networks.
NORTON’S THEOREM
The three methods described for Thévenin’s theorem will each be
altered to permit their use with Norton’s theorem. Since the Thévenin
and Norton impedances are the same for a particular network, certain
portions of the discussion will be quite similar to those encountered in
the previous section. We will first consider independent sources and the
approach developed in Chapter 9, followed by dependent sources and
the new techniques developed for Thévenin’s theorem.
You will recall from Chapter 9 that Norton’s theorem allows us to
replace any two-terminal linear bilateral ac network with an equivalent circuit consisting of a current source and an impedance, as in
Fig. 18.59.
The Norton equivalent circuit, like the Thévenin equivalent circuit, is
applicable at only one frequency since the reactances are frequency
dependent.
Th
NORTON’S THEOREM
Independent Sources
The procedure outlined below to find the Norton equivalent of a sinusoidal ac network is changed (from that in Chapter 9) in only one
respect: the replacement of the term resistance with the term impedance.
1. Remove that portion of the network across which the Norton
equivalent circuit is to be found.
2. Mark (, ●, and so on) the terminals of the remaining two-terminal
network.
3. Calculate ZN by first setting all voltage and current sources to
zero (short circuit and open circuit, respectively) and then
finding the resulting impedance between the two marked
terminals.
4. Calculate IN by first replacing the voltage and current sources and
then finding the short-circuit current between the marked
terminals.
5. Draw the Norton equivalent circuit with the portion of the circuit
previously removed replaced between the terminals of the Norton
equivalent circuit.
The Norton and Thévenin equivalent circuits can be found from each
other by using the source transformation shown in Fig. 18.60. The
source transformation is applicable for any Thévenin or Norton equivalent circuit determined from a network with any combination of independent or dependent sources.
ZTh = ZN
ZTh
+
IN =
ETh
ZTh
ZN
ZN = ZTh
ETh = INZN
–
FIG. 18.60
Conversion between the Thévenin and Norton equivalent circuits.
EXAMPLE 18.14 Determine the Norton equivalent circuit for the network external to the 6- resistor of Fig. 18.61.
+
R1
XL
3
4
E = 20 V ∠ 0°
XC
5 RL
6
–
Norton
FIG. 18.61
Example 18.14.

811
812

Th
NETWORK THEOREMS (ac)
Solution:
Steps 1 and 2 (Fig. 18.62):
Z1
Z1 R1 j XL 3 j 4 5 53.13°
Z2 j XC j 5 +
Z2
E
Step 3 (Fig. 18.63):
–
Norton
FIG. 18.62
Assigning the subscripted impedances to the
network of Fig. 18.61.
Z1Z2
25 36.87°
(5 53.13°)(5 90°)
ZN Z1 Z2
3j4j5
3j1
25 36.87°
7.91 18.44° 7.50 j 2.50 3.16 18.43°
Step 4 (Fig. 18.64):
E
20 V 0°
IN I1 4 A 53.13°
Z1
5 53.13°
Z1
Z2
Z1
ZN
IN
I1
+
Z2
E
IN
–
FIG. 18.63
Determining the Norton impedance for the
network of Fig. 18.61.
FIG. 18.64
Determining IN for the network of Fig. 18.61.
Step 5: The Norton equivalent circuit is shown in Fig. 18.65.
7.50 – j2.50 R
IN = 4 A ∠ – 53.13°
ZN
R
6
7.50 IN = 4 A ∠ – 53.13°
RL
XC
6
2.50 FIG. 18.65
The Norton equivalent circuit for the network of Fig. 18.61.
EXAMPLE 18.15 Find the Norton equivalent circuit for the network
external to the 7- capacitive reactance in Fig. 18.66.
XL
R2
R1
2
1
I = 3 A ∠ 0°
XC1
5
4
FIG. 18.66
Example 18.15.
XC2 = 7 Th
NORTON’S THEOREM
Solution:
Steps 1 and 2 (Fig. 18.67):
Z1 R1 j XC1 2 j 4 Z2 R2 1 Z3 j XL j 5 Z3
Z2
Z1
I = 3 A ∠ 0°
FIG. 18.67
Assigning the subscripted impedances to the network of Fig. 18.66.
Step 3 (Fig. 18.68):
Z3(Z1 Z2)
ZN Z3 (Z1 Z2)
Z1 Z2 2 j 4 1 3 j 4 5 53.13°
(5 90°)(5 53.13°)
25 36.87°
ZN j53j4
3j1
25 36.87°
3.16 18.43°
ZN 7.91 18.44° 7.50 j 2.50 Z3
Z2
Z2
Z3
ZN
Z1
Z1
FIG. 18.68
Finding the Norton impedance for the network of Fig. 18.66.
Calculator Performing the above on the TI-86 calculator, we obtain
the following:
((0,5)*((2,4)(1,0)))/((0,5)((2,4)(1,0)))
(7.500E0,2.500E0)
Ans Pol
(7.906E018.435E0)
CALC. 18.2
ZN

813
814

Th
NETWORK THEOREMS (ac)
Step 4 (Fig. 18.69):
Z1I
IN I1 Z1 Z2
(current divider rule)
13.4 A 63.43°
(2 j 4 )(3 A)
6 A j 12 A
3j4
5 53.13°
5 53.13°
IN 2.68 A 10.3°
Z3
Z2
I1
I = 3 A ∠ 0°
IN
Z1
FIG. 18.69
Determining IN for the network of Fig. 18.66.
Step 5: The Norton equivalent circuit is shown in Fig. 18.70.
7.50 + j2.50 ZN
IN = 2.68 A ∠ – 10.3°
XC2
7
R
7.50 XL
2.50 IN = 2.68 A ∠ – 10.3°
XC2
7
FIG. 18.70
The Norton equivalent circuit for the network of Fig. 18.66.
ZTh
+
EXAMPLE 18.16 Find the Thévenin equivalent circuit for the network external to the 7- capacitive reactance in Fig. 18.66.
ZTh = ZN
ETh
INZN
Solution:
obtain
–
FIG. 18.71
Determining the Thévenin equivalent circuit
for the Norton equivalent of Fig. 18.70.
+
ETh
R
XL
7.50 2.50 21.2 V ∠ 8.14°
X C2
Using the conversion between sources (Fig. 18.71), we
ZTh ZN 7.50 j 2.50 ETh INZN (2.68 A 10.3°)(7.91 18.44°)
21.2 V 8.14°
The Thévenin equivalent circuit is shown in Fig. 18.72.
Dependent Sources
7
–
FIG. 18.72
The Thévenin equivalent circuit for the network of Fig. 18.66.
As stated for Thévenin’s theorem, dependent sources in which the controlling variable is not determined by the network for which the Norton
equivalent circuit is to be found do not alter the procedure outlined
above.
For dependent sources of the other kind, one of the following procedures must be applied. Both of these procedures can also be applied to
networks with any combination of independent sources and dependent
sources not controlled by the network under investigation.
Th
NORTON’S THEOREM

815
The Norton equivalent circuit appears in Fig. 18.73(a). In Fig.
18.73(b), we find that
+
I = 0
ZN
IN
ZN
IN
Isc
ZN
IN
Eoc = INZN
–
(a)
(b)
(c)
FIG. 18.73
Defining an alternative approach for determining ZN.
Isc IN
(18.9)
Ig
and in Fig. 18.73(c) that
+
Eoc INZN
ZN
Network
Eg
Or, rearranging, we have
–
Eoc
ZN IN
and
Eoc
ZN Isc
(18.10)
The Norton impedance can also be determined by applying a source
of voltage Eg to the terminals of interest and finding the resulting Ig, as
shown in Fig. 18.74. All independent sources and dependent sources not
controlled by a variable in the network of interest are set to zero, and
FIG. 18.74
Determining the Norton impedance using the
approach ZN Eg / Ig.
I
R1
R2
+
hI
E
–
Eg
ZN Ig
(18.11)
Norton
For this latter approach, the Norton current is still determined by the
short-circuit current.
FIG. 18.75
Example 18.17.
EXAMPLE 18.17 Using each method described for dependent sources,
find the Norton equivalent circuit for the network of Fig. 18.75.
Solution:
I
+ VR2 –
R1
R2
Isc
+
IN For each method, IN is determined in the same manner. From Fig.
18.76, using Kirchhoff’s current law, we have
E
hI
Isc
–
0 I hI Isc
or
Isc (1 h)I
Applying Kirchhoff’s voltage law gives us
FIG. 18.76
Determining Isc for the network of Fig. 18.75.
816

Th
NETWORK THEOREMS (ac)
E IR1 Isc R2 0
IR1 Isc R2 E
and
or
Isc R2 E
I R1
so
Isc R2 E
Isc (1 h)I (1 h) R1
or
R1Isc (1 h)Isc R2 (1 h)E
Isc[R1 (1 h)R2] (1 h)E
(1 h)E
Isc IN
R1 (1 h)R2
ZN
I
V = 0
+
–
+
R1
Method 1: Eoc is determined from the network of Fig. 18.77. By
Kirchhoff’s current law,
0 I hI or
+
E
–
hI
Eoc
For h, a positive constant I must equal zero to satisfy the above.
Therefore,
I0
–
with
and hI 0
Eoc E
and
FIG. 18.77
Determining Eoc for the network of Fig. 18.75.
I(h 1) 0
E
R1 (1 h)R2
Eoc
ZN –––– ––––
(1 h)E
(1 h)
Isc
R1 (1 h)R2
Method 2: Note Fig. 18.78. By Kirchhoff’s current law,
Ig I hI (1 h)I
– VR +
1
I
R1
– VR +
2
Ig
R2
+
hI
Eg
ZN
–
FIG. 18.78
Determining the Norton impedance using the approach ZN Eg / Eg.
By Kirchhoff’s voltage law,
Eg IgR2 IR1 0
Eg IgR2
I R1
or
Substituting, we have
Eg IgR2
Ig (1 h)I (1 h) R1
and
IgR1 (1 h)Eg (1 h)IgR2
Th
MAXIMUM POWER TRANSFER THEOREM
so
Eg(1 h) Ig[R1 (1 h)R2]
or
Eg
R1 (1 h)R2
ZN 1h
Ig
which agrees with the above.
EXAMPLE 18.18 Find the Norton equivalent circuit for the network
configuration of Fig. 18.56.
Solution:
By source conversion,
k2 R2Vi
——
R1 k1k2R 2
E Th
——
IN R1R2
Z Th
——
R1 k1k2 R2
k2Vi
IN R1
and
(18.12)
which is Isc as determined in Example 18.13, and
R2
ZN ZTh ——
k1k2R2
1
R1
(18.13)
For k1 0, we have
k2Vi
IN R1
ZN R2
18.5
k1 0
k1 0
(18.14)
(18.15)
MAXIMUM POWER TRANSFER THEOREM
When applied to ac circuits, the maximum power transfer theorem
states that
maximum power will be delivered to a load when the load impedance
is the conjugate of the Thévenin impedance across its terminals.
That is, for Fig. 18.79, for maximum power transfer to the load,
ZL ZTh
and
vL vThZ
(18.16)
or, in rectangular form,
RL RTh
and
j Xload j XTh
(18.17)
The conditions just mentioned will make the total impedance of the circuit appear purely resistive, as indicated in Fig. 18.80:

817

Th
NETWORK THEOREMS (ac)
ZTh
ZTh ∠ vThz
ETh = ETh ∠ vThs
ZL
= ZL ∠ vL
FIG. 18.79
Defining the conditions for maximum power transfer to a load.
ZTh = R ± jX
I
+
ETh = ETh ∠ vThs
ZL
–
= R
±
818
jX
ZT
FIG. 18.80
Conditions for maximum power transfer to ZL.
ZT (R j X) (R j X)
ZT 2R
and
(18.18)
Since the circuit is purely resistive, the power factor of the circuit
under maximum power conditions is 1; that is,
Fp 1
(maximum power transfer)
(18.19)
The magnitude of the current I of Fig. 18.80 is
ETh
ETh
I
ZT
2R
The maximum power to the load is
ETh 2
Pmax I2R R
2R
and
E 2Th
Pmax 4R
(18.20)
EXAMPLE 18.19 Find the load impedance in Fig. 18.81 for maximum power to the load, and find the maximum power.
Solution:
Determine ZTh [Fig. 18.82(a)]:
Z1 R j XC 6 j 8 10 53.13°
Z2 j XL j 8 Th
MAXIMUM POWER TRANSFER THEOREM
+
R
XC
6
8
E = 9 V ∠ 0°
XL
8

819
ZL
–
FIG. 18.81
Example 18.19.
Z1
Z1
+
Z2
ZTh
+
Z2
E
–
–
(a)
ETh
(b)
FIG. 18.82
Determining (a) ZTh and (b) ETh for the network external to the load in
Fig. 18.81.
Z1Z 2
80 36.87°
(10 53.13°)(8 90°)
ZTh Z1 Z 2
6j8j8
6 0°
13.33 36.87° 10.66 j 8 ZL 13.3 36.87° 10.66 j 8 and
To find the maximum power, we must first find ETh [Fig. 18.82(b)],
as follows:
Z 2E
ETh Z 2 Z1
(voltage divider rule)
(8 90°)(9 V 0°)
72 V 90°
12 V 90°
j86j8
6 0°
2
Then
E Th
144
(12 V)2
Pmax 3.38 W
42.64
4R
4(10.66 )
XL
EXAMPLE 18.20 Find the load impedance in Fig. 18.83 for
maximum power to the load, and find the maximum power.
Solution:
First we must find ZTh (Fig. 18.84).
Z1 j XL j 9 XL
9
+
E =
10 V ∠ 0°
XL
–
ZL
Z2 R 8 Converting from a D to a Y (Fig. 18.85), we have
Z1
Z′1 j 3 3
Z2 8 9
FIG. 18.83
Example 18.20.
9
R
8
820

Th
NETWORK THEOREMS (ac)
2
Z1
Z1
Z1
1
3
Z2
ZTh
FIG. 18.84
Defining the subscripted impedances for the network of Fig. 18.83.
2
Z1
Z1
1
Z1
Z1
ZTh
Z1
3
Z2
ZTh
Z1
Z2
FIG. 18.85
Substituting the Y equivalent for the upper D configuration of Fig. 18.84.
FIG. 18.86
Determining ZTh for the network of Fig. 18.83.
The redrawn circuit (Fig. 18.86) shows
Z′1(Z′1 Z 2 )
ZTh Z′1 Z′1 (Z′1 Z 2 )
3 90°( j 3 8 )
j 3 j68
(3 90°)(8.54 20.56°)
j 3 10 36.87°
25.62 110.56°
j 3 j 3 2.56 73.69°
10 36.87°
j 3 0.72 j 2.46
I1 = 0
+
and
Z1
ETh
Z1
+
Z2
–
ZTh 0.72 j 5.46 Z1
E
–
FIG. 18.87
Finding the Thévenin voltage for the network
of Fig. 18.83.
ZL 0.72 j 5.46 For ETh, use the modified circuit of Fig. 18.87 with the voltage
source replaced in its original position. Since I1 0, ETh is the voltage
across the series impedance of Z′1 and Z 2. Using the voltage divider
rule gives us
(Z′1 Z 2)E
( j 3 8 )(10 V 0°)
ETh 8j6
Z′1 Z2 Z′1
(8.54 20.56°)(10 V 0°)
10 36.87°
ETh 8.54 V 16.31°
Th
MAXIMUM POWER TRANSFER THEOREM
2
72.93
(8.54 V)2
ETh
Pmax W
2.88
4R
4(0.72 )
and
25.32 W
If the load resistance is adjustable but the magnitude of the load
reactance cannot be set equal to the magnitude of the Thévenin reactance, then the maximum power that can be delivered to the load
will occur when the load reactance is made as close to the Thévenin
reactance as possible and the load resistance is set to the following
value:
2
RL R
(X
Xlo
ad
)2
Th
Th
(18.21)
where each reactance carries a positive sign if inductive and a negative
sign if capacitive.
The power delivered will be determined by
where
P E 2Th /4Rav
(18.22)
RTh RL
Rav 2
(18.23)
The derivation of the above equations is given in Appendix G of the
text. The following example demonstrates the use of the above.
EXAMPLE 18.21 For the network of Fig. 18.88:
RTh
XTh
4
7
+
RL
–
XC = 4 ETh = 20 V ∠0°
FIG. 18.88
Example 18.21.
a. Determine the value of RL for maximum power to the load if the
load reactance is fixed at 4 .
b. Find the power delivered to the load under the conditions of part (a).
c. Find the maximum power to the load if the load reactance is made
adjustable to any value, and compare the result to part (b) above.
Solutions:
a. Eq. (18.21):
RL R
2
(X
X
)2
Th
Th
lo
ad (4
)2
(7
4
)2

821
822

Th
NETWORK THEOREMS (ac)
1
6
9 2
5
RL 5 RTh RL
45
b. Eq. (18.23): Rav 2
2
Eq. (18.22):
4.5 E 2Th
P
4Rav
400
(20 V)2
W
18
4(4.5 )
22.22 W
c. For ZL 4 j 7 ,
E 2Th
(20 V)2
Pmax 4RTh
4(4 )
25 W
exceeding the result of part (b) by 2.78 W.
18.6 SUBSTITUTION, RECIPROCITY,
AND MILLMAN’S THEOREMS
As indicated in the introduction to this chapter, the substitution and
reciprocity theorems and Millman’s theorem will not be considered
here in detail. A careful review of Chapter 9 will enable you to apply
these theorems to sinusoidal ac networks with little difficulty. A number
of problems in the use of these theorems appear in the problems section
at the end of the chapter.
18.7
APPLICATIONS
Soldering Gun
Soldering and welding are two operations that are best performed by
the application of heat that is unaffected by the thermal characteristics
of the materials involved. In other words, the heat applied should not be
sensitive to the changing parameters of the welding materials, the metals involved, or the welding conditions. The arc (a heavy current) established in the welding process should remain fixed in magnitude to
ensure an even weld. This is best accomplished by ensuring a fixed current through the system even though the load characteristics may
change—that is, by ensuring a constant current supply of sufficient
amperage to establish the required arc for the welding equipment or even
heating of the soldering iron tip. A further requirement for the soldering
process is that the heat developed be sufficient to raise the solder to its
melting point of about 800°F.
The soldering gun of Fig. 18.89(a) employs a unique approach to
establishing a fixed current through the soldering tip. The soldering tip
is actually part of a secondary winding of a transformer (Chapter 21)
having only one turn as its secondary as shown in Fig. 18.89(b).
Because of the heavy currents that will be established in this single-turn
secondary, it is quite large in size to ensure that it can handle the current and to minimize its resistance level. The primary of the transformer
Th
APPLICATIONS

823
=
Is
Secondary
140 W
Primary
100 W
OFF
Ip
120 V ac
FIG. 18.89
Soldering gun: (a) appearance; (b) internal construction;
(c) turns ratio control.
has many turns of thinner wire to establish the turns ratio necessary to
establish the required current in the secondary. The Universal® unit of
Fig. 18.89 is rated 140 W/100 W, indicating that it has two levels of
power controlled by the trigger. As you pull the trigger, the first setting
will be at 140 W, and a fully depressed trigger will provide 100 W of
power. The inductance of the primary is 285 mH at the 140-W setting
and 380 mH at the 100-W setting, indicating that the switch controls
how many windings of the primary will be part of the transformer
action for each wattage rating, as shown in Fig. 18.89(c). Since inductance is a direct function of the number of turns, the 140-W setting has
fewer turns than the 100-W setting. The dc resistance of the primary
was found to be about 11.2 for the 140-W setting and 12.8 for the
100-W setting, which makes sense also since more turns will require a
longer wire and the resistance should increase accordingly.
Under rated operating conditions, the primary current for each setting can be determined using Ohm’s law in the following manner:
(c)
824

Th
NETWORK THEOREMS (ac)
For 140 W,
140 W
P
Ip 1.17 A
120 V
Vp
For 100 W,
100 W
P
Ip 0.83 A
120 V
Vp
Ip
+
120 V
60 Hz
–
Rp
11.2 Lp
285 mH
As expected, the current demand is more for the 140-W setting than
for the 100-W setting. Using the measured values of input inductance
and resistance for the 140-W setting, the equivalent circuit of Fig.
18.90(a) will result. Using the applied 60 Hz to determine the reactance
of the coil and then determining the total impedance seen by the primary will result in the following for the source current:
XL 2pf L 2p(60 Hz)(285 mH) 107.44 and
140 W
(a)
ZT R j XL 11.2 j 107.44 108.02 84.05°
1.11 A
Ip Z 108.02 E
so that
120 V
T
Ip
+
120 V
60 Hz
–
Rp
12.8 Lp
380 mH
which is a close match with the rated level.
For the 100-W level of Fig. 18.90(b), the following analysis would
result:
XL 2pf L 2p(60 Hz)(380 mH) 143.26 and
100 W
(b)
ZT R j XL 12.8 j 143.26 143.83 84.89°
so that
0.83 A
Ip Z 143.83 E
120 V
T
FIG. 18.90
Equivalent circuits for the soldering iron of
Fig. 18.89(a): (a) at 140-W setting; (b) at
100-W setting.
which is a match to hundredths place with the value calculated from
rated conditions.
Removing the tip and measuring the primary and secondary voltages
resulted in 120 V/0.38 V for the 140-W setting and 120 V/0.31 V for the
100-W setting, respectively. Since the voltages of a transformer are
directly related to the turns ratio, the number of turns in the primary
(Np) to that of the secondary (Ns) can be estimated by the following for
each setting:
For 140 W,
Np
120 V
316
Ns
0.38 V
For 100 W,
Np
120 V
387
Ns
0.31 V
Looking at the photograph of Fig. 18.89(b), it would certainly appear
that there are 300 or more turns in the primary winding.
The currents of a transformer are related by the turns ratio in the following manner, permitting a calculation of the secondary currents for
each setting:
For 140 W,
Np
Is Ip 316(1.17 A) 370 A
Ns
Th
APPLICATIONS
For 100 W,
Np
Is Ip 387(0.83 A) 321 A
Ns
Quite clearly, the secondary current is much higher for the 140-W setting. The resulting current levels are probably higher than you might
have expected, but keep in mind that the above analysis does not
include the effect of the reflected impedance from the secondary to the
primary that will reduce the primary current level (to be discussed in
Chapter 21). In addition, as the soldering tip heats up, its resistance
increases, further reducing the resulting current levels. Using an
Amp-Clamp®, the current in the secondary was found to exceed 300 A
when the power was first applied and the soldering tip was cold. However, as the tip heated up because of the high current levels, the current
through the primary dropped to about 215 A for the 140-W setting and
to 180 A for the 100-W setting. These high currents are part of the reason that the lifetime of most soldering tips on soldering guns is about
20 hours. Eventually, the tip will simply begin to melt. Using these
levels of current and the given power rating, the resistance of the secondary can be approximated as follows:
For 140 W,
P
140 W
R 2 2 3 m
I
(215 A)
For 100 W,
P
100 W
R 2 2 3 m
I
(180 A)
which is as low as expected when you consider the cross-sectional
area of the secondary and the fact that the tip is a short section of
low-resistance, tin-plated copper.
One of the obvious advantages of the soldering gun versus the iron
is that the iron is off when you release the trigger, thus reducing energy
costs and extending the life of the tip. Applying dc current rather than
ac to develop a constant current would be impractical because the high
current demand would require a series of large batteries in parallel.
The above investigation was particularly interesting because of the
manner in which the constant current characteristic was established, the
levels of current established, and the excellent manner in which some of
the theory introduced in the text was verified.
Electronic Systems
One of the blessings in the analysis of electronic systems is that the
superposition theorem can be applied so that the dc analysis and ac
analysis can be performed separately. The analysis of the dc system will
affect the ac response, but the analysis of each is a distinct, separate
process. Even though electronic systems have not been investigated in
this text, a number of important points can be made in the description
to follow that support some of the theory presented in this and recent
chapters, so inclusion of this description is totally valid at this point.
Consider the network of Fig. 18.91 with a transistor power amplifier, an
8- speaker as the load, and a source with an internal resistance of 800 .
Note that each component of the design was isolated by a color box

825
826

Th
NETWORK THEOREMS (ac)
VCC = 22 V
RC
RB
Rs
+
Vs
100 CC
47 k
C
0.1 µF
CC
B
β = 200
0.1 µF
8
RL
1V(p-p)
E
–
Amplifier
Source
Load
FIG. 18.91
Transistor amplifier.
VCC
22 V
RB
47 k
22 V
VCC
100 RC
C
IC
+
B
VRB
VCC VBE
22 V 0.7 V
IB 453.2 mA
47 k
RB
RB
β = 200
VCE
+
IB V
BE
–
–
to emphasize the fact that each component must be carefully weighed
in any good design.
As mentioned above, the analysis can be separated into a dc and an
ac component. For the dc analysis the two capacitors can be replaced by
an open-circuit equivalent (Chapter 10), resulting in an isolation of the
amplifier network as shown in Fig. 18.92. Given the fact that VBE will
be about 0.7 V dc for any operating transistor, the base current IB can
be found as follows using Kirchhoff’s voltage law:
For transistors, the collector current IC is related to the base current
by IC bIB, and
E
IC bIB (200)(453.2 mA) 90.64 mA
FIG. 18.92
dc equivalent of the transistor network of
Fig. 18.91.
Finally, through Kirchhoff’s voltage law, the collector voltage (also
the collector-to-emitter voltage since the emitter is grounded) can be
determined as follows:
VC VCE VCC ICRC 22 V (90.64 mA)(100 ) 12.94 V
For the dc analysis, therefore,
IB 453.2 mA
RB
RC
47 k
100 C
β = 200
Rs
Vs
800 1V(p-p)
B
RL
8
E
FIG. 18.93
ac equivalent of the transistor network of
Fig. 18.91.
IC 90.64 mA
VCE 12.94 V
which will define a point of dc operation for the transistor. This is an
important aspect of electronic design since the dc operating point will
have an effect on the ac gain of the network.
Now, using superposition, we can analyze the network from an ac
viewpoint by setting all dc sources to zero (replaced by ground connections) and replacing both capacitors by short circuits as shown in Fig.
18.93. Substituting the short-circuit equivalent for the capacitors is
valid because at 10 kHz (the midrange for human hearing response), the
reactance of the capacitor is determined by XC 1/2pfC 15.92 which can be ignored when compared to the series resistors at the
source and load. In other words, the capacitor has played the important
role of isolating the amplifier for the dc response and completing the
network for the ac response.
Th
APPLICATIONS
Redrawing the network as shown in Fig. 18.94(a) will permit an ac
investigation of its reponse. The transistor has now been replaced by an
equivalent network that will represent the behavior of the device. This
process will be covered in detail in your basic electronics courses. This
transistor configuration has an input impedance of 200 and a current
source whose magnitude is sensitive to the base current in the input circuit and to the amplifying factor for this transistor of 200. The 47-k
resistor in parallel with the 200- input impedance of the transistor can
be ignored, so the input current Ii and base current Ib are determined by
Vs
1 V (p-p)
1 V ( p-p)
Ii Ib 1 mA (p-p)
800 200 1 k
Rs Ri
The collector current IC is then
IC bIb (200)(1 mA ( p-p)) 200 mA ( p-p)
and the current to the speaker is determined by the current divider rule
as follows:
100 (IC)
IL 0.926IC 0.926(200 mA (p-p))
100 8 185.2 mA (p-p)
with the voltage across the speaker being
VL ILRL (185.2 mA ( p-p))(8 ) 1.48 V
The power to the speaker is then determined as follows:
(1.48 V)(185.2 mA (p-p))
(VL( p-p))(IL( p-p))
Pspeaker VLrms ILrms 8
8
34.26 mW
which is relatively low. It would initially appear that the above was a
good design for distribution of power to the speaker because a majority
Ii
+
Vs
–
Rs
B
800 C
I≅0A
1V(p-p) RB
47 kΩ
Ri
Ib
200 βIb R
200Ib C
+
100 R
8
L
–
IC
E
VL
IL
Transistor equivalent circuit
(a)
100 mA
100 100 +
100 Impedance
matching
transformer
8 VL
–
100 mA
100 200 mA
(b)
FIG. 18.94
(a) Network of Fig. 18.93 following the substitution of the transistor equivalent
network; (b) effect of the matching transformer.

827

828
Th
NETWORK THEOREMS (ac)
of the collector current went to the speaker. However, one must always
keep in mind that power is the product of voltage and current. A high
current with a very low voltage will result in a lower power level. In this
case, the voltage level is too low. However, if we introduce a matching
transformer that makes the 8- resistive load “look like” 100 as
shown in Fig. 18.94(b), establishing maximum power conditions, the
current to the load will drop to half of the previous amount because current splits through equal resistors. But the voltage across the load will
increase to
VL ILRL (100 mA ( p-p))(100 ) 10 V ( p-p)
and the power level to
(VL( p-p))(IL( p-p))
(10 V)(100 mA)
Pspeaker 125 mW
8
8
which is 3.6 times the gain without the matching transformer.
For the 100- load, the dc conditions are unaffected due to the isolation of the capacitor CC, and the voltage at the collector is 12.94 V as
shown in Fig. 18.95(a). For the ac response with a 100- load, the output voltage as determined above will be 10 V peak-to-peak (5 V peak)
as shown in Fig. 18.95(b). Note the out-of-phase relationship with the
input due to the opposite polarity of VL. The full response at the collector terminal of the transistor can then be drawn by superimposing the ac
response on the dc response as shown in Fig. 18.95(c) (another application of the superposition theorem). In other words, the dc level simply shifts the ac waveform up or down and does not disturb its shape.
The peak-to-peak value remains the same, and the phase relationship is
unaltered. The total waveform at the load will include only the ac
response of Fig. 18.95(b) since the dc component has been blocked out
by the capacitor.
vc (volts) ac + dc
VC (volts) dc
17.94
vc (volts) ac
12.94
12.94
7.94
5
0
T
2T
t
0
T
2T
t
0
T
2T
t
–5
(a)
(b)
(c)
FIG. 18.95
Collector voltage for the network of Fig. 18.91: (a) dc; (b) ac; (c) dc and ac.
The voltage at the source will appear as shown in Fig. 18.96(a),
while the voltage at the base of the transistor will appear as shown in
Fig. 18.96(b) because of the presence of the dc component.
A number of important concepts were presented in the above example, with some probably leaving a question or two because of your lack
of experience with transistors. However, if nothing else is evident from
the above example, it should be the power of the superposition theorem
to permit an isolation of the dc and ac responses and the ability to combine both if the total response is desired.
Th
COMPUTER ANALYSIS
vb (volts)
1.2
vs (volts)
0.7
0.5
0.2
0
T2
/
T
–32 T
t
0
T2
/
T
–32 T
–0.5
(a)
(b)
FIG. 18.96
Applied signal: (a) at the source; (b) at the base of the transistor.
18.8 COMPUTER ANALYSIS
PSpice
Superposition The analysis will begin with the network of Fig.
18.12 from Example 18.4 because it has both an ac and a dc source. You
will find that it is not necessary to specify an analysis for each, even
though one is essentially an ac sweep and the other is a bias point calculation. When AC Sweep is selected, the program will automatically perform the bias calculations and display the results in the output file.
The resulting schematic appears in Fig. 18.97 with VSIN and VDC
as the SOURCE voltages. The placement of all the R-L-C elements and
FIG. 18.97
Using PSpice to apply superposition to the network of Fig. 18.12.
t

829
830

Th
NETWORK THEOREMS (ac)
the dc source should be quite straightforward at this point. For the ac
source, be sure to double-click on the source symbol to obtain the
Property Editor dialog box. Then set AC to 4 V, FREQ to 1 kHz,
PHASE to 0°, VAMPL to 4 V, and VOFF to 0 V. In each case choose
Name and Value under the Display heading so that we have a review
of the parameters on the screen. Also, be sure to Apply before exiting
the dialog box. Obtain the VPRINT1 option from the SPECIAL
library, place it as shown, and then double-click to obtain its Property
Editor. The parameters AC, MAG, and PHASE must then recieve the
OK listing, and Name and Value must be applied to each under
Display before you choose Apply and OK. The network is then ready
for simulation.
After you have selected the New Simulation Profile icon, the New
Simulation dialog box will appear in which SuperpositionAC is
entered as the Name. Following the selection of Create, the Simulation
Settings dialog box will appear in which AC Sweep/Noise is selected.
The Start and End Frequencies are both set at 1 kHz, and 1 is entered
for the Points/Decade request. Click OK, and then select the Run
PSpice key; the SCHEMATIC1 screen will result with an axis extending from 0.5 kHz to 1.5 kHz. Through the sequence Trace-Add TraceV(R3:1)-OK, the plot point appearing in the bottom of Fig. 18.98 will
result. Its value is slightly above the 2-V level and could be read as
2.05 V which compares very nicely with the hand-calculated solution of
2.06 V. The phase angle can be obtained from Plot-Add Plot to WindowTrace-Add Trace-P(V(R3:1)) to obtain a phase angle close to 33°.
Additional accuracy can be added to the phase plot through the sequence
Plot-Axis Settings-Y Axis-User Defined 40d to 30d-OK, resulting
in the 32.5° reading of Fig. 18.98— again, very close to the hand cal-
FIG. 18.98
The output results from the simulation of the network of Fig. 18.97.
Th
COMPUTER ANALYSIS
culation of 32.74° of Example 18.4. Now this solution is fine for the
ac signal, but it tells us nothing about the dc component.
By exiting the SCHEMATIC1 screen, we obtain the Orcad Capture window on which PSpice can be selected followed by View Output File. The result is the printout of Fig. 18.99 which has both the dc
and the ac solutions. The SMALL SIGNAL BIAS SOLUTION includes the nodes of the network and their dc levels. The node numbers
are defined under the netlist starting on line 30. In particular, note the
dc level of 3.6 V at node N00676 which is at the top of resistor R3 in
Fig. 18.97. Also note that the dc level of both ends of the inductor is the
same value because of the substitution of a short-circuit equivalent for
the inductor for dc analysis. The ac solution appears under the AC
ANALYSIS heading as 2.06 V at 32.66°, which again is a great verification of the results of Example 18.4.
FIG. 18.99
The output file for the dc (SMALL SIGNAL BIAS SOLUTION) and
AC ANALYSIS for the network of Fig. 18.97.

831
832

Th
NETWORK THEOREMS (ac)
Finally, if a plot of the voltage across resistor R3 is desired, we must
return to the New Simulation Profile and enter a new Name such as
SuperpositionAC1 followed by Create fill in the Simulation Profile
dialog box. This time, however, we will choose the Time
Domain(Transient) option so that we can obtain a plot against time.
The fact that the source has a defined frequency of 1 kHz will tell the
program which frequency to apply. The Run to time will be 5 ms,
resulting in a five-cycle display of the 1-kHz signal. The Start saving
data after will remain at 0 s, and the Maximum step size will be
5 ms/1000 5 ms. Click OK, and select the Run PSpice icon; the
SCHEMATIC1 screen will result again. This time Trace-Add TraceV(R3:1)-OK will result in the plot of Fig. 18.100 which clearly shows
a dc level of 3.6 V. Setting a cursor at t 0 s (A1) will result in 3.6 V
in the Probe Cursor display box. Placing the other cursor at the peak
value at 2.34 ms (A2) will result in a peak value of about 5.66 V. The
difference between the peak and the dc level provides the peak value of
the ac signal and is listed as 2.06 V in the same Probe Cursor display
box. A variety of options have now been introduced to find a particular
voltage or current in a network with both dc and ac sources. It is certainly satisfying that they all verify our theoretical solution.
Thévenin’s Theorem The next application will parallel the methods
employed to determine the Thévenin equivalent circuit for dc circuits.
The network of Fig. 18.28 will appear as shown in Fig. 18.101 when
the open-circuit Thévenin voltage is to be determined. The open circuit
is simulated by using a resistor of 1 T (1 million M). The resistor is
necessary to establish a connection between the right side of inductor
L2 and ground—nodes cannot be left floating for Orcad simulations.
FIG. 18.100
Using PSpice to display the voltage across R3 for the network of Fig. 18.97.
Th
COMPUTER ANALYSIS
FIG. 18.101
Using PSpice to determine the open-circuit Thévenin voltage.
Since the magnitude and the angle of the voltage are required,
VPRINT1 is introduced as shown in Fig 18.101. The simulation was an
AC Sweep simulation at 1 kHz, and when the Orcad Capture window
was obtained, the results appearing in Fig. 18.102 were taken from the
listing resulting from the PSpice-View Output File. The magnitude of
the Thévenin voltage is 5.187 V to compare with the 5.08 V of Example 18.8, while the phase angle is 77.13° to compare with the
77.09° of the same example—excellent results.
FIG. 18.102
The output file for the open-circuit Thévenin voltage for the network
of Fig. 18.101.

833
834

Th
NETWORK THEOREMS (ac)
Next, the short-circuit current will be determined using IPRINT as
shown in Fig. 18.103, to permit a determination of the Thévenin impedance. The resistance Rcoil of 1 m had to be introduced because inductors cannot be treated as ideal elements when using PSpice; they must
all show some series internal resistance. Note that the short-circuit
current will pass directly through the printer symbol for IPRINT. Incidentally, there is no need to exit the SCHEMATIC1 developed above
to determine the Thévenin voltage. Simply delete VPRINT and R3,
and insert IPRINT. Then run a new simulation to obtain the results of
Fig. 18.104. The magnitude of the short-circuit current is 0.936 A at an
angle of 108°. The Thévenin impedance is then defined by
E Th 5.187 V 77.13°
ZTh 5.54 30.87°
0.936 A 108.0°
Isc
which is an excellent match with 5.49 32.36° obtained in Example 18.8.
FIG. 18.103
Using PSpice to determine the short-circuit current.
VCVS The last application of this section will be to verify the results
of Example 18.12 and to gain some practice using controlled (dependent) sources. The network of Fig. 18.50, with its voltage-controlled
voltage source (VCVS), will have the schematic appearance of Fig.
18.105. The VCVS appears as E in the ANALOG library, with the voltage E1 as the controlling voltage and E as the controlled voltage. In the
Property Editor dialog box, the GAIN must be changed to 20 while
Th
COMPUTER ANALYSIS
FIG. 18.104
The output file for the short-circuit current for the network of Fig. 18.103.
the rest of the columns can be left as is. After Display-Name and
Value, Apply can be selected and the dialog box exited to result in
GAIN 20 near the controlled source. Take particular note of the second ground inserted near E to avoid a long wire to ground that might
overlap other elements. For this exercise the current source ISRC will
be used because it has an arrow in its symbol, and frequency is not
FIG. 18.105
Using PSpice to determine the open-circuit Thévenin voltage for the
network of Fig. 18.50.

835
836

Th
NETWORK THEOREMS (ac)
important for this analysis since there are only resistive elements present. In the Property Editor dialog box, the AC level is set to 5 mA,
and the DC level to 0 A; both were displayed using Display-Name and
value. VPRINT1 is set up as in past exercises. The resistor Roc (open
circuit) was given a very large value so that it would appear as an open
circuit to the rest of the network. VPRINT1 will provide the open circuit Thévenin voltage between the points of interest. Running the simulation in the AC Sweep mode at 1 kHz will result in the output file
appearing in Fig. 18.106, revealing that the Thévenin voltage is 210 V
0°. Substituting the numerical values of this example into the equation obtained in Example 18.12 confirms the result:
ETh (1 m)IR1 (1 20) (5 mA 0°)(2 k)
210 V0°
FIG. 18.106
The output file for the open-circuit Thévenin voltage for the network
of Fig. 18.105.
Next, the short-circuit current must be determined using the IPRINT
option. Note in Fig. 18.107 that the only difference between this network and that of Fig. 18.106 is the replacement of Roc with IPRINT
and the removal of VPRINT1. There is therefore no need to completely
“redraw” the network. Just make the changes and run a new simulation.
The result of the new simulation as shown in Fig. 18.108 is a current of
5 mA at an angle of 0°.
The ratio of the two measured quantities will result in the Thévenin
impedance:
E oc E Th 210 V 0°
ZTh 42 k
Isc
Isc
5 mA 0°
which also matches the longhand solution of Example 18.12:
ZTh (1 m)R1 (1 20)2 k (21)2 k 42 k
The analysis of the full transistor equivalent network of Fig. 18.56
with two controlled sources can be found in the PSpice section of
Chapter 26.
Th
COMPUTER ANALYSIS
FIG. 18.107
Using PSpice to determine the short-circuit current for the network
of Fig. 18.50.
FIG. 18.108
The output file for the short-circuit current for the network of Fig. 18.107.

837
838

Th
NETWORK THEOREMS (ac)
PROBLEMS
SECTION 18.2 Superposition Theorem
1. Using superposition, determine the current through the
inductance XL for each network of Fig. 18.109.
IL
3
R
+
I = 0.3 A ∠ 60°
+
8
XL
E1 = 30 V ∠ 30°
IL
6
XC
–
8
XL
E2 = 60 V ∠ 10°
XC
–
5
+
E = 10 V ∠ 0°
–
(a)
(b)
FIG. 18.109
Problem 1.
*2. Using superposition, determine the current IL for each
network of Fig. 18.110.
IL
R
4
XL
3
XL
+
+
E1 = 20 V ∠ 0°
E2 = 120 V ∠ 0°
–
XC1
1
R
I = 0.5 A ∠ 60° +
E = 10 V ∠ 90°
IL
3
–
–
6
(a)
I = 0.6 A ∠ 120°
7
XC2
(b)
FIG. 18.110
Problem 2.
*3. Using superposition, find the sinusoidal expression for
the current i for the network of Fig. 18.111.
XL
4
+
E1 = 10 V ∠0°
R1
–
+
E2 = 4 V
–
i
6
R2
XC
4. Using superposition, find the sinusoidal expression for
the voltage vC for the network of Fig. 18.112.
8
2
12 V
FIG. 18.111
Problems 3, 15, 30, and 42.
R1
R2
6
3
I
4 A ∠0° X
C
+
1 vC
–
FIG. 18.112
Problems 4, 16, 31, and 43.
Th
PROBLEMS

839
*5. Using superposition, find the current I for the network of
Fig. 18.113.
E = 20 V ∠ 0°
–
+
I
5 k
R2
I = 5 mA ∠ 0°
R1
10 k
XL
XC
5 k
5 k
FIG. 18.113
Problems 5, 17, 32, and 44.
E = 10 V ∠ 0°
6. Using superposition, determine the current IL (h 100)
for the network of Fig. 18.114.
–
+
IL
I = 2 mA ∠ 0°
R
hI
20 k
FIG. 18.114
Problems 6 and 20.
7. Using superposition, for the network of Fig. 18.115,
determine the voltage VL ( m 20).
+
V = 2 V ∠ 0°
–
mV
R1
XC
5 k
1 k
I = 2 mA ∠ 0°
+
+
R2
4 k VL
–
FIG. 18.115
Problems 7, 21, and 35.
XL
10 k
–
Th
NETWORK THEOREMS (ac)
*8. Using superposition, determine the current IL for the network of Fig. 18.116 ( m 20; h 100).
I = 1 mA ∠ 0°
R2
–
V = 10 V ∠ 0°
R1
hI
mV
+
20 k
IL
5 k
5 k
XL
–

+
840
FIG. 18.116
Problems 8, 22, and 36.
*9. Determine VL for the network of Fig. 18.117 (h 50).
I
R1 = 2 k
+
E = 20 V ∠ 53°
+
RL
hI
2 k VL
–
–
FIG. 18.117
Problems 9 and 23.
*10. Calculate the current I for the network of Fig. 18.118.
+
20V
–
I
I1 = 1 mA ∠ 0°
+
R1
2 k
V R2
5 k
–
FIG. 18.118
Problems 10, 24, and 38.
I2 = 2 mA ∠ 0°
Th
PROBLEMS
11. Find the voltage Vs for the network of Fig. 18.119.

–
Vx R1
10 R2
2
+
+
+
+
E1
10 V∠0°
5 A∠0° Vs
I
–
4Vx
–
–
FIG. 18.119
Problem 11.
SECTION 18.3 Thévenin’s Theorem
12. Find the Thévenin equivalent circuit for the portions of
the networks of Fig. 18.120 external to the elements
between points a and b.
R
R
XL
2 k
6 k
a
3
+
E = 100 V ∠ 0°
a
4
XL
+
E = 20 V ∠ 0°
2
XC
–
3 k
XC
RL
–
b
b
(a)
(b)
FIG. 18.120
Problems 12 and 26.
*13. Find the Thévenin equivalent circuit for the portions of
the networks of Fig. 18.121 external to the elements
between points a and b.
XC1
R1
2
+
R1
I = 0.1 A ∠ 0°
20 32 XC
XL
20 E = 50 V ∠ 0°
a
R2 = 68 –
XL
R2
8
10 X
C2
4
b
6
b
(b)
(a)
FIG. 18.121
Problems 13 and 27.
a
841
842

Th
NETWORK THEOREMS (ac)
*14. Find the Thévenin equivalent circuit for the portions of
the networks of Fig. 18.122 external to the elements
between points a and b.
+
R
XC
10 8
E1 = 120 V ∠ 0°
a
I=
0.5 A ∠ 60°
8
XL
ZL
–
b
(a)
a
I = 0.6 A ∠ 90°
R2
10 10 +
I2 =
0.8 ∠ 60°
9
R1
XC
E = 20 V ∠ 40°
–
b
(b)
FIG. 18.122
Problems 14 and 28.
*15. a. Find the Thévenin equivalent circuit for the network
external to the resistor R2 in Fig. 18.111.
b. Using the results of part (a), determine the current i of
the same figure.
XC
R1
1 k
10 k
Th
R2
–
10 k
XL
16. a. Find the Thévenin equivalent circuit for the network
external to the capacitor of Fig. 18.112.
b. Using the results of part (a), determine the voltage VC
for the same figure.
5 k
20V
+
*17. a. Find the Thévenin equivalent circuit for the network
external to the inductor of Fig. 18.113.
b. Using the results of part (a), determine the current I of
the same figure.
FIG. 18.123
Problems 18 and 33.
18. Determine the Thévenin equivalent circuit for the network external to the 5-k inductive reactance of Fig.
18.123 (in terms of V).
XC
19. Determine the Thévenin equivalent circuit for the network external to the 4-k inductive reactance of Fig.
18.124 (in terms of I).
0.2 k
Th
100I
R1
40 k
R2
FIG. 18.124
Problems 19 and 34.
5 k
XL
4 k
Th
PROBLEMS

843
20. Find the Thévenin equivalent circuit for the network
external to the 10-k inductive reactance of Fig. 18.114.
21. Determine the Thévenin equivalent circuit for the network external to the 4-k resistor of Fig. 18.115.
*22. Find the Thévenin equivalent circuit for the network
external to the 5-k inductive reactance of Fig. 18.116.
*23. Determine the Thévenin equivalent circuit for the network external to the 2-k resistor of Fig. 18.117.
R2
E
–
+
a
1 k
R1
5Ix
Ix
8 V∠0°
R3
2 k
Thévenin
3.3 k
a´
*24. Find the Thévenin equivalent circuit for the network
external to the resistor R1 of Fig. 18.118.
*25. Find the Thévenin equivalent circuit for the network to
the left of terminals a-a of Fig. 18.125.
FIG. 18.125
Problem 25.
SECTION 18.4 Norton’s Theorem
26. Find the Norton equivalent circuit for the network external to the elements between a and b for the networks of
Fig. 18.120.
27. Find the Norton equivalent circuit for the network external to the elements between a and b for the networks of
Fig. 18.121.
28. Find the Norton equivalent circuit for the network external to the elements between a and b for the networks of
Fig. 18.122.
*29. Find the Norton equivalent circuit for the portions of the
networks of Fig. 18.126 external to the elements between
points a and b.
R1
XL
6
8
XL
a
R2
+
20 V ∠ 0°
E
9
I2 = 0.4 A ∠ 20°
ZL
–
b
R1 = 3 XC
12 XC
4
8
R4
R3
+
E1 = 120 V ∠ 30°
a
R2
68 E2 = 108 V ∠ 0°
–
b
(b)
FIG. 18.126
Problem 29.
*30. a. Find the Norton equivalent circuit for the network
external to the resistor R2 in Fig. 18.111.
b. Using the results of part (a), determine the current I of
the same figure.
*31. a. Find the Norton equivalent circuit for the network
external to the capacitor of Fig. 18.112.
b. Using the results of part (a), determine the voltage VC
for the same figure.
*32. a. Find the Norton equivalent circuit for the network
external to the inductor of Fig. 18.113.
b. Using the results of part (a), determine the current I of
the same figure.
33. Determine the Norton equivalent circuit for the network
external to the 5-k inductive reactance of Fig. 18.123.
+
8
–
(a)
40 844

Th
NETWORK THEOREMS (ac)
34. Determine the Norton equivalent circuit for the network
external to the 4-k inductive reactance of Fig. 18.124.
35. Find the Norton equivalent circuit for the network external to the 4-k resistor of Fig. 18.115.
*36. Find the Norton equivalent circuit for the network external to the 5-k inductive reactance of Fig. 18.116.
*37. For the network of Fig. 18.127, find the Norton equivalent circuit for the network external to the 2-k resistor.
(µ = 20)
µV
–
R3
+
4 k
+
I = 2 mA ∠ 0°
1 k V
R1
–
R2
3 k
R4
2 k
FIG. 18.127
Problem 37.
*38. Find the Norton equivalent circuit for the network external to the I1 current source of Fig. 18.118.
SECTION 18.5 Maximum Power Transfer Theorem
39. Find the load impedance ZL for the networks of Fig.
18.128 for maximum power to the load, and find the
maximum power to the load.
+
E = 120 V ∠ 0°
R1
XL
XL
3
4
4
XC
6
ZL
R1
3
R2
I = 2 A ∠ 30°
–
(a)
(b)
FIG. 18.128
Problem 39.
2
ZL
Th
PROBLEMS

845
*40. Find the load impedance ZL for the networks of Fig.
18.129 for maximum power to the load, and find the
maximum power to the load.
XL
ZL
+
4
E = 60 V ∠ 60°
R1
5
XC1
XC2
–
XL1
XL
4
9
3
6
E1 = 100 V ∠ 0°
R
R2
ZL
+
12 +
E2 = 200 V ∠ 90°
8
XC
–
2
–
10 (b)
(a)
FIG. 18.129
Problem 40.
41. Find the load impedance RL for the network of Fig.
18.130 for maximum power to the load, and find the
maximum power to the load.
I
+
E = 1 V ∠ 0°
50I
R1
R2
1 k
40 k
RL
–
FIG. 18.130
Problem 41.
*42. a. Determine the load impedance to replace the resistor
R2 of Fig. 18.111 to ensure maximum power to the
load.
b. Using the results of part (a), determine the maximum
power to the load.
*43. a. Determine the load impedance to replace the capacitor XC of Fig. 18.112 to ensure maximum power to the
load.
b. Using the results of part (a), determine the maximum
power to the load.
*44. a. Determine the load impedance to replace the inductor
XL of Fig. 18.113 to ensure maximum power to the
load.
b. Using the results of part (a), determine the maximum
power to the load.
45. a. For the network of Fig. 18.131, determine the value of
RL that will result in maximum power to the load.
b. Using the results of part (a), determine the maximum
power delivered.
R
LOAD
2 k
XC
RL
+
E = 50 V ∠ 0°
2 k
–
XL
FIG. 18.131
Problem 45.
2 k
846

Th
NETWORK THEOREMS (ac)
*46. a. For the network of Fig. 18.132, determine the level of
capacitance that will ensure maximum power to the
load if the range of capacitance is limited to 1 nF to
5 nF.
b. Using the results of part (a), determine the value of RL
that will ensure maximum power to the load.
c. Using the results of parts (a) and (b), determine the
maximum power to the load.
LOAD
L
31.8 mH
+
E = 2 V ∠ 0°
1 k
R
RL
C
3.98 nF
C (1 – 5 nF)
–
f = 10 kHz
FIG. 18.132
Problem 46.
SECTION 18.6 Substitution, Reciprocity, and
Millman’s Theorems
47. For the network of Fig. 18.133, determine two equivalent
branches through the substitution theorem for the branch
a-b.
a
I = 4 mA ∠ 0°
R1
4 k
R2
8 k
b
FIG. 18.133
Problem 47.
48. a. For the network of Fig. 18.134(a), find the current I.
b. Repeat part (a) for the network of Fig. 18.134(b).
c. Do the results of parts (a) and (b) compare?
R1
+
E = 20 V ∠ 0°
R1
–
I
4 k
R3
1 k
–
R2
E = 20 V ∠ 0°
4 k
6 k
R5
R4
I
+
1 k
R3
R4
11 k
R2
8 k
8 k
(b)
(a)
FIG. 18.134
Problem 48.
11 k
R5 = 6 k
Th
49. Using Millman’s theorem, determine the current through
the 4-k capacitive reactance of Fig. 18.135.
GLOSSARY
2 k
R1
XL

847
IC
4 k
XC
+
–
4 k
E2 = 50 V ∠ 360°
E1 = 100 V ∠ 0°
–
+
FIG. 18.135
Problem 49.
SECTION 18.8 Computer Analysis
PSpice or Electronics Workbench
50. Apply superposition to the network of Fig. 18.6. That is,
determine the current I due to each source, and then find
the resultant current.
*51. Determine the current IL for the network of Fig. 18.21
using schematics.
*52. Using schematics, determine V2 for the network of Fig.
18.56 if Vi 1 V 0°, R1 0.5 k, k1 3 104,
k2 50, and R2 20 k.
*53. Find the Norton equivalent circuit for the network of Fig.
18.75 using schematics.
*54. Using schematics, plot the power to the R-C load of Fig.
18.88 for values of RL from 1 to 10 .
Programming Language (C, QBASIC, Pascal, etc.)
55. Given the network of Fig. 18.1, write a program to determine a general solution for the current I using superposition. That is, given the reactance of the same network elements, determine I for voltage sources of any magnitude
but the same angle.
56. Given the network of Fig. 18.23, write a program to
determine the Thévenin voltage and impedance for any
level of reactance for each element and any magnitude of
voltage for the voltage source. The angle of the voltage
source should remain at zero degrees.
57. Given the configuration of Fig. 18.136, demonstrate that
maximum power is delivered to the load when XC XL
by tabulating the power to the load for XC varying from
0.1 k to 2 k in increments of 0.1 k.
+
R1
XL
2 k
1 k
R2
E = 10 V ∠ 0°
2 k
ZL
XC
–
FIG. 18.136
Problem 57.
GLOSSARY
Maximum power transfer theorem A theorem used to
determine the load impedance necessary to ensure maximum power to the load.
Millman’s theorem A method employing voltage-to-current
source conversions that will permit the determination of
unknown variables in a multiloop network.
Norton’s theorem A theorem that permits the reduction of
any two-terminal linear ac network to one having a single
current source and parallel impedance. The resulting configuration can then be employed to determine a particular current or voltage in the original network or to examine the
effects of a specific portion of the network on a particular
variable.
Reciprocity theorem A theorem stating that for singlesource networks, the magnitude of the current in any branch
of a network, due to a single voltage source anywhere else
in the network, will equal the magnitude of the current
through the branch in which the source was originally
located if the source is placed in the branch in which the
current was originally measured.
Substitution theorem A theorem stating that if the voltage
across and current through any branch of an ac bilateral net-
848

NETWORK THEOREMS (ac)
work are known, the branch can be replaced by any combination of elements that will maintain the same voltage
across and current through the chosen branch.
Superposition theorem A method of network analysis that
permits considering the effects of each source independently. The resulting current and/or voltage is the phasor
sum of the currents and/or voltages developed by each
source independently.
Thévenin’s theorem A theorem that permits the reduction of
any two-terminal linear ac network to one having a single
Th
voltage source and series impedance. The resulting configuration can then be employed to determine a particular current
or voltage in the original network or to examine the effects of
a specific portion of the network on a particular variable.
Voltage-controlled voltage source (VCVS) A voltage
source whose parameters are controlled by a voltage elsewhere in the system.