Design and Implementation Of Single Phase Cascaded
Multilevel Inverter For Solar Energy Applications.
Jagtap Urmila1, Kalas Swapnil2, Dr. A.M.Mulla3, Gursale Prajkta4
1 Student, Electrical Engineering Department, ADCET, Ashta, Sangli (MH), India
2 Student, Electrical Engineering Department, ADCET, Ashta, Sangli (MH), India
3Principal,
Electrical Engineering Department, ADCET, Ashta, Sangli (MH), India
4Student,
Electrical Engineering Department, ADCET, Ashta, Sangli (MH), India
Abstract – This paper deals with design and simulation of solar powered cascaded H-Bridge
multilevel inverter. The main objective of this paper is to design a multilevel inverter for solar
energy applications so as to reduce the Total Harmonic Distortion (THD) and to improve
power quality. Multilevel inverter is energy conversion device that is generally used in
medium voltage and high power applications. In case of multilevel inverter as the no. of stages
of the converter is increased, the level of output voltage is also increased. In this case, the no.
of levels is one higher than the no. of stages. The sinusoidal pulse width modulation technique
(SPWM) of switching pattern is used to improve the power quality and to reduce total
harmonic distortion (THD). In SPWM technique sinusoidal wave is taken as reference signal
and triangular wave is taken as carrier signal. The H-bride inverter consists of four switches,
a dc source and a load (isolated or grid). The insulated gate bipolar transistor (IGBT) is used
as a switching device. The cascaded H- bridge inverter consists of a no. of H-bridge connected
in series with separate dc source for each unit. The detailed simulation has been carried out
for five level and seven level cascaded H- bridge inverter through MATLAB/SIMULINK
software. The performances of five level and seven level cascaded H- bridge inverter has been
compared.
Key Words: Cascaded Multilevel Inverter, PWM, Power Quality, Total Harmonic Distortion,
MATLAB
1.
INTRODUCTION
An inverter is a power semiconductor device which converts direct current into
alternating current. Harmonics are undesired oscillations in any system. The voltage and
current waveforms should be sinusoidal with constant amplitude and frequency. The
performance of the power electronics device depends on the harmonic content present in
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the system. Multilevel inverters emerged a solution to produce closer sinusoidal waveform.
The multilevel inverters perform power conversion in multilevel voltage steps to obtain
improved power quality, lower switching losses, better electromagnetic compatibility and
higher voltage capability. Considering these advantages, multilevel inverters have been
gaining considerable popularity in recent years.
Multilevel inverters are mainly utilized to synthesis a desired single or three-phase
voltage waveform. One important application of multilevel inverters is focused on medium
and high-power conversion. Nowadays, there exist three commercial topologies of
multilevel voltage-source inverters: neutral point clamped (NPC), cascaded H-bridge
(CHB), and flying capacitors (FCs). Among these inverter topologies, cascaded H-bridge
multilevel inverter is one of the important topologies in the family of multilevel inverter.
The cascaded topology allows the use of several levels of dc voltage to synthesize a desired
ac voltage. With increasing number of dc voltage sources in the input side, a sinusoidal
waveform can be generated at the output. As a result, the total harmonic distortion and the
output waveform quality increases, which is the main advantage of multilevel inverter.
Solar cells, fuel cells, batteries and ultra-capacitors are the most common independent
sources used.
In this paper Sinusoidal Pulse Width Modulation (SPWM) technique is used. In this
method sinusoidal signal is taken as reference signal and triangular wave is taken as carrier
signal. With this method lower order harmonics can be eliminated. Pulse width modulation
of signal or power source involves the modulation of its duty cycle, to control the amount of
power sent to load. Cascaded H-bridge five level inverter and seven level inverter is
modeled with the help of MATLAB/SIMULINK software and harmonic analysis is carried
out.
1.
PROPOSED WORK
The objective of this dissertation is to present “Reduction of Harmonics in Solar
Power Generation System by Using Multilevel Inverter” scheme for solar energy
application so as to reduce the total harmonic distortion and to improve power quality.
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Fig.1 Block Diagram of Proposed Work
Above figure shows the block diagram of single phase cascaded H-bridge inverter. It
consists of input DC voltage sources, cascaded H-bridge inverter and load which can be
isolated. The input DC sources can be designated as E1,E2,………En. The number of cascaded
H-bridges which are connected in series i.e.H-bridge1, H-bridge1,……. H-bridge n.
The internal structure of single stage H-bridge inverter is shown in figure 2. It
consists of input dc source, four power switches S1, S2, S3 and S4 and a load (isolated or
grid) across two arms of h-bridge. In this insulated gate bipolar transistor (IGBT) is used as
a switching device. Each switch conducts for a period of 180°.The gate pulses for diagonal
switches are identical.
Fig. 2. Internal structure of H-bridge
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2.1 SPWM Technique
The harmonic content in the output ac voltage of the inverter can be reduced by
pulse-width-modulation (PWM). In this modulation technique, the harmonic content is
reduced by using several pulses in each half-cycle of output voltage. The thyristors are
turned on and off many times in half cycle, to obtain several pulses in the half-cycle. The
gating signal for turning on thyristors are generated by comparing a sinusoidal reference
signal Vr of desired frequency with a triangular carrier signal Vc. The trigger pulse is
generated at the intersection point of Vc and Vr. The thyristor is maintained on during the
interval when Vr>Vc. When Vr becomes equal to Vc, the on thyristor is commutated by
forced commutation. The comparison of Vc and Vr is carried out in comparator or
relational operator parameter that you specify. The pulse width of pulses required
determines the value of constants. Pulse width is determined by the ‘on’ time of each
switch and these signals are used for switching the IGBTs. By controlling the modulation
index M=Vr/Vc, the harmonic content in the output voltage is controlled.
Fig.3. Representation of sinusoidal pulse width modulation
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MATLAB SIMULATION
3.1 MATLAB
.
Simulation model of 5 level cascaded H-bridge multilevel inverter
Fig.4 Simulink Model for 5 level cascaded H-bridge multilevel inverter
Fig.4. shows the simulation of 5 level cascaded H- bridge inverter. Simulation of
single phase 5 level cascaded H-bridge with resistive (R) load using MATLAB/Simulink tool
are discussed. This model is designed to reduce total harmonic distortion and to improve
power quality. This model consists of various tool blocks. It consists of four single phase H
bridge inverter connected in series. The cascaded topology allows the use of several levels
of dc voltages to synthesize a desired ac voltage. Single stage H –bridge inverter consists of
four switches ,a dc source and a load (isolated or grid) across two arms of bridge. The input
supply for each dc source is 100 V. The load used is resistive (R) load. Each switch conducts
for a period of 180°. The gate pulses for diagonal switches are identical. In this pulse width
modulation technique is used to produce the control signal.
For simulation of 5 level cascaded h bridge inverter, the four gate pulses for the four
H-bridge are generated by comparing the reference signal with the four carrier signals. The
reference signal is taken as sinusoidal and the carrier signal as triangular. The carrier
signals are compared with the reference signal using a comparator and four output signals
are produced. These signals are given as input to logic gate to produce output signals. The
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output signal produced is given to the switches of the four H-bridge inverter to produce a
five level output waveform
3.1.1SIMULATION OUTPUTS
a) Output voltage for five level:
Fig .5 Output Voltage Waveform Of Single Phase 5 Level Cascaded H-Bridge Inverter
b) Total harmonic distortion for five level:
Fig .6 THD value of five level H-bridge multilevel inverter.
Fig.5 shows the 5 level output voltage waveform which looks like a near sinusoidal
voltage and Fig 6 shows the THD value for five level cascaded H-bridge inverter. It is
observed that from fig.6 harmonics content in the proposed system is 17.36 %.
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3.2 MATLAB Simulation model of 7 level cascaded H-bridge multilevel
inverter .
Fig.7 Simulink Model for 7 level cascaded H-bridge multilevel inverter
Fig.7 shows the simulation of 7 level cascaded H- bridge inverter. Simulation of
single phase 7 level cascaded H-bridge with resistive (R) load using MATLAB/Simulink tool
are discussed. This model is designed to reduce total harmonic distortion and to improve
power quality. This model consists of various tool blocks. It consists of six single phase H
bridge inverter connected in series. The cascaded topology allows the use of several levels
of dc voltages to synthesize a desired ac voltage. Single stage H –bridge inverter consists of
four switches ,a dc source and a load (isolated or grid) across two arms of bridge. The input
supply for each dc source is 100 V. The load used is resistive (R) load. Each switch conducts
for a period of 180°. The gate pulses for diagonal switches are identical. In this pulse width
modulation technique is used to produce the control signal.
For simulation of 7 level cascaded H- bridge inverter, the six gate pulses for the four
H-bridge are generated by comparing the reference signal with the six carrier signals. The
reference signal is taken as sinusoidal and the carrier signal as triangular. The carrier
signals are compared with the reference signal using a comparator and six output signals
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are produced. These signals are given as input to logic gate to produce output signals. The
output signal produced is given to the switches of the six H-bridge inverter to produce a
seven level output waveform.
3.2.1SIMULATION OUTPUTS
a) Output voltage for seven level:
Fig .8 Output Voltage Waveform Of Single Phase 7 Level Cascaded H-Bridge Inverter
b) Total harmonic distortion for seven level:
Fig .9 THD value of seven level H-bridge multilevel inverter.
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Fig.8 shows the 7 level output voltage waveform which looks like a near sinusoidal
voltage and Fig 9 shows the THD value for seven level cascaded H-bridge inverter. It is
observed that from fig.9 harmonics content in the proposed system is 12.15 %.
IV. Comparison Of 5 Level and 7 Level Cascaded H- Bridge Inverter
Parameters
Sr.No.
1
H-Bridge Inverter
5-level cascaded H-
7- level cascaded H-
bridge inverter
bridge inverter
4H-bridge inverter
6 H-bridge inverter
2
Output levels
5
7
3
THD
17.36%
12.15%
V. CONCLUSION
The performance of proposed cascaded multilevel inverter is evaluated by using
MATLAB/SIMULINK software. In this paper five and seven levels of cascaded H-bridge
multilevel inverters are modeled and simulated and corresponding values of total
harmonic distortion (THD) were obtained. From the values of total harmonic distortion it is
to be concluded that as the number of levels of the output voltage increases the percentage
of the output THD values decreases. Thus the power quality gets increasingly better with
the no. of levels of the output wave.
VI. REFERENCES
[1] Mohammad Ahmad and B. H. Khan, “Ne w Approaches for Harmonics Reduction in
Solar Inverters” IEEE 2012.
[2] E.Beser, S.Camur, B.Arifoglu and E.Kandemir Beser, “Design and Application of a Novel
Structure and Topology for Mult ilevel Inverter”, IEEE 2008.
[3] J. Rodriguez. J.-S. La i, and F.Z. Peng, “Multilevel inverters: A survey of topologies,
controls and applications,” IEEE Trans. Ind. Electron ., vol. 49, No. 4,pp. 724-738, Aug.2002.
[4] Mariusz Malinowaski, Senior Member, IEEE, K.Gopakumar, Senior Member, IEEE, Jose
Rodriguez, Senior Member, IEEE, and Marcelo A.Perez, Member IEEE “A Survey on
Cascaded Multilevel Inverters”.
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[5] Ebrahim Babaei, Member, IEEE, Sara Laali, Student Member , IEEE, and Zahra Bayat
”A single phase cascaded multilevel inverter based on a new basic unit with reduced
number of power switches. ”
[6] Gobinath.K1, Mahendran.S2, Gnanambal.I3 “ New cascaded H-bridge multilevel
inverter with improved efficiency.” International journal of advanced research in
Electrical, Electronics and Instrumentation Engineering Vol.2, issue 4, April 2013.
[7] MithunKuriakose, Anooja V S “Comparison of Performances of Switched DC Sources
Inverter and Cascaded H-bridge Inverter”, International Journal of Science, Engineering
and Technology
Research, Volume 3, Issue 9, September2014.
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