LAB #7 – Op-Amps II
Physics 475 – Write-up Due: Thursday, Oct. 16, 2014
Explore further common Op-amp circuits and non-idealities of these devices. For Sections marked
with an asterix (*), see Appendix at back for a summary of Offsets and Biases.
1. Slew Rate
Consider the buffer amp topology of Figure 1:
(a) Make the circuit shown with a 411 Opamp.
(b) Drive it with a square wave; measure the
slope of V2 (t) in V/µs. Compare to specs.
(c) Replace the 411 with a 741 and repeat
part (b). (Note that the pinouts are the
same.)
(d) Use the 741 for Sections 2-4 below.
2. Input Offset Voltage *
Consider the circuit in Figure 2:
(a) Make this offset voltage test circuit
without the 10kΩ pot.
(b) Measure V2 and calculate the offset voltage VOS from
R2 + R1
V2 = VOS
(1)
R1
(c) Add the 10kΩ pot and trim the offset
voltage to zero as shown.
(d) Calculate what V2 would have been in
part (b) with a 411 Op-amp.
V1
10k
2
3
Input protection
for |V1| > 15V
compare to specs.
(c) Minimize the effects of bias current by replacing the 10kΩ resistor with a R2 ||R1 =
100Ω resistor.
(d) Calculate V2 in part (b) if a 411 used.
4. Input Offset Current *
Consider the resultant circuit shown in Fig. 4:
(a) Measure V2 on your balanced circuit. If
it is too small to measure, estimate an
upper limit for it.
(b) Calculate IOS from V2 = IOS R2 . Compare to specs.
(c) Calculate V2 if a 411 is used in part (b).
4
−15V
6
V2
741 or 411
FIG. 1: Slew rate LF411 or 741 circuit of Section 1.
R 2 100k
R1
100
2
3
−
741
+
1
6
V2
5
10k pot.
−15V
FIG. 2: Input offset voltage test circuit.
100k
3. Input Bias Current *
Add a resistor R3 to circuit as per in Fig. 3:
(a) That is, add R3 = 10kΩ to the circuit
built for Section 2. Leave the pot in the
circuit to keep VOS balanced.
(b) Measure V2 and calculate the input bias
current Ib from
R3 (R2 + R1 )
V2 = Ib
(2)
− R2
R1
−
+
+15V
7
100
2
3
−
741
+
1
R3
6
V2
5
10k pot.
−15V
FIG. 3: Input Bias Current circuit of Section 3.
100k
100
2
3
100
−
741
+
1
6
V2
5
10k pot.
−15V
FIG. 4: Input Offset Current circuit of Section 4.
2
.0033uF
5. High-Pass Filter (NOTE: Use a 411 from
now on.)
Consider the high-pass active filter of Figure 5:
15k
(a) Sketch the Bode plot (a log-log plot of
V2 /V1 vs. f ), with numbers.
(b) Make the circuit.
(c) Measure V1 , V2 , and f for 0.1, 0.3, 1, 3,
10, 30 and 100kHz. Make an experimental Bode plot and compare to part (a).
.1uF
V1
(d) Below 3 kHz the circuit behaves like a
differentiator. Look at the response to a
1 kHz square wave. Explain.
+ 411
V2
FIG. 5: High-pass active filter circuit.
(e) Repeat for a 1 kHz sine wave; for a triangle wave. Explain.
6. Low-Pass Filter
Consider the low-pass active filter of Figure 6:
(a) Sketch the Bode plot for this low-pass filter. What is the DC gain?
(b) Measure the circuit.
(c) Measure V1 , V2 for f = 3, 10, 30, 100,
300, and 1000 Hz. Make the Bode plot
and compare it to part (a)
(d) Above about 16Hz, the circuit behaves
like an integrator. Look at the response
to a 300 Hz square wave. Explain.
(e) Repeat for triangle and sine waves. Explain.
.01uF
470k
V1
15k
+ 411
FIG. 6: Low-pass active filter circuit.
V2
3
I.
I2
* OFFSETS AND BIASES
Consider the op-amp circuit and all of the voltages
and currents associated with it in Figure 7. The
output voltage V2 for an Op-amp with no input is
due to voltage offset VOS , current bias Ib = (I+ +
I− )/2, and offset current IOS = I+ − I− according
to the formula:
R 1 V− I −
V1
I1
V+
+
VOS
V2 = VOS
R1 + R2
R1
+ I− R2 − I+ R3
R1 + R2
R1
(3)
R2
−
+
I+
−
R3
Defining Equations:
(0 − V− )
(V− − V2 )
I1 = I− + I2 ⇒
= I− +
R1
R2
FIG. 7: Op-amp Offsets and Biases Circuit.
(4)
V+ = 0 − R3 I+ + VOS
(5)
V− = V+
(6)
Eliminate V− and V+ in these equations and obtain V2 above.
V2