th 5 International Advanced Technologies Symposium (IATS’09), May 13-15, 2009, Karabuk, Turkey THREE-DIMENSIONAL SPACE-VECTOR MODULATION ALGORITHM FOR ALL TYPES OF MULTILEVEL CONVERTERS USING ABC COORDINATE a, * a a N. GHIASNEZHAD , M. Tavakoli BINA , M. A. GOLKAR a K. N. Toosi University of Technology, Tehran, Iran E-mail: nima.ghiasnezhad@ee.kntu.ac.ir, tavakoli@kntu.ac.ir, golkar@kntu.ac.ir are performed using algebraic operations, while the user of the algorithms has no need to have an exact perspective Among different constant frequency modulation techniques, on geometric three-dimensional analysis. For a given time, space vector modulation, because of many advantages, is four normalized switching status are passed into a voltmore applicable for three phase converters, especially for- second equation in order to balance with that of the wire types. The most important part of SVM method is reference vector. Every instantaneous phase voltage is determination of proper switching states in each sampling located between two adjacent DC levels, providing eight period. This step should also be quick to avoid undesirable possible switching choices for the three-phase voltages. To delay. Conventional methods often use αβο transformation build the reference voltages, a comparative solution is in both two-dimension (for three- wire systems without suggested in order to choose four out of eight possible zero-sequence) and three-dimension (for four-wire switching statuses. Then the duty ratios are calculated for systems involve zero-sequence) which increases its the four chosen switching states [3]. To verify the complexity with increment of converter’s level. In this paper suggested selection of switching states, a three-arm fulla simple and quick technique which uses abc coordination, bridge inverter (including the neutral-wire) (Fig.1) is is applied. This method can be used for all converters with simulated with MATLAB. An unbalanced condition is every type (cascade, diode clamp,), and with every level, considered in which the neutral wire carries zero sequence current, and the three-dimensional SVM with the without any change in the center part of modulation. suggested switching selection is applied to the inverter Keywords: Three-dimensional SVM, switching states, switches. Simulations confirm that the inverter output vector track efficiently the reference voltage vector using multilevel converters, duty ratios. the suggested algorithm. Abstract 1. Introduction The space vector modulation (SVM) technique uses a fixed frequency in synthesizing the reference vector, enabling many power applications to lower their switching losses. This clearly improves the efficiency, which is vital for high power applications such as DC/AC converters that are interconnected to power systems through transformers. While the SVM can be practically considered as a voltagebased technique for the AC/DC converter output, one should obtain the reference voltage vector based on the required objectives of a certain application. Unlike the voltage-based SVM techniques, the current-based modulation techniques (e.g. hysteresis modulation) impose high losses despite their easy approach towards providing required reference current vector. Hence, the problem can be narrowed down to two problems for the SVM technique; first, provision of a three-phase reference voltage vector for the AC/DC converter output, and, second, making up the provided reference vector using the different switching status produced by a three-dimensional SVM technique. This latter can also be detailed in various sections. Conventionally, the instantaneous phase quantities abc are transferred to the so called αβο space to achieve a better distinction of zero sequence component for four-wire systems, in particular the active power filters. [1], [2] .Nevertheless, this increases the needed computations as well as the complexity of seeking the location of instantaneous reference vector. This paper introduces a complementary three dimensional SVM algorithm for an nlevel converter within the abc space to build up the available reference voltage vector using the neighboring switching status of the AC/DC converter. The propositions © IATS’09, Karabük University, Karabük, Turkey b a Sa1 Sb1 Sa2 Sb2 vd vd Sa3 Sa4 c Sc1 Sc 2 Sc3 Sc4 vd Sb3 Sb4 n Figure 1. Four-wire Three-level cascade voltage source inverter 2. The Proposed Method In brief, consider the instantaneous three-phase voltage quantities in the abc space in which the proposed method is described. Also, a three-dimensional SVM assumes that three instantaneous phase voltages are independent because zero sequence components could be generally available. Conventionally, the reference voltages are made up using the four closest neighboring switching states (V0, V1, V2, V3), followed by a set of voltsecond balance equations that eventually gives the Ghiasnezhad N., Bina M. T. and Golkar M. A. d0 d1 d2 Va (t) = U an (t) / Vdc d3 (2) Vb (t) = U bn (t) / Vdc Ts x2 Sx x1 y2 Sy y1 z2 Sz z1 V0 V1 V2 V3 Figure 2. Four-wire Three-level cascade voltage source inverter r ⋅T s = V 1 ⋅ t 1 + V 2 ⋅ t 2 + V 3 ⋅ t 3 + V T s = t 0 + t1 + t 2 + t 3 2) Consider each instantaneous normalized reference voltage separately; the closest switching states are related to the two DC levels right above and below the reference voltage. Thus, a vector is formed for magnitude of each phase using the upper (U) and lower (L) switching states of an n-level converter, totally three vectors as below: L L L a = a b= b c= c U a U b U c Where U a , La , U b , Lb , U c , Lc needed duty ratios for the switches as below: V Vc (t) = U cn (t) / Vdc 0 ⋅t0 (1) Where Ts is the switching period, Vr is the reference vector, and t0, t1, t2 and t3 are on-time durations related to the four switching states, respectively. The proposed method follows this conventional algorithm, but avoids seeking the exact location of the reference voltage vector within the three-dimensional space. This not only saves the modulating times of the switches, also lowers significantly the complexity of the conventional methods. The suggested algorithm can be applied without any changes to all voltage-sourced converter (VSC) topologies. Also, there is no need to look up tables, can be used practically on-line. The simplest way is chosen for the arrangement of switching pulses in order to reach a compromise between the switching losses and the harmonic performance of the VSC. This is done in a way that only one phase performs one switching changeover when transiting from one vector to another state. Lk < Vk < U k U k − Lk = 1 (3) ∈ Ζ , and k = a, b, c (4) 3) It is now possible to introduce eight different switching states for each sampling period based on the six switching states expressed by the three vectors in (3). These are [La, t t t t t Lb, Lc] , [Ua, Lb, Lc] , [La, Ub, Lc] , [La, Lb, Uc] , [Ua, Ub, Lc] , t t t [Ua, Lb, Uc] , [La, Ub, Uc] and [Ua, Ub, Uc] .These eight vectors introduce neighbors of the normalized reference vector. Two methods are presented to choose four out of eight possible vectors and their related duty ratios. Two vectors V0 = [La, Lb, Lc]t (the beginning of the switching t period) and V3 = [Ua, Ub, Uc] (end of the switching period) are similarly chosen for both methods. Note that one can change the order of switching vectors based on the need for optimization of number of switching or the symmetry of the waveforms. Selection of the two middle vectors V1 and V2 determines which phase should reach earlier from the bottom to the top. 4) First Method: The first method is based on measuring the distance of the each phase voltage from the lower-level state (∆a, ∆b and ∆c)as below: 2.1. Suggested Algorithm The following steps describe the whole algorithm in finding the four neighboring switching states around the reference vector as well as the related duty ratios for the four vectors: 1) Assume each capacitor has a DC voltage Vdc,, and then three reference voltages (Uan(t), Ubn(t) and Ucn(t)) are normalized by Vdc like (2), giving a new reference vector Vr = [Va(t), Vb (t), Vc (t)]t . It is usual to choose Vdc based on the maximum AC voltage needed at the n-level converter output. Theoretically, the converter output AC voltages vary within [-n Vdc, n Vdc], and the normalized reference within [-n, n]. Figure 3. The simulated circuit including a cascaded threelevel inverter that supplies a four-wire load. Ghiasnezhad N., Bina M. T. and Golkar M. A. Figure 4. The reference three-phase voltages that are to be generated by the cascaded converter. Figure 5. (a) the reference voltage of phase a at the converter output, and (b) the reference voltage on resistance of phase a. algorithms can be found in literatures. The four duty ratios d0, d 1, d2 and d 3 (see (1) by dividing both sides by Ts) can be calculated as follows (see Fig. 2): ∆ a = V a − La ∆b = V b − Lb (5) ∆c = V c − Lc The longest distance (let say ∆k) among the three distances shows that the kth phase moves faster towards the top level. Hence, V1 is obtained by changing Lk to Uk. Then, the second longest distance is recognized. The second selected phase is treated similarly by changing the related element to get V2. Further, duty ratios can be evaluated using (5). Three distances are sorted for three phases as ∆x, ∆y and ∆z like (x, y and z are the sorted phase indexes) ∆x > ∆ y > ∆z (6) Then, three switching states (Sx, Sy and Sz) and their related duty ratios (dx, dy and dz) are shown in Fig. 2 based on the sorted phase distances in (6). Note that Fig. 2 only demonstrates a typical switching status and their corresponding duty ratios. Different switching sequence d x = V x − x 1 , d y = V y − y 1 , d z = V z − z 1 d 0 = 1 − d x , d 1 = d x − d y , d 2 = d y − d z , d 3 = d z (7) 4) Second Method: The second method concentrates on the distance of the reference vector from the six states other than the switching states of (3) in order to choose the middle vectors. Thus, two groups of vectors VB and VS are defined as below: VS = {[ La ; Lb ;U c ] , [ La ;U b ; Lc ] , [U a ; Lb ; Lc ]} VB = {[ La ;U b ;U c ] , [U a ; Lb ;U c ] , [U a ;U b ; Lc ]} (8) The distances of the six vectors in (8) are calculated with respect to the normalized reference vector Vr. Then, the lowest distance in group Vs is regarded as V1, and the Ghiasnezhad N., Bina M. T. and Golkar M. A. Figure 6. Unbalanced reference voltages (different magnitudes) that are to be generated by the cascaded converter. lowest distance in group VB as V2. Finally, the obtained vectors can be put into (1) to calculate duty ratios. 3. Simulation Results To verify the suggested algorithms, a cascaded topology is simulated with MATLAB in which the neutral wire carries the zero sequence current. Figure 3 shows the simulated circuit in which the DC-link voltage of the inverter is 70V, and the load includes a 50Ω along with a 1mH smoothing inductor. Also, the topology of the cascaded inverter is shown by Fig. 1 that includes the fourth-wire as the neutral-point. Two cases are simulated in order to show the capability of the suggested simple methods. The first case concentrates on a low frequency distorted waveform, and the second one focuses on an unbalanced condition. These cases are studied by the following subsections. 3.1. Synthesizing Distorted Inverter Output Figure 4 introduces the three-phase reference voltages to be synthesized by the cascaded converter at the AC output using a fixed 5 kHz switching frequency. Three distorted waveforms include a 40V (50 Hz) together with 120% third harmonic (150 Hz). Figure 5(a) also depicts the reference voltage for phase-a. Applying the two suggested methods in modulating the reference voltages of Fig. 4 will result in similar outcomes. In other words, the same vectors will be chosen in the two suggested methods. Thus, here only one of the pictures is demonstrated in Fig. 5(b), which shows the modulated voltage seen on the 50Ω resistor of phase-a. Comparing the simulations of Fig. 5(b) with the reference of Fig. 5(a) clearly indicates that both waveforms are quite the same. In fact, both simple methods are following the reference voltage suitably. However, one can argue on some parts of Fig. 5(b), which somehow differs from those of Fig. 5(a). These parts are produced exactly when the third harmonic waveform reaches its maximum. The bigger the smoothing inductance, the lower would be the small difference in the compared pictures. These spike-like differences are also available in other literatures that proposing threedimensional SVM techniques (e.g. [4]) that implementing more sophisticated algorithms compared to the suggested simple proposals. 3.1. Synthesizing Unbalanced Inverter Output Different applications of cascaded multilevel converters can be considered for reactive power compensation, active filtering, and etc. All applications are potentially subjected to the three-phase unbalance operation of power systems. Thus, here a three-phase unbalance situation is generated for the inverter AC output to evaluate the performance of the two suggested methods. Assume the cascaded three-level inverter (Fig. 1) is used to develop the three-phase reference voltages of Fig. 6. These waveforms are unbalanced in terms of their magnitudes, providing three sinusoidal 50 Hz voltages with three peaks of 65 V, 50 V and 45 V respectively for phasea, phase-b and phase-c. Once again, the two methods are applied to the three-dimensional SVM in order to produce the waveforms of Fig. 6. Since both proposals give similar converter output, only one set of results are shown and described. Note that both resistor and inductor parameters remain the same as those of Fig. 3. Figure 7(a) shows the 65 V reference voltage and Fig. 7(b) illustrates the same waveform which is simulated based on the proposed methods(both in phase-a). It can be seen from Fig. 7(b) that it is significantly the same as the 65 V reference voltage. However, some sort of distortion is available on the modulated waveform in Fig, 7(b), especially when it passes through zero. This is also an expected concern because of unbalance conditions. In fact, a second harmonic can be modulated through the converter when the three-phase system is interacting with the unbalance-operating inverter. Moreover, Figs. 8(a) and 9(a) introduce the reference voltages related to the 50 V and 45 V references, respectively. Simulations corresponding to these references are shown by Figs. 8(b) and 9(b). Comparing Ghiasnezhad N., Bina M. T. and Golkar M. A. Figure 7. phase-a: The voltage drop on a 50 Ω resistor for the unbalance inverter output (reference: 65 V peak), (a) the reference voltage, and (b) the modulated voltage using the proposed method. Figure 9. phase-c: The voltage drop on a 50 Ω resistor for the unbalance inverter output (reference: 45 V peak), (a) the reference voltage, and (b) the modulated voltage using the proposed method. transformation is omitted, it is also expected to achieve faster modulating response in comparison with other methods. 4. Conclusion Figure 8. phase-b: The voltage drop on a 50 Ω resistor for the unbalance inverter output (reference: 50 V peak), (a) the reference voltage, and (b) the modulated voltage using the proposed method. the modulated outcomes with the related references illustrates that the suggested algorithms are wellperforming under unbalanced situation. Again, distortion of the modulated waveforms can be observed, which are bolder than the first waveform (65 V peak). Note that the level of distortion depends on the unbalance condition, including the available negative and zero sequence components. In brief, the suggested methods can simply achieve the results that other methods gain through more complicated algorithms. Further, the two proposals can be done in a simple algebraic environment away from three-dimensional mathematical analysis concerned with positive, negative and zero sequence components. Hence, because αβo- This paper presents two suggestions in choosing the required switching vectors as well as deriving the related duty ratios for a three-dimensional SVM. The methods are simple to understand in an uncomplicated algebraic formulation that avoids geometrical threedimensional complexity. The come up methods can be applied to all voltage source converters, including multilevel topologies, as a central control core of SVM under a fixed switching frequency modulation. All implementing steps are taken place on-line, where no look-up table is needed. The methods are operating straightforward on phase quantities, no transformation is needed either. Thus, unlike conventional methods require less implementing steps, resulting in faster modulating process. To confirm the raised algorithms, the methods are simulated and applied to a threephase cascaded inverter. Simulations are obtained under two different conditions, which confirm the capability of the suggested methods in comparison with conventional algorithms. References [1] R. Zhang, V. H. Prasad, D. Boroyevich, and F. C. Lee, “Three-dimensional space vector modulation for four-leg voltage-source converters,” IEEE Trans. Power Electron., Vol. 17, pp. 314–326, May 2002. [2] D. Shen and P.W. Lehn," Fixed-frequency spacevector-modulation control for three-phase four-leg active power filters"IEE Proc-Elec. Power Appl.Vol.149.No.4.July 2002 [3] Manuel A. Perales, M. M. Prats, Ramón Portillo, José L. Mora, José I. León, and Leopoldo G. Franquelo," Three-Dimensional Space Vector Ghiasnezhad N., Bina M. T. and Golkar M. A. Modulation in abc Coordinates for Four-Leg Voltage Source Converters" IEEE Power Electronics Letters,Vol.1,No.4, December 2003. [4] Leopoldo Garcia Franquelo, Ma. Ángeles Martín Prats, and others," Three-Dimensional SpaceVector Modulation Algorithm for Four-Leg Multilevel Converters Using abc Coordinates " IEEE Transactions on Industrial Electronics, Vol. 53, No. 2, April 2006.