AN955, VF Control of 3-Phase Induction Motor Using Space Vector

AN955
VF Control of 3-Phase Induction Motor
Using Space Vector Modulation
Author:
Rakesh Parekh
Microchip Technology Inc.
INTRODUCTION
VF control using the Sine PWM algorithm is a popular
algorithm for AC induction motor control; however, this
algorithm has certain drawbacks which affect the
overall system efficiency. A more advanced switching
algorithm, like Space Vector Modulation (SVM), overcomes the drawbacks of the Sine PWM algorithm and
increases the overall system efficiency.
This application note includes the description of the
SVM theory and its advantages over the Sine PWM. It
also discusses the SVM digital implementation for VF
control using Microchip’s PIC18FXX31 8-bit microcontrollers. See the “References” section for more
information on AC induction motors and their control.
SPACE VECTOR MODULATION (SVM)
The SVM is a sophisticated, averaging algorithm which
gives 15% more voltage output compared to the Sine
PWM algorithm, thereby increasing the VDC utilization.
It also minimizes the THD as well as switching loss.
Like Sine PWM, the SVM is also a scalar control. The
direct controlled variables are the motor voltage and
the motor frequency.
The 3-phase line-to-neutral sine waves required for
driving the 3-phase AC induction motor can be
represented as 120° phase-shifted vectors (VRN, VYN,
and VBN) in space, as shown in Figure 1.
FIGURE 1:
3-PHASE VOLTAGE
VECTORS AND THE
RESULTANT SPACE
REFERENCE VECTOR
VYN
SINE PWM
Traditionally, VF control using the Sine PWM algorithm
is implemented using a Voltage Source Inverter (VSI)
controlled by a programmable device (microcontroller
or DSP). Its popularity is mainly due to its easy
implementation and minimum online computational
requirement. However, this algorithm has the following
drawbacks:
• The Sine PWM algorithm is unable to fully utilize
the available DC bus supply voltage (VDC) to the
VSI. The generated line-to-line voltage is less
than 90% of VDC in the linear operating region.
See Appendix B: “Sine PWM” for more
information.
• This algorithm gives more Total Harmonic
Distortion (THD).
• Often, to reduce run-time processing load for slow
controllers, three 120° phase-shifted sine tables
are created in the controller memory. This is an
inefficient usage of the controller memory.
• There is no degree of freedom in implementation.
• This algorithm does not facilitate more advanced
vector control implementation.
© 2005 Microchip Technology Inc.
120°
VS
120°
VRN
120°
VBN
For a balanced 3-phase system, these vectors sum to
zero. Therefore, they can be expressed as a single
space reference vector (VS). By controlling the
amplitude and the frequency of VS, the motor voltage
and the motor frequency can be controlled. Hence, this
algorithm is known as the SVM.
DS00955A-page 1
AN955
A typical block diagram of a VSI controlled by the
PIC18FXX31, which implements SVM, is shown in
Figure 2. Point 0 is the midpoint of VDC (sometimes
called the Virtual Neutral Point). For safe operation of
the VSI, whenever one switch of a half bridge (Q1) is
on, the other switch of the same half bridge (Q0) should
be off and vice versa. This gives rise to eight distinct
switching states of the VSI. Table 1 lists all the possible
VSI switching states and respective line-to-neutral
voltages.
States 1 through 6 are called the active states, as the
energy is supplied from the supply to the motor during
these states. States 0 and 7 are called the inactive
states, as no energy is supplied from the supply to the
motor during these states. Each state can be
represented as a voltage vector in space. Figure 3
shows the space vector representation of all the
possible switching states.
BLOCK DIAGRAM OF PICmicro® MCU-CONTROLLED VSI
FIGURE 2:
Q1
Q3
Q5
3-Phase ACIM
PIC18FXX31
PWM0 (Q0)
VDC/2
PWM1 (Q1)
PWM2 (Q2)
VDC
O
B
Y
N
R
PWM3 (Q3)
PWM4 (Q4)
Rectifier
115/230 VAC
50/60 Hz
TABLE 1:
PWM5 (Q5)
VDC/2
Q0
Q2
Q4
VSI SWITCHING STATES AND RESPECTIVE LINE TO NEUTRAL VOLTAGES
Switching State
On Switches
VRN
VYN
VBN
Space Voltage Vector
0
Q0, Q2, Q4
0
0
0
V0
1
Q1, Q2, Q4
2/3 VDC
-1/3 VDC
-1/3 VDC
V1
2
Q1, Q3, Q4
1/3 VDC
1/3 VDC
-2/3 VDC
V2
3
Q0, Q3, Q4
-1/3 VDC
2/3 VDC
-1/3 VDC
V3
4
Q0, Q3, Q5
-2/3 VDC
1/3 VDC
1/3 VDC
V4
5
Q0, Q2, Q5
-1/3 VDC
-1/3 VDC
2/3 VDC
V5
6
Q1, Q2, Q5
1/3 VDC
-2/3 VDC
1/3 VDC
V6
7
Q1, Q3, Q5
0
0
0
V7
DS00955A-page 2
© 2005 Microchip Technology Inc.
AN955
As seen in Figure 3, the entire space is distinctively
divided into six equal sized sectors of 60°. Each sector
is bounded by two active vectors. V0 and V7 are the
voltage vectors with zero amplitude and are located at
the hexagon origin.
this algorithm generates maximum THD. Also, the lineto-line and the line-to-neutral waveforms are not sine
waves.
SVM Switching Rules
VS is the resultant output due to the switching states of
the VSI. For digital implementation of SVM, the VSI is
switched at a very high frequency (FPWM). This frequency is high enough (>20 kHz) so as not to generate
audible noise due to switching. FPWM decides the
sample time TS for VS, where TS = 1/FPWM. There are
various switching ways to generate VS from V0, V1...V7.
Mathematically, it can be represented as shown in
Equation 1. Variables T0, T1…T7 in Equation 1 are on
time for the corresponding VSI states and TS is the
sample time.
To implement the SVM algorithm, the following switching
rules are implemented:
•
•
•
•
These rules help in limiting the number of switching
actions and hence, there is a reduction in the switching
losses. Also, they maintain symmetry in switching
waveforms at the VSI output to achieve the lower THD.
The SVM algorithm implementation, using these
switching rules, is called Conventional SVM.
When the VSI follows the switching state pattern,
1-2-3-4-5-6-1-2..., it is called the Six-Step PWM algorithm. This algorithm is easier to implement compared
to all the other control algorithms. It can generate the
line-to-line fundamental voltage more than the VDC. But
FIGURE 3:
The trajectory of VS should be a circle.
Only one switching per state transition.
Not more than three switchings in one TS.
The final state of one sample must be the initial
state of the next sample.
SPACE VECTOR HEXAGON
Sector 2
(Q0, Q3, Q4) V3
V2 (Q1, Q3, Q4)
VS
Sector 3
Sector 1
TB
V7
0
(Q0, Q3, Q5) V4
Ψ
V1 (Q1, Q2, Q4)
TA
V0
Sector 6
Sector 4
(Q0, Q2, Q5) V5
Sector 5
V6 (Q1, Q2, Q5)
EQUATION 1:
⎛T0
⎞ ⎛T1
⎞ ⎛T2
⎞ ⎛T3
⎞ ⎛T4
⎞ ⎛T5
⎞ ⎛T6
⎞ ⎛T7
⎞
VS = ⎜ × V0⎟ + ⎜ × V1⎟ + ⎜ × V2⎟ + ⎜ × V3⎟ + ⎜ × V4⎟ + ⎜ × V5⎟ + ⎜ × V6⎟ + ⎜ × V7⎟
⎝TS
⎠ ⎝TS
⎠ ⎝TS
⎠ ⎝TS
⎠ ⎝TS
⎠ ⎝TS
⎠ ⎝TS
⎠ ⎝TS
⎠
TS = T0 + T1 + T2 + T3 + T4 + T5 + T6 + T7
© 2005 Microchip Technology Inc.
DS00955A-page 3
AN955
Different SVM Algorithms
There are various ways to implement the SVM, such as:
•
•
•
•
Conventional SVM
Basic Bus Clamping SVM
Boundary Sampling SVM
Asymmetric Zero-Changing SVM, etc.
EQUATION 3:
All SVM algorithms have the same on time for active as
well as inactive vectors. They differ mainly in the implementation of the inactive vectors, such as T0 and/or T7
distribution within TS. Discussion of the various other
SVM algorithms is beyond the scope of this application
note.
Time Calculation to Generate VS
Let us take an example where VS is in Sector 1 at a
vector angle (Ψ), as shown in Figure 4.
FIGURE 4:
VECTOR VS IN SECTOR 1
Y Axis
TS = TA + TB + T0/7
The time intervals, TA, TB and T0/7, have to be calculated such that the average volt seconds produced by
the vectors, V1, V2 and V0/7 along the X and Y axes, are
the same as those produced by the desired reference
space vector VS.
The modulation index or amplitude ratio is defined as:
m=
⎪VS⎪
VDC
where |VS| is the amplitude or the length of VS.
Resolving VS along the X and Y axes, we get:
EQUATION 4:
V2
(VDC × TA) + (VDC × cosπ/3 × TB) = ⎪VS⎪ × cosψ × TS
and
VDC × sinπ/3 × TB = ⎪VS⎪ × sinψ × TS
VS
V0/7
Equation 2 means that the VSI is in active state 1 for TA
time and it is in active state 2 for TB time. For the
remaining time of TS, no voltage is applied. This can be
achieved by applying inactive state 0 (or 7) for the
remaining time T0 (or T7).
ψ
TA
π/3
Solving for TA and TB, we get:
TB
V1
X Axis
VDC
It is assumed that during time TS, VS remains steady.
For implementing the conventional SVM using SVM
switching rules, VS is split as shown in Equation 2.
EQUATION 2:
⎛TA
⎞ ⎛TB
⎞ ⎛T0/7
⎞
VS = ⎜ × V1⎟ + ⎜ × V2⎟ + ⎜
× V0/7⎟
⎝TS
⎠ ⎝TS
⎠ ⎝ TS
⎠
DS00955A-page 4
EQUATION 5:
⎞
TA
2 × m × sin ⎛π
=
⎜3 – ψ⎟
TS
√3
⎝
⎠
TB
2 × m × sinψ
=
TS
√3
T0/7 can be found from Equation 3. For better THD, T0
(or T7) is split into two and then applied at the beginning
and at the end of the TS. The typical VSI switching
waveforms in Sector 1, as defined by Equation 2,
Equation 3 and the switching rules for the conventional
SVM using center aligned PWM, are as given in
Figure 5.
© 2005 Microchip Technology Inc.
AN955
FIGURE 5:
TYPICAL VSI SWITCHING WAVEFORMS IN SECTOR 1
TS
T0/2
TA
TS
TB
T7/2
T7/2
TB
TS
TA
T0/2
T0/2
TA
TS
TB
T7/2
T7/2
TB
TA
T0/2
Q1
Q0
Q3
Q2
Q5
Q4
Axes of Symmetry
We can observe the different axes of symmetry in all
the waveforms as shown in Figure 5. These symmetries are mainly responsible for having lower THD in
SVM compared to Sine PWM in the linear operating
region.
From Figure 3, it is clear that in the linear operating
region, the maximum line-to-line voltage amplitude can
be achieved when VS is rotated along the largest
inscribed circle in the space vector hexagon. In
mathematical terms, this is equivalent to:
EQUATION 6:
mmax =
Radius of Largest Inscribed Circle
VDC
From Figure 4 and Equation 6, it is also clear that:
By solving Equation 2, Equation 5 and Equation 7, we
get:
EQUATION 8:
Maximum Line-to-Line Voltage
=
2
× mmax × VDC
√3
=
√3
2
× VDC = VDC
×
2
√3
Equation 8 shows that it is possible to get line-to-line
voltage amplitude as high as VDC using the SVM algorithm in the linear operating range. This is the main
advantage of the SVM algorithm when compared to the
Sine PWM algorithm. Due to higher line-to-line voltage
amplitude, the torque generated by the motor is higher.
This results in better dynamic response of the motor.
EQUATION 7:
mmax =
VDC × cosπ/6
√3
= cosπ/6 =
2
VDC
© 2005 Microchip Technology Inc.
DS00955A-page 5
AN955
The reason for the higher line-to-line voltage in SVM
can be explained with the help of Figure 6. It shows the
phase voltage (line-to-virtual neutral point) generated
by Sine PWM and SVM. For clarity, only two phase
voltages (RO and YO) and their resultant line-to-line
voltage (RY) are shown in each figure.
The Sine PWM generated phase voltages are sine
waves. With 120° phase shift between them, the resultant line-to-line voltage is approximately 86.6% of VDC.
But, the SVM generated phase voltages have a third
FIGURE 6:
harmonic component superimposed on the fundamental component. The addition of this harmonic
component is due to the effective usage of inactive
states which is not possible in the Sine PWM. With
120° phase shift between them, the third harmonic
component is cancelled out in the resultant line-to-line
voltage in such a way that the resultant line-to-line
voltage is boosted to VDC (100%). Thus, SVM
generates line-to-line voltage with higher amplitude
(about 15% more) compared to Sine PWM.
GENERATED PHASE VOLTAGES AND CORRESPONDING LINE-TO-LINE
VOLTAGE IN (A) SINE PWM AND (B) SVM
A) Sine PWM Generated Waveforms
B) SVM Generated Waveforms
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© 2005 Microchip Technology Inc.
AN955
Advantages of SVM
The advantages of SVM vis-a-vis Sine PWM are as
follows:
• Line-to-line voltage amplitude can be as high as
VDC. Thus, 100% VDC utilization is possible in the
linear operating region.
• In the linear operating range, modulation index
range is 0.0 to 1.0 in the Sine PWM; whereas in
the SVM, it is 0 to 0.866. Line-to-line voltage
amplitude is 15% more in the SVM with the
modulation index = 0.866, compared to the Sine
PWM with the modulation index = 1. Hence, it has
the better usage of the modulation index depth.
• With the increased output voltage, the user can
design the motor control system with reduced
current rating, keeping the horsepower rating the
same. The reduced current helps to reduce
inherent conduction loss of the VSI.
• Only one reference space vector is controlled to
generate 3-phase sine waves.
• Implementation of the switching rules gives less
THD and less switching loss.
• Flexibility to select inactive states and their
distribution in switching time periods gives two
degrees of freedom.
• As the reference space vector is a
two-dimensional quantity, it is feasible to
implement more advanced vector control using
SVM.
HARDWARE USED FOR SVM
IMPLEMENTATION
A PICDEM™ MC Development Board is used to
develop and test the SVM control firmware. The
PICDEM MC has a single-phase diode bridge rectifier,
converting AC input to DC and a power capacitor bank
that keeps the DC bus stable. A 3-phase IGBT-based
inverter bridge is used to control the output voltage
from the DC bus. See Appendix A: “PICDEM™ MC
Board Technical Information” for schematics of the
PICDEM™ MC Development Board.
The control circuit and power circuits are optically
isolated with respect to each other. An on-board flyback
power supply generates +5 VD, with respect to the digital ground used for powering up the control circuit,
including the PICmicro® device. The +5 VA and +15 VA
are generated with respect to the power ground
(negative of DC bus). The feedback interface circuit is
powered by the +5 VA, while the +15 VA supplies
power to the IGBT drivers located inside the Integrated
Power Module (IPM).
With optical isolation between the power and the control
circuits, the programming and debugging tools can be
plugged into the development board when main power
is connected to the board. The board communicates
with a host PC over a serial port configured with an onchip Enhanced USART (EUSART). The on-board user
interface has two toggle switches, a potentiometer and
four LEDs for indication.
In this application note, switch SW1 is used to toggle
between the motor Run and Stop and SW2 is used to
toggle the motor rotation direction. A potentiometer is
used to set the speed reference as well as the modulation index. The LEDs are used for indication of different
states of control.
© 2005 Microchip Technology Inc.
DS00955A-page 7
AN955
DIGITAL IMPLEMENTATION
To implement the SVM in the digital domain, the power
control PWM module of the PIC18FXX31 is utilized.
The module provides up to 8 PWM output channels
with the dedicated PWM timer as its time base. The
module has the capability to generate center aligned
PWM with 14-bit resolution. This is the most important
feature required for the SVM implementation.
VS needs to be created and rotated in space for SVM
implementation. To approximate the position of VS,
Equation 3, Equation 5 and the previously mentioned
switching rules are utilized. Looking at Equation 5, one
will notice that in the same sector, TA and TB are
inverted with respect to each other. Hence, only one
look-up table with time entries is needed. A look-up
table with TB entries (TABLE_TB_COUNT<MSB:LSB>)
is created. The size of the look-up table is decided by
the angle resolution used. The total sector angle is 60°
(π/3 radians). To get a good resolution with an 8-bit
microcontroller like the PIC18FXX31, the entire sector
is divided into 256 points, giving an angle resolution of
0.234°. The center aligned PWM is used for better THD
(FPWM = 1/2 * TS).
The required motor speed in Hz is decided by the rate
at which the VS is rotated. For this purpose, it is
necessary to find both the vector angle and the vector
update step size. To speed up the online calculations,
the constant, DEGREE_CONSTANT, is defined; this is
then used to calculate the vector update step size and
the vector angle as shown in Equation 9.
Looking at the definition of DEGREE_CONSTANT, one will
notice that its value, without any multiplication factor, will
result in a fractional number less than unity for
FPWM > 1.536 kHz. Almost all motor control applications
have FPWM much higher than 1.536 kHz. Handling a
fractional number with any 8-bit microcontroller will
require more CPU processing time. This requirement is
difficult to meet in the SVM implementation, where VS is
updated at every TPWM (= 1/FPWM) time interval. At the
same time, the multiplication factor value needs to be
such that its post-calculation adjustment requires the
least possible microcontroller processing time.
It is proposed that the multiplication factor be 256. This
will result in a 16-bit value for the vector update step
size and hence, 16-bit vector angle pointer
(VECTOR_ANGLE<MSB:LSB>). As an adjustment for
the multiplication factor, VECTOR_ANGLE_LSB is
discarded. VECTOR_ANGLE_MSB is used as the table
pointer for reading the value of TA and TB from the lookup table. Whenever a carry is generated due to the
Equation 9 addition, it physically means that the VS has
advanced to the next sector and hence, the sector
count (SECTOR_NO) is incremented by one. The motor
voltage is decided by the amplitude of VS (modulation
index m). To implement the same digitally, values of TA
and TB are multiplied by m. Based on TS, TA and TB, the
duty cycle values for all 3 phases (R, Y and B) are
calculated as shown in Table 2.
Equations shown in Table 2 for Sector 1 are evident in
Figure 5. Similarly, equations for other sectors are
derived with the switching rule constraints.
EQUATION 9:
DEGREE_CONSTANT =
360 × 256 × Multiplication Factor
60 × FPWM
Vector Update Step Size = DEGREE_CONSTANT × Required Motor Speed (Hz)
Vector Angle = Vector Angle + Vector Update Step Size
DUTY CYCLE VALUES FOR THE THREE MOTOR PHASES BASED ON VS LOCATION
TABLE 2:
Sector No.
Phase R Duty Cycle
Phase Y Duty Cycle
Phase B Duty Cycle
1
T0/2
T0/2 + TA
TS – T0/2
2
T0/2 + TB
T0/2
TS – T0/2
3
TS – T0/2
T0/2
T0/2 + TA
4
TS – T0/2
T0/2 + TB
T0/2
5
T0/2 + TA
TS – T0/2
T0/2
6
T0/2
TS – T0/2
T0/2 + TB
DS00955A-page 8
© 2005 Microchip Technology Inc.
AN955
SVM CONTROL FIRMWARE
The firmware is developed using PIC18F4431 and it
implements the VF control using the SVM algorithm.
Apart from the basic SVM control, the firmware incorporates various control and protection routines, such
as overcurrent protection, overvoltage protection, overtemperature protection, acceleration and deceleration
routine and rotation direction reversal.
To implement the VF control, an analog potentiometer
(R44) connected to RA1/AN1 is read. Using the
CONVERT_MANUAL_COUNT_TO_HZ routine, the potentiometer setting is converted to the required motor speed
in Hz. The potentiometer setting is also interpreted as
the modulation index, m. To get the required motor
speed, the vector update step size is calculated by
calling the CALCULATE_UPDATE_STEP_SIZE routine.
As described in the previous section, TA and TB values
are scaled with m.
All protection routines (overcurrent, overvoltage and
overtemperature) are checked at a fixed time interval
(presently, 5 ms set by overflow rate of the Timer1).
The acceleration and deceleration routine is called at
one-second intervals.
Overcurrent Protection
A shunt resistor (R110) in the negative DC bus gives a
voltage corresponding to the current flowing into the
motor winding. This voltage is amplified and compared
with a reference. The current comparison setting allows
a current up to 6.3A. If the current exceeds 6.3A, the
FAULTA pin goes low, indicating the overcurrent Fault.
The firmware is configured in the Cycle-by-Cycle Fault
mode. When the Fault persists for more than a preprogrammed count (MAX_FLTA_COUNT) in the fixed
time interval, then the motor is stopped and the Fault is
indicated by the blinking LED1.
Overvoltage Protection
The DC bus voltage is attenuated using potential dividers and compared with a fixed reference. If the jumper
JP5 is open, the reference is set for 200V on the DC
bus. If jumper JP5 is shorted, the reference is set for
400V. The FAULTB pin is used to monitor the overvoltage Fault. If the overvoltage Fault persists for more
than a preprogrammed count (MAX_FLTB_COUNT) in
the fixed time interval, then the motor is stopped and
the Fault is indicated by the blinking LED2.
Overtemperature Protection
The power module has an NTC thermal sensor, outputting 3.3V at 110°C on the junction of IGBTs. The NTC
output is connected to AN8 through an optocoupler.
The temperature is continuously measured and if it
exceeds 110°C (MAX_JUNCTION_TEMP) for more than
© 2005 Microchip Technology Inc.
a preprogrammed count (MAX_TEMP_FILT_COUNT),
then the motor is stopped and the overtemperature
Fault is indicated by the blinking LED3.
Whenever the motor is stopped due to any of the above
mentioned Faults, it can be restarted by removing the
Fault condition and then by pressing either SW1 or
SW2.
Acceleration and Deceleration
The RAMP_SPEED routine is called every 1 second to
implement the acceleration and deceleration feature.
Both the acceleration and deceleration rates are userselectable and are given in the form of Hz/s.The
acceleration and deceleration features are active only
when the motor is in run condition.
SOURCE CODE FILES
The entire source code can be downloaded from
Microchip’s web site, www.microchip.com. It includes
the following files:
• ...\SVM\ACSVM_OL.asm
This file is located in the source code folder (Main
Routine section).
• ...\SVM\ACSVM_OL_routines.asm
This file is located in the source code folder (Control
Routine section).
• ...\SVM\TIME_TABLE.asm
This file is located in the source code folder (Look-up
Table for TB).
• ...\SVM\InterfaceACSVMConstant.inc
This file is located in the source code folder (System
Parameters and User-Defined Constants section).
• ...\SVM\InterfaceACSVMVar.inc
This file is located in the source code folder
(User-Defined Variable section).
An Excel file (PARAMETERS.xls) is included in the
source code folder which has two worksheets. The
TB_TABLE worksheet calculates TB entries based on
the main oscillator frequency (FOSC), FPWM, the
required dead time, etc. The LIST worksheet creates a
table to be stored in the data EEPROM of the
PIC18FXX31 device. This table contains all userselectable compile-time parameters, such as the motor
rated speed in Hz, FPWM in kHz, the required dead time
in μs, etc. The user should make sure that the table is
entered in the ACSVM_OL.asm file as shown in the
worksheet.
An overview of the firmware’s logic flow is provided in
Figure 7 and Figure 8. A complete list of system
parameters and user-defined functions is provided in
Table 3 through Table 5.
DS00955A-page 9
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FIGURE 7:
SVM IMPLEMENTATION FLOWCHART (MAIN ROUTINE)
Main Routine
START
Motor Parameters and On-Chip
Peripherals Initialization
Blink all LEDs at a Rate Set by
the Potentiometer
No
Is SW1/SW2
pressed?
Yes
Configure PCPWM Module and
Set Default Rotation Direction
Call KEY_CHECK to
Determine Pressed Key
Call PROCESS_KEY_PRESSED
to Act on the Pressed Key
Has TMR1
overflowed?
No
Yes
Call FAULT_CHECK to Check for
Fault and Display the same, if any
Call CONVERT_MANUAL_COUNT_TO_HZ to Convert the Potentiometer
Setting to the Required Motor Speed in Hz and to Set the Modulation Index
No
Is 1 sec time
interval over?
Yes
Call RAMP_SPEED to Accelerate/
Decelerate the Motor
Call CALCULATE_UPDATE_STEP_SIZE to Find
Vector Update Step Size based on the Motor Speed
DS00955A-page 10
© 2005 Microchip Technology Inc.
AN955
FIGURE 8:
SVM IMPLEMENTATION FLOWCHART (INTERRUPT SERVICE ROUTINES)
High Priority Interrupt Service Routine
ISR_HIGH
No
Is PTIF = 1?
Yes
Vector Angle = Vector Angle + Vector Update Step Size
No
Is carry
generated?
Yes
Increment Sector Number by 1
No
Is Sector
Number > 5?
Yes
Reset Sector Number to 0
Calculate TA, TB, T0/2 and
(TS – T0/2) using the Vector Angle
Load PWM Duty Cycle
Registers as per Table 2
RETFIE
Low Priority Interrupt Service Routine
ISR_LOW
No
Is ADIF = 1?
Yes
Read Phase Currents, IGBT Junction Temperature
and the Potentiometer Setting for the Motor Speed
Is TMR1IF = 1?
No
Yes
Reload TMR1 for 5 msec Overflow Rate
Increment RAMP_COUNT by 1 (used for giving 1 sec time
interval for acceleration/deceleration feature)
Yes
Is
SW1/SW2 pressed
any time?
No
Toggle LEDs
RETFIE
© 2005 Microchip Technology Inc.
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AN955
TABLE 3:
USER-DEFINED PARAMETERS IN SVM FIRMWARE
Name
Description
CHANGE_OVER_DELAY
Defines rotation direction changeover for the motor. Its value equals the
required changeover time in ms per 39 ms.
DIRECTION_AT_POR
Defines default rotation direction at start (1 = Forward, 0 = Reverse).
CYCLE_COUNT_MAX
Defines blinking rate for Fault indication. Its value equals the required blink
time interval in ms per 5 ms.
MAX_FAULT_CHECK_COUNT
Defines time window for Fault recognition. If any Fault occurs for more than
predefined count in this time window, then the Fault is recognized and
appropriate action is taken.
MAX_FLTA_COUNT
Defines count for overcurrent Fault recognition.
MAX_FLTB_COUNT
Defines count for overvoltage Fault recognition.
MAX_JUNCTION_TEMP
Defines limit for overtemperature Fault.
MAX_TEMP_FILT_COUNT
Defines count for overtemperature Fault recognition.
TMR1L_COUNT and TMR1H_COUNT
Defines overflow rate for Timer1. In the present application, it is set for 5 ms.
PARAMETER_BUFFER_SIZE
Defines array size for storing various compile-time parameters as well as
run-time parameters. It is set at 0x35 (do not change this value).
TABLE 4:
VARIABLES IN SVM FIRMWARE
Name
Description
REQD_SPEED_REF
Stores required motor speed set by the potentiometer.
SET_SPEED_HZ
Stores actual motor speed (Hz).
RAMP_COUNT
Stores count for Timer1 overflow. It is used for generating 1s time interval as
required for acceleration/deceleration feature.
CURRENT_R
Stores either total DC bus current (when used with DC shunt current
measurement) or R phase current (when used with phase current sensor).
CURRENT_Y
Stores Y phase current (when used with phase current sensor).
CURRENT_B
Stores B phase current (when used with phase current sensor).
JUNCTION_TEMPH
Stores junction temperature of the VSI switch.
SECTOR_NO
Stores present sector location of VS.
MODULATION_INDEX
Stores required amplitude of VS.
VECTOR_ANGLE<MSB:LSB>
Stores present vector angle of VS in a sector.
TB_COUNT<MSB:LSB>
Stores TB count as pointed by the vector angle.
TA_COUNT<MSB:LSB>
Stores TA count as pointed by the vector angle.
HALF_T0_COUNT<MSB:LSB>
Stores T0/2 count.
TS_MINUS_HALF_T0<MSB:LSB>
Stores TS – T0/2 count.
TABLE_TB_COUNT<MSB:LSB>
Stores array base address for TB count.
PARAMETER_BUFFER
Stores array base address for compile-time and run-time parameters.
DS00955A-page 12
© 2005 Microchip Technology Inc.
AN955
TABLE 5:
FUNCTIONS IN SVM FIRMWARE
Name
Description
KEY_CHECK
Checks the status of Run/Stop (SW1) and Fwd/Rev (SW2) keys.
PROCESS_KEY_PRESSED
Acts on command issued by the last pressed key.
FAULT_CHECK
Checks for various Faults (overcurrent, overvoltage, overtemperature) and
acts if any Fault is recognized.
CONVERT_MANUAL_COUNT_TO_HZ
Converts the potentiometer setting into the required motor speed (Hz) and
sets the modulation index (m).
RAMP_SPEED
Implements the acceleration/deceleration feature.
CALCULATE_UPDATE_STEP_SIZE
Calculates new vector update step size depending on the motor speed.
ISR_PWM
Responds to setting of PTIF. This routine rotates by vector angle update step
size and calculates new duty cycle values for all phases (R, Y and B).
ISR_ADC
Responds to setting of ADIF. This routine reads the potentiometer setting,
phase currents and junction temperature of the VSI switch and stores them
at appropriate locations.
ISR_TMR1
Responds to setting of TMR1IF. This routine reloads Timer1 for 5 ms
overflow rate and increments RAMP_COUNT by 1 for generating a
one-second interval (required for the acceleration/deceleration feature). This
routine also blinks all LEDs at start when no key is pressed.
© 2005 Microchip Technology Inc.
DS00955A-page 13
AN955
RESOURCE USAGE
CONCLUSION
The SVM control application consumes CPU
resources, as shown in Table 6. Substantial CPU
resources, especially memory and processing time,
are still available to users for the development of their
own applications.
VF control using the SVM in the open loop is more
energy efficient compared to the Sine PWM. With an
on-chip dedicated motor control peripheral like the
power control PWM module and the rich instruction set,
the PIC18FXX31 is well suited to give a low-cost
solution, implementing the VF control using the SVM
algorithm for the 3-phase AC induction motor control. In
addition, the on-chip resources, such as the ADC and
the multiple timers, allow users to implement other control (acceleration and deceleration) and protection
(overcurrent, overvoltage, overtemperature) features.
TABLE 6:
RESOURCES USED IN THE
MOTOR CONTROL DEMO
BOARD (USING PIC18F4431)
Used
Available to User
when PIC18F4431
is Used
1942 bytes
14442 bytes
Data Memory
93 bytes
675 bytes
EEPROM
Resource Type
Program Memory
44 bytes
212 bytes
PWM Channels
6
2
CCP/Fault Input
Channels
2
0
ADC Channels
5
4
EUSART
0
1
QEI Module
0
1
Timers
1
3
External Interrupts
0
3
I/O Lines
CPU Processing
Time
(FPWM = 20 kHz,
FOSC = 40 MHz)
20
16
~27%
~63%
REFERENCES
R. Parekh, AN887, “AC Induction Motor Fundamentals”
(DS00887). Microchip Technology Inc., 2003.
P. Yedamale, AN843, “Speed Control of 3-Phase
Induction Motor Using PIC18 Microcontrollers”
(DS00843). Microchip Technology Inc., 2002.
R. Parekh, AN889, “VF Control of 3-Phase Induction
Motors
Using
PIC16F7X7
Microcontrollers”
(DS00889). Microchip Technology Inc., 2004.
“PICDEM™ MC Development Board for PIC18FXX31
User’s Guide” (DS51453). Microchip Technology Inc.,
2004.
Resource utilization, as mentioned in Table 6, is for a
general purpose, relocatable code implementing the
VF control using the SVM algorithm on PIC18F4431
with 14-bit PWM resolution. A customized solution with
only 8-bit PWM resolution can conceivably result in an
additional 10% savings in CPU processing time.
DS00955A-page 14
© 2005 Microchip Technology Inc.
AN955
APPENDIX A:
FIGURE A-1:
PICDEM™ MC BOARD TECHNICAL INFORMATION
PICDEM™ MC DEVELOPMENT BOARD FUNCTIONAL BLOCK DIAGRAM
ICD
Connector
Potentiometer
RS-232
Interface
User
Push Buttons
RS-232
Connector
Hall Sensor
Connector
PIC18FXX31
LEDs
Isolated
Control
Section
Quad Encoder
Connector
Comparator
PCPWM
Optoisolators
Voltage
Monitor
Current
Monitor
Phase Current
Monitors
Temperature
Monitor
Back EMF
Conditioner
PCPWM
Motor
Terminal Block
IRAMS10UP60A
Gate Driver and
3-Phase Inverter
Power Terminal Block
VBUS
DC
AC
© 2005 Microchip Technology Inc.
Power
Switcher
+5 VDC
+5 VAC
+15 VAC
D GND
A GND
Bridge
Rectifier
DS00955A-page 15
DS00955A-page 16
2
3
1
2
4
3
S3
+5 VD
R95
4.7K
SW1 (ON/OFF)
1
S4
4
R98
4.7K
SW2 (FWD/REV)
+5 VD
R97
4.7K
R96
4.7K
FAULTC
SW1
SW2
2
RC1
RC0
OSC2
OSC1
CF3
RE2
CF2
RA5
QEB
QEA
INDX
CF1
C52
R25
2.8K
R26
4.7K
+5 VD
RD1
RD0
INT0
FAULTB
0.1 μF 33 pF
C19
4.7K
R27
R43
100
R44
2K
+5 VD
0.1 μF VREF
2K
R42
C26
RC7/RX/DT
RD4/FLTA
RD5
RD6/PWM6
RD7/PWM7
VSS
VDD
RB0/PWM0
RB1/PWM1
RB2/PWM2
RB3/PWM3
RB4/PWM5
RB5/PWM4
RB6/PGC
RB7/PGD
0.1 μF
RC4/INT1
RC5/INT2
C17
1
U4:A
0.1 μF
MCP6002 8-DIP
4
8
+5 VD
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
3
2
1
RC1
JP1
RD2
RD3
INT1
INT2
TX
RX
RD4
SW1
SW2
PWM0
PWM1
PWM2
PWM3
PWM5
3
RB6
1
2
JP3
RB7
RD4
+5 VD
C53
33 pF
R24
1M
RD2/SDI/SDA
PIC18F4431
RD1/SDO
RD0/T0CKI/GPCKI RD3/SCK/SCL
RC3/INT0
RC2/CCP1
RC1/T1OSI/CCP2 RC6/TX/CK/SS
RC0/T1OSO/T1CKI
OSC2/CLKO/RA6
OSC1/CLKI/RA7
VSS
VDD
RE2/AN8
RE1/AN7
RE0/AN6
RA5/AN5/LVDIN
RA4/CAP3
RA3/AN3/VREF+
RA2/AN2/VREF-
RA1/AN1
RA0/AN0
U3
R40 470
MCLR/VPP
C54
33 pF
3
2
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0.1 μF
C25
MCLR
RD5
220 μF 25V
C21
300
R34
PWM4
0.1 μF
C18
+5 VD
GND
V02
V01
VCC
GND
V02
V01
VCC
TLP2630/
SFH6326
3 CA2
4 AN2
U8
PWM1
PWM0
1 AN1
2 CA1
R39 300
R38 300
GND
V02
V01
VCC
TLP2630/
SFH6326
3 CA2
4 AN2
U7
PWM3
PWM2
1 AN1
2 CA1
R35 300
U5
PWM5
TLP2630/
SFH6326
3 CA2
4 AN2
1 AN1
2 CA1
R33 300
300
R30
5
6
7
8
5
6
7
8
5
6
7
8
R37
1K
R36
1K
R31
1K
R28
1K
LIN1
HIN1
C24
0.1 μF
LIN2
HIN2
C23
0.1 μF
+5 VA
R32
1K
LIN3
HIN3
C22
0.1 μF
+5 VA
R29
1K
+5 VA
FIGURE A-2:
C27
1
3
S2
4
R41
10K
RESET
+5 VD
AN955
BOARD SCHEMATIC, PART 1 (PIC18F4X31 MICROCONTROLLER, PCPWM
ISOLATORS, CURRENT COMPARATOR AND ASSOCIATED PARTS)
© 2005 Microchip Technology Inc.
© 2005 Microchip Technology Inc.
OSC1
OSC2
C48
33 pF
CF3
HC – 49US
INT0
FAULTB
RC1
RC0
OSC2
OSC1
QEB
Y1
14
13
12
11
10
9
8
7
6
5
QEA
4
3
3
VREF
2
1
2
1
CF1
MCLR
RC3
RC2/CCP1
RC1/CCP2
RC0
OSC2/RA6
OSC1/RA7
VSS
VDD
RA4/AN4
RA3/VREF+
RA2/VREF-
RA1/AN1
RA0/AN0
MCLR/RE3
RC6
RC7
VSS
VDD
PWM0
PWM1
PWM2
PWM3
PWM5
PWM4
RB6
RB7
C49
33 pF
RC4/INT1
RC5/INT2
U19
PIC18F2431
15
16
17
18
19
20
21
22
23
24
25
26
27
28
INT1
INT2
TX
RX
PWM0
PWM1
PWM2
PWM3
PWM5
PWM4
RB6
RB7
C41
0.1 μF
+5 VD
OPTIONAL
JP6
JP5
+5 VD
R99
100K
TX
RD1
RX
SW1
SW2
C46
1 μF
RX
TX
C47
1 μF
C44
1 μF
6
3
1
9
12
10
11
2
MCP201
LIN 6
VSS 5
4 TXD
VBAT 7
3 VDD
2 CS/WAKE
1 RXD FAULT/SLPS 8
U17
RD0
+5 VD
15
5
4
8
13
7
14
16
R100
100K
GND
C2-
C2+
A2IN
A1IN
VCC
MAX232 16-DIP
V-
C1-
C1+
A1OUT
A1OUT
T2IN
T1IN
V+
U18
D24
39V
+5 VD
R107
10 ohm
R101
1K
J14
PIN1
PIN6
PIN2
PIN7
PIN3
3 PIN8
PIN4
4 PIN9
PIN5
5
2
1
D22
1N4007
+5 VD
D23
27V
C42
0.1 μF
D21
1N4007
50
R106
C43
1 μF
C45
1 μF
9
8
7
6
3
2
1
J13
FIGURE A-3:
JP9
INDX
+5 VD
+5 VD
AN955
BOARD SCHEMATIC, PART 2 (PIC18F2X31 MICROCONTROLLER SOCKET,
USART, CLOCK OSCILLATOR NETWORK AND OPTIONAL LIN INTERFACE)
DS00955A-page 17
DS00955A-page 18
J2
5
4
3
2
1
6
5
4
3
2
1
+5 VD
+5 VD
R16
10K
R17
10K
+5 VD
R15
10K
+5 VD
QEB
RA5
CF1
VREF
INDX
QEA
INT0
INT1
INT2
J7
6
5
4
3
2
ICD 1
J3
5
4
3
2
1
J9
+5 VD
R22
10K
R21
10K
+5 VD +5 VD
RB7
RB6
MCLR
+5 VD
8
7
6
5
4
3
2
1
10K
+5 VD
1K
1K
R19
R20
1K
R18
PWM3
PWM5
PWM4
RB6
RB7
PWM0
PWM1
PWM2
QEB
QEA
INDX
J10
6
5
4
3
2
1
RD0
RD1
FAULTB
INT0
RC0
RC1
J11
10
9
8
7
6
5
4
3
2
1
RC0
RD2
RD1
RD0
470
R105
470
R104
470
R103
470
R102
RD2
RD3
INT1
INT2
TX
RX
RD4
RD5
SW1
SW2
J12
D20
D19
D18
D17
3
2
1
CF3
RE2
CF2
JP4
FIGURE A-4:
R23
J8
AN955
BOARD SCHEMATIC, PART 3 (SENSOR AND MICROCONTROLLER HEADER
CONNECTORS, MONITOR LEDS)
© 2005 Microchip Technology Inc.
© 2005 Microchip Technology Inc.
VBUS +
LEG3
LEG2
LEG1
560K
R88
560K
R90
560K
R85
R83
560K
R80
560K
R78
560K
R109
100K
560K
R91
C34
0.1 μF
560K
R86
C33
0.1 μF
560K
R81
C32
0.1 μF
560K
560K
560K
R55
100K
R76
R75
R73
C35
0.1 μF
27K
R92
R70
R69
JP2
10K
R72
22K
30K
R68
30K
R89
10K
R84
22K
R79
22K
R74
10K
R71
10K
+5 VA
22K
R87
22K
R82
22K
R77
R54
100K
R67
27K
1M
9
12
13
+IND
-IND
+INC
-INC
1M
10
R65
+INB
R64
5
6
1M
11
4
-INB
+INA
-INA
R63
3
2
C36
7
4.7K
R62
4.7K
1M
R66
U12:D
MCP6544
14
+5 VA
U12:C
MCP6544
8
+5 VA
R61
4.7K
R60
U12:B
MCP6544
+5 VA
U12:A
MCP6544
1
0.1 μF
+5 VA
300
R52
300
R49
300
R48
300
R50
R59
4.7K
+5 VA
U14
V02 6
GND 5
VCC 8
V01 7
TLP2630/
SFH6326
3 CA2
4 AN2
1 AN1
2 CA1
V02 6
GND 5
3 CA2
4 AN2
TLP2630/
SFH6326
VCC 8
V01 7
1 AN1
2 CA1
U13
R51
1K
R53
1K
R46
1K
C30
0.1 μF
+5 VD
R47
1K
FAULTB
C29
0.1 μF
+5 VD
R113
1K
QEA
3
2
1
INT1
INDX
3
2
1
INT0
QEB
3
2
1
INT2
JP10
JP11
JP8
FIGURE A-5:
0.1 μF
C31
R56
100K
AN955
BOARD SCHEMATIC, PART 4 (SIGNAL CONDITIONER FOR SENSORLESS BLDC
OPERATION)
DS00955A-page 19
DS00955A-page 20
+15 VA
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
U
V
W
R108
4.3K
VBUS+
FUSE 6.3X32
F2
C39 10 μF 16V
C38 10 μF 16V
C37 10 μF 16V
300
R93
0.05R/3W
R110
DC-
C56
33 pF
ISM
SFH618
1 +LED
COL 4
2 -LED EMT 3
U16
C57
4.7 nF
1K
R111
91K
R94
1K
+5 VD
R112
10K
R116
3
2
1K
R115
4
8
U11:A
MCP6002 8-DIP
+5 VA
1
R117
RE2
51K 1%
C55
0.1 μF
5
6
7
C58
100 pF
U11:B
MCP6002 8-DIP
R118
360
+5 VA
-LED
U20
I2
VCC2
N/C
N/C
LOC111 8-DIP
4 I1
2 +LED
3 VCCT
1
5
6
7
8
7
CF1
JP7
U4:B
MCP6002 8-DIP
5
6
R119
51K 1%
R120
470
FIGURE A-6:
VB3 1
VS3
2
NC
3
VB2
4
VS2
5
NC
6
VB1
7
VS1
8
NC
9
V+
10
NC
11
DC12
DC13
DC14
H1
15
H2
16
H3
17
L1
18
L2
19
L3
20
ITRIP
21
VCC
22
VSS
23
U15
IRAMS10UP60A
AN955
BOARD SCHEMATIC, PART 5 (3-PHASE INVERTER POWER MODULE AND SHUNT
CURRENT MEASUREMENT)
© 2005 Microchip Technology Inc.
R
Y
B
G
U
V
W
LEG1
LEG2
LEG3
4
3
2
1
C28
33 pF
FAULTC
EARTH
CF1
2.6K
R45
1K
R121
D12
1N4448
+5 VD
9 +5V
7 OUT
8 0V LTS15-NP
U6
OPTIONAL
IN6 6
IN5 5
IN4 4
3
IN3
2
IN2
1 IN1
© 2005 Microchip Technology Inc.
CF2
Load R124
0.01R, 1/2W
instead of U6
0.1 μF
C51
+5 VD
33 μF 35V
C50
1K
R122
D13
1N4448
9 +5V
7 OUT
8 0V LTS15-NP
U9
OPTIONAL
IN6 6
IN5 5
IN4 4
3
IN3
2
IN2
1 IN1
Load R125
0.01R, 1/2W
instead of U9
CF3
+5 VD
1K
R123
D14
1N4448
IN6 6
IN5 5
IN4 4
9 +5V
7 OUT
8 0V LTS15-NP
U10
OPTIONAL
Load R126
0.01R, 1/2W
instead of U10
FIGURE A-7:
3 IN3
2 IN2
1 IN1
J6
AN955
BOARD SCHEMATIC, PART 6 (MOTOR TERMINAL BLOCK AND OPTIONAL
CURRENT TRANSDUCER CIRCUITRY)
DS00955A-page 21
5
6
C16
RV1
216010
F1
C7
56 pF
R12
1.3 ohm
DC-
U1
1
2
3
4
5
DC-
1N5818
D7
S
GND
D
VCC
OCP/FB
4 AC2
3
AC1
2
1 ohm 3W
R2
R11
750 ohm
R4
150K
D8
1N4148
DC-
R3
47K
DC-
R13
2.4K
D9
1N4148
C15
R14
2.2 nF
400V
10 ohm
DC-
27 ohm
R5
D11
1N4937
C2
4.7 μF 400V
C12
220 pF
C6 1N4148
33 μF 25V
R10
4.7K
D4
470 μF 250V
C5
J17
SHORTING LINK
2
1
470 μF 250V
C1
VBUS+
C13
47 pF
DC-
DC-
D1
1
GBPC2506C
AC INPUT
R1
NTC
0.01 μF 270 VAC
DC-
4
EARTH
3
J1
G N L
2
DS00955A-page 22
1
E7
DC-
5
4
9
6
10
7
3
2
8
1
4
U2
1 3
CA 2
A 1
11DQ10
MOC8101
C
5 E
D5
R9
1K
TL431
L2
0.1 μF
C14
L1
C10
47 μF 25V
C9
47 μF 25V
10 μH
10 μH
C11
100 μF 25V
10 μH
L3
C8
100 μF 25V
D2
C3
100 μF 25V
11DQ10
D6
11DQ10
D3
6 NC
T1
TRANSFORMER TSD-877
E3
R7
4.7K
R8
4.7K
E5
D10
R6
470 ohm
+5 VD
E6
+15 VA
E4
C4
47 μF 16V
+5 VA
FIGURE A-8:
IRIS4009-HORZ
DC- DC+
AN955
BOARD SCHEMATIC, PART 7 (POWER SUPPLY)
© 2005 Microchip Technology Inc.
AN955
TABLE A-1:
SIGNALS USED IN THE PICDEM™ MC SCHEMATIC
Signal Name
Function
+15 VA
Non-isolated DC supply voltage for power components.
+5 VD
Isolated supply voltage for digital components.
CF1, CF2 or CF3
Current feedback signal from designated motor phase winding. CF can also
represent total motor current when current transducer measurement is used.
DC-
DC bus return path.
FAULTB
PCPWM Fault signal input (overvoltage).
FAULTC
Fault signal input from comparator (overcurrent).
HIN1, HIN2 or HIN3
Upper leg input for designated phase to 3-phase inverter (isolated signal).
INDX
Index position signal to QEI inputs on microcontroller.
INT0, INT1 or INT2
Hall effect sensor signal to interrupt-on-change inputs on microcontroller.
LEG1, LEG2 or LEG3
Current transducer signal for designated motor winding phase.
LIN1, LIN2 or LIN3
Lower leg input for designated phase to 3-phase inverter (isolated signal).
MCLR
Microcontroller hardware Reset.
PWM0 through PWM5
PCPWM waveform outputs from microcontroller.
QEA, QEB
Quadrature encoder sensor signals to QEI inputs on microcontroller.
RAn, RBn, RCn, RDn or REn
Bit n of the designated port of the microcontroller.
RX and TX
RS-232 serial receive and transmit.
SW1, SW2
Push button input from designated switch to microcontroller.
U, V, W
Drive level output from inverter power module to motor.
VBUS+
DC high voltage to inverter power module.
VREF
External reference voltage for overcurrent detect.
© 2005 Microchip Technology Inc.
DS00955A-page 23
AN955
APPENDIX B:
SINE PWM
APPENDIX C:
The Sine PWM is implemented using a VSI as shown
in Figure 2.
At any instant, either the top or the bottom switch of a
half bridge is on. Hence, the resultant phase-to-virtual
neutral point ‘O’ (VRO, VYO and VBO) can be
represented as:
EQUATION B-1:
Vio =
VDC × V (where = R, Y, B)
if
i
2
Vif represents the 3-phase waveforms in space with 120°
(2π/3) phase shift between them. Each phase waveform
can be represented as shown in Equation B-2:
EQUATION B-2:
MOTOR CONTROL
MADE EASY
To assist motor control developers, Microchip has
developed the PICDEM™ MC Development Board
based on the PIC18FXX31. This demo board has all
the necessary hardware for a range of motor control,
for example, AC Induction motor, BLDC motor and
Stepper motor. Various control algorithms have been
developed using the demo board to assist users in
developing motor control application. Also, a PC-based
GUI has been developed for helping users in configuring different motor control parameters and giving
real-time capability to monitor the motor speed, the
3-phase currents and temperature.
All source code and the motor control GUI are free to
use and can be downloaded from the Microchip web
site at:
www.microchip.com.
VRf = m × sinθ
VYf = m × sin(θ + 2π/3)
VBf = m × sin(θ + 4π/3)
Substituting Equation B-2 into Equation B-1, we get:
EQUATION B-3:
VDC (m × sinθ)
2
VDC (m × sin(θ + 2π/3))
VYO =
2
VDC (m × sin(θ + 4π/3))
VBO =
2
VRO =
The resultant line-to-line output voltage is given as:
EQUATION B-4:
VRY = VRO – VYO =
√3 × VDC × m × sin(θ + π/6)
2
VYB =
√3 × VDC × m × sin(θ + (5π)/6)
2
VRB =
√3 × VDC × m × sin(θ + 3π/2)
2
From Equation B-4, it is clear that the maximum line-toline voltage in the linear operating range is achieved
when m = 1.
EQUATION B-5:
Maximum line-to-line voltage =
√3 × VDC
2
This clearly shows that in Sine PWM, the VDC
utilization is less than 90% (~86.6%) in the linear
operating range.
DS00955A-page 24
© 2005 Microchip Technology Inc.
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•
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•
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•
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© 2005 Microchip Technology Inc.
DS00955A-page 25
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DS00955A-page 26
© 2005 Microchip Technology Inc.