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Vol. 34 No.2
Computing
& Ceramics
The RoHS Experience...
A 3D Computer Model Study...
Next Generation Multilayer
Dielectrics...
Embedding a Thin Polymer
Voltage ESD...
W W W. I M A P S . O R G
D
e
G vic
B e
C P
A Sp ac
ut r k
C om ing agi
IC o 0 n
M ti 7 g
T ve - - M
M
A - A a ar
pr p rc ch
il ri h
23 l 9 18 19
-2 -1 -1 -22
6 2 9
Thin Array Polymer Packaging...
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Features
The RoHS Experience at
NCR Corporation
Paul Rostek
10
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A 3-D Computer Module
Study
Don Hayashigawa
20
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Next Generation
Multilayer Dielectrics for
High Reliability
Multilayer
Hybrid Circuits
Stefan Flick, Annette Kipka
and David Malanga
Embedding a Thin
Polymer Voltage ESD
Suppressing Core in a
Chip Package Offers
and Alternative to on
Chip ESD Protection
of Sensitive High
Performance ICs Used
in Today’s Cell Phones
and Computers
Karen Shrier and
Greg Caswell
Thin Array Polymer
Packaging (TAPP®)
Leo M. Higgins III, Ph.D.
On the cover:
9 layer, Z interconnect,
PTFE System in Package
Courtesy of Endicott Interconnect
Technologies, Inc.
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28
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34
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A DVA N C I N G
MICROELECTRONICS
CONTENTS
D E PA R T M E N T S
IMAPS 4-TIER
PARTICIPATION
4
5
From the Publications
Committee Chair:
Spreading the Word
6
From the European Editor:
SIP, MCM, Flip Chips, Wirebond,
QFN, Surface Mount...?
7
Industry
49
Metro Chapter Meeting
Draws Large Audience
54
Welcome New Members
54
First Time Renewals
Sales and Marketing Corner:
Don’t Shoot ‘til You See the
Whites of Their Eyes!
MEMBER TOOLS
48
Chapter Contacts
33
MASH 2007 Editorial
(Military, Aerospace, Space, and
Homeland Security Conference)
50
Exhibitor Products
& Services
56
Advertiser Hotline
56
Who to Call at IMAPS HQ
U P D AT E S
from IMAPS
38
2
European News
Foundation Focus
Design
IMAPS - International
Microelectronics And
Packaging Society
611 2nd Street, NE
Washington, DC 20002
Tel: (202) 548-4001
Fax: (202) 548-6115
E-mail:
IMAPS@imaps.org
See us on IMAPS’s Home Page:
www.imaps.org
42
23
Systems &
Applications
Materials &
Process
From the President
Reflections on a Reflection
CHAPTER and
INDUSTRY NEWS
Device Packaging
Program-at-a-Glance
Inside Back Cover
Calendar of Events
39
IMAPS 2007 –
From the Technical Program
Co-Chairs
40
IMAPS Awards –
Your Help Needed
41
CICMT Program-at-a-Glance
55
In Memoriam – Jack Rubin
COMING NEXT ISSUE
Military/Aerospace
International Technology
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UPCOMING
EVENTS
Executive Council
*International Conference on Device Packaging
March 19-22, 2007 Scottsdale, AZ
(co-located with GBC Winter Meeting)
GBC Spring 2007 Meeting
March 18 & 19, 2007 Scottsdale, AZ
(co-located with Device Packaging)
Automotive ATW
April 9-12, 2007 Dearborn, MI
*International Conference on Ceramic Interconnect and
Ceramic Microsystems Technologies
April 23-26, 2007 Denver, CO
Co-sponsored by IMAPS and ACerS
*Military, Aerospace, Space & Homeland Security
(MASH 2007)
May 8-10, 2007 Baltimore, MD
IMAPS 2007
*The 40th International Symposium on Microelectronics
November 11-15, 2007 San Jose, CA
Integrated/Embedded Passives
November 15 – 17, 2007 San Jose, CA
*Exhibit Space Available
President
Michael R. Ehlert, Barry Industries, Inc.
President-Elect
Stephen J. Adamson, Asymtek
First Past President
James R. Drehle, Robert Lloyd & Associates
Vice President of Technology
Andrew Strandjord, FlipChip International
Vice President of Membership
Michael P. O’Neill, Heraeus – Thick Film
Division
Secretary
Susan Trulli, Raytheon
Treasurer
Steve Capp, Laserage Technology Corp.
Northwest Regional Director
John Zhang, Finisar
Southwest Regional Director
Hossein Ahmad, Applied Reliability IME
Southeast Regional Director
Kinzy Jones, Jr., Motorola
North Central Regional Director
Adam Schubring, Kyocera America, Inc.
Northeast Regional Director
Michael Salloum, R&D Assembly, Inc.
Publications Committee
Publications Committee Chair
Jeffrey C. Demmin, Tessera
Technologies, Inc.
Editor-in-Chief, Advancing Microelectronics
Jerry Sergent, Fairfield University
Editor - The Americas,
Advancing Microelectronics
Greg Caswell, Virtex Assembly, Inc.
Editor - Europe, Advancing Microelectronics
Søren Nørlyng, Micronsult
Editor - Asia, Advancing Microelectronics
Dr. Hironori Asai, Toshiba Corporation
Editor, Journal of Microelectronics
and Electronic Packaging
Dr. Fred Barlow, University of Idaho
Directors
Executive Director
Michael O’Donoghue
Director, Program Development & Technology
Brian Schieman
Managing Editor and Advertising Sales
Ann Carter Bell, Manager
Marketing & Communications
Visit www.imaps.org for links to all
upcoming events including:
L
full event descriptions
L
abstract submissions
L
exhibition information
L
event updates
Advancing Microelectronics (formerly Inside ISHM), is
published six times a year and is a benefit of IMAPS
membership. The annual subscription price is $75; $15
for a single copy. Copyright 2007 by IMAPS—
International Microelectronics And Packaging Society.
All rights reserved. Except as defined in 17 USC, Sec.
107, permision to republish any materials in this publication must be obtained from IMAPS, 611 2nd Street,
NE, Washington, DC 20002. Telephone (202) 548-4001.
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A DVA N C I N G
MICROELECTRONICS
FROM
THE
PRESIDENT
Reflections on a Reflection
Mike Ehlert, Irvine, CA
and Attleboro, MA USA
IMAPS 2007 President
Have a look
in the mirror
and see the
reflection.
People, specifically the
technological packaging
experts – IMAPS members –
made it work.
The realities of a production schedule mean that
although you are reading this at the change of seasons,
it is written in mid winter. I am spending my winter
vacation in Fairbanks, Alaska visiting family. Fairbanks
is located in central Alaska on the Chena River some
130 miles south of the Artic Circle. It is just after the
winter solstice and although blessed with 4 hours and 7
minutes of sun-up time, the low sun angle, high mountains to the south and the near-constant clouds mean it
only gets to twilight conditions and the sun is never
seen. The airport sign greets you “Welcome to
Fairbanks, -22F at 3:57 PM.” Today is unseasonably
warm at +2F while our members of IMAPS-Brazil in São
Paulo are blessed with 72F. This is nothing new for our
members from IMAPS-Nordic and IMAPS-Russia, but
the rest of us may learn a little.
In these conditions the human body and mind must
be protected from frostbite and cabin fever, respectively,
but life goes on pretty normally otherwise. People get
up, eat breakfast and go to work in the morning, come
home in the evening to dinner. The kids go to school,
learn their lessons and play in the streets. People drive
around in cars, chat on cell phones, snap pictures with
digital cameras and generally do the same things everyone else does. What makes this significant is that no
one worries about the electronics. The cars are plugged
in at night so the battery stays warm and the oil stays
fluid enough to crank but that is about it. MP3 players
are left laying on the dash, electronic ignitions and
stereos work fine and everything is okay as long as the
battery is kept warm enough for the chemistry to work.
Fur traders using dog sleds settled interior Alaska in
the 1800s. At that time the only things that worked in
this weather were self-heating: dogs, people, coal-oil
lanterns, wood stoves. Why is it that things have
changed so much? As part of the Industrial Revolution
someone worried about all the packaging problems –
“everything between the chip and the system” – and
made it all work. Have a look in the mirror and see the
reflection. People, specifically the technological packaging experts – IMAPS members – made it work.
Some of the first steps were halting. Portable transistor radios, if left in the sun, melted into single frequency devices. We had LCD watches that stopped
working if you bumped them. Progress has been continuous and fast. Now everything everywhere is electronic and it all works pretty much. Modern life with
oil heat, electricity and indoor plumbing is the result of
decades of good work by people like you. So the next
time you look in the mirror, consider the effect on the
world that person has. What will you invent next?
IMAPS has three conferences directly on this point
coming up.
International Conference and Exhibition on
Device Packaging
Doubletree Hotel - Scottsdale, Arizona USA
March 19-22, 2007
Advanced Technology Workshop on
Automotive Packaging
Hyatt Regency - Dearborn, Michigan - USA
April 9-12, 2007
IMAPS/ACerS 3rd International Conference
and Exhibition on
Ceramic Interconnect and Ceramic
Microsystems Technologies (CICMT)
April 23-26, 2007
Grand Hyatt Hotel - 1750 Welton Street Denver, Colorado USA
If you are interested in some of the world’s best work
in packaging I suggest you come to one or all of these.
The world’s best people in packaging “everything
between the chip and the system” will be there, and in
your mirror.
IMAPS 2007
San Jose
Classic Trolley
photo courtesy of the San Jose Convention & Visitors Bureau
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PUBLICATIONS
COMMITTEE
Spreading the Word
I hope that you have noticed – and taken advantage
of – the updates to the various IMAPS information
sources. This is the second issue of the re-designed
Advancing Microelectronics, with broader coverage and
upgrades to details that should make the information
more accessible. And, hey, it just looks a lot nicer, too.
On the electronic front, the IMAPS website
(www.imaps.org) has had a major overhaul, with the
new version going live at the beginning of 2007. This
was probably an even bigger upgrade than the magazine. The Internet has continued to evolve of course,
so the IMAPS website had some catching up to do. The
homepage has been reorganized to make everything
clearer, for example, and features like the event calendar are easier to use. We are also planning further
upgrades to make more IMAPS information available to
members.
One interesting outcome of these improvements is
that we have looked more closely at the IMAPS membership to understand better who you are and what
information you might want. All of those boxes that
you check describing your job, company, interests, etc.,
have been put to use! For example, one out of six
IMAPS members is a vice president or higher in their
organization. It isn’t just wishful thinking that the
industry leaders are part of IMAPS. Also, the membership really is heavy on technical people – at the “manager/director” level, people with technical roles outnumber sales and marketing professionals by almost
two to one. It’s good to have some of each, but IMAPS
intentionally emphasizes the technical part of the
industry. Along with all of that technical management
horsepower, more than a quarter of the members put
themselves in the “engineer / research / scientist” category.
The geographic scope of the membership is thoroughly international, too, with more than one-third of
the members residing outside of North America. We
are hoping for that fraction to grow, too, as the importance of international supply chains and partnerships
continues to increase. Finally, the industry coverage of
the membership reflects the four tiers of IMAPS (materials and process, design, systems and applications, and
industry). There are many of the traditional material
and equipment companies on the rolls, like K&S, DEK,
Heraeus, Cookson, and Dow, and the large OEMs
downstream are there, too, with companies like
Agilent, Cisco, Nokia, and Sony participating in
IMAPS.
It has been useful for the IMAPS staff and volunteers
to take a closer look at the membership, since that
helps us to understand your needs better. I thought
that I would highlight some of that data here, so that
the members also have some more insight into our
IMAPS colleagues. As always, please let us know if you
have suggestions on what other information IMAPS
could gather and transmit to the members, or about
how we accomplish that. The website and Advancing
Microelectronics have been upgraded, but there is
always room for improvement.
Thanks for reading,
Jeff Demmin
IMAPS Publications
Committee Chair
One interesting
outcome
of these
improvements
is that we
have looked
more closely
at the IMAPS membership
to understand better
who you are and what
information you
might want.
For exhibiting opportunities at
IMAPS 2007, visit
www.imaps40th.org:
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Exhibitor Prospectus and booth application
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Exhibitor Benefits
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Previous Exhibitors
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and more!
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A DVA N C I N G
MICROELECTRONICS
EUROPEAN
EDITOR
SIP, MCM, Flip Chips, Wirebond,
QFN, Surface Mount...?
Søren Nørlyng
noerlyng@micronsult.dk
I imagine that
quite often an
OEM has the
challenge
to find the
optimum
solution
for a new packaging
concept with more
components on a
restricted area.
Of course the headline should be: System cost.
I imagine that quite often an OEM has the challenge
to find the optimum solution for a new packaging concept with more components on a restricted area. What
is the optimum solution?
If you ask the strategic buyers, you should do what
you always have done, no new exotic solutions, no new
suppliers to be qualified and audited. If you ask the
technical nerds, you will be told to use the latest technology that would be suitable. If you ask other engineers, you will most likely get as many different
answers as available options.
Why? Because it actually is a very difficult task to
suggest the optimum, as it requires multiple skills,
experience and insight.
You have to know so many details. Volume and timing, motherboard complexity vs. price for on-board
solution or module solution – and for wirebond and
flip chip solutions, the requirements to pad termination
materials and eventual fine-line needs. In the case of
flip chips, then you need to know chip design, pitch,
metallization, bump type, requested or preferred joining technology, underfills, pastes or films. Test strategy,
repairability, reliability, needs for second sourcing. All
possibilities have to be overviewed before a final choice
is made – it also has to be known if we talk in-house or
outsourced production to a preferred EMS or packaging
house – and therefore about their capabilities and preferences regarding technologies and the necessary
equipment. In order to succeed cooperation and
involvement of all partners are required as early as possible before the requirements and specs are “frozen.”
And don’t forget, the engineers have to know as
much as possible about this broad span of technologies
in order to have fruitful discussions with suppliers and
subcontractors.
IMAPS is a tremendous source. IMAPS NA last year
introduced almost the answer to these multidisciplinary needs by their Device Packaging Conference in
Scottsdale.
Here we had parallel tracks like flip chip – wafer
bumping, flip chips – future directions, flip chip –
underfill & materials, flip chip – packaging, flip chip –
copper/low-K, 3D – wafer bonding, 3D – stacked die,
3D – device applications, 3D – assembly and manufacturing – and many more.
The number of delegates demonstrated the need for
this kind of conference.
I am sure this year’s event in March will be an equally big success!
Also in Europe the IMAPS chapters organize very
broad conferences covering the many areas of interest
with focused sessions.
You can definitely expect that this year’s European
event will cover all needs from advanced PCBs and flex
to interconnection, advanced packaging, 3D-SIP, manufacturing technologies to thermal management and
design.
EMPC2007, the 16th European Microelectronics
and Packaging Conference and Exhibition, will be held
in Oulu, Finland, June 17-20. Plan to come to the technical capital of Finland and also take the opportunity to
visit the many companies there.
Please read more on http://www.empc2007.org.
See you in Oulu!
Søren Nørlyng
noerlyng@micronsult.dk
IMAPS 2007
San Jose
Cezar Chavez Park
photo courtesy of the San Jose Convention & Visitors Bureau
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SALES
and
MARKETING
CORNER
Don’t Shoot ‘til You See the
Whites of Their Eyes!
“Don’t shoot ‘til you see the whites of their eyes!”
General George Prescott uttered these famous words to
his Revolutionary War troops as the British marched
upon them from Boston Harbor in 1775 in the colonial
US. Why start out the inaugural Sales and Marketing
Corner of Advancing Microelectronics with such a statement? Eye-to-eye contact is one of the most important
means of human communication. And communication
is probably the single most important factor in the
success of any sales and marketing initiative.
Fast forward to today. The incorporation of the
Internet as an information-gathering tool has revolutionized the way we do business. Emails, e-shopping,
newsletters, blogs, and other readable electronic media
supply information and transaction opportunities at
our fingertips, and in a fraction of the time that the
IMAPS founding fathers searched for microelectronics
information 40 years ago. But what advantage – yes,
advantage – did General Prescott’s troops or the IMAPS
founding fathers have without the multitude of communication choices at our disposal today? They had to
rely primarily on face-to-face interactions to get things
done. There were no misunderstood emails and no
spam. When we purchased something, a handshake
closed the deal, not “proceed to secure checkout.” Yes,
all these tools allow transactions to happen faster and
more efficiently. But e-commerce cannot replace the following scenarios:
•
The look on the face of a person when they are
covering up (lying) about something.
•
The clear confidence beaming from someone who
has and can deliver the “killer” product or service
to someone who needs it.
•
Satisfying an individual’s or organization’s need for
a trusting personal relationship before they make a
purchase decision or a change to a new vendor.
•
Interacting with a person to discover the real need
in an inquiry.
•
The positive energy in a room when a customer
and supplier have arrived at a win-win agreement.
•
The negative energy in a room when a salesperson
sells at someone, with little regard to what the
client really needs.
In Daniel Coleman’s Social Intelligence, he discusses
the actual biochemical reactions in our brain that occur
when we interact with other people – what he calls
“Neural WiFi.” For example, when two people are sitting across from each other in deep conversation and
the body language is mimicked by both persons – the
nodding, smiling, shifting of the body, frowning. When
sensors are actually connected to certain portions of
their brains, it is proven that the individuals are biochemically “in synch.” Yet in another example,
Coleman sent off several pairs of college students to an
online chat room to get acquainted. The online interaction became quite aggressive and sexual. The researcher
was astounded as there were no signs of such behavior
in interviews before and after the online activity –
behavior likely never to be played out face-to-face. A
major theme in Coleman’s book is that we are social
beings, and like it or not we gravitate to face to face
social interaction for meaning, accomplishment, and
harmony. If you have ever spent any time in Japan, you
will certainly understand that this thinking is a way of
life.
In business, understanding how to create harmonious communications with our customers, co-workers, or industry colleagues is highly desirable. I want to
have that interaction that creates the positive body language making it clear my counterpart is in synch with
what I am saying and I am also in synch with his or her
thoughts. This is only accomplished when I can see the
whites of someone’s eyes. Hurling email back and forth
or relying on Internet searches exclusively to make
major purchase decisions only gets a fraction of the
story. I know from my own experiences it is tough,
because email and the Internet are easy. But the idea
here is to become more effective in our professional
(and home) interactions.
Why is all of this relevant in a column in this magazine? The mission of IMAPS, right out of the 20062009 Strategic Plan and posted front and center on the
IMAPS home page www.imaps.org is this: IMAPS leads
the Microelectronics Packaging, Interconnect and
Assembly Community, providing means of communicating, educating, and interacting at all levels.
Collaborating face to face at symposiums, workshops
and local meetings is arguably the best way for us to get
a complete picture of the information we desire to
obtain and develop. Electronic media certainly supplies
us as much information as we desire to be fully prepared for those person-to-person interactions. This is
why we strive to provide information content in this
magazine, in the Journal of Microelectronics, and via the
IMAPS website (new and improved I might add!).
In summary, today’s electronic media provides an
efficient means for information gathering, but it simply cannot replace the face-to-face interactions needed to fully process and get the complete picture.
Stephen M. R. Covey relates in The Speed of Trust that the
“Internet is a good example of both transparency and
illusion. At the same time as it engenders extraordinary
transparency, allowing people to get information and
access truth wherever they live, it also creates a place
where people can make up pseudonyms and interact
with others inside an illusion – where nobody knows
their true identity or intent.” It is no mistake that the
latest trends in electronic communications are video
related (video conferencing, web casts, YouTube, etc.),
facilitating more face-to-face interaction. For technologists, presenting or listening to papers at symposiums
allows you to get the full story – ideally we know if a
paper is really a good paper after we listen to the pres-
Michael P. O’Neill
Vice President of
Membership
Heraeus Inc.,
Thick Film Division
continued page 8
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A DVA N C I N G
MICROELECTRONICS
continued from page 7
entation – don’t we? It’s never the same if we just read
the Proceedings. For salespeople – it is simple: get out
in front of your customers and communicate – understand what they need. Read the interactions and body
language. Listen. The cold blank stares and uncomfortable jostling in the chair really mean something. Look
into the whites of their eyes before shooting – get in
synch!
8
Was this column interesting to you? Please send any
comments or suggestions to the author at
moneill@imaps.org.
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FEATURE
ARTICLE
T
he RoHS
Experience at
NCR Corporation
Paul Rostek, Teradata Division, of NCR Corporation, 17095 Via Del Campo,
San Diego, CA 92027, Phone: 858-485-2860, Fax: 213-337-5432
Email: paul.rostek@ncr.com www.ncr.com
Abstract
This is a story of the RoHS journey at NCR Corporation starting in January 2003 with the passing of the European RoHS
(Restriction of Hazardous Substances) Directive 2002/95/EC. NCR realized the need to comply with all relevant environmental legislation in order to avoid the risks, costs and the consequences of non-compliant products in the EU. This paper
discusses all the issues NCR encountered preparing for the implementation of the EU directive for a unified company-wide
approach to RoHS. This paper addresses:
•
Overview of the NCR Policy for RoHS and Environmental Intentions
•
The “DfE” Design for Environment Landscape – the regulations impacting the industry today
•
Organizing NCR for the RoHS effort and the impact on NCR Business
•
Coordinating the Corporation RoHS team and the individual Business Unit teams
•
Defining the EU legal interpretation of RoHS Terms and Conditions
•
Developing a strategy to manage the transition from non-compliance to compliance
•
Developing a logistics model for the transition for spare parts, old inventory, refurbished units, etc.
•
Evaluating and selecting tools to assist in the transition to compliance
•
Evaluating technical issues associated with RoHS – such as the “tin whisker” problem
•
Developing RoHS processes, audit preparations and assessing on-going compliance
•
Future considerations – Lessons learned and how to be proactive next time
Key words: Restriction of Hazardous Substances (RoHS), RoHS Directive, toxic materials, DfE, compliance, NCR
1.0 Introduction
This paper reveals the problems that NCR had to
deal with and understand when transitioning its products for RoHS compliance, such as managing the supply chain, using up existing inventory, and managing
outsourced manufacturing vendors. The paper looks at
the investigation into a potential problem hidden in the
parts that are soldered with tin only, known as the
growth of “tin whiskers” which may cause a short circuit between devices. Some of the internal NCR issues
discussed included the handling of spare parts, the
repairing of equipment, refurbishing units, upgrading
and resales of customer equipment “put on the market”
before July 1, 2006. Just understanding terms like the
meaning of “put on the market” took a lot of time and
resources to research and clarify.
NCR developed a strategy for gathering and managing supplier information on all electronic components
for RoHS compliance, reviewing and evaluating company databases, and anticipating future environmental
compliance initiatives. NCR had to look at all the
options to identify their parts, modules and products
for RoHS compliance. A material data management
process is discussed including part number modifications and new vendor documentation such as material
10
declaration sheets, product identifications, and certificates of compliance. How NCR identified parts and
products as part of a documented “due diligence” initiative is discussed as well as the research and understanding of the legal requirements, enforcement and
exemptions of this new Directive.
2.0 Overview of NCR Policy
and Intentions
It is NCR’s intention to be fully compliant with the
new European Union Directive on the Restriction of
Hazardous Substances (RoHS) introduced on July 1,
2006. RoHS restricts the use of certain hazardous substances in electrical and electronic equipment that
could be considered harmful to future environment.
Many of the actions taken by NCR required significant
investment, time and effort. Customers are assured that
all products and services purchased from NCR are environmentally safe and comply with the European Union
RoHS Directive.
NCR is working with its suppliers to ensure only
compliant parts are provided. NCR suppliers’ processes
were modified to ensure all Teradata products “put on
the market” after July 1 were totally compliant in the
EU. NCR maintenance processes are being modified to
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ensure RoHS compliant units are serviced using only
RoHS compliant spare parts.
NCR has a documented and auditable process to
ensure that its products are shipped and maintained as
compliant. One of the important effects of this process
was that all NCR Teradata Product ID numbers were
changed to denote they are compliant to easily differentiate them from existing products.
3.0 The Design for the
Environmental Landscape
NCR products shipped to the EU after July 1, 2006
will not contain banned substances and will be serviced
and maintained as RoHS compliant. The RoHS
Directive 2002/95/EC was passed in 2003 and became
effective July 1, 2006 for all Electrical and Electronic
Equipment as defined in the Directive. Table 1 shows a
glimpse of the upcoming regulations facing the industry for the next 2.5 years.
Other future environmental requirements are forthcoming which will need to be incorporated into this
DfE Landscape, such as (Energy using Products) EuP
Directive 2005/32/EC as they become available. DfE
(Design for Environment) is a set of engineering principles to incorporate environmental attributes into
Table 1 Future Environmental Legislations
continued page 12
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A DVA N C I N G
MICROELECTRONICS
continued from page 11
product design, manufacture, use, service and return.
There are two goals to the DfE program. The first goal
is to comply with all environmental regulations that
apply to energy using products. The second goal is to
increase the number of environmentally preferable
attributes in the products through innovative design
and by promoting responsible environmental management by the suppliers.
4.0 Understanding the Impact on the
Business
NCR realized that it could not sell its non-compliant
products in the EU after July 1 2006, but the full impact
of RoHS on the business units was underestimated in
terms of manpower, time and cost. A cost of $2.6M
solely for Teradata was totaled for the past 18 months
ending July 1. A Teradata retiree was brought back from
retirement to help with the unexpected workload. This
total of $2.6M was only for one business unit of the six
divisions within NCR.
In early January 2005, a major supplier presented a
comprehensive RoHS picture and plan to scrub every
component in our products, and stated the necessity of
contacting every supplier to determine if they had any
of the six toxic materials in each part. The supplier submitted a $500K bid to perform the RoHS work solely to
scrub the Teradata PWBA (Printed Wired Board
Assembly) boards.
Due to the cost, Teradata Engineering decided to do
the work itself and worked on more than 1000 parts for
RoHS compliance. Also, supplier processes in manufacturing had to be modified to implement the new RoHS
transition. The Teradata RoHS Team decided that RoHS
compliant products will be identified by new class
numbers with all new part and assembly numbers. In
order to use up all the remaining inventory, non-RoHS
numbers will continue to be orderable in the rest of the
world.
5.0 How NCR Organized for the
RoHS Effort and the Impact on
the NCR Business
In early 2003, an NCR task force from all six NCR
divisions was formed to work on the WEEE Directive
which was completed in August 2005. Soon afterward
another task force team was formed to work on the
RoHS Directive. A new team leader was appointed in
early 2005 to guide the divisions toward achieving
RoHS compliance. NCR employs less than 30,000 people and is organized into six business units. Five of the
six units were directly impacted by RoHS.
Representatives from each of the business units were
chosen and team meetings were scheduled to work on
this new environmental directive from Europe. Each of
the business units in turn developed its own cross functional RoHS team comprised of members from all
affected departments.
The corporate team leader quickly set up teleconference meetings every two weeks to address RoHS concerns and issues. He wrote up the list of action items
with the selected persons to work the issues. He prioritized and tracked the action items until they were
closed. It was not obvious in late 2004 what resources,
time and work effort was necessary for this RoHS project. In early 2005, the full impact of the RoHS Directive
12
was realized after a major supplier presented its view
and perspective on the RoHS Directive.
6.0 Developing the NCR Processes
for RoHS
From the biweekly teleconferences emerged the corporate RoHS compliance process consisting of the following four main functional areas, which were incorporated into each business unit’s product development
and release processes:
1 – Engineering Design and Documentation
2 – Supplier Management
3 – Product Order Ability
4 – QA and Compliance
Development of Products is performed using the
Teradata development process. This process now incorporates the RoHS Directive which begins with the
Engineering and relevant design documentation, and
the product specification describing the product design
parameters. The Engineering documentation is then
used by SLM (Supply Line Management) to select or
approve a RoHS-compliant supplier that can deliver
RoHS-compliant components and compliance certifications for their parts to NCR. All evidence of compliance, supplier compliance certificates, audit reports,
web sites, etc. is stored in a central repository database
for ease of access, logistics, recordkeeping and audit
trails. As product compliance progresses, its product
features are defined and entered into GSDB (Global
Services Data Base) by Product Management. Features
are flagged compliant when all its components are
RoHS compliant. Otherwise it is flagged as non-compliant. Once all the product’s features are compliant,
the product is marked as compliant in GSDB, and
released to the EU countries. The released product, as
part of its release documentation, will have a formal
Product Declaration of Conformance certificate that
certifies that the product also adheres to the RoHS
Directive, as well as other EU directives for EMI and
Product Safety.
Teradata engineering added the RoHS procedures to
the existing Engineering Compliance process for EMI
and Product Safety as illustrated in Table 2.
7.0 Defining RoHS Terms and Conditions
A representative from the NCR Law Department, a
part of the corporate team, researched the terms and
conditions of the RoHS Directive. A good example of
the extensive research is illustrated in the questions
below, where the legal definition for “put on the market” was researched for interpretation and clarity.
Q What does the term “put on the market” mean? The
RoHS term “put on the market” refers to each individual product, not a product type or class. This term
refers to the initial action of making a product available
for the first time on the Community market.
Q When is a product made available for the first time?
A product is made available when it is transferred from
the stage of manufacture with the intention of distribution/use in the EC market.
Q When is a product transferred from the stage of manufacture? A product is transferred when a physical handover or transfer of ownership has taken place from the
manufacturer to an EU importer or distributor or from
the manufacturer to the final EU consumer or end user.
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Transfer can be for payment, free of charge, sale, loan,
hire, leasing, gift or the result of any other kind of legal
instrument.
Q When does physical transfer occur? Physical handover or transfer of ownership takes place in any of the
following scenarios: a) when title and risk of loss has
passed from NCR to the distributor or end user customer (typically upon delivery to customer); b) in bill
and hold sales where title and risk of loss pass upon
delivery to warehouse; c) upon delivery to a distributor
or end user customer; d) where physical handover has
occurred, but title and risk of loss have not yet passed;
e) for NCR-branded products, the physical handover or
transfer of ownership generally takes place from the
applicable NCR country/sales subsidiary to the distributor or end user customer.
Q When is a product not “put on the market”? A product is “not” put on the market for the following reasons: a) transferred to a manufacturer for further measures (assembling, packaging, processing, labeling); b)
not yet granted release for free circulation by customs;
c) has been placed under another customs procedure
(transit, warehousing or temporary importation); d) is
in a free zone; e) manufactured in a Member State with
a view to exporting it to a non EC-country; f) displayed
at trade fairs, exhibitions or demonstrations; g) is in the
Table 2 Engineering Compliance Process
stocks of the manufacturer; h) is with the authorized
representative in the community.
When title passes from one NCR entity to another
NCR EU entity (distributor), the product may be con-
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sidered “put on the market” when it can be demonstrated that the receiving NCR EU entity is genuinely
distributing the goods. Physical handover does not take
place merely because a product is shipped. There must
be a legal instrument for transfer of a product to be
deemed “put on the market” upon shipment.
Otherwise, the physical handover will occur upon
delivery.
In regard to third party products NCR is reselling,
physical handover or transfer of ownership will take
place in the following scenarios: a) when title and risk
of loss has passed from the third party supplier to NCR;
b) upon delivery to NCR, physical handover has
occurred but title and risk of loss have not yet passed.
In all cases, products must be granted release for free
circulation in the EU by customs to be “put on the market.” Imported products cannot be “put on the market”
prior to the time they clear customs.
8.0 Developing the Strategy to Manage
the Transition from Non-compliance to
Compliance
NCR had to review all parts, components, assemblies, PWBAs, sheet metal and cabinet designs that
were in production and also new designs in development to insure compliance to the RoHS Directive. It
was decided by the Teradata RoHS Team to change part
numbers to quickly identify RoHS-compliant parts,
making it easier to find RoHS parts, by visually seeing
them in the BoM (Bill of Material). The following table
illustrates how the unique RoHS part numbers were
assigned according to this special Teradata procedure to
clearly identify all RoHS compliant parts.
Table 3 NCR Progress Chart of Business Units
14
Parts (components, single items, etc.)
Fully RoHS Compliant —-> 007-998xxxx
Compliant / Exempt —-> 007-997xxxx
Non-Compliant —-> 007-996xxxx or others
Assemblies (modules, PWBAs, sub-assemblies)
Fully RoHS Compliant —-> 315-060xxxx
Compliant / Exempt —-> 315-059xxxx
Non-Compliant —-> 315-058xxxx or lower
All parts and assemblies were verified conforming to
the RoHS Directive by engineers and special RoHS part
numbers assigned after they were confirmed. Product
Engineering reviewed designs in their development
cycle. The manager of Product Engineering reviewed,
approved, and released the engineering bill of materials
verifying that engineering had selected all RoHS parts.
The progress of each of the business units was measured monthly for the past year. Since a single component can hold back a product from being RoHS compliant, it was only in March 2005 that real progress could
be seen as illustrated in Table 3.
Teradata had a few major suppliers that were not
RoHS compliant until the very last month of June.
Teradata worked with several major suppliers on their
RoHS products. Some suppliers came out with entirely
new lines of RoHS products in June 2006 that replaced
their old products. To meet the schedules, Teradata
held biweekly meetings with suppliers, like the UPS
vendor, to track their RoHS progress in converting their
UPS components.
All Teradata products follow the Corporate Process
which requires issuing a NCR RoHS CoC for each NCR
system product, and also requires obtaining a
Certificate of Conformity or equivalent evidence from
all NCR suppliers. Suppliers must provide RoHS-compliant parts and provide documentation of their RoHS
compliance by a CoC or equivalent proof. In early
2005, NCR developed its own supplier RoHS survey
form and questionnaire complete with CoC to be filled
out by suppliers. NCR now uses the Industry’s forms:
IPC 1751/2 standard forms for Material Declaration and
ERA audit forms. On a periodic time basis, the list of
suppliers must be reviewed and verification obtained to
confirm RoHS compliance. Supplier audits are to be
performed by NCR Business Operations to verify suppliers’ RoHS compliance. The intent is for SLM to
ensure that suppliers are delivering compliant parts and
assemblies on an ongoing, continuous basis.
In addition, a central repository for all supplier documentation and CoC has been set up at the corporate
level to contain all RoHS documentation and to eliminate needless duplication of suppliers from the
Business units.
In Teradata, the Engineering Compliance Process is
the document that provides the high level guidance to
ensure products designed and released by Teradata are
RoHS compliant. This Compliance Process and the
other process documents provide the “paper trail” for
defining RoHS compliance as a requirement. At issue is
whether there are enough controls in place to ensure
that those requirements will be met. On a day-to-day
basis, engineers do not refer to process documents
when performing their jobs. They use specific tools,
forms and templates to design, develop and release
products. The question is whether those tools, forms
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and templates have enough safeguards built in to
ensure products will be compliant. Table 4 is a summary of the Control Plan Overview for Teradata Process
Control.
9.0 Developing a Logistics Model to
Support the Transition for Spare Parts,
Old Inventory, Refurbished Units, and
Outsourced Products
The RoHS Directive applies to Electrical and
Electronic Equipment and covers the products engineered and/or marketed by the Teradata Business Unit.
This Directive applies to the design of new products as
well as equipment purchased from Original Equipment
Manufacturers and Third Party Products for incorporation in new products or redesign of existing products
for sale by NCR.
To simplify the RoHS identification of Teradata
products, the team decided to change the Class numbers and not the model numbers of all Teradata products. The class number is like a family of similar products, whereas the model number represents the actual
configuration, the exact hardware BoM for the product.
Teradata products are typically large Data Warehouse
computer cabinets as shown in Figure 1.
Table 4 Overview of the Process Control Plan
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non-compliant parts and assemblies. Non-compliant
spare parts may be used to expand the capacity or
upgrade products “put on the market” before July 1,
only if the concerned equipment is not subsequently
“put on the market” as a new product.
Q How do third-party parts or kits installed after shipment but prior to or during installation affect the “put on
the market” determination? If the physical handover or
transfer of ownership of a finished product has taken
place prior to July 1, 2006, then that unit should be
considered “put on the market.” Servicing and/or
upgrade of the product can be made with non-RoHS
compliant parts or assemblies. If the unit cannot be
considered a “finished product” without incorporation
of the third-party part or kit, then the unit will not be
“put on the market” until such time that the product is
complete and a physical handover or transfer has
occurred.
10.0 Evaluating and Selecting Tools to
Assist in the Transition to Compliance
Figure 1 NCR Teradata Data Warehouse System
In order to be assigned a RoHS Class number, every
part, component, subassembly, module, sheet metal
must first have been verified as being RoHS compliant.
All existing NCR equipment in the EU before July 1,
2006 is non-RoHS, but can still be repaired, serviced,
and upgraded with non-RoHS parts. The Teradata global strategy is to use up all the inventory of non-RoHS
parts and phase in all new RoHS parts as cost and logistics allow with the goal of shipping only RoHS-compliant products to the world market. New RoHS “finished
products” will be shipped to EU countries. Whereas
non-RoHS service parts will be shipped to non-EU
countries and to only non-RoHS systems in the EU
until all the non-RoHS inventory of service parts is used
up.
The following questions and answers are good illustrative examples of the topics that surfaced during the
biweekly meetings:
Q Can used and/or refurbished products be resold after
July 1, 2006 if they are not RoHS compliant? The RoHS
Directive does not apply to the reuse of products put on
the EU market before July 1, 2006. A product first put
on the market in the EU before July 1, 2006 can be
resold “as is” or refurbished with non-compliant parts
and resold after July 1, 2006, provided that the unit is
being sold only as used or refurbished equipment. Used
or refurbished products imported into the EU for the
first time after July 1, 2006 must be RoHS compliant.
Q Must spare parts used to service and/or repair units
after July 1, 2006 be RoHS compliant? It depends when
the unit being serviced or repaired was first put on the
market. Products put on the market after July 1, may
only be serviced, repaired, and/or upgraded with RoHS
compliant parts and assemblies.
Products “put on the market” before July 1, may be
serviced, repaired, and/or upgraded with compliant or
16
The first rough cut of totaling the number of
Teradata parts impacted by RoHS was approximately
46,000 parts. Many parts were duplications as they
were used in other similar products. Microsoft Excel
was used to total up all the parts and components, but
Excel proved to be too slow. The in-house Teradata
database programs: PCMS (Purchased Commodity
Management System) and EPIC (Engineering Product
Information Center) were the sources used to extract
the data and Excel was used to massage the data for
tracking part compliance. This showed that a new software database tool will be necessary to flag and store
the required RoHS designators. To track progress, each
of the business units was monitored by the corporate
team using a tracking tool as shown in table 5 that was
updated monthly. A master chart combined all these
business unit tables for a PowerPoint presentation each
month.
11.0 Evaluating Technical concerns
Associated with RoHS – such as “Tin
Whiskers”
Early in the RoHS transition there was a real concern about the reliability of the solder joints without
using lead. The military had investigated lead-free solder and found the growth of “tin whiskers” could cause
a short between adjacent conductors on a PWBA board.
The industry had evaluated many alternatives and has
found a number of options to mitigate the problem of
long term reliability concerns in the commercial world.
The EU has granted an exemption for the next four
years for “lead in solder” in certain applications, such
as servers and storage. This was an important exemption for NCR and some of the suppliers in meeting the
July 1milestone.
12.0 Developing RoHS Process
Preparations for Audits and On-going
Supplier Compliance
In order to ensure on-going supplier compliance,
suppliers must provide RoHS-compliant parts and documentation of their RoHS compliance by a CoC
(Certificate of Compliance) or equivalent proof. RoHS
compliance for a supplier requires the following: a)
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develop manufacturing and material handling processes and procedures that are compliant with the EU
Directive RoHS 2002/95/EC; b) ensure that process
materials and chemicals used in the controlled manufacturing processes are compliant with the RoHS
Directive.
To verify internal compliance to RoHS, as well as
EMI, Product Safety regulations and/or agency accreditations, internal audits are held periodically by the
Quality Analyst within Teradata. ISO audits are performed by an external service contracted by the
Teradata Quality group. In some cases it may be necessary to test and/or verify the impact of manufacturing
variations on product compliance and assure continued
compliance over the product’s lifetime. RoHS-compliance audits for suppliers are performed by Business
Operations as defined under the Supplier Management
section in the NCR Corporate Process document on a
periodic time basis. The process controls are periodically audited to assure the original process quality and
integrity.
Conformance is more than simply testing one product during development or early production, and
declaring all subsequent production units compliant.
Most regulatory agencies require retest or verification
as part of an ongoing conformance program. This
requirement can be met by testing new production
samples as products are enhanced and upgraded. The
engineering processes must be audited by the Quality
Analyst to verify that the proper procedures are being
followed to ensure the quality and integrity of the
processes and conformance to the global regulations
and requirements. In order to check and/or verify compliance, there are several Teradata on-line databases
that list the part numbers including parameters and
designations in the Teradata PCMS and EPIC databases, and the Product Identification “PID” in the corporate GSDB database.
In preparation for a RoHS audit, the Teradata engineering process documents are being updated to provide a paper trail to support the massive one-time work
effort, to scrub the parts lists and BoM to ensure new
products being sold to the EU contain RoHS-compliant
materials. However, this is different from what is collected on an ongoing basis to show that products have
been designed, developed and released in compliance
with the RoHS Directive. A major requirement of an
ongoing audit trail is the collection of evidence to show
“due diligence” that the supplier is continuously verifying compliance on a periodic basis as documented in
the process.
A DoC (Declaration of Compliance) certificate that
is used for EMI and Product Safety certification has
been modified to include the RoHS certification.
Certificates relative to existing products have been
updated and signed by an officer of the company. This
shows that management has confirmed that processes
are in place to ensure RoHS compliance.
In the NCR Corporate GSDB (Global Services Data
Base), the following are some of the symbols used to
flag and indicate the various RoHS levels:
CMP ==> (Compliant)
NCE ==> (Non-Compliant with Exemption)
TRN ==> (Transitioned)
NA ==> (Not Applicable)
Table 5 Tracking Tool for Teradata Compliance
NCM ==> (Non-Compliant)
UPG ==> (Kit or Cable) with Conditionally
Orderable Reason Code of “RO”
In addition, a Central Repository for all supplier
documentation and Certificates of Conformity is set up
at the corporate level to contain all the RoHS documentation and to eliminate duplicate suppliers from all
the Business units.
In July, an internal audit on the Teradata business
unit revealed some “gaps” in the RoHS compliance
process. These gaps were solely within the internal
Teradata process and steps being taken to eliminate
them. Figure 2 shows page 1 of the internal assessment
cover.
13.0 RoHS Training Course Available
In order to make new people aware of the RoHS
requirements and to properly train and prepare personnel, appropriate RoHS training was necessary. This
course provides an overview and describes the detailed
implementation impacts of the Restriction on
Hazardous Substances (RoHS) Directive put into effect
in the European Union as of July 1, 2006. It is designed
to provide NCR Field Service and all support personnel
with the knowledge and information required in their
job responsibilities to be aware of and adhere to these
new legal requirements.
14.0 Future Considerations –
Lessons Learned and How to be
Proactive Next Time
One of the lessons learned was that better database
tools are needed to capture and massage the data and
scope the magnitude of the problem. The first estimate
of parts impacted was approximately 46,000 parts, but
there were many obsolete parts, end-of-life parts, nonapplicable parts, and duplications used in similar products. Microsoft Excel was used to total all parts, but
proved to be so slow that it was unusable on very large
databases. The other in-house database programs EPIC
and PCMS were not set up to capture the appropriate
parts data and massage it, or attach and store all the
supplier verification data.
continued page 18
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Therefore, a new software database tool will be necessary to capture large blocks of data and massage it. It
may also be necessary to flag and store the necessary
designators for countries and/or States in the United
States, and to anticipate the impact of future environmental compliance laws and initiatives, such as shown
in table 1. A database program called “Merlin” looks
promising and could be implemented in the future to
supplement or replace the existing EPIC and PCMS
database programs.
As a side observation, it was interesting to find that
transitioning the Teradata products to RoHS did not
impact the EMI test certifications, probably because the
engineering designs were not impacted.
References
1. Fleming, J., “RoHS Compliance Status – Teradata,” NCR
Corporation, June 26, 2006.
2. Mahsoub, M., “NCR Corporate Product Compliance Process,” July
14, 2006.
3. Jonathan J., “Put on the Market,” NCR Corporation, February 2,
2006.
4. Celio, J., “NCR Assessment Report,” NCR Corporation, July 10,
2006.
5. Rostek, P., “Engineering Compliance Process,” NCR Corporation,
June 30, 2006.
Figure 2 Cover Sheet of Internal Audit Report
IMAPS 2007
San Jose
Historic
Winchester House
photo courtesy of the San Jose Convention & Visitors Bureau
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FEATURE
ARTICLE
A
3-D Computer
Module Study
Don Hayashigawa, NxGEN Electronics Inc., 9771 Clairemont Mesa Blvd.,
San Diego, CA 92124, donh@NxGENelectronics.com, 858-309-6610 ext 3014
Introduction
The current trend in military space electronics is to
utilize the latest COTS (Commercial-Off-The-Shelf)
technology in such a way that they can still meet the
demanding requirements of the target application,
including low cost, small form factor, conduction cooling, high reliability and functional performance. A
major building block in a missile application is the
microcomputer, whose “main purpose is to accept the
digitized spectral information from the sensors, process
the information so that the ‘target’ can be discriminated
from ‘non-targets’ and generate signals for the missile
control and payload systems to turn towards the target…” 1. The subject of this paper is the development
of the preliminary package design for a 3-D microcomputer module intended for this purpose.
The preliminary requirements and specifications for
the module were determined with the customer. A
block diagram was initially generated and subsequently modified by the customer, as shown in figure 1
below.
Abstract
This paper outlines a study for the development of a small
form-factor 3D-Microcomputer Module for a military
application, based on COTS devices. The process, from
establishing the module functional requirements to the
development and analysis of a preliminary package
design, will be examined. The main discussion will center
on how the mechanical, electrical and thermal requirements can be met by adopting different packaging strategies, including CSP stacking, rigid-flex PCB, embedded
passives, low profile components and a novel heat sink
design. Finally, the results of the analyses done to validate
this system-in-package design will be presented.
• Dual Core 8641D CPU Up to 1.5 GHz
w/Altivek
• 466 MHz DDR2 SDRAM Up to 1 GB
• Dual Core version has 2 DDR Interfaces 64MB
to 512MB
• 4X 2.5 GHz PCI Express (PCIe) Interfaces
• 4X 3.125 GHz Serial Rapid IO (SRIO)
Interfaces
• 4X GBE Interfaces
• Up to 512 MB (NAND) Flash Boot Memory
• FPGA based Quad 3.125 GHz Rocket I/O
Interfaces
• Two Local Bus Interfaces to CPLD and FPGA
• Dual DS 1772 Thermal Sensors
Some of the environmental requirements include
the following:
• Operating Temperature Range: -40 to +85ºC
• Non-operating Temperature Range: -55 to
+105ºC
• Vibration: VITA 47 Level V3
• Shock: 40g, 11 millisecond half-sine
Package Design
Figure 1. Block Diagram
The key features required to meet the computing
and communications requirements and specifications
of the target application included the following:
• Size: 2.4 “ x 2.4” x .35”
• Weight: .2 LBS
• ~1080 ball outs
20
The package design developed for the above
requirements is depicted in the 3-dimensional view of
figures 3. and the side view of figure 4. Standard packaging for the CPU and the FPGA was selected due to
the high cost and unavailability of fully tested bare die.
In order to maintain the footprint size, it was necessary
that the CPU and the FPGA be in some way mounted
one over the other. One method for doing so is through
the use of a flex substrate on which the FPGA and CPU
are mounted on separate rigid substrates. Because the
CPU dissipates the most power, it was located on the
upper substrate in direct contact with the coldplate,
while the FPGA was mounted below. For reasons of
minimizing real estate and minimizing trace lengths,
the CPLD and memory were placed on the same rigid
substrate as the CPU. The CPLD is again assumed to be
a COTS packaged device and placed on top, while the
flash and DRAM are located on the opposite side of the
CPU. The package I/O are implemented as an array of
solder balls on 1 mm pitch.
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Figure 2: Model of 3-D Microcomputer Module
Figure 3: Side View of Model of 3-D Microcomputer Module
(Heat sink removed for visibility)
One unique feature of this package is the folded
copper heatsink which wraps around the upper substrate and is used to conduct heat from the top surface
of the FPGA to the coldplate. In many military space
applications, there is no available airflow and the motherboard is usually running at a fairly-elevated temperature, so the coldplate was assumed to be the only
source for cooling of the module.
The side view of figure 4 shows the DRAM and flash
memory implemented as Tessera µZ-ball Stacks TM.2 A
more detailed view of such a stack with its basic construction is shown in figure 5. In this technology,
wafers are obtained from various DRAM manufacturers
and thinned down from 150 microns to as low as 75
microns. The die are then placed face down and
attached to a flex substrate using a compliant adhesive.
The compliant adhesive acts to mechanically decouple
the low-CTE die from the higher-CTE PCB on which
the stack is mounted and provides inherent reliability
to the stack.
The substrate has a slot running down the middle of
it, which reveals the center row of bond pads of the
attached DRAM die. The assembly is then flipped over
and DRAM bond pads are wirebonded through the slot
up to the substrate bond pads. The bond pads are then
connected via traces to rows of solder ball pads on each
side of the substrate. The wirebonds are encapsulated
and solder balls are then reflowed onto the solder pads.
The layers can then be stacked and reflowed to create
the final assembly.
Wafer probed memory die are becoming available
through manufacturers such as Micron, Samsung and
others. In addition, each stack layer can be further tested as an individual CSP prior to final assembly. This
greatly enhances the overall yield of the stack. Thus,
although not strictly COTS, memory stacks are inherently cost-effective, reliable and small-form factor components, which are ideally suited for applications such
as this.
With regard to the rigid-flex substrate, it is assumed
that as many as 16 layers might be required. The side
view in figure 4, shows flex connections on either side
of the substrate. On the right side, two flex cables are
shown connecting the upper and lower sections, but up
to 4 is possible. The maximum allowable number of
flex connections between rigid sections is critical to
assuring not only sufficient signal interconnect, but
also power ground plane integrity. On the left side of
figure 4 is another flex connection, which would be
achieved after the assembly is folded. This connection
could be achieved through a spot soldering operation
or an ACA (anisotropic conductive adhesive) attachment.
There are clearly many passive components which
would be required for a functional microcomputer
including high-frequency and low-frequency bypass
capacitors, bias and termination resistors and frequency control capacitors. Termination resistors can be
embedded into the substrate using Ohmega-PlyTM
resistors, while high-frequency bypass capacitance can
be achieved through buried capacitive layers. Low frequency bypass capacitors tend to have a large footprint
as well as being high-profile. However, some capacitors
have recently become available which have fairly high
capacitances (10ufd) and low profile (~.5 mm).
Other key issues are shock and vibration requirements. The component as designed does appear to meet
the weight specifications, however, to meet the vibration and shock requirements, it appears that some form
of mechanical restraint would be required. The simplest
approach would be to bolt the heatsink to the PCB
through holes drilled in the heatsink.
Thermal Analysis:
From the 3-D model, a FEM thermal analysis was
conducted using SolidWorks COSMOS. The following
power assumptions were made for the various components.
Table 1: Component Power Dissipations
Figure 4: Detailed View of 2-Layer ìZ-ball Stack TM
The cold plate was set arbitrarily at 25ºC and it was
assumed that it was in direct contact with the FPGA
die. If the maximum junction temperature is assumed
to be 115 ºC, then the maximum allowable delta
between junction and the cold plate would be 30 ºC,
continued page 22
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given the maximum cold plate temperature of 85 ºC.
The results from the thermal analysis indicates a temperature rise of 6 ºC, which is probably a little overly
optimistic as the die was assumed to be the same size as
the FPGA package. Still, a temperature rise over 10 ºC
would not be expected. The lower DRAM die on the
stack packages runs the hottest with a cold-plate-tojunction temperature of 20 ºC. It should be noted that
the stacks were modeled with a thermally conductive
material bonding the stacks together. The assumptions
for the DRAM die dissipation were given by the customer, however, it is likely that the DDR2 die will run
significantly cooler.
Conclusion:
A preliminary package design for a 3D microcomputer module targeted for a demanding military space
application was completed. This design incorporates a
novel heatsink design, a rigid-flex substrate, buried/low
profile passive components and µZ-ball Stacks TM components. A simplified thermal analysis indicates that
the module should meet the thermal requirements. To
the extent possible, it appears that all the other specifications and requirements for this device are being met.
The other tasks required to complete the development include: rad- hard design, electrical analysis, preliminary layout, final analyses, final design and development of a functional prototype.
References
1. R. Czajkowski, SBIR Final Report (Contract HQ0006-05-C7-190),
“3D Computer Module, NxGen Electronics Inc.,” 2006.
2. Vern Solberg, Ignacio Osorio, and Jeffrey Demmin, Tessera, “Ball
Stack Packaging for High Performance Memory,” Tessera Inc.,
SMTA International, September, 2003.
Figure 5
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Foundation Focus
Focus and Initiatives of The
Microelectronics Foundation
Talent and innovation are critical to the industry’s
and Foundation’s success. New programs and innovative projects including research will drive the
Foundation. Collaboration is always better than competition, whether within an industrial context or with
several universities. The Foundation can offer not only
human capital resources but funding resources for
those projects.
What is the Goal?
The goal is to attract the best and brightest to the
Microelectronics industry by making Microelectronics
a visible and exciting field of endeavor. Programs to
accomplish this goal are designed to create greater
awareness, develop future industry leaders and create a
funding source to support their education.
Developing Future Leaders
•
•
•
Train teachers of gifted and talented students with
an emphasis on increasing exposure to and appreciation of microelectronics, blended classroom
learning strategies, plus web-based learning tools,
and conventional teacher presentations.
A high school outreach program is starting,
focused on microelectronics careers/jobs, with
direction given by IMAPS retirees, interested volunteers and retired executives. If you have the
time, the interest and the passion to help, we need
you.
A high school curriculum or enhancement to the
curriculum program — a comprehensive, integrated view of what comprises a microelectronics program — is now in formation with ASU and
University of Kentucky.
•
Begin a university intern work program to achieve
goals of greater awareness of microelectronics and
collaboration with corporate donors. Does your
company have an intern program? Contact us and
we will help you set one up.
Creating a Funding Source Named Awards
The Microelectronics Foundation is setting up new
grants, awards and scholarships to fund and develop
the talent we find. The Foundation is eager to work
with your company and its philanthropic department
on exciting new programs that will enhance the
Microelectronics industry. In nearly all cases, the company or group of contributors that fund the award will
name the award, such as the Sidney J. Stein Award for
Graduate Studies or the Motorola Innovation & Design
Competition.
Awards and Grants are conferred annually to
encourage the study of theory and application of microelectronics and microelectronic packaging by university and college students and practitioners.
Scholarships are conferred annually to encourage
the study of Microelectronics and Microelectronics
Packaging. Multiple-year scholarships for the innovators that industry needs will be designed to provide
funding through college into graduate school.
To get involved, contact Jim Drehle, jdrehle@microelectronicsfoundation.org
James R. Drehle,
Robert Lloyd & Associates
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FEATURE
ARTICLE
N
ext Generation
Multilayer
Dielectrics for
High Reliability
Multilayer
Hybrid Circuits
Stefan Flick, Annette Kipka, Heraeus TFD, Hanau, Germany,
stefan.flick@heraeus.com, +49-6181-354935
David Malanga, Heraeus TFD, West Conshohocken, PA
david.malanga@heraeus.com, +1-610-825-6050
Abstract
As the core in a multilayer build-up the dielectric plays an
important role in preventing resistors from cracking or
chipping provoked by the heat of the laser beam. State-ofthe-art dielectrics must be able to handle the stringent
requirements of wirebond and solder pads. Cost is also
paramount in the electronics industry so a new dielectric
must be cost effective. A dielectric that uses only a 2layer-build-up and low total thickness but still provides
high insulation and high breakdown voltage is a cost effective solution.
These requirements are extremely important in automotive, medical, and power electronic applications which
require cost effective alternatives with ever increasing
stringent demands. An environmentally-friendly dielectric
has been developed which addresses actual and future
expectations in terms of RoHS and ELV legislation. This
paper will present a new lead, cadmium and phthalatefree dielectric which meets the strict requirements of
today’s multilayer hybrid circuits. Performance data will
be presented on electrical and mechanical performance, as
well as compatibility with resistors and other RoHS-compliant conductors.
Key words: Hybrid, Dielectric, Break Down Voltage,
Adhesion, Chip-Off, 2 Layer, Battery Effect
1. Motivation
Hybrid thick film circuits are comprised of conductive and dielectric layers on top of a substrate which is
typically 96% alumina. The chemical inertness at higher working temperatures, high frequency properties
and a remarkable insulation resistance of Al2O3 (~1012
to 1015 Ohm*cm), supplemented by good thermal conductivity offers a safe and flat platform for electronic
circuits. High batch-to-batch consistency in smoothness and geometry ensures a high yield during build-up
of circuitry, population and mounting which balances
out higher material costs compared to PCB.
Highly integrated double-sided circuits with buried
power tracks and thermo-mechanical shock stability
are typical requirements of harsh environments like
under-the-hood applications for car components.
To achieve a higher level of integration, multilayer
hybrid circuits use dielectric layers to insulate stacked
conductor tracks. Conductors, via fills, resistors and
dielectric layers are applied by screen printing, drying
and firing at 500 – 850°C of each consecutive layer.
Thick film resistors can be realized between 0.1Ohm to
100Mohm, and high precision and reliability can be
achieved by laser trimming [1],[2]. Through holes
(conductor through the substrate to connect the front
with the back side) and multilayer build-up offer a freedom in design and high integration density for population with passive and active components.
Typical fields of application are motor and gearbox
management, air flow meters, airbag igniters, as well as
high frequency, wireless communication devices.
Production of hybrid circuits is an inexpensive
process due to the time of development and undedicated equipment enabling short term modifications.
Hybrid technology offers the advantage of high reliabil-
24
ity over a long lifetime. However, ongoing pressure
from competing technologies forces hybrid manufacturers to increase integration density by increasing
functions on a smaller space at higher yields while minimizing tolerances. An increased demand on environmental sensitivity sets another task concerning material composition. To address these demands, W.C.
Heraeus has developed a new 850°C fireable multilayer
dielectric which is lead, cadmium, nickel and phthalate
free.
2. Demands on the new multilayer
dielectric
A new dielectric was developed in close cooperation
with customers to answer the increasing demands on
materials for hybrid circuits. These are:
•
Hermetic density in a two-layer, sequentially fired
build-up. Break down voltages of 500 V at 3540µm thickness as fired.
•
Increased printability for large area shielding on a
6x4” substrate. The likelihood of pinholes and
misprints increases by the 2nd order and can negatively influence hermeticity.
•
Optimized rheological properties, namely via resolution of 250µm or better in continuous production operation, prior requirements were only
350µm.
•
High migration stability during refirings in a
“mixed metal build-up.” Figure 1 shows a simple
build-up to test for battery effect:1 The bottom
electrode is silver and the top conductor is gold
which are insulated by the dielectric to be tested.
Each layer is printed, dried and fired sequentially
at 850°C in a 30 minute profile. The fired thickness of each metal layer should be kept low,
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around 12µm, to avoid other effects causing blisters. The dielectric layer typically is built up in 2
or 3 layers, resulting in a fired thickness of 30 –
40µm. Up to 12 refirings should be tested.
Figure 1: Mixed metal build-up to test for Battery Effect.
ing resistor and the trim spot. The difference in
thermal expansion of this very spot induces an
enormous pressure on the resistor and the dielectric underneath.
A new dielectric should be able to withstand this
thermal stress without chip-offs. Figures 3a and
3b show chip-offs after laser trimming of a large
area printed with R8931DCR. Resistors were
trimmed with a NdYAG-Laser with 0.8 to 1.2 W at
15 mm/s.
After trimming of resistors on the new dielectric
there is no critical chip-off in the trim cut. Figure 4
shows a light microscopic blow-up of trim cuts in
R8900 series. Resistors were printed on top of IP 9227
and as can be seen from the micrograph, no chip off is
evident.
1 Due to the high electrochemical potential between gold and silver, silver ions always migrate into the gold. The first generation
of dielectrics showed blisters under the gold layer from the first
refiring. This happens due to silver migration through the dielectric as Ag+ and O2- ions. Oxygen is present due to the firing in
air and the oxidizing character of the glazes in the layers.
Recombination of the Ag+ and its electrons in the interface
between gold and dielectric leave bubbles of oxygen during firing. Around the peak temperatures the softened dielectric acts as
an electrolyte as in a battery.
Figure 3a: Resistor R8931DCR with trim cuts, dielectric
printed on alumina. Chip-offs were counted on a trim cut
with a total length of 2 meters.
Figure 2: Battery effect after 3 firings. Bottom electrode:
Au, blue layer: dielectric, top electrode: Ag.
Figure 2 shows the surface of a test substrate after 3
firings. This dielectric does not prevent battery effect.
Independently whether gold is on top or printed as the
bottom electrode the bubbles will be formed at the gold
interface. After 3 refirings the dielectric and the top
electrode are lifted by blisters showing the pattern of
the bottom electrode. This is an unsuitable dielectric
for mixed metal multilayers.
•
Trimming of resistors printed on top of dielectric
can lead to “chip-off” in the form of shell-like
chipping of bigger chunks of resistor and glaze.
This leads to sudden changes of resistance and
causes imprecise online control of the trim
progress, which results in low accuracy.
Furthermore, cracks often begin in the chip-offs
and propagate throughout the resistor. This causes significant resistance drift over time. Due to the
high energy input of the laser beam there is a high
temperature gradient between the cold surround-
Figure 3b: Detail from Pic.3a. Chip-off.
A summary of the important requirements for a new
multilayer dielectric is shown in Table 1.
3. Developmental stages of the new
Multilayer Dielectric
As a basis for the new dielectric, a lead free composition in the system SiO2-B2O3-Al2O3-CaO was chosen
which matched the Thermal Coefficient of Expansion
(TCE) of Alumina. This glaze was blended with pig-
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ment and ceramic fillers. The fillers are a blend of alumina powders with different fineness of grind.
A new dye was developed with reinforced chemical
stability.
Some of the results of the experiments are shown in
Table II.
down voltage. A mixture of different kinds of Alumina
powders showed to be very helpful. The optimum was
found by the design of experiment method. On the
organic side, a new vehicle was formulated to meet the
required via resolution of 250µm. The vehicle is phthalate free to comply with current EU regulations.
While paste in series 1 still showed chip-off, the second set of formulations showed battery effect significantly after 3 refirings. Further work was needed to
meet the new requirements.
4. Properties of the new multilayer
dielectric
Figure 4: Laser trimmed resistor (R 8900 series) on top of
the new multilayer dielectric.
These experiments showed a strong dependency of
the dielectric’s properties on the content and grain size
of Al2O3. Chip-Off was greatly reduced by increasing
the content of Al2O3. But this had the undesirable
effect of also increasing the formation of pores and pinholes, which consequently negatively influenced break
Table I: Specifications for new dielectric.
Table II: Summary of initial paste trials.
26
Further development successfully led to a new
product, IP9227. The properties of this dielectric are
shown in Table III.
This data is benchmarked against the actual standard multilayer dielectric IP9117SB.
For adhesion tests the standard wire-peel-test was
completed by a shear test on a critical component, a
diode with plastic housing; type “DO 214” (Figure 5).
Due to the significant mismatch of the TCE of the
housing and the hybrid as the substrate this is a harsh
test for adhesion. Standard tests in the automotive
industry are “Temperature Shock Cycling” and “High
Temperature Storage” which reflect the under-the-hood
conditions over a car’s lifetime.
Shock cycling simulates a situation where either a
hot gear box hits a dump, filled with icy water or a very
cold winter day where the cold electronic devices
attached to the engine or gear box get hot in very short
term. Formation of moisture is a co-aspect of cycle testing because it is a driver for silver migration. Silver dendrites can grow between tracks which ends up in a
short cut. High temperature storage simulates operation temperatures in automatic gear boxes, where gear
box management is placed within the gear box housing.
Increased friction, as on a longer ride in a mountainous
region, or at high speed, the temperature in a gear box
easily reaches 150°C.
While High Temp. Storage is simply done in a conventional box oven, shock cycling requires special
equipment.
Between two isolated chambers where one is cold (40°C) and the opposite is hot (+150°C), a cage with the
test circuits cycles up and down. All phases of a full
cycle are controllable like change time between chambers as well as peak time to address the differences in
temperature leveling, e.g.; of a blank hybrid versus the
much bigger mass of a populated circuit within a sealed
box, filled with silicone gel. During the last years these
reliability tests have been modified several times in
duration and gradient.
Typically requested is performance data after 1000
cycles between –40°C and 150°C and 3000h storage
test at 150°C . Due to longer life time expectations of
the next model year with increasing horse power and
weight at less fuel consumption the operating temperatures of the power train have been risen constantly.
This has started a discussion to change test conditions
to an upper temperature of 170°C or 3000 cycles.
DO 214 type of housing is critical on hybrids due to
the inflexible termination and its bulk plastic housing
(sizes in mm). The TCE mismatch and the sudden
change in temperature between the two extremes in
seconds, provoke high shear forces on the solder joint.
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Figure 5: Drawing of DO 214. Bulk plastic housing and leads visible. Sizes in mm.
Additionally the direction of the stress input alternates
between tension and compression. As shown in Table
III the new multilayer dielectric shows significantly
better stability in terms of battery effect or chip-off.
Figure. 6 shows the results for the testing for the
battery effect after 12 refirings at 850°C. There is no
formation of bubbles visible. The electrodes are 12µm
thick, the thickness of the dielectric was measured to be
45µm.
Table III: Properties of new multilayer dielectric, IP9227.
Figure. 6: Battery-Effect-Test after 12 refirings at 850 °C.
No bubbles indicate sufficient electro-chemical stability.
5. Summary
The new dielectric answers current and future
demands of the automotive, medical, and power electronic applications for hybrid microcircuits. The
absence of battery effect in mixed metal multilayer,
improved laser trimmability of resistors along with a
high break down voltage on large areas in a cost saving
2-layer build-up are the key features of this new dielectric.
An environmentally-friendly lead, cadmium, nickel
and phthalate free dielectric has been developed which
addresses actual and future expectations in terms of
RoHS and ELV legislation.
Literature
[1] Siegert Electronic – Hybridschaltungen: www.siegert.de
[2] IPC “National Technology Roadmap for Electronic
Interconnections” 2002/2003. Part D – section 3 – Ceramic
Interconnecting Structures
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FEATURE
ARTICLE
E
mbedding a Thin
Polymer Voltage
ESD Suppressing
Core in a Chip
Package Offers
and Alternative
to on Chip ESD
Protection of
Sensitive High
Performance ICs
Used in Today’s
Cell Phones and
Computers
Abstract
Each year billions of dollars worth of electronics is damaged or made inoperable due to the effects of ElectroStatic-Discharge (ESD). As gate geometries of devices
shrink, making them more susceptible to being damaged
by even lower voltages, it is vital that a high speed low
capacitance means of protection be developed and implemented. Typically, designers have utilized diodes,
transsorbs, or surge protection devices to protect the electronics. These devices are expensive, take up valuable real
estate in the electronic assembly, and only provide a modicum of protection. This paper presents a new, disruptive
technology that offers the low capacitance levels needed
for today’s high speed applications, a reduced footprint to
facilitate the smaller product designs, and a faster switching speed that offers better ESD protection.
Karen Shrier, CEO, Electronic Polymers Inc., kshrier@electronicpolymers.com
Greg Caswell, VirTex Assembly Services, gregc@virtexassembly.com
Introduction:
Today’s computers, portable cell phones and commercial electronics have the potential to impact the
quality of our daily lives by the reliability of their performance. One of nature’s hidden threats to electronics
is electrostatic discharge (ESD). In extreme cases of
reliability we hear of batteries in computers exploding,
but now we are also becoming aware of the thousands
of hours that are lost each day due reliability issues
caused by ESD. ESD caused events trace back to reliability issues such as computers locking up and needing
to be re-booted, or worse yet, dying and needing to be
replaced as a result of ESD damage. Engineers are being
forced to sacrifice reliability for performance in the
competitive race to provide more features in less space.
By comparison, today’s cell phones have become one of
the most sophisticated electronic tools used by most of
the population worldwide. As we all know, there are
few cell phones that are simply a phone. Cell phones
support cameras, GPS Systems, video, and Internet
28
connections and there is no end in sight for the new
features envisioned. The drive for new features has
been supported by advances to 65nm CMOS chips and
GaAs chips which are far more sensitive to ESD than
their predecessors. In 2005 the National ESD
Association published a roadmap showing ESD sensitivity of CMOS chips has not only taken a huge nose
dive over the last five years, but also the map is predicting ESD sensitivity is going to get even worse
between now and 2010. [1] Due to the reduced geometries, ESD survivability in 1995 for Human Body Model
(HBM) ESD was at 2000 V, today, in 2006 HMB survivability has dropped to 200V, and is heading to less than
200V. [Figure 1].
Further exacerbating the ESD problem is the trend
toward pervasive use of laptop computers and portable
electronics, which led to the introduction in early 2000
of a system level ESD standard that anticipates the
amount of current a computer chip can be exposed to
at the system level, which is going to increase from
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HBM, worst case, of ~ 6 Amps to System Level Current
of ~ 30 Amps. The duration of the ESD event is
extremely short, typically less than 100 ns, but the
speed of System Level ESD is so fast that it can reach
8kV in 1 ns. In 2002, Scientific American published an
article written by an IBM expert of on-chip ESD design,
stating “Electrostatic discharges threaten to halt further
shrinking and acceleration of electronic devices in the
future,” indicating ESD protection on semiconductor
components is a barrier to Moore’s Law. [2] The key
problem is computer chip designers need low capacitance ESD protection structures on chips in order to
run at high frequencies without interfering with the
signal transmission. Since no cost effective solution has
been readily available to the Design Engineer, the only
alternative has been to trade reliability for performance.
It is estimated that 27-33% of customer returns are due
to ESD. [3] Putting a cost to field returns is difficult,
but in the case of portable electronics or cell phones,
assuming a cost of $12 for processing a cell phone field
return, for a 30% customer return rate, the estimate for
the 600 million phones sold in 2005 is over a billion
dollars. Taking the issue of ESD sensitivity of computer chips beyond cell phones to commercial electronics
such as laptops becomes a multibillion dollar field
return problem. Figure 2 shows the market drivers to
which an ESD solution needs to respond.
Technical Approach: Polymer Voltage
Suppressor Characteristics:
At Electronic Polymers Inc. we have developed EPIFLO™ ESD polymer voltage suppressors specifically for
ESD protection of computer chips. The initial product
developed was a standard footprint 0402 Surface
Mount component for protection of computer chips
from HBM and System Level ESD. The Surface Mount
component led to EPI-FLO™ Connector arrays capable
of multiple line ESD protection. [Figure 3]
The EPI-FLO™ polymer is manufactured as laminate panels, with the voltage sensing polymer sandwiched between copper sheets. Using standard printed
circuit board fabrication processes the laminate is transformed into either EPI-FLO™ Surface Mount
Components or Connector Arrays, for typical application use in protecting USB and Ethernet connectors.
Another application for the materials involves the
move to embedding EPI-FLO™ in the package of a
GaAs power amplifier which extends the through hole
via and etch processes developed for Surface Mount
Devices and Connector Arrays to embedding the etched
EPI-FLO™ laminate in a 4-layer Power Amplifier board.
[Figures 4, 5]
The EPI-FLO™ polymer uses nanotechnology and
contains materials to create a nanosecond voltage
switch that can withstand repeated ESD surges regardless of polarity. The product is placed in parallel to
ground, shunting ESD voltages to ground in picoseconds. Due to the inherently low capacitance of the
polymer, EPI-FLO™ products have low femto-farad
capacitance characteristics. The packaging flexibility of
the laminate allows embedding the EPI-FLO directly in
a chip package at costs that are typically economically
more attractive than on-chip or on the printed circuit
board ESD protection as shown in Figure 6. By embedding directly in the chip package, ESD protection is
Figure 1: CMOS ESD Sensitivity Forecast at < 200V in 2010
Figure 2: Market Drivers for Reduction of On-Chip ESD Protection
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based on square inches of material needed for protection providing both a cost effective and reliable solution for ESD protection of computers, consumer electronics and cell phones. For example, there are approximately 27 locations in a cell phone that require ESD
protection, ranging from Surface Mount and Connector
Arrays on the printed circuit board to embedded offchip protection. Laptop computers have even more
exposure.
Technical Advantages of EPI-FLO
Figure 3: SMT Component and USB Connector with Embedded Array
EPI-FLO is far superior to competing ESD solutions, with key technical features enabling:
•
Protection against high ESD events (up to 25 KV
more)
•
Protection against low ESD events (80V trigger
voltage)
•
Extremely fast response time (<100 pS)
•
Flexible form factor
•
Ultra-low profile (<5 mils)
•
Ultra-low capacitance (<250fF)
•
Ultra-low leakage current (100 nA at VDC = 12V)
•
Wide operating temperate range (-55ºC to +85ºC)
•
Embedded in the package allows pin-pin and pinto-ground protection
•
Ease of design in ESD protection off-chip
Test Protocols and Approach for ESD
Protection of Chips with and without
EPI-FLO™
Figures 4 and 5
30
At Electronic Polymers test protocols and test
equipment have been developed to enable thorough
evaluation of ESD protection of sensitive chips. We
have used our test methodologies to effectively examine the ability of various schemes to protect chips from
Human Body Model, Machine Model, Charged Device
Model, System Level ICE 61000-4-2, and the new
Cable Discharge Event ESD. To provide an effective
ESD solution we first determine the failure voltage of
the chip using the ESD standard specified; then, using
our Very Fast Transmission Line Pulser (TLP) shown
in Figure 7, we establish the turn on voltage that damages the chip. By comparison we also measure by testing with the Human Body Approach illustrated in
Figure 8.
The EPI-FLO materials are then specified and formulated to turn on at a lower voltage. The protection is
verified initially by building test fixtures and mounting
EPI-FLO surface mount 0402 units in front of the pins
to be protected. Protection is demonstrated by showing
the chip can survive multiple ESD hits as required by
the specification utilizing both positive and negative
pulses. Typically devices are most sensitive to negative
pulses. Failure of the chip is measured by a 10- 20%
change in leakage current under power as illustrated in
Figure 9.
Once the specification is determined art work is created for the multi-layer package with ESD protection.
The unique benefit of embedding the EPI-FLO directly
in the package is multiple protection of signal pins as
well as pin-to-pin combinations. As an example, in a 6
pin GaAs power amplifier, 6 pins and 21 pin combinations are ESD protected.
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Figure 6
Figure 7: Transmission Line Pulser Test Set-up
Figure 8: Human Body Model Test Set-up
Figure 9: Test Data Comparison
continued page 32
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continued from page 31
Following is data showing the EPI-FLO enhanced
ESD survivability of a GaAs cell phone Power Amplifier
to System Level ESD.
Figure 10, below, is a typical Voltage – Time trace
for a surface mount device that was used to protect a
GaAs cell phone switch that failed under power at 400V
IEC.
With the EPI-FLO surface mount device in parallel
to ground the switch took 50 ESD pulses before the
leakage increased by 20%.
Conclusion
A new technology is available for enhanced protection of electronics in computers or any other type of
electronic equipment that may see exposure to ESD.
This technology, due to its flexibility, can be utilized in
its basic form as a component, or in its embedded form
in either connectors or device packages. It will provide
a significant advantage to designers in that they will no
longer have to impact reliability to meet their smaller
form factor designs.
References:
[1] ESDA Association Technology Roadmap, http://www.esda.org/documents/ElectrostaticDischargeRoadmap-March42004—ESDA—
Final.pdf
[2] Steven H. Voldman IBM, Lightning Rods for Nanoelectronics,
October 2002, Scientific American.
[3] Karen Shrier, Tuyen Troung, and Jimmie Felps, “Transmission Line
Pulse Test Methods, Test Techniques and Characterization of Low
Capacitance Voltage Suppression Device for System Level
Electrostatic Discharge Compliance,” Proceedings of the EOS/ESD
Symposium, 2004.
[4] Karen Shrier, Chi Jia, “Cell Phone GaAs Power Amplifiers: ESD,
TLP, and PVS Devices,” Proceedings of the EOS/ESD Symposium,
2005.
[5] Stephen Halperin, “Guidelines for Static Control Management,”
Eurostat, 1990.
[6] Stephen Halperin, “Guidelines for Static Control Management,”
ESD Association, 2001.
Figure 10
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MASH Editorial
(Military, Aerospace, Space and
Homeland Security Conference)
Today I read in the morning paper that Sgt. John M.
Sullivan, 22, of Hixon, Tennessee died in Iraq, a victim
of an IED. I didn’t know John Sullivan and I’m sure he
never heard of me. I wonder why he was willing to die
for me and my wife, my three kids, my father, my six
brothers and sisters and everyone else in this country?
Where did he find the courage and conviction to volunteer for Service in the US military? He was no doubt
a patriot and a lover of freedom. God bless his soul.
Most of us don’t face imminent danger on a day to
day basis, but if you’re planning to attend MASH this
year there is a good chance your livelihood (not your
life) is tied into the defense of our nation. Let’s not forget John Sullivan and the countless others when we
meet May 8th in Baltimore to exchange ideas and discuss common technical problems germane to the military and homeland security fields. This year’s MASH
conference will be a great opportunity to network with
other industry professionals and build the personal
relationships that are at the very foundation of a strong
industrial base.
There are some difficult technical challenges out
there that will require serious dialog. Lead free solder
and its impact on our weapon systems procurement is
a hard fact of life, whether we like it or not.
Counterfeit parts and part obsolescence is another
important topic area that will be addressed again this
year. We’ve also lined up some excellent talks on new
materials, thermal management and next generation
packaging concepts. Package hermeticity is still a critical reliability concern and there is a lot to report on in
the area of “near hermetic” packaging of advanced
material sets such as LCP and copper clad teflon. There
are lots of other interesting talks so be sure to check out
the full program at http://www.imaps.org/mash/. I can
personally guarantee a full line up of quality presentations!
This year we’re very fortunate to have Paul
Schneider, a respected industry consultant, as our
Keynote speaker and the dynamic John Douglas, CEO
of AIA, as our dinner speaker. We expect to attract 200
plus attendees this year as we continue to build on a
great conference started by Greg Caswell and his team
a few years ago. The conference will be held May 810th at the Radisson Plaza Lord Baltimore Hotel, just a
few blocks from the famous Baltimore Inner Harbor!
...See you in Baltimore!
Tom Green
MASH 2007 General Chair
to register to attend or to reserve booth
space at MASH 2007, please visit
www.imaps.org/mash
photo courtesy of JSF
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FEATURE
ARTICLE
T
hin Array Polymer
Packaging (TAPP®)
Leo M. Higgins III, Ph.D., ASAT Inc., Austin, Texas USA, Leo_Higgins@asat.com
Abstract
TAPP (Thin Array Polymer Packaging) is a high density, low mass packaging technology ideal for portable electronic products. The very low electrical parasitics of TAPP makes it ideal for RF and high frequency device applications.
TAPP is registered with JEDEC as a leadless surface mount package, with an outline similar to the QFN. Unlike the
QFN, TAPP provides up to three rows of perimeter IOs, while also providing the exposed die attach pad, allowing direct
soldering to a system board to provide heat sinking into the PCB and low resistance back side biasing. Portable electronics are increasingly demanding higher density assembly in the form of stacked die packaging and package stacking.
TAPP allows stack die packaging, and with the ability to provide TAPP contacts, power and ground rings, and other
metal features, at closer spacing than possible with QFNs, TAPP can allow reduction in wire length for all die in a
stack. The assembly of leadless high-density surface mount packages requires low warpage during the surface mount
process, and suitable design of the PCB bond pads and the pad receiving the exposed die attach pad to avoid open circuits. The reliability of the surface mount connections must tolerate many power cycles common to the use of portable
electronics, and as with the QFN package, the soldering of the exposed die attach pad of TAPP to the system board
enhances the reliability of the connections. In this paper, aspects of the design of the TAPP and its use and performance
in a surface mount assembly are discussed.
Introduction
TAPP represents the next step up from the QFN
package for high performance packaging and is targeting communication-oriented portable and consumer
electronics. While QFNs with two rows of perimeter
contacts were introduced recently, assembly challenges
remain, and widespread acceptance has been slow.
TAPP avoids the assembly issues associated with dual
row QFNs since TAPP is not leadframe-based. Since
TAPP does not use tie bars, as with QFN, each TAPP
component in a padframe array is electrically isolated
immediately after the carrier strip is etched away, making TAPP ideal for strip-testing. TAPP products are
offered with thicknesses from 1.0 mm to 0.4 mm, and
body sizes below 2 mm sq. to 19 mm sq. TAPP has been
manufactured in both multichip module and stacked
die configurations. Due to increasing demand, the
TAPP padframe size has been increased, and the thickness of the copper plating that makes up most of the
TAPP metal feature thickness has been decreased to
improve productivity and reduce cost. Due to the combination of design attributes, including very small
dimensions, very low mass, leading edge component
mass / IO, and excellent electrical and thermal performance, TAPP is gaining market interest, and is now
available from ASAT and Amkor (on license from
ASAT).
TAPP Padframe Manufacturing
TAPP padframes are made via a series of electroplating operations on a thin copper sheet. These additive
plating processes are used to create contact pads,
34
power/ground rings, and the die attach pads from a
multiple metal layer stack. The sheet is first coated with
a photosensitive plating resist that is then photo-lithographically processed to define openings where plating
is desired. The sequence of Au – Ni – Cu plating follows. A second photolithographic process series follows, and is used to define the locations for the final
selective plating of Ni – Au on areas requiring wire
bonding. These areas include the surfaces of the contact
pads, power and ground rings, and perimeter regions
on the die attach pad. The plating resist is then
stripped, and solder mask is applied to the panel in
desired locations. The panel of padframes is then completed, and the individual padframe strips are punched
out of the panel. Figure 1 shows schematics of a TAPP
padframe strip, and a cross-section detailing the electroplated metal stack-up.
TAPP Assembly
TAPP padframes are designed to be the same size as
QFN and fine pitch BGA strips to allow utilization of
the same fixtures, tooling, molds, and saw singulation
used for both QFN and fine pitch BGA manufacture.
The carrier sheet is much more mechanically stable
than etched QFN leadframes, allowing defect reduction
from handling and flexure typical with QFN manufacture. The solid copper carrier sheet provides a very stable platform for dispensing of die attach adhesive and
die placement. The copper carrier also allows excellent
heat transfer without complex heater block / clamp
tooling needed for QFN assembly, especially with dual
row QFNs, consequently the wire bond process is
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greatly simplified. Problems associated with good
clamping of leads during wire bonding of dual row
QFN are avoided.
Molding requires neither the unique molds for
punch-singulated QFNs, nor the use of molding tape
required for saw singulated QFNs, allowing a wide variety of body sizes with only a change in padframe artwork, and reduced tooling and process costs. The only
unique process requirement is the etching of the copper
carrier, and this uses equipment and chemistries that
are common for leadframe and PCB manufacture. At
this point, all the TAPP units in the padframe array are
electrically isolated, and could readily be strip-tested.
Post-mold processing to electrically isolate units and
pads (etching, partial saw cutting, stamping to cut connections) to allow strip testing, or to create two rows of
contacts, are not necessary.
The final step is saw singulation. Since the copper
carrier has been removed, the saw process is very efficient due to the need to saw only through mold compound, showing a greater throughput than is possible
with sawing QFNs or fpBGAs. Figure 2 shows schematics of a TAPP cross-section after various assembly operations, and the etch-away of the copper carrier. Figure
3 shows schematic views of the bottom sides of TAPP
devices with two and three rows of IOs, including a
two-row design with a power ring. Figure 4 exhibits
actual TAPP components. Figure 5 shows a photo of a
full TAPP test padframe being used for assembly
process development with copper wire bonding.
Figure 1. Schematics of a TAPP padframe and a cross-section through an assembly site showing the 5
metal layer stack comprising the metal TAPP elements.
TAPP Design Considerations
Since TAPP is not leadframe-based, the TAPP manufacturing and assembly processes do not require use of
tie bars to support the inner rows of leads and the die
attach pad. Not requiring tie bars allows metal features
(contacts, die attach pads, power rings, etc.) to be positioned wherever necessary, and allows higher pin
counts compared to QFNs of the same body size, since
pads can be located in areas normally taken up by tie
bars. While several rows of perimeter pads are possible
with TAPP, due to constraints of wire bond length, surface mount challenges, and the redistribution of signal
pads from the surface of a PCB, TAPP is normally provided with up to three rows of perimeter pads. A power
or ground ring surrounding the die attach pad can be
used in place of a row of pads, or segmented power and
ground bars can be substituted for partial rows of contact pads, so design flexibility is not constrained by
leadframe and tie-bar technology limitations.
The electrical parasitics of a TAPP package can be
even lower than the excellent parasitics typically exhibited by a QFN package. The TAPP package wire bond
pad is the top surface of the SMT pad seen on the bottom of a TAPP package, so the TAPP pads are even electrically ‘shorter’ than the leads in a QFN. The pads can
be placed closer to the edge of the die attach pad than
is possible with leadframe etching or stamping, so critical contacts can be supplied with shorter wires than
with a QFN. Of course, close placement of contacts to
the die attach pad requires care during surface mount
assembly to avoid shorting between the contacts and
the die attach pad. Table 1 provides information on the
standard thicknesses of TAPP packages, and other
design information. TAPP is currently offered in 0.65,
Figure 2. Cross-sections of a section of a TAPP padframe after a sequence of assembly operations.
Figure 3. Typical bottom side views of TAPP components showing two rows of contacts, two rows of
contacts and a power ring, and three rows of contacts.
Figure 4. Bottom side views of TAPP components.
continued page 36
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continued from page 35
Figure 5. Test padframe being used for copper wire bonded TAPP process development.
Table 1. TAPP package configurations.
cause open circuits between the perimeter pads and the
PCB. It is generally recommended to print solder paste
onto the PCB thermal pad in a grid pattern, such that
approximately 50% of the thermal pad area is covered
with solder paste. Other printed paste patterns, such as
a radial star-burst pattern, that cover approximately
50% of the thermal pads can also provide suitable solder wetting and spreading, and the sweep-out of gases,
allowing the interfacial area between the exposed die
attach pad and the thermal pad to be less than 50% void
area. This area has been shown to provide sufficient
coverage without a significant drop in thermal or electrical performance.
During surface mount reflow, generally the solder
paste on the perimeter pads will melt before the solder
printed on the thermal pad. Accurate device placement
will allow the solder to properly wet the TAPP pads and
the PCB pads, and then the solder paste between the
exposed die attach pad and the thermal pad will melt.
The solder will wet both surfaces and begin to spread
laterally, pulling the TAPP package towards the PCB. If
too much paste was printed on the thermal pad, and if
too much gas gets trapped between the exposed die
attach pad and the thermal pad, it is possible that the
package could lift and tilt, causing opens between the
contact pads and the PCB. Figure 6 shows an X-ray
image through a 12 x 12 x 0.8 mm, 0.4 mm pitch, 204
ld TAPP component after surface mount assembly
using lead-free SAC405 solder paste onto OSP-coated
PCB pads. 1 The radial starburst stencil pattern was
used for this device. Figure 7 shows a cross section of
a solder joint of a 9 x 9 mm, 0.5 mm pitch TAPP component surface mounted on a 1.6 mm thick, doublesided FR4 test board, using eutectic Sn-Pb solder paste,
after 2000 cycles –40 / +125°C, 2 cycles per hour. 2
Since TAPP bond pads typically occur in multiple rows,
and do not extend to the edge of the package, the solder joints cannot be visually inspected. A PCB assembly
operation that has demonstrated the capability for high
assembly yields for equivalent pitch QFN packages on
high-density assemblies should experience the same
yields with board level TAPP assembly.
Figure 6. X-ray image of a 12 x 12 x 0.8 mm, 0.4 mm pitch,
204 ld TAPP component after surface mount assembly using
lead-free SAC405 solder paste, printed with a radial starburst
stencil pattern.
0.5, and 0.4 mm IO pitch. Development work on finer
pitch TAPP packages is ongoing.
TAPP Surface Mount Assembly
Surface mount assembly of components with a pad
pitch of 0.5 mm, or finer, requires good process and
design know-how. As with SMT of QFNs, the design of
the solder mask stencil requires careful consideration.
If excess air is trapped in the solder between the
exposed die attach pad and the thermal pad on the
PCB, some perimeter pads are not likely to solder to the
PCB. If there is too much solder between the exposed
die attach pad and the thermal pad, it is also possible to
36
Figure 7. Cross-section of a eutectic Sn-Pb solder joint between
a 0.5 mm pitch TAPP component and a test board after more
than 2000 temperature cycles.
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Summary
TAPP packaging is an advancement of QFN style
packaging, offering higher densities, higher pin counts,
enhanced electrical design, and equivalent thermal performance. Due to the very low mass and small dimensions of TAPP, it is an ideal packaging technology for all
forms of portable communications equipment, and
consumer electronics.
References:
1. ASAT SMT Reports of ASAT 04044 / 12204 Package, January 7,
2005.
2. ASAT Reliability Report TRMS-RTG00-0110, August 15, 2001.
Sites along the San Jose
historial tour
San Jose photos courtesy of the San Jose Convention & Visitors Bureau
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Device Packaging
Program-at-a-Glance
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IMAPS
2007
IMAPS 2007 From the Technical Program Co-Chairs,
Sarosh Patel and Ray Alexander
Welcome to 2007. IMAPS will be holding the 40th
International Symposium on Microelectronics in
November with technical sessions addressing everything in packaging “between the chip and the system.”
New challenges and opportunities to enhance our
products have been presented with globalization being
realized. This helped in bringing about a paradigm
shift in time-to-value for a myriad of our electronic
products.
The industries focused on will be biomedical, telecom, military applications, consumer electronics and
renewable energy sources. We will continue to demonstrate the importance of System Packaging/
Applications/Design with software and firmware applications and imaging sensors being added to the mix.
ESD protection, packaging for extreme environments, ceramic, polymer and conductive materials and
microwave communications are planned as four new
areas for Advanced Packaging and Materials.
In keeping with the international nature of this conference and to reflect the reality of globalization, translated Japanese and Chinese sessions have been added.
Smaller lithography, MEMS and nanotechnology
have brought innovation and technology changes to
microelectronics packaging. These changes have provided a rich source of publications that we intend to
leverage at this conference. Microelectronics packaging
is now more exciting than it has ever been.
We are looking forward to hearing what you have to
share about your contributions “between the chip and
the system.” The deadline is March 30, 2007!
Your expedient response in submitting or soliciting
papers is much appreciated.
Santana Row shopping
San Jose aerial view
San Jose photos courtesy of the San Jose Convention & Visitors Bureau
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IMAPS Society Awards —
Your Help Needed
Every year IMAPS members are asked to point out
the Society’s members who have done such notable
work that they deserve the distinction of one of our
awards to publicly acknowledge their accomplishments. This year the IMAPS Executive Council has
added two new awards – for outstanding service in education and for sustained and exceptional lifetime
achievement. We have many deserving members who
have given their time and energy, and expertise to
ensure our industry has a robust future; you can make
sure they are recognized by nominating them for one of
our prestigious awards – but it must start with you!
Whether they demonstrate this dedication by the excellent technical or business work that they do, by volunteering their time at the chapter level, or by becoming
active in national and international activities, such
efforts are vital to maintaining the high quality of our
activities. We are all better personally and collectively
because of the efforts of these individuals. Now we
have the opportunity to let them know that we value
their dedication and that their hard work has not gone
unnoticed.
The six individual awards presented annually are:
Daniel C. Hughes, Jr. Memorial Award; William D.
Ashman Memorial Award; John A. Wagnon Technical
Achievement Award; Outstanding Educator Award;
Sidney J. Stein International Award; and Fellow of the
Society Award. The Lifetime Achievement Award is
also an individual award, but will be awarded only
occasionally when a deserving individual is identified
and nominated.
The 2007 Awards Nominating Committee is actively seeking nominations for these awards. Nominees for
each award are evaluated by their respective Selection
Committee, which is made up of past award recipients
of annual awards, and Advisory Board members for the
Lifetime Achievement Award. The Award Committees
are chaired by the First Past President.
Criteria for each award are as follows:
The Daniel C. Hughes, Jr. Memorial Award is the
highest, most prestigious annual honor, and is awarded
to the individual who, in the opinion of the Daniel C.
Hughes, Jr. Memorial Award Selection Committee, has the
greatest combination of technical achievements related
to microelectronics, combined with outstanding contributions supporting the microelectronics industry, academic achievement, or support and service to IMAPS.
One must be an IMAPS member in good standing for a
minimum of five years to qualify for this award.
Recipients of this award automatically become Life
Members and Fellow of the Society.
The William D. Ashman Memorial Award recognizes an individual who, in the opinion of the William
D. Ashman Memorial Award Selection Committee, has
provided significant technical contributions to the electronics packaging industry, while participating and
demonstrating support of activities to enhance the electronics packaging profession as a member. Recipients of
this award automatically become Life Members and
Fellow of the Society.
40
The John A. Wagnon Technical Achievement
Award is given to a member of the Society who, in the
opinion of the John A. Wagnon Technical Achievement
Award Selection Committee, has made outstanding technical contributions related to microelectronics technology. The award may be given for a specific accomplishment, for a number of accomplishments over a period
of years, or for general overall contributions to the
microelectronics industry.
The IMAPS Outstanding Educator Award recognizes an individual who, in the opinion of the IMAPS
Outstanding Educator Award Selection Committee, has
provided significant contributions to education for the
electronics packaging industry and/or to the advancement of IMAPS Student Chapters. Note that this is not
restricted exclusively to academic education.
The Sidney J. Stein International Award is given to
a member of the Society who, in the opinion of the
Sidney J. Stein International Award Selection Committee,
has provided significant international technical and/or
leadership contributions to the microelectronics packaging industry, while participating and demonstrating
support of IMAPS international activities to enhance
the electronics packaging profession.
The Fellow of the Society Award honors and recognizes those who, in the opinion of the Fellow of the
Society Award Selection Committee, have made significant and continuing contributions to IMAPS over the
years at any level – local or national. A nominee must
have been an IMAPS member for ten (10) consecutive
years. Examples of the nomination criteria usually
considered for this award are: (1) service as an officer
of a local chapter or in a national office; (2) service as a
member of a local, regional, or national committee or
task force; and/or (3) presentation of papers or conducting of short courses at local, regional, or national
symposia.
The Corporate Recognition Award honors and recognizes a corporation (or the appropriate division or
department of a corporation) that, in the opinion of the
Corporate Recognition Award Selection Committee, has
made significant technical contributions to the microelectronics industry, while demonstrating support of
IMAPS through participation in such activities as
Organizational and Regular Memberships, promoting
member participation in IMAPS-sponsored activities,
sponsorships, Educational Foundation contributions,
and by exhibiting at the Annual Symposium.
The Lifetime Achievement Award is given to a
member of the Society who, in the opinion of the
Lifetime Achievement Award Selection Committee, has
made an exceptional, visible, and sustained impact on
the microelectronics packaging industry in technology,
business or both. Because this award recognizes a longterm and exceptional impact on the greater microelectronics industry, candidates may be nominated only by
Senior Members, Life Members, or previous recipients
of either the Fellow or Technical Achievement Awards.
Continued page 41
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IMAPS/ACerS 3rd International Conference and Exhibition on
Ceramic Interconnect and
Ceramic Microsystems
Technologies (CICMT)
April 23-26, 2007
Register online at www.cicmt.org
Program-at-a-Glance
Monday, April 23
Welcome Reception
Tuesday, April 24
Keynote Presentations
Materials and Processes for Microsystems
Co-Firing Processes and Dimensional Control in LTCC
High Frequency Characterization and Simulation
Ceramic Actuators
Advanced Packaging Technology
Direct Write Technology
Wednesday, April 25
International Session on Microsystems
Microsystem Applications
Processing and Design of Integrated Passives in LTCC
Microsystem Materials and Processses
Advanced Packaging Technology
Interactive Forum (Poster Session)
Thursday, April 26
International Session on Microsystems
Design and Fabrication of Ceramic Microsystems and Devices
Housing (Hotel Cut-off is March 23, 2007)
Housing Accommodations must be made directly to:
Grand Hyatt Denver Hotel
1750 Welton Street
Denver, Colorado 80202
Phone: 303-295-1234 or 800-233-1234
When making reservation by phone, please reference Ceramic Interconnect Conference.
continued from page 40
Nominations and supporting materials must be
received by May 15, 2007. Nomination forms can be
found on-line at www.imaps.org or by contacting
Rayma
Gollopp
at
IMAPS
headquarters,
rgollopp@imaps.org. Nominations may be also be submitted on-line at www.imaps.org, and the Practices and
Procedures governing the awards can be found
on-line
at
http://www.imaps.org/leadership/PP/
Sections/Section16.pdf.
There are few things we each value more than recognition by our peers. This is your chance to recognize a
deserving member with the prestige of an award – and
only you, the membership, can do that. You have the
keys to a vital part of our professional network – and
your actions in recognizing other members’ accomplishments are key to making IMAPS much more valuable to us all!
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EUROPEAN
NEWS
Press release from IMAPS Europe:
Long Desired Co-operation – Europe-wide
IMAPS and IEEE CPMT in Europe (Region 8) Start to Co-operate
After a period of productive and fruitful discussion, the “International Microelectronics And Packaging Society”
(IMAPS) and the “Components, Packaging & Manufacturing Technology” Society (CPMT) of IEEE have agreed to
co-operate in Europe to provide their members with a much stronger offering.
Since October 2006 this collaboration is creating a single Europe-wide network which will bring together the interests of industry with the expertise and skills found in Europe’s science and research base. A variety of activities and
events for the microelectronics and packaging community will be jointly organized and supported by both organizations where each has similar objectives.
Europe Moves Forward
Co-operation between these two leading organizations in Europe is outlined in a Memorandum of
Understanding (MoU). Members of both organizations, and especially the whole microelectronics and packaging
community, will benefit greatly from this collaboration. “This cooperation is really not only an end in itself,”
explains Paul Collander, President of IMAPS Europe. “The industrial and research community will appreciate the
compact event management that co-operation will provide.” Evidence of this is the technical co-operation, mutual
concessions and consultation on the venues and scheduling between the organization of the pioneering conferences
EMPC and ESTC. In the future ESTC will run in even years (i.e., 2008, 2010, etc.) and EMPC will run in odd years
(i.e., 2007, 2009, etc) with the first jointly promoted conference being EMPC taking place in Oulu in June 2007 and
the next event, ESTC, scheduled in Greenwich in London, England in September 2008.
Co-operation and consultation on the content at conferences will also take place. “These must be world leading
and of direct relevance to future industrial requirements,” explains Rolf Aschenbrenner, CPMT Vice President
Conferences. Rolf also emphasizes the strategic gain that comes with co-operation: “Joint discussions and co-operation between CPMT and IMAPS can only strengthen the offer each organization provides its members. On the technical front such co-operation will ensure that future essential packaging technologies are developed faster and in a
more efficient way providing major benefits for European industry and its researchers.”
The co-operation also brings significant benefits to CPMT and IMAPS. For example, IMAPS Europe publications
will be available through the CPMT database and its homepage search engine IEEEXplore. In addition to this, each
organization views co-operation on events and other activities as helping strengthen and grow the packaging community in Europe.
Background of the partners of the cooperation:
For decades both societies have been pursuing the goal to offer a subject-specific forum for research, design and
development of progress that points the way ahead in packaging as well as manufacturing. Further information on
IMAPS and CPMT can be found at the following websites:
www.cpmt.org
www.imapseurope.org
Contact
CPMT: Rolf Aschenbrenner, aschenbr@ieee.org
IMAPS: Paul Collander, president.elc@imapseurope.org
France:
Meetings Program:
SIP/SOC chapter meeting, Caen, May 24
A one-day chapter meeting will be dedicated to
SIP/SOC solutions for system integration. Sponsored by
IMAPS France in association with NXP, the former
component branch of the multinational corporation
Phillips, it will be held in Caen on next May 24. IMAPS
France thanks Jean-Marc Yannou, NXP, for his personal involvement in the organization.
Interconex 2007, Toulouse, September 25-26
Interconex 2007, the annual Conference and
Exhibition of IMAPS France, will be held in Toulouse,
the capital of “Region Midi-Pyrénées” which is well
known as “Ville Rose.”
First aerospace pole in Europe, thanks to Airbus and
CNES – the French space agency – Toulouse is the
heart of a very important industrial network. Large
multinational corporations and small/medium sized
42
enterprises are involved, out of aerospace, in telecommunications, automotive equipments or semiconductors. Toulouse, in addition, is a major pole in France for
education and research, thanks to universities, schools
and public or private laboratories.
The exhibitors would find here experienced visitors
closely involved in the high-tech products and services.
The exhibitor handbook is available on www.imapsfrance.org.
Entitled “Interconnection and Packaging for On
Board Equipments,” the conference program will be
dedicated to electronic equipment in the fields of
avionics, space, automotive and trains.
Critical components, assembly technologies, environment stress requirements, reliability, economical
features…the technical program should express the
convergent concerns and the differences between the
sectors.
The technical committee seeks original papers on
these topics and is encouraging actual industrial cases
and experience returns.
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More information?
IMAPS France, Events, Membership?
Florence Vireton, Bureau IMAPS-France
49 rue Lamartine - 78 035 VERSAILLES cedex
Phone: 33 (0) 1 39 67 17 73
Fax: 33 (0) 1 39 02 71 93
E-mail : imaps.france@imapsfrance.org
Inputs from France must be sent to:
jean-paul.droguet@wanadoo.fr
Germany:
News from the Chapter:
News from the Chapter:
Second European ATW on Thermal Management
After the real success of the first issue, last year, the
2nd European ATW on Micropackaging and Thermal
Management was held, January 31 and February 1st,
in La Rochelle on the French Atlantic coast. The aim of
the workshop was to help exchanges of information
between scientists and engineers involved in the field of
thermal management, for high integration levels. Due
to the rising speed and miniaturization, the mastering
of thermal effects is and will keep being, a technological key for future packaging solutions. After a welcome
session, including two keynote addresses, the technical
program gathered 21 papers in five sessions:
Materials; Applications; Thermal modelling and
reliability; Advanced cooling solutions; Test and
Measurement Methods.
Half of the speakers were French; the others came
from five different countries, including Belgium (4),
Germany (2), United States (2), Spain (1) and Sweden
(1). The language was English.
For the first time, the ATW was open to table top
exhibits, strictly limited to organizations involved in
the field of thermal management.
As we write this paper in the end of December, we will
have more to report for the next issue.
More information? On IMAPS Germany? Events?
Latest CD ROM proceedings? Membership?
Please contact:
www.imaps.de
Martin Oppermann, Point of Contact AM,
martin.oppermann@imaps.de
continued page 44
IMAPS France website
For the incoming events, the site is progressively
updated by our webmaster with the useful documents
as soon as available:
• Poster
• Call for papers
• Exhibitors files
• Technical program
• Registration files
The “member only” section is open to our members,
with their membership number as a password. Besides
the directory of IMAPS France, papers presented at
IMAPS events, are available on-line.
In addition, on the web site of IMAPS France, you continue to find:
• An updated information on IMAPS-France,
• Short reports on recent events,
• A membership registration or renewal on line,
• Short news and an employment exchange area.
Visit us @: www.imapsfrance.org
Links are available for direct access to other
chapters in Europe and United States.
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continued from page 43
Italy:
Meetings Program:
Wireless sensors and RFID technology:
State of the art and applications – Workshop, Milan,
February 27-28
The event will take place at the Politecnico di
Milano.
The program will be made available on the IMAPSItaly web site as soon as available.
News from the Chapter:
EMPC2009, Rimini
The IMAPS Steering Committee has started the
implementation of the EMPC2009 conference with
exhibition.
It will take place in the first half of June 2009 at
Rimini, a beautiful tourist spot on the Adriatic Sea in
the north-east side of the country.
SAS (with its Blue1) and of course other Star
Alliance partners and Finnair serve Helsinki and Oulu
with many daily connections.
Oulu is a high tech capital of Northern Scandinavia
being the technology base for large international corporations like Nokia and a large number of small and
medium sized hi-tech enterprises. For microelectronics
and packaging, University of Oulu (16,000 students)
and VTT in Oulu are globally well-known research and
development partners. Technopolis, housing some 550
companies, is the first and the largest science park in
the Nordic Countries and the only listed company of
this kind in the world. Company visits will be possible.
Enjoy the pictures from a late December afternoon –
and look forward to the midnight sun in June!
More information? For more information on
IMAPS Italy and its events, please look at:
www.imaps-italy.it
Nordic:
Meetings Program:
EMPC2007, Oulu, Finland, June 17-20
We can assure you that this year’s IMAPS Europe
event will be worthwhile attending. You will have the
opportunity to hear exiting presentations, visit the concentrated and dedicated exhibition and enjoy the
IMAPS Nordic social atmosphere offering you the best
possible networking opportunities.
A record high number of excellent abstracts were
received.
The program is outlined as follows:
• After 3 plenary opening papers, follows 4
parallel tracks of sessions and events.
• 2 tracks with 18 parallel sessions and a total of
72 oral papers.
• 1 track with 11 high tech papers from latest
EU programs (embedded passives and actives
in PCBs and flex, large area electronics on
stretchable substrates, MEMS/ASIC co-integration) and with the first European GBC (Global
Business Council) session with 4 presentations.
• Finally a 4th track with about 40 poster
presentations over 2 days with 2 daily
presentations.
All Sunday and Wednesday afternoon there will be
organized tutorials.
The dedicated exhibition is selling very well and the
new format seems very popular.
A few lines about the social arrangements: Sunday
evening a Welcome cocktail party at the Oulu Town
Hall. Monday evening a buffet dinner in the exhibition
area and Tuesday evening the banquet dinner at the
Maikkula mansion.
It is now time for you to plan your travel. It is easy
to get there and very reasonable – if you book your
flights in time.
44
Please study the program and all details at
www.empc2007.org
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Business/Trade/Industry News:
New Oulu high tech activities
Fingu, www.fingu.com, a Chinese IT R&D company
from Wuhan, 2000 employees, 150 in R&D, expands
for the first time outside China. Fingu starts early this
year in Oulu, and it will hire 6-10 designers. The British
rep Gary Daly reports that Fingu collaborates with
Nokia and wants that to increase.
Analog Devices also starts R&D in Oulu and seeks
designers.
Przemysl. The comfortable Zamkowy Hotel (92 beds in
single, double, 3-person rooms, and suites), a picturesque landscape, and the unique scenery of this 16thcentury Renaissance castle, surrounded by a majestic
park filled with unique specimens of fauna and flora,
serve to create great conditions for holding a conference. For more details, please contact Prof. Jerzy
Potencki, Dept. of Electronics and Telecommunications
Systems, Rzeszów University of Technology, e-mail: jurpot@prz.rzeszow.pl
Poltronic news
Paul Collander’s assignment with Technology
Village Digipolis in Northern Finland has come to an
end. Paul is now focusing on his own consulting firm,
Poltronic, on new microelectronics technology.
See www.digipolis.fi and www.poltronic.fi
News from the Chapter:
Poland:
Meetings Program:
UK:
Meetings Program:
31st IMAPS Poland Intl. Conf., Krasiczyn,
September 23-26
The 31th IMAPS-Poland International Conference
will be held between 23rd and 26th September 2007 by
the Rzeszów University of Technology, at the Castleand-Park Complex in Krasiczyn - located in south-eastern Poland, just 10 km from the historical town of
MicroTech 2007, March 6-7, Hellidon Lakes,
Northamptonshire
The theme of ‘Advanced Interconnection’ will be the
essential mood of the annual IMAPS UK technical conference.
For further details, please check
www.imapseurope.org/poland
Malgorzata Kramkowska,
malgorzata.kramkowska@pwr.wroc.pl
continued page 46
45
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continued from page 45
MicroTech 2007 will be held at the Hellidon Lakes
conference center in the Center of England, near
Daventry. This venue has been selected in order to provide more space for exhibitors as well as keeping costs
for a 2-day residential conference to an affordable level.
Hot Topics at MicroTech 2007:
IMAPS-UK moves this annual event to a new venue
and puts emerging Microelectronic Technology into the
spotlight. Intelligent Manufacturing is the theme focusing on all the upcoming trends of Advanced
Interconnection. Topics include Nano Fibers, Reducing
costs in RFID Technology, Isothermal Fatigue Testing,
Electro-Optical Circuit Boards, Mass Imaging of
Electronic Materials, Heal and Usage Monitoring
Microsystems, Low Cost packaging, Interconnection on
Ceramic, while DEK and Mydata go head-to-head with
Screen versus Jet Printing.
This year the ‘not-to-miss’ Market Watch asks the
question “Supply Chain – is the pipeline broken?” with
thoughtful consideration from Aubrey Dunford –
AFDEC, Mike Trencherwood – COG, David Kynaston
– UKEA/E-KTN and Chris Bailey – University of
Greenwich, with questions and debate from the floor.
The keynote presentation from Graham Pink, VP of
R&D at CSR – “Changing the way the world connects”
– confirms the importance of this event. All this supported by a table-top exhibition of suppliers to the
trade and a conference dinner as well. So much to hear,
so much to see, so many to meet at the Hellidon Lakes,
Daventry on the 6th and 7th March.
Full details of this event from the IMAPS-UK secretariat, 4 The Close, Bracebridge Heath, Lincoln LN4
2PB, Tel: 01522 575212 or email office@imaps.org.uk
News from the Chapter:
Working with SEMI Europe
SEMI Advanced Packaging Conference at SEMICON Stuttgart – October 9-11.
SEMI Europe, is a major part of the Global SEMI
organization, supporting the Semiconductor and related manufacturing industry in Europe from offices
based in Brussels. It has four areas of activity: SEMICON conferences, providing Market data, Industry
related Technical programs and Standards.
SEMICON Europa has moved from April time at
Munich to 9-11 October in Stuttgart for 2007 and will
remain there at this time of year for at least the next 3
years.
SEMI has just released its program for future key
activity, to be known as “Tracks” in the areas of SEMICONDUCTOR, MEMS, Advanced Packaging and
Photovoltaics. The SEMI Europe ‘Advanced Packaging
Conference’ Technical Committee met in Munich on
Friday 17 November 2006, to review the committee
structure, events related to SEMICON and formulation
of a 1-day Seminar for October 2007.
Jens Muller (IMAPS Germany) has stepped down as
chair of this Committee (due to conference conflict
with the IMAPS Germany annual event) and Andy
Longford has been asked by SEMI to take over from
Jens.
The major issues evolving from the meeting are:
SEMI will concentrate the technical programs on
issues relating to 1st level interconnection, typically
46
wafer level packaging and embedded systems. This will
prevent conflicts with IMAPS, considered more knowledgeable for level 2 and 3 interconnects and the
‘Science’ issues will be kept at IEEE CPMT level to prevent clash with ESTC conferences.
The one-day Advanced Packaging Conference was
proposed to be held on the Wednesday 10 October so
as NOT to clash with the IMAPS Germany 8/9 October
meeting.
Future IMAPS and SEMI cooperation should be
maintained as a number of the conference committee
are IMAPS (and ELC) members (E Beyne, J Muller) and
A Longford will take over Chair of IMAPS UK in March
2007.
Andy Longford
IMAPS-UK and the UKEA
The UK committee decided that it was a benefit to
members of the Society for IMAPS-UK to join the UK
Electronics Alliance (UKEA) established late in 2005 by
Intellect and the DTI. The aims of the Alliance are wide
ranging based on the belief that there is so much potential that a higher profile of the potential is necessary.
The first requirement is to publicize this potential
wherever possible and to lobby all relevant establishments to support the industry both morally and financially with the target of a much stronger presence in the
global market for UK Electronics by 2015.
The current membership consists of eleven organizations and the hope is that with greater awareness others will join. At this stage the DTI has pledged support
in 2007 of £37K, about half of what was anticipated.
This leaves members’ subscriptions to pay for the rest
of the anticipated running costs, activity costs being
pledged by the organizations “in kind.” At a committee
meeting held in December members who attended were
generally up-beat and felt that IMAPS indeed had a
contribution to make. Concern was expressed however
that members of the Society who contributed towards
reports and other material, also attending meetings,
should not be ‘out of pocket’ and that such expenses
should reasonably be expected to be met by the
Alliance, particularly since all work would be on a voluntary basis. This view was taken to the next Alliance
meeting by Peter Ongley, Chairman IMAPS-UK, but the
proposition is unlikely to be accepted. Further reports
will appear in later issues of AM.
Business/Trade/Industry News:
IMAPS Members in the News
It is gratifying to see reports from a number of companies that have supported IMAPS over the years with
institutional or individual memberships. MCENewmarket announced its agreement with Selmic OY
to meet a growth in demand for system-in-package
solutions which in turn will make use of Low
Temperature Co-fired Ceramic Substrates, a specialty of
the Finnish company. Technograph Microcircuits used
the new publication, Global Aerospace Manufacturing
to announce its selection to supply micro-electronic
modules for the Airbus A380/A400 – 18 per aircraft. It
also uses both thin and thick film technology on similar modules supplied for the Boeing 787.
An article by Ken Henderson of C-Mac
Microtechnology outlined the potential for microelec-
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2007
tronics in the automotive sector, when both thick film
and LTCC techniques are used by the company which
has its eyes on the estimated global market for nonentertainment electronics in cars reaching $52.10 by
2010. Welwyn Components announced the launch of
its VRW series, a range of compact RoHS-compliant
thick film resistors particularly suited to operating in
harsh environments. Finally John Boston of CIL has
appeared in two instances. Firstly accepting the
Cranfield School of Management’s annual Best Factory
award and then he was put in the hot seat for the EMC
CEM spotlight which summarized his company’s success as resulting from equipping the facility with up-todate equipment and by a re-structured sales force now
attracting four to six new customers a month and fifteen new projects for new and existing customers a
month.
BCW
IMAPS 2007 – San Jose
Grand Prix
San Jose photos courtesy of the San Jose Convention & Visitors Bureau
47
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A DVA N C I N G
MICROELECTRONICS
CHAPTER
CONTACTS
CHAPTER NAME
REGION NAME
MEMBER NAME
COMPANY REP
E-MAIL
WORK PHONE
Angel
Southwest
Maurice Lowery
Northrop Grumman Space Technology
mlowery@imaps.org
310-814-1890
Benelux
Europe
Eric O. L. Beyne
IMEC
eric.beyne@skynet.be
+3216281261
Brazil
South America
Fernando Fujimoto
Centro de Pesquisas Renato Archer
fernando.fujimoto@cenpra.gov.br
0055 (19) 3746-6062
California Orange
Southwest
William Gaines
Northrop Grumman - Space Sys Div.
william.gaines@ngc.com
626-812-2199
Capital
Southeast
Louis A. Razzetti
Razzetti & Assoc.
lou@avidassociates.com
301-588-0637
Carolinas
Southeast
Jim W. Lawson
Bourns, Inc.
jwlathome@att.net
919-363-2235
Central Texas
Southeast
Frank J. Muscolino
Austin Semiconductor
fmuscolino@austinsemiconductor.com
512-531-7055
Chicago/Milwaukee
North Central
Andrew R. Lytis
King Circuit Inc.
alytis@imaps.org
630-629-7300
China
Asia
Dr. Jusheng Ma
Tsinghua University
Florida
Southeast
C. Mike Newton
Harris Corp., GCSD
mnewton@harris.com
321-729-3748
France
Europe
Brigitte Braux
ASTRIUM SAS
brigitte.braux@astrium.eads.net
01 34 88 33 47
Garden State
Northeast
Kathleen M. Kriskewic
HED International, Inc.
kkriskewic@imaps.org
609-466-1900
Germany
Europe
Jens Mueller
TU Ilmenau
jens.mueller@imaps.de
+493677693381
Great Lakes
North Central
Brad W. Heiler
Robert Bosch Corp.
bheiler@imaps.org
248-848-2975
Hungary
Europe
Peter Gordon
Budapest University of Technology and Econ.
gordon@ett.brne.hu
361 4632740
Indiana
North Central
Larry Wallman
Hi-Tek Sales
lwallman@sbcglobal.net
317-887-2564
Israel
Europe
Uri Barneah
Barkoh Technologies
ubarneah@zahav.net.il
972-54-672508
Italy
Europe
Dr. Roberto May
Microtel SPA
may@microtelgroup.it
029543901
Japan
Asia
Itsuo Watanabe
Hitachi Chemical Co., Ltd.
its-watanabe@hitachi-chem.co.jp
+81-296-20-2471
Keystone
Northeast
Lee R. Levine
Process Solutions Consulting
levilr@hughes.net
610-248-2002
Korea
Asia
Jung-Il Kim
Amkor Technology Korea Inc.
jikim@amkor.co.kr
+8224605110
Metropolitan
Northeast
Steven P. Lehnert
Modular Devices
slehnert@imaps.org
631-345-3100
New England
Northeast
Mark Occhionero
Ceramics Process Systems Corp.
jazzukes@verizon.net
508-801-7955
Nordic
Europe
Soeren Noerlyng
Micronsult
noerlyng@micronsult.dk
+4544651457
North Texas
Southeast
Don R. Schuyler
InterFET Corp.
drskyler@interfet.com
972-238-1287
Northern California
Northwest
Anwar A. Mohammed
EoPlex Technologies, Inc.
anwar@eoplex.com
650-298-6507
Northwest
Northwest
Steve Annas
Natel Engineering, Inc.
sannas@natelengr.com
503-260-2002
Phoenix
Southwest
Donald Ream
ASM Pacific
don.ream@asmpt.com
602-437-4688
Poland
Europe
Prof. Jerzy Potencki
Romania
Europe
Dr. Paul Svasta
Politechnica University of Bucharest
paul.svasta@cetti.ro
+40214116674
Russia
Asia
Sergej N. Valev
Mozaik
valev_mozaik@kaluga.ru
7 0842 579 823
San Diego
Southwest
Carl S. Edwards
Space Micro Inc.
cedwards@spacemicro.com
858-309-7004
Slovenia
Europe
Prof. Marija Kosec
Josef Stefan Institute
marija.kosec@ijs.si
+38614773828
Taiwan
Asia
Dr. Shen-Li Fu
I-Shou University
slfu@isu.edu.tw
+88676577001
Tri-Valley
Southwest
Lawrence Driscoll
SCTS, Inc.
lmdriscoll@sctsinc.com
818-704-9087
United Kingdom
Europe
Peter Ongley
Electronic Technology Services
peter.ongley@ukonline.co.uk
+ 012-754-63808
Viking
North Central
Jay Ellingboe
HEI, Inc.
jay.ellingboe@heii.com
952-443-7011
48
886-1-62782126
jurpot@prz.rzeszow.pl
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2007
CHAPTER
NEWS
Metro Chapter Meeting
Draws Large Audience
On January 24, 2007, METRO IMAPS held a dinner
meeting at the Holiday Inn, Ronkonkoma, N.Y. Over 60
people turned out to hear Dr. Dan Baldwin discuss
“Flip Chip Technology, What, Why and How.” As
always the METRO Chapter attendees followed Dr.
Baldwin’s talk with a lively question and answer period.
The meeting was preceded by a one hour networking event allowing many old friends to get re-acquainted. Food arrangements, by Deirdre Kenny of Data
Device Corporation (DDC), were also excellent, with
many positive comments. In addition, Protavic, a supplier of epoxies, had a tabletop display with good interest from attendees.
Scott Baldassarre, of Miteq Corporation, organized
and managed the registration process seamlessly
despite the overflow crowd. Thanks to Bob Conte, of
Sensitron Semiconductor, for once again arranging
another stimulating technical discussion.
The Metro Chapter of IMAPS plans another technical meeting in mid-March and expects similar attendance. Vendors wishing to display at our next meeting
are urged to contact the chapter president.
For further information on the Metro Chapter
including upcoming events, contact Steve Lehnert at
slehnert@mdipower.com
49
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A DVA N C I N G
MICROELECTRONICS
EXHIBITOR
PRODUCTS
&
SERVICES
As an added exhibitor benefit, we will run the Products and Services that the 2006 Exhibitors
submitted for the Final Program in issues of Advancing Microelectronics until we have completed the list. Your Products
and Services will only appear if you submitted them by the deadline last summer.
Electronic Packages
& Packaging
Advanced Cooling Technologies
1046 New Holland Avenue
Lancaster, PA 17543
717-295-6088
scott.garner@1-act.com
www.1-act.com
Aerotech, Inc.
101 Zeta Drive
Pittsburgh, PA 15238
412-963-7470
412-963-7459
canderson@aerotech.com
www.aerotech.com
ALLVIA
657 N. Pastoria Ave.
Sunnyvale, CA 94085
408-212-3200
ndodd@trusi.com
www.allvia.com
ANCeram/IKTS
3578 Hartsel Drive Unit E 356
Colorado Springs, CO 80920
719-264-6111
719 264 6333
jblafon@euro-industries.net
www.anceram.de
Barry Industries, Inc.
60 Walton Street
Attleboro, MA 02703
508-226-3350
sales@barryind.com
www.barryind.com
Chip Supply, Inc.
7725 North Orange Blossom Trl.
Orlando, FL 32810
407-298-7100
thamby@chipsupply.com
www.chipsupply.com
Crane Aerospace & Electronics
PO Box 97005
Redmond, WA 98073-9705
425-882-3100
faina.zaslavsky@craneae.com
www.craneae.com/microelec
DuPont Microcircuit Materials
14 T W Alexander Drive
Research Triangle Park, NC 27709
800-284-3382
Michele.L.Simpkins@
usa.dupont.com
MCM.DUPONT.COM
Endicott Interconnect
Technologies, Inc.
1701 North St.
Endicott, NY 13760
866-820-4820
vernon.wells@eitny.com
www.endicottinterconnect.com
First Level, Inc.
3109 Espresso Way
York, PA 17406
717-266-2450
717-266-7410
nhomsy@aol.com
www.firstlevelinc.com
50
Gel-Pak/Quik-Pak
31398 Huntwood Ave.
Hayward, CA 94544-7818
510-576-2220
darby@gelpak.com
Gel-Pak: www.gelpak.com
Quik-Pak: www.icproto
Minco Technology Labs, Inc.
1805 Rutherford Lane
Austin, TX 78754
512-834-2022
512-837-6285
dpotter@mincotech.com
www.mincotech.com
Graphite Concepts, Inc.
15 Muirhead Avenue PO Box 5464
Trenton, NJ 08638
609-393-8050
graphiteconcepts@aol.com
www.graphite-concepts.de
Mini-Systems, Inc.
Thick & Thin Film Division
20 David Road
N. Attleboro, MA 02760
508-695-0203
508-695-6076
dmoody@mini-systemsinc.com
www.Mini-SystemsInc.com
HCM
Z. I. La Rochelle-Perigny
PERIGNY, 17185
France
+33 5 46 45 12 70
+ 33 5 46 45 04 44
alain.lacorne@hcm-france.com
www.hcm-france.com
Hybond, Inc.
330 State Place
Escondido, CA 92029-1364
760-746-7105
760-746-1408
mailus@hybond.com
www.hybond.com
IC Interconnect
1025 Elkton Drive
Colorado Springs, CO 80907
719-533-1030
719-533-1021
hcarey@icinterconnect.com
www.icinterconnect.com
Interconnect Systems, Inc.
708 Via Alondra
Camarillo, CA 93012
805-482-2870
info@isipkg.com
www.isipkg.com
Kyocera America, Inc.
8611 Balboa Ave.
San Diego, CA 92123
800-468-2957
kaicorp@kyocera.com
americas.kyocera.com/packaging
Life Line Packaging, Inc.
1250 Pierre Way
El Cajon, CA 92021
619-444-2737
619-444-8532
info@lifelinepackaging.com
www.lifelinepackaging.com
Maxtek Components Corporation
2905 SW Hocken Avenue
Beaverton, OR 97005-0428
800-462-9835
eric.hodges@maxtek.com
www.maxtek.com
Micropac Industries, Inc.
905 East Walnut Street
PO Box 469017
Garland, TX 75040
972-272-3571
markking@micropac.com
www.micropac.com
Mitsubishi Materials Corp.
17401 Eastman Street
Irvine, CA 92614
949-862-5755
949-862-5184
kreed@mmus.com
www.mmc.co.jp/adv/ele/english/
index.html
NanoDynamics
901 Furhrmann Blvd.
Buffalo, NY 14203
716-853-4900
dmhfritzinger@nanodynamics.com
www.nanodynamics.com
Natel Engineering Co., Inc.
9340 Owensmouth Ave.
Chatsworth, CA 91311-6915
818-734-6500
jima@natelengr.com
www.natelengr.com
NorCom Systems, Inc.
1055 West Germantown Pike
Norristown, PA 19403
610-592-0167
610-631-0934
Sales@norcomsystemsinc.com
www.norcomsystemsinc.com
NxGen Electronics
9771-C Clairemont Mesa Blvd.
San Diego, CA 92124
858-309-6610
kkron@nxgenelect.com
www.nxgenelectronics.com
Oasis Materials Corporation
12131 Community Road Suite D
Poway, CA 92064
858-486-8846
858-486-8844
fpolese@oasismaterials.com
www.oasismaterials.com
Pac Tech USA
328 Martin Avenue
Santa Clara, CA 95050
408-667-8946
teutsch@pactech-usa.com
www.pactech-usa.com
Paricon Technologies Corp.
421 Currant Road
Fall River, MA 02720
508-676-6888
508-676-8111
rweiss@paricon-tech.com
www.paricon-tech.com
Polese Company
10113 Carroll Canyon Road
San Diego, CA 92131
858-271-1993
kamin@polese.com
www.polese.com
Polysciences, Inc.
400 Valley Road
Warrington, PA 18976
215-343-6484
215-343-0214
info@polysciences.com
www.polysciences.com
Semi Dice, Inc.
10961 Bloomfield St. P.O. Box 3002
Los Alamitos, CA 90720
562-594-4631
dminter@semidice.com
www.semidice.com
Solid State Equipment Corp.
185 Gilbraltar Road
Horsham, PA 19044
215-328-0700
info@ssecusa.com
www.ssecusa.com
Stellar Microelectronics Inc.
28575 Livingston Ave.
Valencia, CA 91355
661-775-3517
alex@stellarmicro.com
www.stellarmicro.com
Stratedge Corporation
4393 Viewridge Avenue
San Diego, CA 92123
866-424-4962
info@stratedge.com
www.stratedge.com
Teledyne Microelectronic
Technologies
12964 Panama Street
Los Angeles, CA 90066
310-574-2051
microelectronics@teledyne.com
www.teledynemicro.com
Thin Film Industries, Inc.
201 Washington Road Building 3,
Suite 3-130
Princeton, NJ 08540-6449
609-734-3158
609-734-2634
thin.film.industries@verizon.net
http://www.sarnoff.com/thinfilm
Umicore AG & Co. Kg
Business Line Microbond - EPM
Rodenbacher Chaussee 4
Hanau -Wolfgang, 63457
Germany
+496181595327
+4961815975327
stefan.merlau@eu.umicore.com
www.umicore.de
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EXHIBITOR
Cyber Technologies USA
4200 Powderhorn Circle
Minnetonka, MN 55345
952-401-9700
michael.riddle@
cybertechnologies.com
www.cybertechnologies.com
Haiku Tech, Inc.
1669 NW 79 Ave.
Miami, FL 33126
305-463-9304
305-463-8751
sales@haikutech.com
www.haikutech.com
HI-Rel Laboratories
6116 N. Freya
Spokane, WA 99217
509-325-5800
roger@hrlabs.com
www.hrlabs.com
Innov-X Systems
100 Sylvan Road, Suite 100
Woburn, MA 01801
781-935-5005
ppipitone@innovxsys.com
www.innovxsys.com
NETZSCH Instruments, Inc.
37 North Ave.
Burlington, MA 01803
781-272-5353
781-272-5225
b.fidler@nib.netzsch.us
www.e-thermal.com
NxGen Electronics
9771-C Clairemont Mesa Blvd.
San Diego, CA 92124
858-309-6610
kkron@nxgenelect.com
www.nxgenelectronics.com
PRODUCTS
SEFAR Printing Solutions, Inc.
120 Mount Holly By-Pass
PO Box 679
Lumberton, NJ 08048
609-613-5000
609-267-1750
lori.lee@sefar.us
www.sefar-screens.com
Silicon Cert, Ltd.
4201 Pottsville Rd.
Reading, PA 19605
610-939-9500
610-939-1010
lheck@siliconcert.com
www.SiliconCert.com
Emerson & Cuming
46 Manning Road
Billerica, MA 01824
978-436-9700
cheryl.bianco@nstarch.com
www.emersoncuming.com
Heraeus Thick Film Division
24 Union Hill Road
West Conshohocken, PA 19428
610-825-6050
Gail.Strong@Heraeus.com
www.thickfilm.net
NanoDynamics
901 Furhrmann Blvd.
Buffalo, NY 14203
716-853-4900
dmhfritzinger@nanodynamics.com
www.nanodynamics.com
Epoxy Technology, Inc.
14 Fortune Dr.
Billerica, MA 01821-3972
978-667-3805
978-663-9782
jmccabe@epotek.com
www.epotek.com
Kester
515 East Touhy Avenue
Des Plaines, IL 60018-2675
847-297-1600
swood@kester.com
www.kester.com
Newport Corporation
101 Billerica Ave, Bldg 3
North Billerica, MA 01862-1256
978-667-9449
dan.crowley@newport.com
www.newport.com
NAMICS Technologies, Inc.
5201 Great America Pkwy. #272
Santa Clara, CA 95054
408-907-8430
408-907-8431
jensen@namics-usa.com
www.namics.co.jp
NuSil Technology
1050 Cindy Lane
Carpinteria, CA 93013
805-566-4111
805-566-9905
vincentm@nusil.com
www.nusil.com/tradeshows/imaps2
006.aspx?ref=WS
Kyocera America, Inc.
8611 Balboa Ave.
San Diego, CA 92123
800-468-2957
kaicorp@kyocera.com
americas.kyocera.com/packaging
Sonix, Inc.
8700 Morrissette Drive
Springfield, VA 22152
703-440-0222
703-440-9512
info@sonix.com
www.sonix.com
Five Star Technologies, Inc.
21200 Aerospace Parkway
Clevland, OH 44142
440-239-7005
szuber@fivestartech.com
www.fivestartech.com
ANCeram/IKTS
3578 Hartsel Drive Unit E 356
Colorado Springs, CO 80920
719-264-6111
719 264 6333
jblafon@euro-industries.net
www.anceram.de
HI-Rel Laboratories
6116 N. Freya
Spokane, WA 99217
509-325-5800
roger@hrlabs.com
www.hrlabs.com
Innov-X Systems
100 Sylvan Road, Suite 100
Woburn, MA 01801
781-935-5005
ppipitone@innovxsys.com
www.innovxsys.com
NxGen Electronics
9771-C Clairemont Mesa Blvd.
San Diego, CA 92124
858-309-6610
kkron@nxgenelect.com
www.nxgenelectronics.com
Silicon Cert, Ltd.
4201 Pottsville Rd.
Reading, PA 19605
610-939-9500
610-939-1010
lheck@siliconcert.com
www.SiliconCert.com
&
SERVICES
Sonix, Inc.
8700 Morrissette Drive
Springfield, VA 22152
703-440-0222
703-440-9512
info@sonix.com
www.sonix.com
Electronic
Microscopy
Services, analytical
services
Sonoscan, Inc.
2149 E. Pratt Boulevard
Elk Grove Village, IL 60007-5914
847-437-6400
mbrown@sonoscan.com
www.sonoscan.com
Xradia, Inc.
5052 Commercial Circle
Concord, CA 94520
925-288-1228
bturnquist@xradia.com
www.xradia.com
Polysciences, Inc.
400 Valley Road
Warrington, PA 18976
215-343-6484
215-343-0214
info@polysciences.com
www.polysciences.com
Epoxies &
Adhesives
SEFAR Printing Solutions, Inc.
120 Mount Holly By-Pass
PO Box 679
Lumberton, NJ 08048
609-613-5000
609-267-1750
lori.lee@sefar.us
www.sefar-screens.com
Zymet, Inc.
7 Great Meadow Lane
E. Hanover, NJ 07936
973-428-5245
info@zymet.com
www.zymet.com
Xradia, Inc.
5052 Commercial Circle
Concord, CA 94520
925-288-1228
bturnquist@xradia.com
www.xradia.com
Failure
Analysis
Sonoscan, Inc.
2149 E. Pratt Boulevard
Elk Grove Village, IL 60007-5914
847-437-6400
mbrown@sonoscan.com
www.sonoscan.com
Sypris Test & Measurement, Inc.
6120 Hanging Moss Rd.
Orlando, FL 32807
800-775-2550
gary.rohlke@sypris.com
www.wetest.com
continued page 52
51
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A DVA N C I N G
MICROELECTRONICS
EXHIBITOR
PRODUCTS
&
SERVICES
continued from page 51
Furnace
Equipmentmaterials handling
AMI/Presco
3087 US Highway 22 P.O. Box 5049
North Branch, NJ 08876
908-722-7100
908-722-5082
sales@ami-presco.com
www.ami-presco.com
ATV Technology, Inc.
21 Concord Street
N. Reading, MA 01864
978-664-1948
978/664-4819
atvtec@att.net
www.atv-tech.com
Hybrid/SMT
Manufacturing
circuit boards
and flex circuit
manufacturing
Aerotech, Inc.
101 Zeta Drive
Pittsburgh, PA 15238
412-963-7470
412-963-7459
canderson@aerotech.com
www.aerotech.com
ALLVIA
657 N. Pastoria Ave.
Sunnyvale, CA 94085
408-212-3200
ndodd@trusi.com
www.allvia.com
Alphasem AG
Andhausen 64 8572 Berg/TG
Switzerland
+41716376363
gusek.b@alphasem.com
www.alphasem.com
Anaren Ceramics, Inc.
27 Northwestern Drive
Salem, NH 03079
603-898-2883
603-898-4273
rconnors@Anaren.com
www.anaren.com
Barry Industries, Inc.
60 Walton Street
Attleboro, MA 02703
508-226-3350
sales@barryind.com
www.barryind.com
BE Semiconductor Industries NV
(Datacon)
7 Neshaminy Interplex Suite 116
Trevose, PA 19053
215-245-3050
215-245-3060
alisa.brunett@datacon.at
www.besi.com
52
Dakota Consulting
12538 Ridgeton Drive
Lakeside, CA 92040
619-328-2924
dakotaconsulting@cox.net
www.dakotaconsulting.org
Harrop Industries, Inc.
3470 E. 5th Ave.
Columbus, OH 43219-1797
614-231-3621
pjtimmel@harropusa.com
www.ajcarstencompany.com
Graphite Concepts, Inc.
15 Muirhead Avenue PO Box 5464
Trenton, NJ 08638
609-393-8050
graphiteconcepts@aol.com
www.graphite-concepts.de
SierraTherm Production Furnaces,
Inc.
200 Westridge Dr.
Watsonville, CA 95076
831-763-0113
jsimpson@sierratherm.com
www.sierratherm.com
Sikama International, Inc.
118 East Gutierrez Street
Santa Barbara, CA 93101-2314
805-962-1000
805-962-6100
sales@sikama.com
www.sikama.com
SST International
9801 Everest Street
Downey, CA 90242
562-803-3361
dmuhs@sstinternational.com
www.sstinternational.com
Haiku Tech, Inc.
1669 NW 79 Ave.
Miami, FL 33126
305-463-9304
305-463-8751
sales@haikutech.com
www.haikutech.com
Commonwealth Microtechnologies
1004 DuPont Rod
Martinsville, VA 24112
276-638-3500
jim.gammon@cwmicrotech.com
www.cwmicrotech.com
F&K Delvotec, Inc.
27182 Burbank St.
Foothill Ranch, CA 92610
949-595-2200
rick.bailey@fkdelvotecusa.com
www.fkdelvotecusa.com
Crane Aerospace & Electronics
PO Box 97005
Redmond, WA 98073-9705
425-882-3100
faina.zaslavsky@craneae.com
www.craneae.com/microelec
Heraeus Thick Film Division
24 Union Hill Road
West Conshohocken, PA 19428
610-825-6050
Gail.Strong@Heraeus.com
www.thickfilm.net
Datacon (BE Semiconductor
Industries NV)
7 Neshaminy Interplex Suite 116
Trevose, PA 19053
215-245-3050
215-245-3060
alisa.brunett@datacon.at
www.besi.com
Interconnect Systems, Inc.
708 Via Alondra
Camarillo, CA 93012
805-482-2870
info@isipkg.com
www.isipkg.com
DuPont Microcircuit Materials
14 T W Alexander Drive
Research Triangle Park, NC 27709
800-284-3382
Michele.L.Simpkins@
usa.dupont.com
MCM.DUPONT.COM
Dyconex AG.
Grindelstrasse 40
CH-8303 Bassersdorf,
Switzerland
+41 43 266 1100
+41 43 266 1101
zimmermann@dyconex.com
www.dyconex.com
Endicott Interconnect
Technologies, Inc.
1701 North St.
Endicott, NY 13760
866-820-4820
vernon.wells@eitny.com
www.endicottinterconnect.com
Maxtek Components Corporation
2905 SW Hocken Avenue
Beaverton, OR 97005-0428
800-462-9835
eric.hodges@maxtek.com
www.maxtek.com
Micro Hybrid Dimensions, Inc.
2161 E 5th St
Tempe, AZ 85281-3035
480-731-3131
ted@micro-hybrid.com
www.micro-hybrid.com
MicroConnex Corporation
34935 S.E. Douglas St.
Snoqualmie, WA 98065
425-396-5707
akuller@microconnex.com
www.microconnex.com
Natel Engineering Co., Inc.
9340 Owensmouth Ave.
Chatsworth, CA 91311-6915
818-734-6500
jima@natelengr.com
www.natelengr.com
NorCom Systems, Inc.
1055 West Germantown Pike
Norristown, PA 19403
610-592-0167
610-631-0934
Sales@norcomsystemsinc.com
www.norcomsystemsinc.com
NxGen Electronics
9771-C Clairemont Mesa Blvd.
San Diego, CA 92124
858-309-6610
kkron@nxgenelect.com
www.nxgenelectronics.com
Reinhardt Microtech AG
Aeulistrasse 10
CH-7323 Wangs,
Switzerland
+41-81-720-04-56
dkoegi@reinhardt-microtech.ch
www.reinhardt-microtech.ch
Stellar Microelectronics Inc.
28575 Livingston Ave.
Valencia, CA 91355
661-775-3517
alex@stellarmicro.com
www.stellarmicro.com
Teledyne Microelectronic
Technologies
12964 Panama Street
Los Angeles, CA 90066
310-574-2051
microelectronics@teledyne.com
www.teledynemicro.com
Thin Film Industries, Inc.
201 Washington Road Building 3,
Suite 3-130
Princeton, NJ 08540-6449
609-734-3158
609-734-2634
thin.film.industries@verizon.net
http://www.sarnoff.com/thinfilm
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MARCH/APRIL
2007
EXHIBITOR
Aerotech, Inc.
101 Zeta Drive
Pittsburgh, PA 15238
412-963-7470
412-963-7459
canderson@aerotech.com
www.aerotech.com
F&K Delvotec, Inc.
27182 Burbank St.
Foothill Ranch, CA 92610
949-595-2200
rick.bailey@fkdelvotecusa.com
www.fkdelvotecusa.com
PRODUCTS
KLA - Tencor Corp.
160 Rio Robles
San Jose, CA 95134
408-875-3000
408-875-4144
darryl.molina@kla-tencor.com
www.kla-tenor.com
ALLVIA
657 N. Pastoria Ave.
Sunnyvale, CA 94085
408-212-3200
ndodd@trusi.com
www.allvia.com
GSI Group Inc.
60 Fordham Road
Wilmington, MA 01887
978-661-4300
978-988-8798
zambellal@gsig.com
www.gsig.com
Cyber Technologies USA
4200 Powderhorn Circle
Minnetonka, MN 55345
952-401-9700
michael.riddle@
cybertechnologies.com
www.cybertechnologies.com
Haiku Tech, Inc.
1669 NW 79 Ave.
Miami, FL 33126
305-463-9304
305-463-8751
sales@haikutech.com
www.haikutech.com
NxGen Electronics
9771-C Clairemont Mesa Blvd.
San Diego, CA 92124
858-309-6610
kkron@nxgenelect.com
www.nxgenelectronics.com
EPP GmbH
Lochhamer Schlag 17
Graefelfing, 82166
Germany
+49-89-829989-0
+49-89-82998999
hstenger@epp-germany.com
www.epp-germany.com
I Source Technical Services, Inc.
5 Rancho Circle
Lake Forest, CA 92630
949-453-1500
mark@i-source.com
www.i-source.com
REMEC Defense & Space
9404 Chesapeake Drive
San Diego, CA 92123
858-505-3369
Gil.Groves@remecrds.com
www.remecrds.com
Innov-X Systems
100 Sylvan Road, Suite 100
Woburn, MA 01801
781-935-5005
ppipitone@innovxsys.com
www.innovxsys.com
Sonix, Inc.
8700 Morrissette Drive
Springfield, VA 22152
703-440-0222
703-440-9512
info@sonix.com
www.sonix.com
GSI Group Inc.
60 Fordham Road
Wilmington, MA 01887
978-661-4300
978-988-8798
zambellal@gsig.com
www.gsig.com
MicroConnex Corporation
34935 S.E. Douglas St.
Snoqualmie, WA 98065
425-396-5707
akuller@microconnex.com
www.microconnex.com
Excelta Corp
60 Easy Street
Buellton, CA 93427
805-686-4686
805-686-9005
gjohnson@excelta.com
www.excelta.com
Accu-Tech Laser Processing, Inc.
1175 Linda Vista Drive
San Marcos, CA 92069
760-744-6692
herbduryea@accutechlaser.com
www.accutechlaser.com
Aerotech, Inc.
101 Zeta Drive
Pittsburgh, PA 15238
412-963-7470
412-963-7459
canderson@aerotech.com
www.aerotech.com
Centerline Technologies
577 Main Street, Suite 270
Hudson, MA 01749
978-568-1330
hugh@centerlinetech-usa.com
www.centerlinetech-usa.com
Commonwealth Microtechnologies
1004 DuPont Rod
Martinsville, VA 24112
276-638-3500
jim.gammon@cwmicrotech.com
www.cwmicrotech.com
Dakota Consulting
12538 Ridgeton Drive
Lakeside, CA 92040
619-328-2924
dakotaconsulting@cox.net
www.dakotaconsulting.org
I Source Technical Services, Inc.
5 Rancho Circle
Lake Forest, CA 92630
949-453-1500
mark@i-source.com
www.i-source.com
Laser Tech, Inc.
1134 East Pine Street
St. Croix Falls, WI 54024-9002
715-483-1636
715-483-5598
sales@laser-tech-inc.com
www.laser-tech-inc.com
Laserage Technology Corp.
3021 Delany Rd.
Waukegan, IL 60087-1826
847-249-5900
847-336-1103
danc@laserage.com
www.laserage.com
NorCom Systems, Inc.
1055 West Germantown Pike
Norristown, PA 19403
610-592-0167
610-631-0934
Sales@norcomsystemsinc.com
www.norcomsystemsinc.com
Miyachi Unitek Corp.
1820 South Myrtle Avenue
Monrovia, CA 91016
626-930-8569
ivonet.gomez@miyachiunitek.com
www.miyachiunitek.com
Mundt & Associates, Inc.
14682 N. 74th Street #150
Scottsdale, AZ 85260
480-922-9365
mundtinc@mundtinc.com
www.mundtinc.com
&
SERVICES
Sonoscan, Inc.
2149 E. Pratt Boulevard
Elk Grove Village, IL 60007-5914
847-437-6400
mbrown@sonoscan.com
www.sonoscan.com
Inspection
Equipment
and Services
Sypris Test & Measurement, Inc.
6120 Hanging Moss Rd.
Orlando, FL 32807
800-775-2550
gary.rohlke@sypris.com
www.wetest.com
Trebor Instrument Corp.
39 Balsam Drive
Huntington Station, NY 11746-7724
631-293-8127
631-423-3332
treborinst@hotmail.com
treborinst.com
Xradia, Inc.
5052 Commercial Circle
Concord, CA 94520
925-288-1228
bturnquist@xradia.com
www.xradia.com
SEFAR Printing Solutions, Inc.
120 Mount Holly By-Pass
PO Box 679
Lumberton, NJ 08048
609-613-5000
609-267-1750
lori.lee@sefar.us
www.sefar-screens.com
Tecnisco Ltd.
2-2-15 Minami-Shinagawa,
Shinagawa-ku
Tokyo, 140-0004
Japan
+81-3-3472-6991
+81-3-3472-1316
j-ikeda@tecnisco.co.jp
www.tecnisco.co.jp/
e_html/tec/f_tec.html
Lasers-cutting,
scribing,
trimming,
marking,
machining,
welding &
supplies
Newport Corporation
101 Billerica Ave, Bldg 3
North Billerica, MA 01862-1256
978-667-9449
dan.crowley@newport.com
www.newport.com
Reinhardt Microtech AG
Aeulistrasse 10
CH-7323 Wangs,
Switzerland
+41-81-720-04-56
dkoegi@reinhardt-microtech.ch
www.reinhardt-microtech.ch
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A DVA N C I N G
MICROELECTRONICS
MEMBERSHIP
Welcome New IMAPS Members!
November/December 2006
ORGANIZATIONAL
Arizona State University
Protean Marketing
Communications
Albin Engineering
Services, Inc.
NextWavebroadband
Precision Process
Equipment Inc.
World Gold Council
ANGEL
Krivit, Steven
CALIFORNIA ORANGE
Bosze, Wayne
Vazquez, Sergio
CAN-AM
Suurmann, Rob
CAPITAL
Papadakis, Stergios
Srinivasan, Rengaswamy
CAROLINAS
Carroll, Alan
Johnson, Beverly
Poser, Dale
CHINA
Luo, Le
FLORIDA
Tran, John
GARDEN STATE
Mann, Robert
INDIA
Jain, Mayank
INTERNATIONAL
Cozzi, Gerardo
ISRAEL
Burdman, Edith
JAPAN
Furusawa, Yoko
Wang, Shuqiang
KEYSTONE
Arizzi, Simone
Davis, Robert
KOREA
Kim, Hyeon Hwan
NEW ENGLAND
Crawford-Hentz, Maureen
Goodrich, Alan
Hadjimichael, Evangelos
Koenitzer, John
Riffelmacher, David
NORTHERN
CALIFORNIA
Cerilli, John
Crowell, Jeffrey
Gao, Guilian
Joshi, Rajeev
Lambine, Andre
Ochrym, Robert
Pitkin, Kevin
Rankin, Kevin
Yang, Frank
Yin, Philip
NORTHWEST
Fraas, Lewis
PHOENIX
Clemons, Greg
SAN DIEGO
McGough, Tricia
TAIWAN
Chang, Hsiang-hung
Chen, Chi-Hon
Chen, Kuo-Ming
Cheng, Hsien-chie
Chiang, Kuo-Ning
Chiang, Shin-Ying
Chiu, Chien-Chia
Chou, Chan-Yen
Chou, Tsung-Lin
Deng, Hong-An
Fang, Jiunn
Han, Cheng-Nan
Huang, Chao-Jen
Huang, Chen-Yu
Huang, Wan-Yu
Hung, Tuan-Yu
Lin, Chia-Te
Lin, Jim
Peng, Chih-Tang
Shen, Chieh
Shie, Kun-Yun
Shih, Chien-Chung
Tsai, Ming-Yi
Tseng, Kun-Fu
Wei, Hsiu-Ping
Wu, Chung-Jung
Wu, Yu-Chen
Yew, Ming-Chih
TRI-VALLEY
Chiao, Yi-Hung
Li, Stephen
UNITED KINGDOM
Chivall, James
Siddique, Sharjil
Varga, Aron
UNIVERSITY OF
MARYLAND
Sinha, Koustav
VIKING
Weber, Peggy
VIRGINIA POLYTECHNIC
INSTITUTE
Heath, William
First Time Membership Renewals...
Thank You for Your Support!
November/December 2006
We appreciate and know the importance of our members’ continued support of IMAPS and the microelectronics and packaging industries. Our members’ participation has enabled IMAPS to bring leading technical programs, workshops, courses, and symposia into the forefront of the industry and
throughout the world. It is this consistent support that has helped IMAPS achieve its position as the world’s largest electronic packaging society.
IMAPS member support increases the value of the society to the microelectronics industry and increases the value of the society to you and your fellow IMAPS members. Therefore, we have devoted this section to recognizing those individuals who have renewed their support to IMAPS for the
first time, as they join us in advancing and expanding the use of microelectronics through the dissemination of information and the promotion of
the values of the technology.
ORGANIZATIONAL
Chemical Abstracts Service
GERMANY
Klinger, Roswitha
METROPOLITAN
Ruscigno, Tony
BENELUX
Van Hoof, Chris
GREAT LAKES
Flynn, Paul
NEW ENGLAND
Hyman, Mark
CENTRAL TEXAS
Karthik, Thambidurai
INDIANA
Barnes, John
Haffke, Benjamen
NORTHERN CALIFORNIA
McMaster, Mark
GARDEN STATE
Papanu, Victor
54
KEYSTONE
Giardina, Rich
NORTHWEST
McCal, Dennis
Rastogi, Ravi
PHOENIX
Abbaraju, Ravikanth
Tennant, Tracy
TRI-VALLEY
Khaldi, Mohamed
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MARCH/APRIL
2007
In Memoriam – Jack Rubin
The San Diego Chapter reports with sorrow the passing of long-time member Jack A. Rubin on January 16,
2007.
Jack was a great friend and respected colleague to many of us in the technical ceramics industry. Educated
as a geochemist, he had been a dedicated leader in ceramics technologies since 1956 when he began working in advanced ceramics production at Atomics International. In 1967, Jack co-founded Ceradyne, Inc. with
current Chairman Joel Moskowitz. Since moving to San Diego in 1978 to work as Vice President/Technical
Director at Kyocera America, International, Inc., Jack has continued working within the ceramics community at companies such as Interamics, Microelectronic Packaging, Inc. and Polese Company and as a consultant helping many other companies.
Jack always welcomed the most difficult technical challenges and brought his mastery of basic science and
extensive experience along with a sharp sense of humor to attack these problems in the pursuit of their solutions. We were always fortunate to have Jack on our side and are at a great loss with his passing.
55
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A DVA N C I N G
MICROELECTRONICS
ADVERTISER
HOTLINE
IMAPS’ Ad Hotline is provided as a courtesy to our advertisers and readers. Although every attempt is made to ensure accuracy, the
information contained herein cannot be guaranteed.
ADVERTISER
CONTACT
TELEPHONE
EMAIL
WEBSITE
PAGE
AdTech Ceramics
Brian Bukovitz
423-755-5510
bbukovitz@adtechceramics.com
www.adtechceramics.com
45
Durst Consulting
Thomas Kriso
+49-7034-7472-0
sales@durst.com
www.durst.com
47
Hesse & Knipps
Joe Bubel
403-436-9300
bubel@hesse-knipps.com
www.hesse-knipps.com
back cover
Indium Corp. of America
Rick Short
315--381-7554
rshort@indium.com
www.indium.com
11, 13, 15
Laser Processing Technology, Inc.
Connie L. Callow
503-254-2761
c.callow@laserprocessingtech.com
www.laserprocessingtech.com
23
Mini-Systems, Inc.
Darryl Moody
508-695-0203
dmoody@mini-systemsinc.com
www.mini-systemsinc.com
37
Sikama International, Inc.
Al Bonzer
805-962-1000
sales@sikama.com
www.sikama.com
49
Torrey Hills
Ken Kuang
858-558-6666
kkuang@torreyhillstech.com
www.torreyhillstech.com
43
IMAPS
...contact
IMAPS
Headquarters
See staff listing for specific
program areas.
HEADQUARTERS
WHO TO CALL
Michael O’Donoghue, Executive Director, (202) 548-8707, modonoghue@imaps.org, Strategic Planning, Contracts and
Negotiations, Legal Issues, Policy Development, Intersociety Liaisons, Customer Satisfaction
Brian Schieman, Director, Program Development and Technology, (202) 548-8715, bschieman@imaps.org,
Development of Society Programs, Website Development, Database Management, Communication Tools and other
Technology
Ann Bell, Manager, Marketing & Communications, (202) 548-8717, abell@imaps.org, Public Relations, Marketing,
Fundraising, Advertising, Exhibits, Advancing Microelectronics
Rayma Gollopp, Membership Manager, (202) 548-8711, rgollopp@imaps.org, Member Relations and Services
Administration, Dues Processing, Membership Invoicing, Foundation Contributions, Data Entry, Mail Processing, Address
Changes, Telephone Support
Rick Mohn, Operations Manager, (202) 548-8703, rmohn@imaps.org, Financial Management, Accounts
Payable, Accounts Receivable, Human Resources, Employee Benefits, Budget Issues, Business Services, Facilities
Management, Publications Sales
Jackki Morris-Joyner, Technical Program Manager, (305) 382-8433, jmorris@imaps.org, Technical Program Development
and Coordination, ATWs, PDCs, Calls for Papers, Speaker Communications, Proceedings Publication, Event Program Activities
Elizabeth Keller, Meetings Coordinator, (202) 548-8716, ekeller@imaps.org
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CALENDAR
2007
start
end
MARCH
3-6-07
3-7-07
3-18-07
3-19-07
APRIL
4-9-07
4-18-07
MAY
3-19-07
3-22-07
4-12-07
4-20-07
OF
EVENTS
MicroTech 2007
Northamptonshire, UK
IMAPS Chapter Conference/Workshop (Europe) see website for details
www.imaps.org.uk
Global Business Council’s Spring 2007 Conference
Scottsdale, Arizona USA IMAPS Global Business Council
www.imaps.org/programs/gbc07spring.htm
abell@imaps.org
3rd International Conference and Exhibition on Device Packaging
Scottsdale, Arizona USA IMAPS Conference imaps@imaps.org
www.imaps.org/devicepackaging
ATW on Automotive Microelectronics and Packaging
Dearborn, MI
IMAPS Workshop
imaps@imaps.org
www.imaps.org/automotive
International Conference on Electronics Packaging (ICEP 2007)
Tokyo, Japan
IMAPS Chapter Conference/Workshop
www.jiep.or.jp/icep
imaps-j@jiep.or.jp
4-23-07
4-26-07
CICMT 2007 - Ceramic Interconnect and Ceramic Microsystems Technologies
Denver, CO USA
IMAPS Conference imaps@imaps.org
www.cicmt.org
5-1-07
5-1-07
34th Annual New England Symposium & Exhibition
Boxborough, MA USA IMAPS Chapter Conference/Workshop
www.imapsne.org
5-8-07
5-10-07
Military, Aerospace, Space and Homeland Security (MASH): Packaging Issues and Applications
Baltimore, MD
IMAPS Workshop
imaps@imaps.org
www.imaps.org/mash
5-5-07
5-15-07
Garden State Chapter Spring Symposium & Exhibit
Murray Hill, NJ
IMAPS Chapter Conference/Workshop
www.imaps-gs.org
kkriskewic@hed.com
SoCal07
Anaheim Hills, CA
www.sdchapters.org
IMAPS Chapter Conference/Workshop
william.gaines@ngc.com
EMPC 2007
Oulu, Finland
www.empc2007.org
IMAPS Chapter Conference/Workshop
info@imapsnordic.org
31st IMAPS Poland International Conference
Krasiczyn, Poland
IMAPS Chapter Conference/Workshop
www.imaps.org.pl
jurpot@prz.rzeszow.pl
INTERCONEX 2007
Toulouse, France
www.imapsfrance.org
imaps.france@imapsfrance.org
5-16-07
JUNE
6-17-07
SEPTEMBER
9-23-07
9-25-07
5-16-07
6-20-07
9-26-07
9-26-07
IMAPS Chapter Conference/Workshop
OCTOBER
10-8-07
NOVEMBER
11-11-07 11-15-07 IMAPS 2007 - San Jose
San Jose, CA
IMAPS International Symposium
www.imaps40th.org
imaps@imaps.org
11-15-07 11-17-07 ATW on Integrated/Embedded Passives
San Jose, CA
IMAPS Workshop
www.imaps.org/passives
2008
NOVEMBER
11-2-08
10-9-07
11-6-08
IMAPS Germany International Conference
Munich, Germany
IMAPS Chapter Conference/Workshop (Europe)
www.imaps.de
imaps@imaps.org
IMAPS 2008 - Providence
Providence, RI
IMAPS International Symposium
www.imaps.org
martin.oppermann@imaps.de
imaps@imaps.org
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