LTC1045
Programmable
Micropower Hex Translator/
Receiver/Driver
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FEATURES
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DESCRIPTIO
Efficiently Translate Voltage Levels
Internal Hysteresis for Noise Immunity
Output Latches Included
Three-State Outputs
Programmable Power/Speed
Power Can Be Completely Shut Off
±50V on Inputs with External 100k Limit Resistor
1.2µs Response at 100µA Supply Current
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APPLICATIO S
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TTL/CMOS to ±5V Analog Switch Drive
TTL to CMOS (3V to 15V VCC)
ECL to CMOS (3V to 15V VCC)
Ground Isolation Buffer
Low Power RS232 Line Receiver
The ISET pin has several functions. When taken to V + the
outputs are latched and power is completely shut off.
Power/speed can be programmed by connecting ISET to V –
through an external resistor.
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTCMOS is a trademark of Linear Technology Corporation.
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The LTC®1045 is a hex level translator manufactured using
Linear Technology’s enhanced LTCMOSTM silicon gate
process. It consists of six high speed comparators with
output latches and three-state capability. Each comparator’s plus input is brought out separately. The minus inputs
of comparators 1 to 4 are tied to VTRIP1 while 5 and 6 are
tied to VTRIP2.
TYPICAL APPLICATIO
5V
Flat Ribbon Cable Driver/Receiver
5V
20
TTL IN
XMT IN
V+
+
1
VOH
20
VOL
1.4V
–
ISET
V–
DIS
13
XMT OUT
66-FT FLAT RIBBON CABLE
RCV IN
V+
+
1
VOH
ZO = 150Ω
11
150Ω
ADJACENT CONDUCTORS
VOL
12
10
0.5V
–
ISET
V–
10
DIS
13
RCV OUT
TTL OUT
11
12
1045 TA01
XMT IN (5V/DIV)
XMT OUT (1V/DIV)
RCV IN (1V/DIV)
RCV OUT (5V/DIV)
100ns/DIV
045 TA01a
1045fc
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LTC1045
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PACKAGE/ORDER INFORMATION
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(Notes 1, 2)
Total Supply Voltage (V +, V
TOP VIEW
to V –, V
.............. 18V
Output High Voltage (VOH) ...................................... ≤ V +
Input Voltage ....................................18V to (V – – 0.3V)
Output Short-Circuit Duration
(VOH – VOL ≤ 10V) ................................... Continuous
ESD (MIL-STD-883, Method 3015) .................... 2000V
Operating Temperature Range ................. –40°C to 85°C
Storage Temperature Range ................. – 55°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
OH
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ABSOLUTE MAXIMUM RATINGS
OL)
ORDER PART
NUMBER
VOH
1
20 V +
IN1
2
19 OUT1
IN2
3
18 OUT2
IN3
4
17 OUT3
IN4
5
16 OUT4
IN5
6
15 OUT5
IN6
7
14 OUT6
VTRIP2
8
13 DISABLE
VTRIP1
9
12 ISET
V – 10
11 VOL
LTC1045CN
LTC1045CSW
N PACKAGE
SW PACKAGE
20-LEAD PDIP 20-LEAD SO WIDE
TJMAX = 110°C, θJA = 90°C/ W (N)
TJMAX = 110°C, θJA = 90°C/ W (SW)
J PACKAGE
20-LEAD CERDIP
TJMAX = 150°C, θJA = 70°C/ W (J)
LTC1045CJ
OBSOLETE PACKAGE
Consider N Package for Alternate Source
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V + = VOH = 5V, V – = VOL = 0Vunless otherwise specified. (Note 3) .
SYMBOL PARAMETER
IB
Input Bias Current
CONDITIONS
V – ≤ VIN ≤ V +
MIN
TYP
±1
●
IS
Trip Voltage Range (Pins 8, 9)
V + to V – Supply Current
●
V–
DISABLE = V +, RSET = 10k
2.5
●
IOFF
V + to V – Supply Current in Shutdown
DISABLE = ISET = V +
Voltage on ISET (Pin 12)
RSET = 10k
VOH
VOL
ISINK
TTL Output High Voltage
TTL Output Low Voltage
Output Short-Circuit Sink Current
IOUT = – 360µA, V + = 4.5V
IOUT = 1.6mA, V + = 4.5V
VIN = VTRIP – 100mV, VOUT = V +
ISOURCE
Output Short-Circuit Source Current
VIN = VTRIP + 100mV, VOUT = V –
1
0.9
●
●
●
Three-State Leakage Current
0.6
2.4
●
●
IOZ
7.5
5.5
4.0
3.2
DISABLE = V +, VOL ≤ VOUT ≤ VOH
1.25
4.4
0.2
15
Output Resistance to VOH
IOUT ≤ 100µA
ROL
Output Resistance to VOL
IOUT ≤ 100µA
0.005
260
●
100
●
ISET Voltage for Shutdown
DISABLE Input Logic Levels
V + = 4.5V, V – = 0V
V + = 5.5V, V – = 0V
VIH
VIL
Input Supply Differential
(V + – V –) (Note 3)
Output Supply Differential
(VOH – VOL) (Note 3)
0.4
8.0
●
ROH
0.5
V+ – 2
3.5
4.5
10
●
VREF
MAX
●
V + – 0.5
●
●
2.0
●
●
1
475
600
180
250
UNITS
nA
µA
V
mA
mA
nA
µA
V
V
V
V
mA
mA
mA
mA
µA
µA
Ω
Ω
Ω
Ω
V
4.5
0.8
15
V
V
V
3
15
V
1045fc
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LTC1045
AC ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V + = VOH = 5V, V – = VOL = 0V, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
td
Test Circuit Figure 1
RSET = 10k, ±100mV Drive
Test Circuit Figure 2
Response Time
tSETUP
tHOLD
tACC
tIH, tOH
Time Before Rising Edge of ISET that
Data Must Be Present
Time After Rising Edge of ISET that
Data Must Be Present
Falling Edge of DISABLE to Logic
Level (from Hi-Z State)
Rising Edge of DISABLE to Hi-Z State
MIN
MAX
UNITS
250
350
80
ns
ns
ns
Test Circuit Figure 2
0
ns
Test Circuit Figure 3
165
ns
Test Circuit Figure 3
200
ns
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The maximum differential voltage between any two power pins
(V +, V –, VOH and VOL) must not exceed 18V. The maximum recommended
operating differential is 15V.
TYP
●
Note 3: During operation near the maximum supply voltage limit, care
should be taken to avoid or suppress power supply turn-on and turn-off
transients, power supply ripple or ground noise; any of these conditions
must not cause a supply differential to exceed the absolute maximum
rating.
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TYPICAL PERFORMANCE CHARACTERISTICS
I + vs RSET
I + vs Temperature
5
Delay Time vs RSET
1.2
5
V + = 5V
3
RSET = 0
2
RSET = 10k
1.0
DELAY TIME (µs)
V + TO V – CURRENT (mA)
4
3
2
1
1
TA = 25°C
V + = VOH = 5V
V – = VOL = 0V
VIN = VTRIP ±100mV
0.8
0.6
0.4
0.2
RSET = 1M
–25
75
0
25
50
TEMPERATURE (°C)
100
125
0
100
1k
10k
RSET (Ω)
100k
0
100
1M
1k
10k
RSET (Ω)
100k
1M
1045 G03
1045 G02
1045 G01
Hysteresis vs RSET
VREF vs Temperature
2.5
20
V + = 5V
2.0
RSET = 1M
1.5
RSET = 10k
1.0
V + = 5V
18
COMPARATOR HYSTERESIS (mV)
0
–50
VOLTAGE ON ISET PIN (V)
V + TO V – CURRENT (mA)
4
TA = 25°C
V + = VOH = 5V
V – = VOL = 0V
0.5
16
14
12
10
8
6
4
2
0.1
–50
–25
75
0
25
50
TEMPERATURE (°C)
100
125
1045 G04
0
100
1k
10k
RSET (Ω)
100k
1M
1045 G05
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LTC1045
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PIN FUNCTIONS
VOH (Pin 1): High Level to which the Output Switches.
VOL (Pin 11): Low Level to which the Output Switches.
IN1 to IN7 (Pins 2 to 7): Six Comparator Inputs; Voltage
Range = V – to V – + 18V.
ISET (Pin 12): This has three functions: 1) RSET from this
pin to V – sets bias current, 2) when forced to V + power is
shut off completely and 3) when forced to V + outputs are
latched.
VTRIP2 (Pin 8): Trip Point for Last Two Comparators
(Inputs 5,6); Voltage Range = V – to V + – 2V.
VTRIP1 (Pin 9): Trip Point for First Four Comparators
(Inputs 1 to 4); Voltage Range = V – to V + – 2V.
DISABLE (Pin 13): When high, outputs are Hi-Z.
OUT6 to OUT1 (Pins 14 to 19): Six Driver Outputs.
V + (Pin 20): Comparator Positive Supply.
V – (Pin 10): Comparator Negative Supply.
TEST CIRCUITS
5V
t r ≤ 10ns
V+
+
VIN
5V
VOH
–
VTRIP = 1.2V
t IH
OUTPUT
VOL
V–
V+
50pF
5V
90%
DISABLE
+
50%
0V
10%
t IH
OUTPUT
–
tr
1.3V
1.1V
90%
DISABLE
90%
5V
VOL
t r = t f ≤ 10ns
90%
–5V
1045 F03a
10%
10%
t r ≤ 10ns
td
td
t OH
5V
2.5V
OUTPUT
10k
OUTPUTS
1.2V
VIN
10pF
tf
90%
VOH
DISABLE
50%
10k
0V
1045 F01
Figure 1. Response Time Test Circuit
10%
t OH
OUTPUT
V
+
10pF
5V
OUTPUTS
DISABLE
VIN
+
VTRIP = 1.2V
–
10%
–5V
1045 F03b
t r ≤ 10ns
90%
t ACC
100mV
DISABLE
50%
10%
VTRIP
VIN
tACC
OUTPUT
–100mV
t HOLD
t SETUP
50pF
5V
5V
OUTPUTS
DISABLE
ISET
50%
–5V
1045 F03c
0V
Figure 3. Three-State Output Test Circuit
Conditions: V + = VOH = 5V, V – = VOL = 0V
5V
ISET
50%
0V
1045 F02
Figure 2. Latch Test Circuit
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LTC1045
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BLOCK DIAGRAM
V OH
V+
20
1
V+
V OH
+
IN1 2
LEVEL
SHIFT
19 OUT1
LATCH
–
DIS
V BIAS
V–
LE
VOL
V+
V OH
+
IN2 3
18 OUT2
–
DIS
VBIAS
LE
V–
V OL
V+
V OH
+
IN3 4
17 OUT3
–
DIS
VBIAS
LE
V–
V OL
V+
V OH
+
IN4 5
16 OUT4
–
DIS
VBIAS
LE
V–
V OL
V+
V OH
+
IN5 6
15 OUT5
–
DIS
VBIAS
LE
V–
V OL
V+
V OH
+
IN6 7
14 OUT6
–
DIS
VBIAS
LE
V–
V OL
13 DISABLE
VREF ≈ 1.6V
VTRIP1 9
VBIAS
BIAS
GENERATOR
∼8k
LATCH
ENABLE
SHUTDOWN
8
VTRIP2
10
V–
RSET
12
ISET
11
VOL
1045 BD
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LTC1045
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APPLICATIONS INFORMATION
The LTC1045 consists of six voltage translators and
associated control circuitry (see Block Diagram). Each
translator has a linear comparator input stage with the
positive input brought out separately. The negative inputs
of the first four comparators are tied in common to VTRIP1
and the negative inputs of the last two comparators are
tied in common to VTRIP2. With these inputs the switching
point of the comparators can be set anywhere within the
common mode range of V – to V + – 2V. To improve noise
immunity each comparator has a small built-in hysteresis.
Hysteresis varies with bias current from 7mV at low bias
current to 20mV at high bias current (see typical curve of
Hysteresis vs RSET).
is turned off to the linear circuitry, the CMOS output logic
is powered and maintains the output state. With no DC
load on the output, power dissipation, for all practical
purposes, is zero.
Latching the output is fast—typically 80ns from the rising
edge of ISET. Going from the latched to flow-through state
is much slower—typically 1.5µs from the falling edge of
ISET. This time is set by the comparator’s power-up time.
During the power-up time, the output can assume false
states. To avoid problems, the output should not be
considered valid until 2µs to 5µs after the falling edge of
ISET.
Putting the Outputs in Hi-Z State
Setting the Bias Current
Unlike CMOS logic, any linear CMOS circuit must draw
some quiescent current. The bias generator (Block Diagram) allows the quiescent current of the comparators to
be varied. Bias current is programmed with an external
resistor (see typical curve of I + vs RSET). As the bias
current is decreased, the LTC1045 slows down (see
typical curve of Delay Time vs RSET).
Shutting Power Off and Latching the Outputs
In addition to setting the bias current, the ISET pin shuts
power completely off and latches the translator outputs.
To do this, the ISET pin must be forced to V + – 0.5V. As
shown in Figure 4, a CMOS gate or a TTL gate with a
resistor pull-up does this quite nicely. Even though power
V+
4.5V TO 15V
A DISABLE input sets the six outputs to a high impedance
state. This allows the LTC1045 to be interfaced to a data
bus. When DISABLE = “1” the outputs are high impedance
and when DISABLE = “0” they are active. With TTL
supplies, V + = 4.5V to 5.5V and V – = GND, the DISABLE
input is TTL compatible.
Power Supplies
There are four power supplies on the LTC1045: V +, V –,
VOH and VOL. They can be connected almost arbitrarily, but
there are a few restrictions. A minimum differential must
exist between V + and V – and VOH and VOL. The V + to V –
differential must be at least 4.5V and the VOH to VOL
differential must be at least 3V. Another restriction is
caused by the internal parasitic diode D1 (see Figure 5).
V+
20 4.5V TO 5.5V
20
D1
V+
DISABLE
LTC1045
DATA
12
10
P1
100k
LTC1045
V+
VOH
12
VOL
OUTPUT
PIN
V+
10
N1
DISABLE
1045 F05
VOL
(A) CMOS
(B) TTL
Figure 4. Driving the ISET Pin with Logic
VOL
1045 F04
Figure 5. Output Driver
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LTC1045
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APPLICATIONS INFORMATION
Because of this diode, VOH must not be greater than V +.
Lastly, the maximum voltage between any two power
supply pins must not exceed 15V operating or 18V absolute maximum. For example, if V + = 5V, V – or VOL should
be no more negative than – 10V. Note that VOL should not
be more negative than – 10V even if the VOH to VOL
differential does not exceed the 15V maximum. In this
case the V + to VOL differential sets the limit.
Input Voltage
Output Drive
Output drive characteristics of the LTC1045 will vary with
the power supply voltages that are chosen. Output impedance is affected by V +, VOH and VOL. V – has no effect on
output impedance. Guaranteed drive characteristics are
specified in the table of electrical characteristics for
V + = VOH = 5V and V – = VOL = 0V. Figures 6 and 7 show
relative output impedance for other supply combinations.
In general, output impedance is minimized if V + to VOH is
minimized and VOH to VOL is maximized.
4
2
VOH – VOL = 3V
ROL/[ROL AT (VOH – VOL) = 5V]
ROH /[ROH AT (VOH – VOL) = 5V AND (V + – VOH) = 0V]
The LTC1045 has no upper clamp diodes as do conventional CMOS circuits. This allows the inputs to exceed the
V + supply. The inputs will break down approximately 30V
above the V – supply. If the input current is limited with
100kΩ, the input voltage can be driven to at least ±50V
with no adverse effects for any combination of allowed
power supply voltages. Output levels will be correct even
under these conditions (i.e., if the input voltage is above
the trip point, the output will be high and if it is below, the
output will be low).
3
VOH – VOL = 4V
2
VOH – VOL = 5V
1
SPECIFIED POINT
SPECIFIED POINT
1
VOH – VOL = 10V
0
0
2
4
8
6
10
V + – VOH (V)
12
14
16
1045 F06
Figure 6. Relative Output Sourcing
Resistance (ROH) vs V + – VOH
0
0
2
4
8
6
10
VOH – VOL (V)
12
14
16
1045 F07
Figure 7. Relative Output Sinking
Resistance (ROL) vs VOH – VOL
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LTC1045
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TYPICAL APPLICATIONS
ECL to CMOS/TTL Logic
5V
V+
ECL
IN
V OH
THREESTATE
BUFFER
+
IN
COMP
LATCH
OUT
–
VTRIP
V–
ISET
VOL
CMOS/TTL
(VCC = 5V)
DIS
1045 TA02
30k
~ –1.3V
10k
–5.2V
TTL/CMOS (VCC = 5V) to High Voltage CMOS (VCC = 15V)
15V
V+
TTL/CMOS
(VCC = 5V)
V OH
THREESTATE
BUFFER
+
IN
COMP
VTRIP
LATCH
OUT
–
V–
ISET
VOL
CMOS
(VCC = 15V)
DIS
~1.4V
1045 TA03
20k
High Voltage CMOS (VCC = 15V) to TTL/CMOS (VCC = 5V)
5V
V+
V OH
10k
CMOS
(VCC = 15V)
IN
THREESTATE
BUFFER
+
COMP
VTRIP
~2.5V
10k
LATCH
OUT
–
V–
ISET
VOL
TTL/CMOS
(VCC = 5V)
DIS
1045 TA04
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LTC1045
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TYPICAL APPLICATIONS
TTL/CMOS (VCC = 5V) to Low Voltage CMOS (VCC = 3V)
TTL/CMOS
(VCC = 5V)
IN
5V
3V
V+
V OH
THREESTATE
BUFFER
+
COMP
VTRIP
LATCH
OUT
–
V–
ISET
VOL
CMOS
(VCC = 3V)
DIS
~1.5V
1045 TA05
100k
TTL/CMOS Logic Levels to ±5V Analog Switch Driver
5V
V+
TTL/CMOS
(VCC = 5V)
IN
+
VTRIP
–
V OH
VDD
THREESTATE
BUFFER
COMP
LATCH
±5V IN
SW
±5V OUT
OUT
VSS
V–
ISET
VOL
CMOS ANALOG
SWITCH
(CD4016 FOR
EXAMPLE)
DIS
~1.4V
1045 TA06
20k
–5V
TTL/CMOS (VCC = 5V) to 10V/– 5V Clock Driver
10V
V+
TTL/CMOS
(VCC = 5V)
IN
THREESTATE
BUFFER
+
COMP
VTRIP
V OH
LATCH
OUT
10V TO –5V
CLOCK DRIVER
–
V–
ISET
VOL
~1.4V
20k
DIS
1045 TA07
–5V
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LTC1045
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TYPICAL APPLICATIONS
Logic Ground Isolation when Two Grounds are within LTC1045 Common Mode Range
SYSTEM A
SYSTEM B
VCC B = 5V
VCC A = 5V
V+
TTL/CMOS LOGIC
IN
V OH
THREESTATE
BUFFER
+
2.7k
COMP
VTRIP
VTRIP = 1.35V
LATCH
OUT
LOGIC
OUT
–
1k
SETS LOGIC
THRESHOLD REFERRED
TO GND A
GND A
V–
ISET
VOL
DIS
GND B
V – = –5V
1045 TA08
(GND B – V – + VTRIP) ≤ GND A ≤ (GND B + VCC B – 2V – VTRIP)
Coax Cable Driver/Receiver
5V
5V
20
TTL IN
XMT IN
V+
+
1
VOH
VOL
1.4V
–
V
ISET
–
DIS
13
XMT OUT
20
30-FT RG 174
COAX CABLE
11
RCV IN
V+
+
1
VOH
50Ω
VOL
12
10
0.2V
–
ISET
V–
DIS
13
11
RCV OUT
TTL OUT
50pF
12
10
1045 TA10
RCV OUT (5V/DIV)
RCV IN (1V/DIV)
XMT OUT (1V/DIV)
XMT IN (5V/DIV)
200ns/DIV
1045 TA10a
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LTC1045
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TYPICAL APPLICATIONS
±5V Analog Switch Driver
5V
5V
1
VOH
2 IN1
LTC1045
+
V+
14
20
CD4016
1
SW A
2
±5V
13
OUT1 19
–
3
3 IN2
+
SW B
4
±5V
9
±5V
11
±5V
5
OUT2 18
–
8
4 IN3
TTL OR
CMOS LOGIC
INPUTS
+
SW C
6
OUT3 17
–
10
5 IN4
+
SW D
12
OUT4 16
–
7
6 IN5
+
1045 TA09
OUT5 15
–
7 IN6
+
–5V
OUT6 14
–
8 VTRIP2
9 VTRIP1
10
V–
DIS
ISET
VOL
13
12
11
~1.5V
100k
–5V
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LTC1045
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TYPICAL APPLICATIONS
Logic Systems DC Isolation
SYSTEM A
SYSTEM B
SYSTEM B
POWER SUPPLY
1
VOH
2 IN1
LTC1045
+
V+
20
OUT1 19
–
3 IN2
+
OUT2 18
–
4 IN3
+
OUT3 17
–
TTL OR
CMOS
5 IN4
+
CMOS
OR TTL
OUT4 16
–
6 IN5
+
OUT5 15
–
7 IN6
+
OUT6 14
–
SYSTEM A
POWER SUPPLY
VTRIP*
8 VTRIP2
DIS
13
THREE-STATE
CONTROL
1µF
9 VTRIP1
ISET
12
1µF**
10
V–
VOL
11
†
100k
SYSTEM A
GND
* SET VTRIP TO HALF WAY BETWEEN
VOH AND VOL OF SYSTEM A
** SHUNTS COMMON MODE SIGNAL
† PROVIDES LEAKAGE PATH FOR
TOTALLY ISOLATED SYSTEMS
SYSTEM B
GND
1045 TA11
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LTC1045
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TYPICAL APPLICATIONS
24V Relay Supply from 12V/15V Supply
V+
1
VOH
V+
LTC1045
2 IN1
+
20
OUT1 19
–
3 IN2
+
OUT2 18
–
4 IN3
+
OUT3 17
–
5 IN4
V+
+
OUT4 16
–
6 IN5
1N4148
+
1N4148
OUT5 15
–
V+
10k
7 IN6
24V
+
1µF
+
10µF
RL ≥ 1k
OUT6 14
–
10k
10k
8 VTRIP2
9 VTRIP1
10
13
DIS
12
ISET
V–
11
VOL
100k
10k
1045 TA13
1000pF
RS232 Receiver
5V
20
30V
100k 2
V+
+
–30V
9
0.9V
1
VOH
VOL
LTC1045
DIS
11
ISET
13
V–
12
10
19
TTL OUT
–
10k
NOTE: INPUTS HAVE NO
INTERNAL PULL-DOWN
1045 TA12
1045fc
13
LTC1045
U
TYPICAL APPLICATIONS
LED Driver
V+
5V TO 15V
1
VOH
V+
LTC1045
2 IN1
+
20
OUT1 19
–
3 IN2
+
OUT2 18
–
4 IN3
+
OUT3 17
–
LOW TURNS
LED ON
5 IN4
+
OUT4 16
TO LEDs
–
6 IN5
+
OUT5 15
–
7 IN6
+
OUT6 14
–
8 VTRIP2
DIS
9 VTRIP1
10
ISET
V–
VOL
13
12
11
≈ 1.5V
100k
V+
5V
REF LED
6
–
5
+
100Ω
3
+
1
358
2
8
7
358
2N2905
(USE HEAT SINK)
4
2N2222
–
≈ 1.5V
REGULATES
LED CURRENT
R
(ADJUSTS LED CURRENT)
1045 TA14
1045fc
14
LTC1045
U
TYPICAL APPLICATIONS
Multiwindow Comparator and Display
V+
5V
1 V
OH
2 IN1
VREF
LTC1045
+
20
V+
OUT1 19
–
R
VH
3 IN2
+
VIN > VREF
OUT2 18
–
10k
4 IN3
+
OUT3 17
–
10k
5 IN4
+
OUT4 16
–
10k
6 IN5
+
OUT5 15
–
10k
7 IN6
+
OUT6 14
GI MV 57164*
BAR GRAPH DISPLAY
–
8 VTRIP2
DIS
9 VTRIP1
ISET
VIN
10
1
V–
VOH
10k
2 IN1
VOL
LTC1045
+
V+
13
12
11
20
OUT1 19
–
10k
3 IN2
+
OUT2 18
–
10k
4 IN3
+
OUT3 17
–
10k
5 IN4
+
OUT4 16
–
10k
6 IN5
+
OUT5 15
–
10k
7 IN6
+
OUT6 14
–
VL
8 VTRIP2
9 VTRIP1
10
V–
5V
V–
DIS
ISET
VOL
VIN < VL
13
* FOR LED CURRENT CONTROL
SEE LTC1045 LED DRIVER
12
11
VIN ≤ V + – 2
100(VREF – VH)
R=
(VH – VL)
EACH WINDOW BETWEEN VH AND VL
EQUALS 1/10(VH – VL)
(VH – VL) ≥ 0.5V
1045 TA15
1045fc
15
LTC1045
U
TYPICAL APPLICATIONS
ECL to CMOS from Single 5V Supply
5V
1
VOH
2 IN1
ECL IN
LTC1045
+
V+
20
OUT1 19
–
3 IN2
ECL IN
+
OUT2 18
–
4 IN3
ECL IN
+
OUT3 17
–
5 IN4
ECL IN
+
OUT4 16
–
10k
6 IN5
5V
CMOS OUT
CMOS OUT
CMOS OUT
CMOS OUT
1µF
+
1N4148
OUT5 15
–
10k
10k
7 IN6
+
1N4148
OUT6 14
+
10µF
–
8 VTRIP2
DIS
9 VTRIP1
10
ISET
V–
VOL
13
12
11
22k
≈ –3.3V
51k
≈ –1.29V
10k
0.01µF
33k
1000pF
NEGATIVE SUPPLY GENERATOR
1045 TA16
1045fc
16
LTC1045
U
PACKAGE DESCRIPTION
J Package
20-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
1.060
(26.924)
MAX
CORNER LEADS OPTION
(4 PLCS)
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
0.220 – 0.310 0.025
(5.588 – 7.874) (0.635)
RAD TYP
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.005
(0.127)
MIN
0.300 BSC
(0.762 BSC)
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
0.125
(3.175)
MIN
0.045 – 0.065
(1.143 – 1.651)
0.014 – 0.026
(0.356 – 0.660)
0.100
(2.54)
BSC
J20 1298
OBSOLETE PACKAGE
1045fc
17
LTC1045
U
PACKAGE DESCRIPTION
N Package
20-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
1.040*
(26.416)
MAX
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
0.255 ± 0.015*
(6.477 ± 0.381)
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
(
+0.035
0.325 –0.015
+0.889
8.255
–0.381
)
0.045 – 0.065
(1.143 – 1.651)
0.020
(0.508)
MIN
0.065
(1.651)
TYP
0.125
(3.175)
MIN
0.005
(0.127)
MIN
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.100
(2.54)
BSC
0.018 ± 0.003
(0.457 ± 0.076)
N20 1098
1045fc
18
LTC1045
U
PACKAGE DESCRIPTION
SW Package
20-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
0.496 – 0.512*
(12.598 – 13.005)
20
19
18
17
16
15
14
13
12
11
0.394 – 0.419
(10.007 – 10.643)
NOTE 1
0.291 – 0.299**
(7.391 – 7.595)
0.010 – 0.029 × 45°
(0.254 – 0.737)
1
2
3
4
5
6
7
8
9
0.093 – 0.104
(2.362 – 2.642)
10
0.037 – 0.045
(0.940 – 1.143)
0° – 8° TYP
0.009 – 0.013
(0.229 – 0.330)
NOTE 1
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
BSC
0.014 – 0.019
(0.356 – 0.482)
TYP
0.004 – 0.012
(0.102 – 0.305)
S20 (WIDE) 1098
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1045fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC1045
U
TYPICAL APPLICATION
Power MOSFET Driver Low Power Consumption Stepper Motor Driver
+VM
1
∅1
VOH
LTC1045
2 IN1
+
V+
B
20
OUT1 19
–
∅1
TTL STEPPER
MOTOR PHASE
SIGNALS
3 IN2
+
RH
BUZ171
**
4-PHASE BIFILAR
STEPPER MOTOR
OUT2 18
–
∅2
4 IN3
+
OUT3 17
–
∅2
5 IN4
+
*
OUT4 16
*
–
5V
6 IN5
+
51k
≈ 1.4V
–
7 IN6
+
20k
STEP A
CLOCK
BUZ71A
BUZ71A
**
OUT5 15
**
BUZ71A
**
BUZ71A
**
OUT6 14
–
C
8 VTRIP2
DIS
13
MOTOR GND
9 VTRIP1
RP
0.1µF
ISET
12
A
10
V–
VOL
11
≈ 0.2V
B
tON tHOLD
1k
FULL STEP DRIVER (5V ≤ VM ≤ 15V)
t ON ≈ 3RPC
RpC = L/R L IS WINDING INDUCTANCE
R = RWINDING + RDS(ON)P + RDS(ON)N
IHOLD ≈ VM /RH
*VARISTOR GE V24ZA50
**FOR VM ≥ 10V ADD 470Ω IN SERIES
WITH LTC1045 OUTPUTS
1045 TA17
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1016
Ultrafast Precision Comparator
10ns Propagation Delay
LT1039
Triple RS232 Driver/Receiver with Shutdown
±12V Supply, No Supply Current in Shutdown
LTC1440/LTC1441/LTC1442
Ultralow Power, Single/Dual Comparator with Reference
2.8µA Supply Current
1045fc
20
Linear Technology Corporation
LT/LCG 1101 REV C 1.5K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 1988