PCI-DAS08 Specifications

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PCI-DAS08
Specifications
Document Revision 2.2, February, 2010
© Copyright 2010, Measurement Computing Corporation
Specifications
Typical for 25 °C unless otherwise specified.
Specifications in italic text are guaranteed by design.
Analog input
Table 1. Analog input specifications
Parameter
Specification
A/D converter type
Resolution
Ranges
A/D pacing
A/D triggering modes
AD1674J
12 bits
±5 V
Software polled
Digital:
Software polling of digital input (DIN1) followed by pacer
loading and configuration.
Software polled
Bipolar
8 single-ended
10 µs
40 kHz typical, PC dependent
±1 LSB
No missing codes guaranteed
±1 LSB
±180 ppm/°C
±60 ppm/°C
±60 nA max over temperature
10 MegOhm min
±35 V
(Rate = 1-50 kHz, Average % ± 2 bins, Average % ± 1 bin, Average # bins)
Bipolar (5 V): 100% / 100% / 3 bins
Data transfer
Polarity
Number of channels
A/D conversion time
Throughput
Relative accuracy
Differential linearity error
Integral linearity error
Gain drift (A/D specs)
Zero drift (A/D specs)
Input leakage current
Input impedance
Absolute maximum input voltage
Noise distribution
Digital input / output
Table 2. Digital I/O specifications
Parameter
Specification
Digital type (main connector):
Output: 74ACT273
Input:
74LS244
3 fixed input, 4 fixed output
7
3.94 volts min @ -24 mA (Vcc = 4.5 V)
0.36 volts max @ 24 mA (Vcc = 4.5 V)
2.0 volts min, 7 volts absolute max
0.8 volts max, -0.5 volts absolute min
INTA# - mapped to IRQn via PCI BIOS at boot-time
Programmable through PCI controller:
0 = disabled
1 = enabled (default)
Configuration
Number of channels
Output high
Output low
Input high
Input low
Interrupts
Interrupt enable
1
PCI-DAS08
Specifications
Parameter
Specification
Interrupt sources
External source (EXT INT)
Polarity programmable through PCI controller:
1 = active high
0 = active low (default)
Counter section
Table 3. Counter specifications
Parameter
Specification
Counter type
Configuration
Counter 0 - User counter 1
82C54 device
3 down counters, 16-bits each
Source:
Available at user connector (CTR1CLK)
Gate:
Available at user connector (CTR1GATE)
Output:
Available at user connector (CTR1OUT)
Source:
Available at user connector (CTR2CLK)
Gate:
Available at user connector (CTR2GATE)
Output:
Available at user connector (CTR2OUT)
Source:
Buffered PCI clock (33 MHz) divided by 8.
Gate:
Available at user connector (CTR3GATE)
Output:
Available at user connector (CTR3OUT) and may be
software configured as Interrupt Pacer.
10 MHz max
30 ns min
50 ns min
50 ns min
50 ns min
0.8 V max
2.0 V min
0.4 V max
3.0 V min
Counter 1 - User counter 2
Counter 2 - User counter 3 or Interrupt Pacer
Clock input frequency
High pulse width (clock input)
Low pulse width (clock input)
Gate width high
Gate width low
Input low voltage
Input high voltage
Output low voltage
Output high voltage
Power consumption
Table 4. Power consumption specifications
Parameter
Specification
+5 V operating (A/D converting to FIFO)
+12 V
-12 V
251 mA typical, 436 mA max
13 mA typical, 19 mA max
17 mA typical, 23 mA max
Environmental
Table 5. Environmental specifications
Parameter
Specification
Operating temperature range
Storage temperature range
Humidity
0 to 50 °C
-20 to 70 °C
0 to 90% non-condensing
2
PCI-DAS08
Specifications
Main connector and pin out
Table 6. Main connector specifications
Parameter
Specification
Connector type
Compatible cables
37-pin male "D" connector
C37FF-x cable
C37FFS-x cable
CIO-MINI37
SCB-37
ISO-RACK08
CIO-MINI37
SCB-37
ISO-RACK08
CIO-EXP16
CIO-EXP32
CIO-EXP-GP
CIO-EXP-BRIDGE16
CIO-EXP-RTD16
Compatible accessory products
with the C37FF-x cable
Compatible accessory products
with the C37FFS-x cable
Table 7. Main connector pin out
Pin
Signal Name
Pin
Signal Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
+12V
CTR1 CLK
CTR1 OUT
CTR2 CLK
CTR2 OUT
CTR3 OUT
DOUT1
DOUT2
DOUT3
DOUT4
DGND
LLGND
LLGND
LLGND
LLGND
LLGND
LLGND
LLGND
10V REF
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
-12V
CTR1 GATE
CTR2 GATE
CTR3 GATE
EXT INT
DIN1
DIN2
DIN3
DGND
+5V
CH7
CH6
CH5
CH4
CH3
CH2
CH1
CH0
3
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E-mail: info@mccdaq.com
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PCI-DAS08-spec.doc
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