IEEE TRANSACTIONS ON APPLIED SUPERCONDUCX’IVITY,VOL. 5, NO. 2, J U N E 1995
2984
Novel Tri-Stable Elements for Binary RSFQ Circuitry
Dmitry Y. Zinoviev
Department of Physics, State University of New York, Stony Brook, NY 11794-3800
Oleg A. Mukhanov
Hypres, Inc., 175 Clearbrook Rd., Elmsford, NY 10523
Abstract- A set of tri-stable RSFQ cells has been
designed, simulated, fabricated in Hypres, Inc. uping 1 kA/cm2 low-T, Niobium technology and successfully tested. The elements (including a generic X cell,
XOR and inverted XOR cells) are fully compatible
with binary RSFQ circuits and do not require any input/output conversion. Their use provides an effective way to simplify some complex functional RSFQ
blocks. We also describe a novel automated setup for
testing of digital superconductive devices which has
been used for experimental study of the cells.
I. INTRODUCTION
In the paper we describe a set of new elements for the
Rapid Single Flux Quantum (RSFQ) family [l]. Superconductor quantum interferometers which are used for information storage in an RSFQ device can trap magnetic
, RSFQ cells typically use n = 0 , l or
flux CP % n ~ O Oand
R = - l , O . It has been shown [2] that there exist tri-stable
circuits (like Josephson ternary flip-off-flop, FOF) that
may be most naturally implemented using n = - 1 , O , 1.
Another element similar to the FOF has been proposed
in 131 (none of these elements has been fabricated). The
most significant disadvantage of tri-stable cells is that
they realize ternary (rather than binary) logic and hence
cannot be integrated with binary circuits without special interfaces. Yet it is possible to shadow the ternary
nature of tri-stable elements. For example, it has been
suggested [4] to use the ternary FOF as a corrector for a
binary analog-to-digital converter (ADC).
The goal of this work was to compose a series of wellknown binary cells (like XOR and inverted XOR, NXOR)
using a FOF (also called an X cell), as the base element.
Those cells have a simple structure, are fast, have wide
theoretical operating margins (see below) and are robust
due to the fact that the opposite data inputs are totally
separated from each other and hence are race-free.
’
Manuscript received February 3, 1995.
The work was supported by DoD’s University Research Initiative (AFOSR Grant #F49620-92-5-0508) and p-artiallyby International Soros Fund (grant #MDP000) and BMFT Germany under
the project 13N 6329. The work on an X Cell was partially s u p
ported by NASA contract #NAS7-1298.
There exist a number of possible applications for such
tri-stable RSFQ cells. The most useful among them is
the above-mentioned ADC corrector. An XOR and an
NXOR serve as important parts of a pseudo random number generator (PRG) (see, e.g., [5]) and may be used in a
general-purpose ALU.
11. DESIGNAND IMPLEMENTATION
The X cell is the basic element to build XOR and NXOR
cells. There are two modifications of this basic cell (we call
them XO and XI),both with two inputs and t w o u t p u t s
desciibed with the followingformulae: A* = A nB,B* =
B n A for Xo modification, and A* = AUB, B* = BUxfor
XImodification (see also Table I). The cell transmits an
input signal to the corresponding output in case it is not
equal to the other input signal; otherwise it sends either
0 (XO)
or 1(XI) to both outputs.
The cell is implemented as a two-junction interferometer JA7-LO-JB7 (Fig. 1) with a number of comparators
that provide adequate write-in (JA7-JAS and JB~-JBS)
and read-out ( J A ~ I - J Aand
~ J B ~ I - J B ~ ) .There are also
two buffers (JA5-JA6 and JB5-JB6) to protect input lines
from the influence of output signals. The design of the interferometer allows it to trap either a single flux quantum
with clockwise persistent current or a quantum of the opposite polarity with counterclockwise persistent current,
or to be in zero-flux state; hence we have three internal
stable states. The cell works in the synchronous mode
and is controlled by clock input Inputc.
The new tri-stable exclusive OR (XOR) cell can be composed from an XO cell and an asynchronous OR gate [l]
(Fig.2) and thus is different from those described in [5]
and [l]. The formal description of how the cell operates
is as follows: A @I B e (A E B) (“not-equivalent”). It
means that when exactly one input signal is equal to 1,
it is OR’ed with the other one and hence propagates to
TABLE I
TRUTH
TABLE
FOR TRI-STABLE-STATE
GATES
B
XolA*
XolB*
X1IA*
X1IB*
A@B
0
0
0
1
.I
1
0
1
0
0
1
0
0
1
0
0
1
1
0
1
1
0
1
1
0
1
A
1051-8223/95$04.00 0 1995 IEEE
1
0
A@B
1
0
0
1
2985
WZ
4:::
INPUT-B
1
I*
Clock,
OUTPUT
J8
LBW
J85
C)
.:.:.:.x
;
.............
.............
...........
.............
.............
.............
the output, while if the both inputs are either 0 or 1 they
“annihilate” each other.
An inverted exclusive OR (NXOR) (Fig. 3) cell is the
natural completion of the set of tri-stable elements. It
is described with the formula: A 8 B e ( A SE B ) and
performs the “equivalent” function. It can be built combining an X I cell with an asynchronous AND gate [l].Its
dynamics is quite similar to that of the XOR element.
For the purpose of testing the cells were simulated and
laid out with two separate dc power supply lines. One of
them is used to feed the cell itself (kernel), and the other
serves the auxiliary circuits (like DC/SFQ and SFQ/DC
converters and transmission lines) (frame). This approach let us investigate the properties of the cells independently from the environment and the influence of
the environment onto the cells.
The cells were simulated using PSCAN program [6] and
fabricated in Hypres, Inc. [7].
Clock
I
INPUT-C
111. TESTING
METHODOLOGY
AND RESULTS
A new automated testing setup has been developed in
SUNY for experimental study of the elements. Its hardware part is an advanced version of the system developed
earlier a t NIST [8]. The setup (see Fig. 4) consists of three
main parts: a cryoprobe with passive LF filters located
in a dewar (in a shielded room), a set of 48 ADCs and
48 DACs, and an IBM P C running Octopus [9] software.
Presently, Octopus is used for nearly all low-frequency experiments with RSFQ devices and circuits developed in
SUNY.
A . Hardware
The original setup provides 12-bit ADCs (with the input range -80.. .80 mV) and 12-bit DACs (with the output range -10.. . 10 V ) loaded by 2 kR resistors to emu-
2986
r
27
-L
omorugsmur
IBM PC (MS-D0SILI.u OS) RULSO e ( 0 p ~
Fig. 4 . Block-diagramof Octopus, an automated setup for testing
.
superconductivedigital circuits.
6
0.00
* 0.10
-
a 0.00
> 0.10
a 0.00
1
U(OUT-A)
L
(OUT,B)
I
0.0
I
I
100.0 200.0
I
I
I
0
8
300.0 400.0 500.0 600.0 700.0 800.0 900.0 1000.0 1100.0
Tiaorr
Fig. 5. Experimental verification of low-frequencyoperation of the
X cell. From top to bottom: currentsin inputs A, B, Clock (in mA);
voltages at outputs A and B (in mV).
C. Octopus Software Environment
Fig. 3 . NXOR cell: (a) schematics of the cell, (b) microphotograph of the chip, and (c) block-diagram. The circuit parameters
are as follows: J.45 = J B ~
= 245pA, J A =
~ J B =
~ 220pA, JAB =
JBB = 1 9 2 . 5 p A , J ~ 7 = J337 = 147.5pA, Jc5 = 125pA,Joo =
1 4 7 . 5 p A , J ~ l o= J B ~ O
= 1 4 ? . 5 p A , J ~ l l= J ~ l =
l 1 7 1 . 3 p A , z ~ 3=
1 ~ 3= 140.6pAj1c3 = 123.8pAj1c4 = 1 9 1 . 3 p A , L ~ 8= LBg =
3 . 9 7 p H , L c g ~= LCgB = 6 . 0 0 p H , L ~ l o= L B ~ O
= 6 . 4 2 p H , L ~ g=
L B ~= 2 . 5 8 p H , L ~ 1 3 = L ~ 1 3 = O . ~ ~ P H , L J=A ~
LJB7 =
0.18pH,LjcS = O . l l p H ,Lcg = 0.23pH, L L O O= 0.60pH.
late current sources. The values of an LSB for ADC and
DAC are 4.88 pV and 4.88 m V , correspondingly. The
setup is connected to a PC via two 8-bit MetraBus'es.
The following upgrades to the original setup [SI have
been made: 1) an electro-mechanical programmable relay has been added to each channel. The relay allows to
disconnect a DAC from the response channel, what dramatically increases the accuracy of the setup and reduces
RMS noise to 1 . ..2 LSB; 2) current amplifiers able to
produce current up to 125 mA have been attached to the
first 4 channels to provide dc power from the setup rather
than from the manual stand.
The software part of the setup has been completely
rewritten and now it is a TCL interpreter extended to
have low-level access to the buses and system timer. The
provided routines can display real-time analog data, acquire I-V curves and perform various kinds of digital testing mostly described below.
The most elementary digital operation possible with
Octopus is sending a test pattern to the tested circuit and
verifying its response. Octopus provides means to create
test patterns from logical truth tables, apply the patterns
to the circuit, convert the responses from the analog form
to digital (with automatic adjustment of discrimination
levels and noise reduction) and compare it with the predicted response. Both analog and digital stimulus and
response waveforms are available for observation immediately after the test.
Fig. 5 demonstrates analog waveforms acquired while
TABLE I1
SIMULATION
A N D EXPERIMENTAL
TOLERANCES
FOR TRI-STABLE
CELLS(CONSUMED CURRENT, ON-CHIP AREA A N D KERNEL DC
VOLTAGE,)
SUPPLY
Cell
B. Testing Results
Table I1 contains the summary of various experimental
and theoretical results for the three cells a t 4.2 K.
X cell
'
O
R
NXOR
Z,pA
S,103pm2
450
22
700
32.5
600
24.5
UsimrmV
Uezp,mV
,
2987
1.5
2
2.5
3
35
4
V(tem1). a V
Fig. 6. X cell: experimentalone-dimensional parameter window for
kernel dc power supply. The cells operatesproperly within the range
from 1.53mV to 3.5mV. Each point on the graph has been obtained
by sending 25 test patterns to the chip.
testing the X cell circuit at low frequency (10 Hz).
A natural extension of primitive pattern testing is an
algorithm to get a window for a single parameter (say, kernel dc supply). With Octopus, it is now possible to make
a “cross-section” (Fig. 6) of the operating window and explore the shape of its boundaries. At finite temperatures
the boundaries have certain gray zone, where switching
is random due to thermal fluctuation. In our case the
width of both boundaries is R 10% of the corresponding
boundary voltage.
With correctly specified partial test patterns, onedimensional parameter windows can effectively detect
“bottlenecks” in the tested circuit. Fig. 7 shows how
the overlapping of parameter windows for three partial
test patterns (ClockOnly, A&Clock, A&B&Clack) for
an NXOR cell forms a parameter window for the complete pattern (similar to the shown at Fig. 5 ) . Since a
device may have several independent external parameters
(like kernel and frame dc power supply, various adjusting
biases, operating temperature, etc), one can built multidimensional parameter windows (Fig. 8) and even perform
full-scale multi-parameter optimization of the circuit that
would have been impossible with manual analog setups.
IV. CONCLUSION
We have designed, simulated, fabricated and successfully tested with the help of the novel automated testing
1.5
2
2.5
3
3.5
4
U(kemc1). m V
Fig. 7. NXOR cell: experimental one-dimensional parameter window for kernel dc power supply for several different test patterns.
Fig. 8. XOR cell: experimentaltwo-dimensional parameter window
for kernel and frame dc power supplies.
setup (Octopus) three synchronous tri-stable RSFQ cells:
X cell, XOR and NXOR. The elements are fully compatible with binary RSFQ circuits. The cells are robust and
free of input racing and present the most natural implementation of XOR-like elements.
ACKNOWLEDGMENT
The authors would like to thank K. Likharev and
V. Semenov for useful discussion. Special thanks are
to D. Schneider, Y. Polyakov, S. Polonsky, P. Bunyk,
P. Shevchenko and J.-C. Lin for their help in making Octopus a running and useful tool.
REFERENCES
K. Likharev and V. Semenov, “RSFQ logic/memory family: a
new Josephson junction technology for sub-teraherz clock frequency digital systems,” IEEE Trans. Appl. Supercond., vol. 1,
pp. 3-28, March 1991.
H. Chan, T. van Duzer, and D. Erne, “A tri-stable state Josephson device memory cell,” IEEE Trans. Magnetics, vol. MAG-15,
pp. 1928-1932, Nov. 1978.
M. Morisue and K. Suzuki, “A proposal of Josephson ternary
fuzzy processor,” in Eztended Abstracts of ISEC’89, (Tokyo,
Japan), pp. 259-263,1989.
D. Kirichenko, 0. Mukhanov, and D. Zinoviev, “New elements
of the RSFQ logic/memory family (part I),” in 3rd ISEC Ettended Abstracts, (Glasgow, UK), pp. 196-199, August 1991.
A. Kidiyarova-ShevchenkoandD.Zinoviev, “RSFQ pseudo random generator and its possible applications.” Report ENC-1
submitted to ASC‘94, September 1994.
S. Polonsky, V. Semenov, and P. Shevchenko, “PSCAN: personal superconductor circuit analyzer,” Supercond. Sci. Technol., vol. 4, pp. 667-670,1991.
“HYPRES design rules.” available from HYPRES, Inc., 175
Clearbrook Rd., Elmsford, NY, 10523.
C. Burroughs and C. Hamilton, “Automated Josephson integrated circuit test system,” IEEE Trans. Appl. Supercond.,
vol. 3, pp. 2687-2687, Mar. 1993.
D. Zinoviev, D. Schneider, and Y. Polyakov, “OCTOPUS: an
automated setup for testing superconductivedevices.” in preparation, Oct. 1994.