APPLIED PHYSICS LETTERS 103, 253509 (2013)
High-performance self-aligned inversion-channel In0.53Ga0.47As
metal-oxide-semiconductor field-effect-transistors by in-situ
atomic-layer-deposited HfO2
T. D. Lin (林宗達),1 W. H. Chang (張文馨),1 R. L. Chu (朱瑞霖),2 Y. C. Chang (張耀中),1
Y. H. Chang (張宇行),2 M. Y. Lee (李美儀),3 P. F. Hong (洪鵬飛),3
Min-Cheng Chen (陳旻政),3 J. Kwo (郭瑞年),4,a) and M. Hong (洪銘輝)1,a)
1
Graduate Institute of Applied Physics and Department of Physics, National Taiwan University, Taipei 10617,
Taiwan
2
Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan
3
National Nano Device Laboratories, Hsinchu 30076, Taiwan
4
Department of Physics, National Tsing Hua University, Hsinchu 30013, Taiwan
(Received 30 October 2013; accepted 6 December 2013; published online 20 December 2013)
Self-aligned inversion-channel In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors
(MOSFETs) have been fabricated using the gate dielectrics of in-situ directly atomic-layerdeposited (ALD) HfO2 followed by ALD-Al2O3. There were no surface pretreatments and no
interfacial passivation/barrier layers prior to the ALD. TiN/Al2O3 (4 nm)/HfO2 (1 nm)/
In0.53Ga0.47As/InP MOS capacitors exhibited well-behaved capacitance-voltage characteristics
with true inversion behavior, low leakage current densities of 108 A/cm2 at 61 MV/cm, and
thermodynamic stability at high temperatures. Al2O3 (3 nm)/HfO2 (1 nm)/In0.53Ga0.47As MOSFETs
of 1 lm gate length, with 700 C–800 C rapid thermal annealing in source/drain activation, have
exhibited high extrinsic drain current (ID) of 1.5 mA/lm, transconductance (Gm) of 0.84 mS/lm,
ION/IOFF of 104, low sub-threshold swing of 103 mV/decade, and field-effect electron mobility of
1100 cm2/V s. The devices have also achieved very high intrinsic ID and Gm of 2 mA/lm and
C 2013 AIP Publishing LLC. [http://dx.doi.org/10.1063/1.4852975]
1.2 mS/lm, respectively. V
Introducing new materials in fulfilling the stringent
requirements on device performance and mass volume production has always been critically needed for aggressively
advancing the complementary metal-oxide-semiconductor
(CMOS); an excellent example is the replacement of conventional polycrystalline silicon gates with metal gates and SiO2
with hafnium-based high-j dielectrics since the 45 nm node
technology,1 one of the most important recent innovations in
CMOS. Driven by the strong demand for high-speed and
low-power consumption, III-V compound semiconductors,
especially the In-rich InGaAs, and Ge are now being considered as the new channels for replacing the long-standing Si.
The high-j on high carrier mobility semiconductors of
InGaAs/Ge hybrid with Si is expected to bring another technology revolution in the semiconductor industry.
Using in-situ ultra-high-vacuum (UHV) e-beam deposited Ga2O3(Gd2O3) [GGO] and Y2O3 as well as ex-situ
atomic-layer-deposited (ALD) Al2O3 as gate dielectrics,
high drain currents (ID) and transconductances (Gm) have
been demonstrated in inversion-channel In0.53Ga0.47As MOS
field-effect-transistors (MOSFETs).2–4 The In0.53Ga0.47As
MOSFETs using the rare-earth oxides, even with longer gate
lengths (LG), have outperformed those with the ex-situ ALDAl2O3.5 However, owing to advantages in the high-volume
manufacturing, ALD high j dielectrics on InGaAs are preferred over the UHV e-beam deposited ones, and the formers
have been intensively studied, in terms of interfacial characteristics, MOS electrical measurements, and MOSFET
a)
Authors to whom correspondence should be addressed. Electronic
addresses: raynien@phys.nthu.edu.tw and mhong@phys.ntu.edu.tw.
0003-6951/2013/103(25)/253509/5/$30.00
device performance. A lot of efforts, however, were carried
out focusing on the ALD-Al2O3,4–7 while relatively less
studies were made on ALD-HfO2,8–12 despite the fact that
HfO2 possesses at least 2 times higher dielectric constant
(16–20) than that of Al2O3 (8). Furthermore, the technology of ALD HfO2-based high-j dielectrics is wellestablished in Si industry. In contrast, relatively limited
reports on ALD-HfO2 passivated InGaAs MOS or
MOSFETs are available,4,13 possibly due to the difficulty of
passivating InGaAs with ALD-HfO2 in the past.
The usage of trimethylaluminum (TMA) exposure14 or
Al2O3 passivation layer15,16 was thought to be a good
method for passivating In0.53Ga0.47As surface. For these exsitu passivation methods, Al2O3 has been employed preferentially at the interface as it may provide a lower interfacial
defect density than HfO2 when a native oxide is present prior
to ALD.17,18 Note that the case may be very different for the
in-situ passivation methods, in which no native oxides are
present on the pristine (In)GaAs surfaces. However, the
resulting non-HfO2-terminated oxide/In0.53Ga0.47As interfaces may not be ideal for scaling down the effective oxide
thickness (EOT). In addition and very critically, the ALDAl2O3/(In)GaAs interface is not thermally stable with
annealing temperatures above 400 C, possibly due to the existence of AsOx, As(1þ), and other defective states at the
interface unavoidably formed during the ALD;19–21 these
defects may affect the reliability of the fabricated devices.
Recently, high-quality HfO2 on In0.53Ga0.47As has been
realized by in-situ ALD on a pristine In0.53Ga0.47As surface
without using any surface treatments or passivation layer.22
Having the C-V characteristics with proper inversion
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C 2013 AIP Publishing LLC
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Lin et al.
behaviors and low leakage current densities, the ALDHfAlO/HfO2/In0.53Ga0.47As MOS capacitors (MOSCAPs)
have demonstrated low and nearly flat spectrum of interfacial
trap densities (Dit’s) in the bandgap of In0.53Ga0.47As, in absence of any mid-gap peak feature. Moreover, the HfAlO/
HfO2/In0.53Ga0.47As oxide/semiconductor stack also exhibited thermodynamic stability with rapid thermal annealing
(RTA) to 800 C, approaching what has been achieved in
GGO/(In)GaAs, which remains intact with RTA to
900 C.23,24
In this work, the inversion-channel In0.53Ga0.47As
MOSFETs passivated by in-situ ALD-HfO2 have been demonstrated using a self-aligned gate-first process. The capability of conducting in-situ ALD growth of high j dielectrics in
conjunction with molecular beam epitaxy (MBE) growth of
the III-V semiconductor pristine surface provides a clean
HfO2/In0.53Ga0.47As interface free of As-related defective
bonding,22,25 vital for achieving excellent device performance. The outstanding thermodynamic stability of the MOS
heterostructure, rarely reported for ALD-high j dielectrics
on InGaAs, is the key for a successful implementation
of self-aligned gate-first process. The ALD-Al2O3/HfO2/
In0.53Ga0.47As MOSFETs exhibit excellent device characteristics including very high ID and Gm, good ION/IOFF ratio,
and low sub-threshold swing (SS).
The epi-layer structures and device configurations of the
inversion-channel In0.53Ga0.47As MOSFETs are similar to
those reported in our previous work.2,3 P-type In0.53Ga0.47As
buffer layers and channel layers with Be doping concentrations of 5 1017 cm3 and 1 1017 cm3, respectively, were
grown on Pþ epi-ready InP(001) substrates using MBE. The
In0.53Ga0.47As/ InP wafers with pristine (4 2)-reconstructed
In/Ga stabilized In0.53Ga0.47As(001) surfaces were transR ALD reactor for
ferred to a customized Picosun SUNALEV
in-situ deposition of ALD-HfO2 and Al2O3.19 All the transfers of samples between the UHV chambers and the ALD
reactor were carried out in UHV transfer modules with a
background pressure of 1010 Torr. 10-cycle (1 nm) ALDHfO2 was first deposited on the In0.53Ga0.47As surface, followed by the deposition of ALD-Al2O3. The ALD used
Tetrakis[EthylMethylAmino]Hafnium (TEMAHf), TMA
and de-ionized water as precursors, and high purity
(99.9999%) nitrogen as carrier gas. The deposition temperatures for both HfO2 and Al2O3 were kept at about 320 C.
ALD-Al2O3 was employed as the top oxide layer for simplifying device fabrication process, which can be replaced with
any other high j dielectrics to increase the oxide capacitance
in the future.22 After post-deposition-annealing at 500 C for
30 min in a N2 ambience, the samples were sequentially covered by ALD-TiN 20 nm and sputtered-TiN 160 nm thick, as
the gate metal.
MOSCAPs were made by patterning and dry etching top
TiN electrodes using inductively coupled plasma reactive
ion etching (ICP-RIE), wet-etching oxides at back-side of
substrates, and depositing AuBe/Ni as the back electrodes.
The MOSCAPs have subsequently been postmetallization
annealed (PMA) at 700 C for 10 s in N2 ambience. The
inversion-channel MOSFETs were fabricated with a previously published self-aligned gate-first process,2,3 using Pd/
Ge/Ti/Pt metal stacks as n-type source/drain (S/D) contacts,
Appl. Phys. Lett. 103, 253509 (2013)
AuBe/Ni as p-type body contacts, and Ti/Pt/Au as the metal
pads. Note that the oxide etching at n- and p-contact regions
of the MOSFETs was also carried out using ICP-RIE, a dry
process, unlike the wet etching process used in our previous
work. The activation and ohmic alloying temperatures are
700 C–800 C and 400 C, respectively. Electrical characteristics were measured using Agilent 4284A Precision LCR
Meter and Agilent 4156 C Precision Semiconductor
Parameter Analyzer.
Room-temperature capacitance-voltage (C-V) and leakage current density-electric field (J-E) characteristics of TiN/
Al2O3 (4 nm)/HfO2 (1 nm)/In0.53Ga0.47As/InP MOSCAPs,
which experienced 700 C PMA, were shown in Fig. 1. At
the strong inversion region, the C-V traces exhibit bias independent capacitances at specific frequencies, indicating a
true inversion behavior.16,26 Noticeable frequency dispersion
in accumulation regions was observed, as reported in our earlier work.22 The origin of the dispersion is under investigation, which may be resulted from interfacial traps near the
valance band side in the band gap of In0.53Ga0.47As, border
traps located near the oxide/In0.53Ga0.47As interface,27 or
other defects,28 and requires further discussion. The J-E
curves of the MOSCAPs shown in the inset exhibit low leakage current densities of 108 A/cm2 at 61MV/cm. The
well-behaved C-V and J-E characteristics prove that the
MOS stack, including the ALD-HfO2/In0.53Ga0.47As,
remains intact with RTA to 700 C; the outstanding thermodynamic stability, which ensures sufficient dopant activation,
and the preserved high-quality interfaces are imperative for
realizing high-performance self-aligned inversion channel
In0.53Ga0.47As MOSFETs.
Figure 2(a) shows the DC output characteristics, ID-VD
curves, of a self-aligned inversion-channel Al2O3 (3 nm)/
HfO2 (1 nm)/In0.53Ga0.47As MOSFET with LG of 1 lm,
measured with gate bias (VG) varying from 0 to þ2.5 V in
steps of þ0.5 V and drain bias (VD) sweeping from 0 to
þ2 V. The MOSFET exhibited a maximum drain current
(ID) of 1.5 mA/lm at VG ¼ 2.5 V and VD ¼ 2 V. The high
inversion drain current confirmed the true inversion behavior
observed in the aforementioned C-V characteristics of the
MOSCAPs from the same wafer. The Gm curve of the same
device is shown in Fig. 2(b), exhibiting a peak value of
FIG. 1. C-V characteristics of a TiN/Al2O3 (4 nm)/HfO2 (1 nm)/
In0.53Ga0.47As/InP MOSCAP subjected to 700 C PMA. The inset shows J-E
curves of the MOSCAP.
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Lin et al.
Appl. Phys. Lett. 103, 253509 (2013)
FIG. 3. ID vs. VG of a 1lm-gate-length inversion-channel ALD-Al2O3
(3 nm)/HfO2 (1 nm)/In0.53Ga0.47As MOSFET measured at VD ¼ 50 mV and
1 V, showing a DIBL of 47 mV/V, a SS of 103 mV/decade, and an ION/IOFF
of 104.
FIG. 2. (a) Output characteristics ID vs. VD of a 1 lm-gate-length inversionchannel ALD-Al2O3 (3 nm)/HfO2 (1 nm)/In0.53Ga0.47As MOSFET, demonstrating a maximum ID of 1.5 mA/lm at VG ¼ 2.5 V and VD ¼ 2 V. (b)
Transfer characteristics and Gm curve of the same device, exhibiting a peak
Gm of 0.84 mS/lm at VD ¼ 2 V. Intrinsic ID and Gm are also shown in this
figure.
0.84 mS/lm at VD ¼ 2 V. The threshold voltage (VT) of this
inversion channel device extracted by linear extrapolation is
0.24 V; in other words, the device was operated in an
enhancement mode, which is extremely important for CMOS
application. High values of ID and Gm29,30 were relatively
easily attained in depletion-mode31 In0.53Ga0.47As
MOSFETs, as the oxide/In0.53Ga0.47As interfacial quality
plays a less critical role in device performances. However,
the depletion-mode MOSFETs are not applicable to CMOS.
From the data measured at VD ¼ 50 mV, a peak fieldeffect electron mobility of 1100 cm2/Vs was estimated
via transconductance analysis.2,3 Using the transmission
line method (TLM), specific contact resistivity of the metal/
semiconductor junction and sheet resistance were calculated
to be 4 106 X cm2 and 29 X/sq., respectively. Intrinsic
Gm was further extracted by eliminating the effects of parasitic series resistance at S/D regions,32 and intrinsic ID was
subsequently derived. The MOSFETs have achieved very
high intrinsic ID and Gm of 2 mA/lm and 1.2 mS/lm, respectively, as shown in Fig. 2(b). Nevertheless, the ohmic contact
needs to be further improved to at least 1 108 X cm2 for
achieving better extrinsic device performance.
ID-VG characteristics of an Al2O3 (3 nm)/HfO2 (1 nm)/
In0.53Ga0.47As MOSFET measured under VD of 50 mV and
1 V are shown in Fig. 3. This device exhibits good ION/IOFF
of 104. The extracted drain-induced-barrier-lowering
(DIBL) and SS is 47 mV/V and 103 mV/decade, respectively. The SS of this in-situ HfO2-passivated planar
MOSFET is comparable to those of the in-situ GGO- and
Y2O3-passivated MOSFETs and smaller than those of ex-situ
Al2O3-passivated MOSFETs using the same In0.53Ga0.47As
channels.4,33 The high quality HfO2/In0.53Ga0.47As with low
Dit, which was discussed in the previous work,22 has been
attributed to the low SS. Moreover, the low SS attained in
the MOSFETs with the 700 C–800 C source-drain activation indicates the robustness of the HfO2/In0.53Ga0.47As
interface, again proving effective passivation of
In0.53Ga0.47As using in-situ ALD-HfO2. Note that SS’s of
150 to 200 mV/decade, or even higher, have commonly been
observed for self-aligned planar In0.53Ga0.47As MOSFETs
subjected to activation temperature higher than 650 C, even
with the application of special passivation techniques.34,35
Maximum ID and peak Gm of the recently reported stateof-the-art In0.53Ga0.47As MOSFETs are summarized in
Fig. 4. The MOSFETs are passivated by in-situ ALD-Al2O3/
HfO2 (this work) as well as ex-situ ALD-HfO2 or Al2O3 with
NH4OH and/or (NH4)2S pretreatments,4,6 metal-organic
chemical-vapor-deposited (MOCVD)-HfAlO with (NH4)2S
pretreatments plus PH3-passivation34 or silane plus ammonia
(SiH4 þ NH3) passivation,35 ALD-Al2O3 with InP barrier
and (NH4)2S pretreatment,7 and unspecified high j dielectrics.36 It is worth noting that some of the devices have negative VT,6,34 which is not adequate for n-MOSFETs in the
CMOS applications. The MOSFET reported in this work is
the only device using directly deposited ALD high j dielectrics without any surface pretreatments or passivation/barrier
layers and is also the only device exhibiting comparable
maximum ID and peak Gm to our previously demonstrated
high-performance In0.53Ga0.47As MOSFETs using UHVdeposited GGO and Y2O3 at similar gate length. Maximum
ID/peak Gm of the GGO- and Y2O3-In0.53Ga0.47As
MOSFETs are 1.05 mA/lm/0.71 mS/lm and 1.5 mA/lm/
0.77 mS/lm, respectively. The extrinsic ID of 1.5 mA/lm
and Gm of 0.84 mS/lm achieved by the in-situ ALD-HfO2
passivated In0.53Ga0.47As MOSFET outperform those of all
the other planar devices using HfO2-based high j dielectrics,
and they are comparable to those exhibited by threedimensional (3D) tri-gates or gate-all-around devices using
ALD-Al2O3.
ALD-HfO2 with 1 nm thickness was used in this work,
as thicker amorphous HfO2 films with 500 C annealing
tend to recrystallize to form epitaxial films consisting of four
domains which rotate 90 with respect to each other.37,38
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Appl. Phys. Lett. 103, 253509 (2013)
evidence of successful passivation of In0.53Ga0.47As
MOFETs using in-situ ALD-HfO2, and opens up the possibility of fulfilling the stringent demand of InGaAs
MOSFETs for high performance/low power CMOS using
Si-compatible HfO2-based high j dielectrics.
This work was supported by National Nano Projects
Nos. 101-2120-M-002-016 and 102-2112-M-002-022-MY3,
and NSC 102-2622-E-002-014 of the National Science
Council of Taiwan, and the Asian Office of Aerospace
Research and Development of the US Air Force.
1
FIG. 4. Summary of (a) maximum drain currents and (b) peak transconductances of state-of-the-art In0.53Ga0.47As MOSFETs reported recently. Most
depletion mode devices are excluded except for the two asterisked devices;
one is among the very few reported high performance In0.53Ga0.47As
MOSFETs using HfO2-based dielectrics and the other is the first gate-allaround In0.53Ga0.47As MOSFETs. The label near each data point indicates
the dielectrics used in corresponding device. The data of devices using
HfO2-based dielectrics are denoted with solid circular, square, and triangular
symbols, and the data of devices using ALD-Al2O3 are denoted with hollow
diamond and square symbols; the cross symbol represents the data of device
using unspecified high j dielectrics.
The top ALD-Al2O3 can be replaced with doped HfO2 having high recrystallization temperatures and higher j values
than Al2O3.
In conclusion, self-aligned inversion channel
In0.53Ga0.47As MOSFETs have been demonstrated using insitu ALD high j dielectrics. The approach of in-situ ALD
and bilayer interface engineering provides high quality
Al2O3/HfO2/In0.53Ga0.47As with high quality HfO2/
In0.53Ga0.47As interface, outstanding thermodynamic stability, and low leakage currents. The thermodynamic stability
at 700 C–800 C, rarely reported for ALD- or MOCVDhigh j dielectrics, ensures sufficient thermal budget for the
self-aligned gate-first process. The ALD-Al2O3/HfO2/
In0.53Ga0.47As MOSFETs of 1 lm gate length achieved very
high drain current and transconductances, outperforming
other planar In0.53Ga0.47As MOSFETs using HfO2-based
high j dielectrics, of similar gate lengths, and comparable
to other state-of-the-art 3D tri-gates or gate-all-around
In0.53Ga0.47As MOSFETs using ALD-Al2O3, of much
shorter gate lengths. This work has provided striking
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