EVALUATION KIT AVAILABLE
MAX44264
General Description
The MAX44264 is an ultra-small (6-bump WLP) op amp
that draws only 750nA of supply current. It operates from
a single +1.8V to +5.5V supply and features ground-sensing inputs and rail-to-rail output. The ultralow supply current, low-operating voltage, and rail-to-rail output capabilities make these operational amplifiers ideal for use in
single lithium ion (Li+), or two-cell NiCd or alkaline battery
systems. The rail-to-rail output stage of the MAX44264 is
capable of driving the output voltage to within 4mV of the
rail with a 100kΩ load, and can sink and source 11mA with
a +5V supply. The IC is unity-gain stable and available in
a space-saving 0.9mm x 1.3mm, 6-bump WLP package.
Applications
●●
●●
●●
●●
Cell Phones
Tablet/Notebook Computers
Mobile Accessories
Battery-Powered Devices
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Features
●● Ultra-Low 750nA Supply Current per Amplifier
●● Ultra-Low +1.8V Supply Voltage Operation
●● Ground-Sensing Input Common-Mode Range
●● Outputs Swing Rail-to-Rail
●● Outputs Source and Sink 11mA of Load Current
●● No Phase Reversal for Overdriven Inputs
●● High 120dB Open-Loop Voltage Gain
●● Low 500μV Input Offset Voltage
●● 9kHz Gain-Bandwidth Product
●● 250pF (min) Capacitive Load Capability
●● Available in a Tiny, 0.9mm x 1.3mm, 6-Bump WLP
Package
Ordering Information
PART
TEMP RANGE
PINPACKAGE
TOP
MARK
MAX44264EWT+
-40°C to +85°C
6 WLP
+CB
+Denotes a lead(Pb)-free/RoHS-compliant package.
19-5708; Rev 0; 12/10
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Absolute Maximum Ratings
VDD to VSS...............................................................-0.3V to +6V
IN_+ or IN_-.................................... (VSS - 0.3V) to (VDD + 0.3V)
OUT_ Shorted to VSS or VDD....................................Continuous
Continuous Power Dissipation (TA = +70°C)
6-Bump WLP (derate 10.5mW/°C above +70°C).........840mW
Operating Temperature Range............................ -40°C to +85°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65°C to +150°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)........................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VDD = +5V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL = ∞ to VDD/2, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
Supply Voltage Range
VDD
Supply Current (per
Amplifier)
IDD
Input Offset Voltage
VOS
Input Bias Current
CONDITIONS
Guaranteed by PSRR tests
MIN
TYP
1.8
MAX
UNITS
5.5
V
VDD = +1.8V
0.6
VDD = +5.0V
0.75
1.2
±0.5
±7.0
mV
±1500
pA
IB
±200
Input Offset Current
IOS
±12.5
Input Common-Mode
Voltage Range
VCM
Guaranteed by the CMRR test
pA
VDD 1.1
VSS
µA
V
Common-Mode Rejection
Ratio
CMRR
Specified with VSS ≤ VCM ≤ (VDD - 1.1V)
70
95
dB
Power-Supply Rejection
Ratio
PSRR
+1.8V ≤ VDD ≤ +5.5V
70
90
dB
RL = 1MΩ, VOUT = 50mV to VDD - 50mV
90
120
RL = 100kΩ, VOUT = 200mV to VDD - 200mV
90
Large-Signal Voltage Gain
AVOL
RL = 10kΩ, VOUT = 200mV to VDD - 200mV
VOH
Output Voltage Swing
VOL
Gain-Bandwidth Product
Phase Margin
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Swing high
specified as
VDD - VOH
RL = 1MΩ
Swing low
specified as
VOL - VSS
112
dB
100
1
4
RL = 100kΩ
4
10
RL = 10kΩ
40
RL = 1MΩ
0.5
5
RL = 100kΩ
1
5
RL = 10kΩ
10
mV
GBW
9
kHz
ФM
90
degrees
Maxim Integrated │ 2
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Electrical Characteristics (continued)
(VDD = +5V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL = ∞ to VDD/2, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
Slew Rate
SR
Input Voltage Noise
en
Output Short-Circuit
Current
Power-On Time
CONDITIONS
MIN
TYP
VOUT = 4V step
tOFF
Capacitive Load
CLOAD
150
f = 10kHz
120
Shorted to VSS (sourcing)
11
Shorted to VDD (sinking)
36
nV/√Hz
mA
2
µs
2
No sustained oscillations
UNITS
V/ms
f = 1kHz
tON
Power-Off Time
MAX
2
µs
250
pF
Electrical Characteristics
(VDD = +5V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL = ∞ to VDD/2, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
Supply Voltage Range
VDD
Guaranteed by PSRR tests
Supply Current (per
Amplifier)
IDD
VDD = +5.0V
Input Offset Voltage
VOS
Input Offset Voltage
Temperature Coefficient
Input Bias Current
Input Common-Mode
Voltage Range
MIN
1.8
TCVOS
Common-Mode Rejection
Ratio
CMRR
Power-Supply Rejection
Ratio
PSRR
Large-Signal Voltage Gain
AVOL
MAX
UNITS
5.5
V
1.5
µA
±15
mV
8
IB
VCM
TYP
Guaranteed by the CMRR test
VSS
VSS ≤ VCM ≤ (VDD - 1.1V)
56
+1.8V ≤ VDD ≤ +5.5V, 0°C ≤ TA ≤ +85°C
65
+2V ≤ VDD ≤ +5.5V, -40°C ≤ TA ≤ +85°C
65
VOUT = 50mV to VDD - 50mV, RL = 1MΩ
75
VOUT = 200mV to VDD - 200mV, RL = 100kΩ
75
µV/°C
4.25
nA
VDD
-1.1
V
dB
dB
dB
VOH
Swing high specified
as VDD - VOH
RL = 1MΩ
5
RL = 100kΩ
15
VOL
Swing low specified
as VOL - VSS
RL = 1MΩ
5
RL = 100kΩ
5
Output Voltage Swing
mV
Note 1: All devices are production tested at TA = +25°C. All temperature limits are guaranteed by design.
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Maxim Integrated │ 3
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Typical Operating Characteristics
(VDD = +5V, VSS = 0V, VCM = 0V, RL = 100kΩ to VDD/2, TA = +25°C, unless otherwise noted.)
0.6
0.5
0.4
0.3
0.2
0.6
0.5
0.4
0.3
0.2
0
0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
0.35
0.30
0.25
0.20
0.15
0.10
0.05
-50
-25
0
25
50
75
0
100
-25
0
25
50
75
INPUT BIAS CURRENT vs.
COMMON-MODE VOLTAGE
0.15
-100
-150
-200
-250
-300
-10
-350
0.05
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
-400
-20
-30
-40
-50
-60
-70
-80
-50
-25
0
25
50
75
-90
100
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
COMMON-MODE VOLTAGE (V)
TEMPERATURE (°C)
COMMON-MODE VOLTAGE (V)
POWER-SUPPLY REJECTION RATIO vs.
FREQUENCY
OUTPUT VOLTAGE SWING LOW vs.
TEMPERATURE
OUTPUT VOLTAGE SWING HIGH vs.
TEMPERATURE
VOL - VSS (mV)
-30
-40
-50
-60
-70
RL = 100kΩ
1.2
1.0
0.8
0.6
0.4
-80
RL = 1MΩ
0.2
-90
10
100
1k
FREQUENCY (Hz)
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10k
0
-50
-25
0
25
5
RL = 100kΩ
4
3
2
1
50
TEMPERATURE (°C)
75
100
4.0
MAX44264 toc09
1.4
VDD - VOH (mV)
-20
6
MAX44264 toc08
1.6
MAX44264 toc07
-10
100
MAX44264 toc06
-50
0
INPUT BIAS CURRENT (pA)
0.20
0
MAX44264 toc05
MAX44264 toc04
INPUT BIAS CURRENT vs.
TEMPERATURE
0.25
0
-50
OFFSET VOLTAGE
vs. COMMON-MODE VOLTAGE
0.10
PSRR (dB)
0.40
TEMPERATURE (°C)
0.30
-100
0.45
TEMPERATURE (°C)
0.35
0
0.50
SUPPLY VOLTAGE (V)
0.40
0
OFFSET VOLTAGE vs.
TEMPERATURE
MAX44264 toc03
0.7
0.1
0.45
OFFSET VOLTAGE (mV)
0.8
0.1
0.50
MAX44264 toc02
0.7
0.9
INPUT BIAS CURRENT (pA)
SUPPLY CURRENT (µA)
0.8
SUPPLY CURRENT (µA)
MAX44264 toc01
0.9
SUPPLY CURRENT vs.
TEMPERATURE
OFFSET VOLTAGE (mV)
SUPPLY CURRENT vs.
SUPPLY VOLTAGE
0
RL = 1MΩ
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
Maxim Integrated │ 4
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Typical Operating Characteristics (continued)
(VDD = +5V, VSS = 0V, VCM = 0V, RL = 100kΩ to VDD/2, TA = +25°C, unless otherwise noted.)
-70
-80
-90
-100
-110
0
25
50
75
0.6
0.4
-50
-25
0
GAIN (dB)
90
PHASE (deg)
GAIN (dB)
180
CL = 12pF
RL = 1MΩ 135
AVCL = 1000V/V
45
-45
PHASE
-90
10
100
1k
25
50
75
60
100
2.5
3.0
10k
-135
100k
80
70
60
50
40
30
20
10
0
-10
-20
-30
-40
-50
-60
MAX44264 toc14
4.5
180
10.00
135
GAIN
90
45
0
-45
PHASE
RL = 1MΩ
AVCL = 1000V/V
CL = 250pF
1
10
MAX44264 toc12
5.0
1.00
0.10
-90
100
1k
10k
-135
100k
0.01
10
100
1k
10k
FREQUENCY (Hz)
100
IOUT vs. VOUT
40
MAX44264 toc17
100k
MAX44264 toc16
1k
STABILITY vs. CAPACITIVE
AND RESISTIVE LOADS
36
ISINK
32
28
10k
IOUT (mA)
VOLTAGE NOISE DENSITY vs.
FREQUENCY
CAPACITIVE LOAD (pF)
NOISE (nV/√Hz)
4.0
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
FREQUENCY (Hz)
10k
3.5
OUTPUT VOLTAGE (Vp-p)
GAIN AND PHASE vs. FREQUENCY
MAX44264 toc13
1
0
TEMPERATURE (°C)
GAIN AND PHASE vs. FREQUENCY
GAIN
90
70
TEMPERATURE (°C)
80
70
60
50
40
30
20
10
0
-10
-20
-30
-40
-50
-60
RL = 10kΩ
100
80
0.2
0
100
110
MAX44264 toc15
-25
RL = 100kΩ
MAX44264 toc18
-50
0.8
THD + N (%)
-120
RL = 1MΩ
120
1.0
PHASE (deg)
CMRR (dB)
-60
130
AVOL (dB)
-50
1.2
AVOL vs. OUTPUT VOLTAGE SWING
140
MAX44264 toc11
-40
MINIMUM SUPPLY VOLTAGE (V)
-30
MINIMUM SUPPLY VOLTAGE
vs. TEMPERATURE
1.4
MAX44264 toc10
-20
COMMON-MODE REJECTION RATIO vs.
TEMPERATURE
UNSTABLE
REGION
1k
24
20
16
12
ISOURCE
8
4
10
10
100
1k
FREQUENCY (Hz)
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10k
100k
100
10k
100k
RESISTIVE LOAD (Ω)
1M
0
0
1
2
3
4
VOUT (V)
Maxim Integrated │ 5
5
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Typical Operating Characteristics (continued)
(VDD = +5V, VSS = 0V, VCM = 0V, RL = 100kΩ to VDD/2, TA = +25°C, unless otherwise noted.)
SMALL-SIGNAL STEP RESPONSE
SMALL-SIGNAL STEP RESPONSE
MAX44264 toc19
INPUT
500mV/div
VDD = +5V
AV = +1V/V
RL = 1MΩ
CL = 250pF
INPUT
50mV/div
OUTPUT
50mV/div
500µs/div
500µs/div
OUTPUT
500mV/div
MAX44264 toc23
VDD = +5V
AV = +1V/V
RL = 1MΩ
CL = 1000pF
PERCENT OVERSHOOT
vs. CAPACITIVE LOAD
INPUT
500mV/div
OUTPUT
500mV/div
500µs/div
30
PERCENT OVERSHOOT (%)
MAX44264 toc22
VDD = +5V
AV = +1V/V
RL = 1MΩ
CL = 12pF
500µs/div
LARGE-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
INPUT
500mV/div
VDD = +5V
AV = +1V/V
RL = 1MΩ
CL = 1000pF
INPUT
50mV/div
OUTPUT
50mV/div
OUTPUT
500mV/div
MAX44264 toc21
25
RL = 1MΩ
20
RL = 100kΩ
15
10
RL = 10kΩ
5
0
500µs/div
MAX44264 toc24
VDD = +5V
AV = +1V/V
RL = 1MΩ
CL = 12pF
SMALL-SIGNAL STEP RESPONSE
MAX44264 toc20
0
50
100
150
200
250
300
CLOAD (pF)
SMALL-SIGNAL GAIN vs. FREQUENCY
1
1
-2
-3
-4
AV = 1
-1
-2
-3
-4
-5
-5
-6
-6
-7
RL = 100kΩ
VOUT = 100mVP-P
CL = 12pF
0
AV = 1
GAIN (dB)
GAIN (dB)
0
-1
2
MAX44264 toc26
RL = 10kΩ
VOUT = 100mVP-P
CL = 12pF
2
SMALL-SIGNAL GAIN vs. FREQUENCY
3
MAX44264 toc25
3
100
1k
FREQUENCY (Hz)
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10k
-7
100
1k
10k
100k
FREQUENCY (Hz)
Maxim Integrated │ 6
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Typical Operating Characteristics (continued)
(VDD = +5V, VSS = 0V, VCM = 0V, RL = 100kΩ to VDD/2, TA = +25°C, unless otherwise noted.)
SMALL-SIGNAL GAIN vs. FREQUENCY
GAIN (dB)
0
-2
-3
AV = 1
-1
-2
-3
-4
-4
-5
-5
-6
-6
-7
100
1k
10k
-7
100k
100
FREQUENCY (Hz)
1
RL = 100kΩ
VOUT = 1VP-P
CL = 12pF
AV = 1
2
1
-1
-2
-3
-4
AV = 1
-1
-2
-3
-4
-5
-5
-6
-6
-7
RL = 1MΩ
VOUT = 1VP-P
CL = 12pF
0
GAIN (dB)
GAIN (dB)
0
10k
LARGE-SIGNAL GAIN vs. FREQUENCY
3
MAX44264 toc29
2
1k
FREQUENCY (Hz)
LARGE-SIGNAL GAIN vs. FREQUENCY
3
MAX44264 toc28
1
RL = 10kΩ
VOUT = 1VP-P
CL = 12pF
0
AV = 1
-1
2
MAX44264 toc30
1
RL = 1MΩ
VOUT = 100mVP-P
CL = 12pF
GAIN (dB)
2
LARGE-SIGNAL GAIN vs. FREQUENCY
3
MAX44264 toc27
3
100
1k
FREQUENCY (Hz)
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10k
-7
100
1k
10k
FREQUENCY (Hz)
Maxim Integrated │ 7
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Pin Configuration
TOP VIEW
MAX44264
+
IN+
A1
A2
VSS
IN-
B1
B2
VDD
OUT
C1
C2
N.C.
WLP BUMP
SIDE DOWN
Pin Description
PIN
A1
A2
B1
B2
C1
C2
NAME
IN+
VSS
INVDD
OUT
N.C.
FUNCTION
Noninverting Amplifier Input
Negative Power-Supply Voltage
Inverting Amplifier Input
Positive Power-Supply Voltage
Amplifier Output
No Connection. Not internally connected.
Applications Information
Ground Sensing
The common-mode input range of the MAX44264 extends
down to ground, and offers excellent common-mode
rejection. These devices are guaranteed not to undergo
phase reversal when the input is overdriven.
good layout is extremely important because low-power
requirements demand high-impedance circuits. The layout
should also minimize stray capacitance at the amplifier
inputs. However some stray capacitance may be unavoidable, and it may be necessary to add a 2pF to 10pF capacitor across the feedback resistor as shown in Figure 1.
Select the smallest capacitor value that ensures stability.
Power Supplies and Layout
The IC operates from a single +1.8V to +5.5V power supply. Bypass power supplies with a 0.1μF ceramic capacitor placed close to the VDD pin.
MAX44264
Ground layout improves performance by decreasing the
amount of stray capacitance and noise at the op amp’s
inputs and outputs. To decrease stray capacitance, minimize PCB lengths and resistor leads, and place external
components close to the op amps’ pins.
Bandwidth
The IC is internally compensated for unity-gain stability
and has a typical gain-bandwidth of 9kHz.
Stability
The IC maintains stability in their minimum gain configuration while driving capacitive loads. Although this product
family is primarily designed for low-frequency applications,
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VCC
VIN
VSS
R2
R1
2pF TO 10pF
Figure 1. Compensation for Feedback Node Capacitance
Chip Information
PROCESS: BiCMOS
Maxim Integrated │ 8
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
LAND PATTERN NO.
6 WLP
W61B1+1
21-0217
—
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Maxim Integrated │ 9
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
Revision History
REVISION
NUMBER
REVISION
DATE
0
12/10
DESCRIPTION
Initial release
PAGES
CHANGED
—
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2010 Maxim Integrated Products, Inc. │ 10