B222L : By Hassan Parchizadeh
Pulse Width Modulation
Some devices do require to have a PWM as an input to generate the required output (Servos, DACs
and etc). On the other hand some devices do generate a PWM output for a measured input (ADCs, and
etc) . In this section we look at how we generate PWM and how we measure PWM using a Pic18F252
microcontroller.
Pulse-width modulation uses a square wave whose pulse width is modulated resulting in the variation of
the average value of the waveform. If we consider a square waveform with a low value Ymin, a high
value Ymax and a duty cycle D, the average value of the waveform is given by:
Vaverage =(T D.Ymax
+ T(D-1) Ymin) / T
This expression can be fairly simplified in many cases where Ymin = 0 .
Vaverage = D.Ymax
From this, it is obvious that the average value of the signal is directly dependent on the duty cycle D.
Example : Calculate the value of Vo, of a Electric vehicle which its speed is controlled by PWM
techniques, where the frequency of PWM signal is 1KHz. The Maxim voltage that can be applied to the
Electric Motor is 48V. Determine the voltage applied to the motor if the duty cycle is (i) 25%, (ii)50% and
(iii) 75%.
(i)
Vo = D.Vmax = 0.25 * 48 = 12 V
(ii)
Vo = D.Vmax = 0.5 * 48 = 24 V
(i)
Vo = D.Vmax = 0.75 * 48 = 36 V
Exercise : Repeat the above if, Maximum voltage is 100V and the PWM frequency is 2KHz.
Exercise : What is the significance of the frequency for the above application ?
PWM generation using PIC 18F252
PIC contains two registers called Capture/Compare/PWM modules, which can be configured
to generate the required PWM or measure a PWM input signal. Other registers associated
with the PWM are CCPRxL and CCPRxH ( x can be 1 or 2).
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B222L : by Hassan Parchizadeh
CAPTURE/COMPARE/PWM (CCP) MODULES
Each CCP (Capture/Compare/PWM) module contains a 16-bit register which can operate as a
16-bit Capture register, as a 16-bit Compare register or as a PWM Master/Slave Duty Cycle
register. Table below shows the timer resources of the CCP Module modes. The operation of
CCP1 is identical to that of CCP2, with the exception of the special event trigger. Therefore,
operation of a CCP module in the following sections is described with respect to CCP1.
TABLE 1: CCP MODE – TIMER RESOURCE
CCP1CON REGISTER/CCP2CON REGISTER
B222L : by Hassan Parchizadeh
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CCP1 Module
Capture/Compare/PWM Register 1 (CCPR1) is comprised of two 8-bit registers: CCPR1L (low
byte) and CCPR1H (high byte). The CCP1CON register controls the operation of CCP1. All
are readable and writable.
CCP2 Module
Capture/Compare/PWM Register2 (CCPR2) is comprised of two 8-bit registers: CCPR2L (low
byte) and CCPR2H (high byte). The CCP2CON register controls the operation of CCP2. All
are readable and writable.
PWM Mode
In Pulse Width Modulation (PWM) mode, the CCP1 pin produces up to a 10-bit resolution PWM output.
Since the CCP1 pin is multiplexed with the PORTC data latch, the TRISC<2> bit must be cleared to
make the CCP1 pin an output.
Figure below shows a simplified block diagram of the CCP module in PWM mode.
SIMPLIFIED PWM BLOCK DIAGRAM
A PWM output has a time-base (period) and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period (1/period).
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B222L : by Hassan Parchizadeh
PWM OUTPUT
PWM PERIOD
The PWM period is specified by writing to the PR2 register. The PWM period can be calculated using
the following formula:
PWM period = (PR2) + 1] • 4 • TOSC • (TMR2 prescale value)
PWM frequency is defined as 1 / [PWM period].
When TMR2 is equal to PR2, the following three events occur on the next increment cycle:
• TMR2 is cleared
• The CCP1 pin is set (exception: if PWM duty cycle = 0%, the CCP1 pin will not be set)
• The PWM duty cycle is latched from CCPR1L into CCPR1H
PWM DUTY CYCLE
The PWM duty cycle is specified by writing to the CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available. The CCPR1L contains the eight MSBs and the CCP1CON<5:4>
contains the two LSBs. This 10-bit value is represented by CCPR1L:CCP1CON<5:4>. The following
equation is used to calculate the PWM duty cycle in time:
PWM duty cycle = (CCPR1L:CCP1CON<5:4>) •TOSC • (TMR2 prescale value)
CCPR1L and CCP1CON<5:4> can be written to at any time, but the duty cycle value is not latched into
CCPR1H until after a match between PR2 and TMR2 occurs (i.e., the period is complete). In PWM
mode, CCPR1H is a read only register. The CCPR1H register and a 2-bit internal latch are used to
double buffer the PWM duty cycle. This double buffering is essential for glitchless PWM operation.
When the CCPR1H and 2-bit latch match TMR2 concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCP1 pin is cleared.
Example : Determine the values for PR2,T2 pre-scalar and CCPR1L to generate a 2KHz PWM signal
on CCP1 with a 25% duty cycle (Xtal = 24 MHz).
PWM period = [(PR2) + 1] • 4 • TOSC • (TMR2 prescale value)
B222L : by Hassan Parchizadeh
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2 KHz => 0.5 mS therefore PWM period = 0.5 mS
TOSC = 1/ 24MHz, we set TMR2 prescale value to 16 ( T2C0N <1:0> = 11)
0.5 mS = [(PR2) + 1] • 4 • (1 / 24 MHz) • (16)
0.5 mS x 24 MHz
[(PR2) + 1] = ------------------------ = > [(PR2) + 1] = 187 therefore PR2 = 186
4 x 16
PWM duty cycle = (CCPR1L:CCP1CON<5:4>) •TOSC • (TMR2 prescale value)
PWM duty cycle(time) = 0.5 mS x 0.25 = 0.125 mS
we set CCP1CON<5:4> values to <0:0>
0.125 mS = (CCPR1L:00) •(1 / 24 MHz) • (16)
0.125 mS x 24 MHz
(CCPR1L:00) = --------------------------- = (CCPR1L:00) = 187 therefore CCPR1L = 46/47
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SETUP FOR PWM OPERATION
The following steps should be taken when configuring the CCP module for PWM operation:
1. Set the PWM period by writing to the PR2 register.
PWM period = (PR2) + 1] • 4 • TOSC • (TMR2 prescale value)
2. Set the PWM duty cycle by writing to the CCPR1L register and CCP1CON<5:4> bits.
PWM duty cycle = (CCPR1L:CCP1CON<5:4>) •TOSC • (TMR2 prescale value)
3. Make the CCP1 pin an output by clearing the TRISC<2> bit.
TRISCBits.RC2 = 0;
4. Set the TMR2 prescale value and enable Timer2 by writing to T2CON.
5. Configure the CCP1 module for PWM operation.
#include <p18f252.h>
#pragma config WDT = OFF
void main (void){
/* PWM registers configuration
* Fosc = 24000000 Hz
* Duty Cycle = 25%, 2KHz
* Prescaler is 16
* Ensure that your PWM pin is configured as digital output
*/
PR2 = 186;
// set period
T2CON = 0b00000111 ;
// set up timer 2
CCPR1L = 47;
// set duty cycle
CCP1CON = 0b00001100 ;
// set up CCP1
TRISC = 0;
// PWM pin/CCP1/RC2 as output
while(1)
;
}