Design and Implementation of a New Control
Algorithm for a Three-Phase Active Filter
Bhim Singh
Kamal Al-Haddad, Ambrish Chandra
and R. Parimelalagan
Electrical Eng. Dept.
Indian Institute of Technology
Hauz Khas, New Delhi
110016 INDIA
GREPCI, Electrical Eng. Dept.
Ecole de technologie superieure
4750, av. Henri-Mien, Montreal (Quebec)
H2T2C8 CANADA
Abstract — This paper presents a new control scheme of voltage
source active filter (AF) which compensates simultaneously the
harmonics and reactive power of non-linear loads. The
reference compensating currents are estimated from computed
reference supply currents and sensed load currents. Reference
supply currents are estimated using active power of the load and
the AF. A hysteresis or carrier based PWM current control is
employed to generate the gating signals to the devices of the AF.
A three-phase diode rectifier with capacitive resistive loading is
used as a non-linear load. Experimental results of a DSP based
prototype are presented to confirm the effectiveness of the new
control scheme.
I. INTRODUCTION
Solid state power converters are widely used in applications
such as adjustable speed drives (ASD), static power supplies
and asynchronous ac-dc links in wind and wave generating
systems. These power converters behave as non-linear loads
to ac mains and inject harmonics and result in lower powerfactor and efficiency of the power system. Conventionally,
passive filters were the choice for the elimination of
harmonics and to improve power-factor. These passive filters
have the disadvantages of large size, resonance, and fixed
compensation. In the last couple of decades, the concept of
active filters (AF) has been introduced and many publications
have appeared on this subject [1-14]. Several approaches,
such as, hybrid filters and multistep inverters are reported to
reduce the size of active filters [14]. Many control concepts,
such as instantaneous power theory [5, 10, 11, 14], notch
filters [12], and flux based controllers [13] have also been
introduced. Most of these control schemes require various
transformations and are difficult to implement. This paper
presents a simple algorithm to achieve the control for AF. In
a shunt AF, the main objective is to maintain sinusoidal unity
power-factor supply currents to feed active power to the load
and to meet the losses in the AF. These two components of
active power can be computed from load currents, dc bus
voltage and supply voltages. From the measured active
power required by the system and the estimated losses in the
AF, reference unity power-factor supply cuirents are derived.
By subtracting load currents from these reference supply
currents, compensating currents of the AF phases are
obtained. In this paper, the numerical simulation results, to
illustrate the effectiveness of the new algorithm, are presented
193
along with the experimental results, obtained from a
laboratory size AF setup, using DSP based hardware.
II. SYSTEM CONFIGURATION AND
CONTROL SCHEME
The block diagram of the parallel AF is shown in Fig. 1. The
AF is composed of a standard three-phase voltage source
inverter bridge with a dc bus capacitor to provide an effective
current control. A hysteresis PWM current control is
employed to give fast response of the AF. The non-linear
load is a dc resistive load supplied by three-phase
uncontrolled bridge rectifier with an input impedance and dc
capacitor on the output. Due to capacitive loading the
uncontrolled bridge rectifier draws non sinusoidal pulsating
currents from ac source. Depending upon the load magnitude
and its parameters it also draws reactive power from the
mains. The basic function of the proposed parallel AF is to
eliminate harmonics and meet the reactive power
requirements of the load locally so that the ac supply feeds
only the sinusoidal balanced unity power factor currents. The
desired AF currents are estimated by sensing the load current,
dc bus voltage, and source voltage. The hysteresis current
controller generates the switching signals to AF devices to
force the desired currents into the AF phases. With this
control feature, the AF meets harmonic and reactive current
requirements of the load. The AF connected in shunt with the
load, also enhances the system efficiency as the source does
not process harmonic and reactive power.
Fig. 2 shows the proposed control scheme of die shunt AF.
The ac source feeds fundamental active power component of
load currents and another fundamental component of current
to maintain the average capacitor voltage to a desired value.
This latter component of source current is to feed the losses
in the converter such as switching loss, ohmic loss, capacitor
leakage loss, etc. in the steady state and to maintain the stored
energy on the dc bus during transient conditions such as
sudden fluctuations of load etc. This component of source
current (l s m d) is computed using dc bus capacitor value
(Cd c ), average voltage on dc bus (v^ca) and a chosen
reference voltage of the dc bus ( v ^ j . The fundamental
Nonlinear Load
3-Phase
AC Mains
fc Ml
1
Active Filter
Fig. 1. Basic Circuit of Active Filter
active power component of the load currents (I sm p) is
in. DSP BASED IMPLEMENTATION OF
AF CONTROL
computed using sensed load currents and voltages. The total
reference source peak current l l s m ) is computed using
Description of Experimental Hardware
components I smc i and I s n i p. The reference instantaneous
The non-linear load consists of a three-phase rectifier bridge
with R-C loading on the dc side. The AF bridge is made up
of six IGBTs connected in a VSI structure. The main
capacitor is connected on the dc side of this bridge. The
three-phase terminals of the AF bridge as well as the rectifier
load bridge are connected to the three-phase three-wire ac
mains through series R-L elements.
(*
*
* \
i s a , isb andi s c l are computed using their
peak value ( l s m ) and unit current templates (u sa , us(j and
u s c ) derived from sensed source voltages. The command
(*
*
* \
i c a , i c b and i c c I are computed by taking
the difference between instantaneous source reference
i s a , i s b and i s c ) and sensed load currents (iT_a, JLb
and iL c ). The hysteresis rule based carrierless PWM current
controller is employed over the reference AF currents
Ii c a , i c b and i c c I and sensed AF currents (i ca , icb and icC) to
obtain the gating signals to the devices of the AF. The
devices of the AF are considered ideal. The value of AF
inductance (Lc) is selected on the basis of proper shaping of
compensating currents.
With higher value of L c ,
compensating currents do not track reference currents and if a
lower value of Lc is chosen, there are large ripples in
compensating currents. The AF meets the requirements of
harmonic and reactive components of load currents locally,
resulting in sinusoidal unity power factor source currents
under varying operating conditions of the system.
Description of the DSP System
The DSP system [15] is based on the TMS320C31 signal
processor. Eight channels of 12-bit AD converters and eight
channels of 12-bit DA converters are integrated with the DSP
controller. The system also includes three hardware interrupt
channels. A host computer is used to download the software
code to the DSP system through a serial port.
Details of Controller Algorithm
The block diagram of the control scheme is shown in Fig. 3.
The important functions of the software routine are the
following:
(i)
194
From the input signals compute the instantaneous power
drawn by the load and accumulate the total energy
consumed in a 60 degree interval of the ac cycle.
v
v
trr
Compute Source Current
Component to Recover Energy
Storage on dc Bus
sa
sb
v
sc
Compute Source
Reference Currents
£f tof
Compute Source Active Component
of Current using Averaged of
Instantaneous Active Load Power
over Regular Pulse Interval
Compute Command
AF Currents
Tmp
Hysteresis Based
Current Controller
Hating Signals
Vdc
AF
>cb'
AC
Source
'sc
JLc
>Lb
'La
Nonlinear Load
Fig. 2. Control Scheme of the Three-Phase Active Filter as Implemented by the DSP
(ii) From the dc bus voltage signal, compute the energy
stored in the dc bus capacitor during a sixth of the ac
cycle.
(iii) On receipt of a zero crossing interrupt signal compute
the peak value of the supply reference currents, to be
used in the next 60 degree duration, using the new
algorithm.
(iv) During each looping time, read the load currents and
using the supply current template values calculated,
output the reference current values to the controllers,
which drive the AF bridge.
Aedc= 2
(3)
The total peak source current from equations (1) and (3) is:
(4)
The operation of the AF controller is summarized by
equations (1) to (4).
Input Signals to the DSP Controllers
Basic Equations used in the Algorithm
If the instantaneous load power is averaged over one sixth the
period (T x ), of the supply frequency, the average power can
be expressed as:
PS=(3/2)V s m I* m p
(1)
The energy difference corresponding to the assumed APF dc
bus voltage V^ and the measured average dc bus voltage
V(j ca over the interval T x , is:
Aedc=Cdc
(2)
A total of seven analog signals are fed to the DSP system.
The dc bus voltage of the APF and the three ac phase
voltages are the four voltage signals used. The dc bus voltage
is given by an isolation amplifier (AD202) and scaling
circuits. The ac voltages are obtained using potential
transformers. The three load currents are obtained from Hall
effect current transducers. All the scaling circuits are
designed to match the signal range of the ADC units in the
system.
The only digital signal fed to the DSP system is for ac mains
synchronization. The six zero crossing pulses in each ac
cycle are obtained from the three-phase voltages at positive
and negative zero crossings. These signals are combined
using logic gates to get a pulse train with six times the mains
frequency and fed to an interrupt input of the DSP controller.
The AF is controlled so as to draw this energy difference
Ae^c from the ac mains through unity power factor current
Output Signals from the DSP Controller
with a peak value of I sm d over the same interval T x . This
energy relationship can be expressed as
Using the seven input signals and the zero crossing pulses the
software implements the algorithm to control the AF. The
AF bridge driver pulses are not directly generated by the
195
DSP. A separate hardware controller is used to generate the
gate pulses. The DSP provides the reference current signals
to the three PWM controllers using the new algorithm
developed.
Serial Interface
v
DSP-TMS320C31 Board
sa
Vsb
v
Host IBM
PC
\
sc
VWWw
'La
JLb
'Lc
/
Digital Controller
—*—
dc
v
8 Channels DAC
'ca 1 let
fca
PWM Current
Controller
APF
AC Mains
f
50
Time (mSec)
Fig. 4. Simulated Performance of the AF System under Load
Changefrom8kWtol8kW
Fig. 3. Hardware Block Diagram of Digital Controller
30
IV. SIMULATED PERFORMANCE OF AF SYSTEM
Simulated performance characteristics of the AF system with
proposed control scheme are given in Figs. 4-7 illustrating the
steady state and transient behavior at different loads. The
parameters of the system studied are given in the Appendix.
Fig. 4 shows the source voltage, three-phase currents, load
current, AF current and dc bus voltage when an extra load of
10 kW is added after two cycles. The source currents
respond very quickly and settle to steady state value within a
cycle. The AF current increases almost instantaneously to
feed the increased load current demand by taking the energy
instantaneously from dc bus capacitor. DC bus capacitor
voltage recovers within a cycle. Source currents always
remain sinusoidal and lower than the load currents. Load
current changes from discontinuous to continuous from with
increased load. The active power supplied from source
changes from 8 kW to 18 kW. The sixth harmonic voltage
ripple is observed in dc bus voltage and its magnitude varies
well within 2 % of the reference value. Fig. 6 shows similar
results as in Fig. 4 for sudden decrease of load. The active
power supplied from source is decreased form 18 kW to
8 kW. Source currents settle to steady state value within a
cycle demonstrating the excellent transient response of the
AF. DC bus voltage rises only to 481 V but reaches the
steady state value within a cycle. Load current changes from
(a)
!20
10
10
40
20
Order K
30
40
(b)
30
I 20
10
10
20
Order K
30
40
Fig. 5 Harmonic Spectra of (a) Load Current (8 kW)
(b) Supply Current (8 kW)
196
reactive components of load current and maintains the source
currents sinusoidal in transient and steady state conditions.
Fig. 5 shows the harmonic spectra of the load and the source
currents at light load (8 kW) and Fig. 7 shows the harmonic
spectra of the currents at 18 kW load conditions. It may be
observed from the harmonic spectra of Figs. 5(a) and 7(a) that
the dominent harmonics in load currents are of order below
30th and the AF is found effective to eliminate them. The
THD of source current is reduced from 105 % to 2.07 %
under light load (8 kW) and from 53 % to 1.07 % during
heavy load (18 kW). The AF is quite effective to reduce the
THD well below the specified 5 % limit of standard IEEE519.
The performance of the proposed control algorithm of the AF
is found to be excellent and the source current is practically
sinusoidal and in phase with the source voltage. The fast
response of the AF ensures that the AF is not overburdened
during transient conditions. The voltage ripple is quite small
in dc bus capacitor voltage and may be reduced further by
increasing the capacitor value. Surge in dc bus voltage is
observed to be ± 8 % during transients which may be
controlled by the design to a lower value but at the expense of
increased value of source currents during transients.
However, this surge in dc bus voltage reduces with increased
value of bus capacitor.
[450 / V W W A A A / W / ^ ^ ^
400
50
Tims (mSec)
100
V. EXPERIMENTAL RESULTS AND DISCUSSIONS
Fig. 6. Simulated Performance of the AF System under Load
Change from 18 kW to 8 kW
The experimental waveforms obtained from the laboratory
setup are shown in Fig. 8, corresponding to load power level
of 520 watt. Fig 8(a) shows the current drawn by the load
and the source voltage for this loading condition. In the
uncompensated system, the current drawn by the load is the
same as the source current. Fig. 8(b) shows the source
current and the source voltage in the compensated system
under the same loading condition. The AF has made the
supply current nearly sinusoidal and to be in phase with the
voltage.
(a)
60
40
•20
10
20
Order K
30
40
10
20
Order K
30
40
60
The hysteresis based current control and the carrier based
PWM current control are possible in the laboratory setup.
The carrier based PWM control offers a fixed switching rate
for the semiconductor devices. In the digital simulation
studies, a step time of 2 micro seconds was used. The
simulation assumes ideal switching elements and transducers.
However, the hardware setup was found to be much slower in
response, because of the speed limitations of the data
converters and software looping time. This explains the
differences in the quality of the simulation and experimental
waveforms. For practical reasons, the power level of the
experimental set up has been kept low and all the
measurements were taken for a power levl of around 500 VA.
The suitability of the proposed control strategy is confirmed
by the studies presented.
[40
•20
0
Fig. 7. Harmonic Spectra of (a) Load Current (18 kW)
(b) Supply Current (18 kW)
continuous to discontinuous form. Source currents remain
always less than the load currents under all operating
conditions. The AF meets the requirements of harmonic and
197
Experimental System Parameters:
|Supply Voltgge
(g)
Vs (rms/phase) = 70 V,
F = 60 Hz,
Rc = 0.1 ohm,
L c = 3 mH, C L = 650 |XF, Rs = 0.05 ohm, L s = 22 mH,
C d c = 3000 |XF.
U
REFERENCES
[1]
[2]
[3]
[4]
[5]
[6]
[7]
Fig. 8. Experimental Results from AF Setup (520 watts)
(a) Load Current (2.5A/div) and Supply Voltage (20V/div);
(b) Supply Current (2.5A/div) and Supply Voltage (20V/div).
[8]
VI. CONCLUSIONS
[9]
This paper demonstrates the validation of a simpler control
approach for the parallel active power filter by using
simulation studies and a DSP based laboratory setup. The AF
is observed to eliminate the harmonic and reactive
components of load current resulting in sinusoidal and unity
power-factor source currents. It is observed that the source
current remains in the same level as the load current even
during transient conditions. The AF enhances the system
efficiency because the source need not process the harmonic
and reactive power demanded by the load. The details of the
DSP based setup presented in this paper will be of interest to
field engineers and AF manufacturers.
[10]
[11]
[12]
[13]
APPENDIX
[14]
Simulated System Parameters :
R c = 0.1 ohm,
Vs (rms/phase) = 127 V,
F = 60 Hz,
L c = 0.3 mH, C L = 330 |xF, Rs = 0.01 ohm, Ls = 0.25 mH,
C dc = 1500 \iF.
[15]
198
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