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UNH IOL S ERIAL A TTACHED

SCSI (SAS) C ONSORTIUM

Clause 5

SAS 3.0 Transmitter Test Suite

Version 1.4

Technical Document

Last Updated: September 30, 2014

UNH IOL SAS Consortium

InterOperability Laboratory

University of New Hampshire

121 Technology Drive, Suite 2

Durham, NH 03824

Phone: (603) 862-0701

Fax: (603) 862-4181 http://www.iol.unh.edu/consortiums/sas

© 2014 University of New Hampshire InterOperability Laboratory

The University of New Hampshire

InterOperability Laboratory

TABLE OF CONTENTS

TABLE OF CONTENTS ......................................................................................... 2

MODIFICATION RECORD .................................................................................. 3

ACKNOWLEDGMENTS ....................................................................................... 4

INTRODUCTION .................................................................................................... 5

GROUP 1: TX OOB SIGNALING ......................................................................... 7

T EST 5.1.1

TX M AXIMUM N OISE D URING OOB I DLE ................................................................ 8

T EST 5.1.2

TX OOB B URST A MPLITUDE ................................................................................... 9

T

EST

5.1.3

TX OOB O

FFSET

D

ELTA

.........................................................................................11

T

EST

5.1.4

TX OOB C

OMMON

M

ODE

D

ELTA

.......................................................................... 13

GROUP 2: TX SPREAD SPECTRUM CLOCKING REQUIREMENTS.......15

T EST 5.2.1

TX SSC M ODULATION F REQUENCY ....................................................................... 16

T EST 5.2.2

TX SSC M ODULATION D EVIATION AND B ALANCE ................................................. 19

T

EST

5.2.3

TX SSC DFDT (I

NFORMATIVE

) ............................................................................. 21

GROUP 3: TX NRZ DATA SIGNALING REQUIREMENTS .........................23

T

EST

5.3.1

TX P

HYSICAL

L

INK

R

ATE

L

ONG

T

ERM

S

TABILITY

................................................. 24

T EST 5.3.2

TX C OMMON M ODE RMS V OLTAGE L IMIT ............................................................ 27

T

EST

5.3.3

TX C

OMMON

M

ODE

S

PECTRUM

............................................................................. 30

T

EST

5.3.4

TX P

EAK

-

TO

-P

EAK

V

OLTAGE

................................................................................. 32

T EST 5.3.5

TX VMA AND EQ (I NFORMATIVE FOR 6G BPS , R EQUIRED FOR 12G BPS ) ................ 36

T EST 5.3.6

TX R ISE AND F ALL T IMES ...................................................................................... 40

T

EST

5.3.7

TX R

ANDOM

J

ITTER

(RJ) ....................................................................................... 44

T

EST

5.3.8

TX T

OTAL

J

ITTER

(TJ) ............................................................................................ 47

T EST 5.3.9

TX W AVEFORM D ISTORTION P ENALTY (WDP) (1.5

6.0

G BPS O NLY ) .................. 50

T

EST

5.3.10

E

ND TO

E

ND

S

IMULATION

.................................................................................... 53

GROUP 4: S-PARAMETER REQUIREMENTS ...............................................55

T

EST

5.4.1

RX D

IFFERENTIAL

R

ETURN

L

OSS

(SDD11) ........................................................... 56

T EST 5.4.2

RX C OMMON -M ODE R ETURN L OSS (SCC11) ........................................................ 60

T EST 5.4.3

RX D IFFERENTIAL I MPEDANCE I MBALANCE (SCD11) ........................................... 62

T

EST

5.4.4

TX D

IFFERENTIAL

R

ETURN

L

OSS

(SDD22) ........................................................... 64

T

EST

5.4.5

TX C

OMMON

-M

ODE

R

ETURN

L

OSS

(SCC22) ........................................................ 67

T EST 5.4.6

TX D IFFERENTIAL I MPEDANCE I MBALANCE (SCD22) ........................................... 70

APPENDICES ........................................................................................................73

A PPENDIX 5.A

H ARDWARE R EQUIREMENTS , T EST F IXTURES , AND T EST S ETUPS .................... 74

A

PPENDIX

5.B

S

UMMARY OF

T

EST

P

ATTERNS

/M

ODES

............................................................. 78

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MODIFICATION RECORD

2014 October 1 (Version 1.4)

Updated Release

Joshua Beaudet Added test 5.3.10

Updated tests 5.3.4 and 5.3.5

Updated required test patterns in appendix 5B

Michael Klempa: Updated to include real time oscilloscope measurement procedure

2014 July 7 (Version 1.3)

Updated Release

Joel Nkounkou: Updated References and VMA/ EQ Test

2014 March 5 (Version 1.2)

Updated Release

Michael Klempa: Updated References and Measurement Definitions

2013 Feb 14 (Version 1.0)

Final Release

Joshua Beaudet: Updated for 12G SAS

2012 Oct 2 (Version 0.1)

INITIAL DRAFT

Joshua Beaudet: Initial Draft

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ACKNOWLEDGMENTS

The University of New Hampshire would like to acknowledge the efforts of the following individuals in the development of this test suite:

Michael Klempa UNH InterOperability Laboratory

Joshua Beaudet UNH InterOperability Laboratory

Andy Baldman UNH InterOperability Laboratory

Dave Woolf

Joel Nkounkou

UNH InterOperability Laboratory

UNH InterOperability Laboratory

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INTRODUCTION

The University of New Hampshire’s InterOperability Laboratory (IOL) is an institution designed to improve the interoperability of standards based products by providing an environment where a product can be tested against other implementations of a standard. This particular suite of tests has been developed to help implementers evaluate the Physical Layer functionality of their Serial Attached SCSI (SAS) products.

These tests are designed to determine if a SAS product conforms to specifications defined in Clause 5 of

ISO/IEC 14776-154:201x, Serial Attached SCSI-3 (SAS-3) Standard T10/2212-

D, Revision 06

(hereafter referred to as the “SAS-3 Standard”, or “the Standard”). Successful completion of all tests contained in this suite does not guarantee that the tested device will successfully operate with other SAS products. However, when combined with satisfactory operation in the IOL’s interoperability test bed, these tests provide a reasonable level of confidence that the Device Under Test (DUT) will function properly in many SAS environments.

The tests contained in this document are organized in order to simplify the identification of information related to a test, and to facilitate in the actual testing process. Tests are separated into groups, primarily in order to reduce setup time in the lab environment, however the different groups typically also tend to focus on specific aspects of device functionality. A three-number, dot-notated naming system is used to catalog the tests, where the first number always indicates the specific clause of the reference standard on which the test suite is based. The second and third numbers indicate the test’s group number and test number within that group, respectively.

This format allows for the addition of future tests in the appropriate groups without requiring the renumbering of the subsequent tests.

The test definitions themselves are intended to provide a high-level description of the motivation, resources, procedures, and methodologies specific to each test. Formally, each test description contains the following sections:

Purpose

The purpose is a brief statement outlining what the test attempts to achieve. The test is written at the functional level.

References

This section specifies all reference material

external

to the test suite, including the specific sub-clauses references for the test in question, and any other references that might be helpful in understanding the test methodology and/or test results. External sources are always referenced by a bracketed number (e.g., [1]) when mentioned in the test description. Any other references in the test description that are not indicated in this manner refer to elements within the test suite document itself (e.g., “Appendix 5.A”, or “Table 5.1.1-1”)

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Resource Requirements

The requirements section specifies the test hardware and/or software needed to perform the test. This is generally expressed in terms of minimum requirements, however in some cases specific equipment manufacturer/model information may be provided.

Last Modification

This specifies the date of the last modification to this test. Editorial modifications (e.g., updated table/figure numbers) and/or conformance limit changes due to an updated version of the standard will be denoted by a decimal increase in version number (e.g., ‘version 1.1’).

Modifications to the test procedure will be denoted by an integer number version increment (e.g.,

‘version 2.0’).

Discussion

The discussion covers the assumptions made in the design or implementation of the test, as well as known limitations. Other items specific to the test are covered here as well.

Test Setup

The setup section describes the initial configuration of the test environment. Small changes in the configuration should not be included here, and are generally covered in the test procedure section (next).

Procedure

The procedure section of the test description contains the systematic instructions for carrying out the test. It provides a cookbook approach to testing, and may be interspersed with observable results.

Observable Results

This section lists the specific observables that can be examined by the tester in order to verify that the DUT is operating properly. When multiple values for an observable are possible, this section provides a short discussion on how to interpret them. The determination of a pass or fail outcome for a particular test is generally based on the successful (or unsuccessful) detection of a specific observable.

Possible Problems

This section contains a description of known issues with the test procedure, which may affect test results in certain situations. It may also refer the reader to test suite appendices and/or other external sources that may provide more detail regarding these issues.

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GROUP 1: TX OOB SIGNALING

Overview:

This group of tests verifies the TX electrical signaling requirements for SAS Out-Of-

Band (OOB) signals, as defined in Clause 5 of the SAS-3 Standard.

Scope:

All of the tests described in this section are implemented and currently active through the

UNH IOL SAS Consortium. Comments and questions are welcome, and may be forwarded to the SAS Lab (saslab@iol.unh.edu).

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Test 5.1.1 - TX Maximum Noise During OOB Idle

Purpose: To verify that the peak noise during OOB Idle of the DUT’s transmitter is less than the maximum allowed value.

References:

[1] SAS-3 Standard, Table 32 - General electrical characteristics

Resource Requirements: See Appendix 5.A

Last Modification: February 14, 2013

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This specification includes conformance limits for the maximum noise permitted by the transmitter during OOB Idle times [1]. The specification is reproduced in the figure below.

Figure 5.1.2-1: Maximum Noise During OOB Idle Specification

In this test, the maximum noise during OOB idle will be measured at the transmitter device output while the DUT is connected to the Zero-Length Test Load and transmitting OOB signaling. The measurement will be performed using a persistence waveform capture on a real-time DSO. The DSO will be configured to build a persistence capture of the OOB signaling over a period of time, and the maximum differential noise observed during the Idle periods will be recorded.

The maximum pk-pk noise value must be less than 120mVppd in order to be considered conformant.

Test Setup: See Appendix 5.A.3

Test Procedure:

1.

Connect the DUT to the Zero-Length test load.

2.

Configure the DUT so that it is sourcing valid OOB signaling.

3.

Configure the DSO to build a persistence capture of the differential signal

4.

Allow the DSO to run for at least one minute.

5.

Measure and record the maximum peak-to-peak differential noise level observed during OOB idle.

Observable Results: a.

The maximum peak-to-peak OOB idle noise shall be less than 120mVppd.

Possible Problems: None.

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Test 5.1.2 - TX OOB Burst Amplitude

Purpose: To verify that the amplitude of the DUT’s transmitted OOB bursts is within the conformance limits.

References:

[1] SAS-3 Standard, Table 51 - Transmitter device signal output characteristics for OOB signals

Resource Requirements: See Appendix 5.A

Last Modification: February 14, 2013

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes requirements for the minimum and maximum amplitude of a device’s transmitted OOB burst signaling [1]. The specifications are reproduced in the figure below.

Figure 5.1.3-1: TX OOB Amplitude Requirements

In this test, the DUT’s transmitted OOB burst signaling will be captured with a real-time DSO. The minimum amplitude will be measured according to the definition specified in note (d) shown above, whereby the minimum amplitude will correspond to the lowest-amplitude bit in the burst. The maximum amplitude will be measured as the maximum peak-to-peak differential amplitude across the entire burst.

The minimum OOB amplitude must be greater than or equal to 240mVppd in order to be considered conformant, and the maximum OOB amplitude must be less than or equal to 1600mVppd in order to be considered conformant

Test Setup: See Appendix 5.A.3

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Test Procedure:

1.

Configure the DUT so that it is sourcing valid OOB signaling.

2.

Connect the Zero-Length test load to the DUT transmitter device.

3.

Capture a single SAS OOB burst waveform.

4.

Compute the minimum OOB burst amplitude.

5.

Compute the maximum OOB burst amplitude.

6.

Replace the Zero-Length test load with the TCTF test load, and repeat steps 3, 4, and 5.

Observable Results: a.

The minimum OOB burst amplitude shall be greater than 240mVppd for both test load cases. b.

The maximum OOB burst amplitude shall be less than 1600mVppd for both test load cases.

Possible Problems: None.

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Test 5.1.3 - TX OOB Offset Delta

Purpose: To verify that the OOB offset delta of the DUT’s transmitter device is within the conformance limits

References:

[1] SAS-3 Standard, Table 51 - Transmitter device signal output characteristics for OOB signals

Resource Requirements: See Appendix 5.A

Last Modification: February 14, 2013

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This specification includes a requirement for the OOB offset delta, as well as the conditions under which this measurement shall be made [1]. A copy of the specification is reproduced in the figure below.

Figure 5.1.4-1: OOB Offset Delta Requirement

The specification defines the OOB offset delta as the maximum difference in the average differential voltage (DC offset) component between the burst times and the idle times of an OOB signal.

In this test, the OOB offset delta will be measured at the transmitter device output using a real-time DSO while the DUT is connected to the Zero-Length test load. The edges of the burst will be computed at the time points where the differential signal crosses the +/-50mV thresholds. The differential waveform samples between these two points will be extracted and the mean value will be computed. (The average value of the differential signal during the idle times will not be directly measured, as it is understood to be zero volts due to the fact that the DUT will be connected to the DSO using DC blocking capacitors.) Thus, the mean value of the differential burst waveform samples will be computed as the OOB offset delta.

The absolute value of the OOB offset delta must be less than or equal to 25mV in order to be considered conformant.

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Test Setup: See Appendix 5.A.3

Test Procedure:

1.

Configure the DUT so that it is sourcing OOB signaling.

2.

Connect the Zero-Length test load to the DUT transmitter device.

3.

Capture a single SAS OOB burst waveform.

4.

Compute the OOB offset delta as described above.

Observable Results: a.

The OOB offset delta shall not exceed +/- 25mV.

Possible Problems: None.

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Test 5.1.4 - TX OOB Common Mode Delta

Purpose: To verify that the OOB common mode delta of the DUT transmitter device is within the conformance limits

References:

[1] SAS-2 Standard, Table 51 - Transmitter device signal output characteristics for OOB signals

Resource Requirements: See Appendix 5.A

Last Modification: February 14, 2013

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes a requirement for the OOB common mode delta, as well as the conditions under which this measurement shall be made [1]. A copy of the specification is reproduced in the figure below.

Figure 5.1.4-1: TX OOB Common-Mode Delta Requirement

The specification defines the OOB common mode delta as the maximum difference in the average common mode voltage between the burst times and the idle times of an OOB signal.

In this test, the OOB common-mode delta will be measured at the transmitter device output using a realtime DSO while the DUT is connected to the Zero-Length test load. The common-mode signal will be computed as

(TXp + TXn)/2, and the differential signal will be computed as (TXp - TXn) (where TXp and TXn are the positive and negative halves of the TX differential signal, respectively). The edges of the burst will be computed at the time points where the differential signal crosses the +/-50mV thresholds. The common-mode waveform samples between these two points will be extracted and the mean value will be computed. (The average value of the common-mode signal during the idle times will not be directly measured, as it is understood to be zero volts due to the fact that the DUT will be connected to the DSO using DC blocking capacitors.) Thus, the mean value of the common-mode burst samples will be computed as the OOB common-mode delta.

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Test Setup: See Appendix 5.A.3

Test Procedure:

1.

Configure the DUT so that it is sourcing OOB signaling.

2.

Connect the Zero-Length test load to the DUT transmitter device.

3.

Capture a single SAS OOB burst waveform.

4.

Compute the OOB common mode delta as described above.

Observable Results: a.

The OOB common mode delta shall not exceed +/- 50mV.

Possible Problems: None.

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GROUP 2: TX SPREAD SPECTRUM CLOCKING REQUIREMENTS

Overview:

This group of tests verifies the Spread Spectrum Clocking (SSC) requirements for SAS data signaling, as defined in Clause 5 of the SAS-3 Standard.

Scope:

All of the tests described in this section are implemented and currently active through the

UNH IOL SAS Consortium. Comments and questions are welcome, and may be forwarded to the SAS Lab (saslab@iol.unh.edu).

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Test 5.2.1 - TX SSC Modulation Frequency

Purpose: To verify that the SSC modulation frequency of the DUT’s transmitted signaling is within the conformance limits. (Note this test only applies to DUT’s that have SSC enabled on their output signaling.)

References:

[1] SAS-3 Standard, Section 5.8.6.1 - SSC Overview

[2] Ibid, Section 5.8.6.1 - Transmitter SSC Modulation

Resource Requirements: See Appendix 5.A

Last Modification: July 3, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes a requirement for the modulation frequency of a device’s Spread Spectrum Clocking (SSC) behavior [1], which is reproduced in the figure below.

Figure 5.2.1-1: SSC Modulation Frequency Requirement

In this test, the SSC modulation frequency of the DUT’s transmitted output signaling will be measured while the DUT is transmitting SSC. A sample of the DUT’s NRZ data signaling will be captured using a real-time

DSO, and will be post-processed to recover the transmitter’s SSC modulation profile. The frequency of the modulation will be observed by measuring the average period over a minimum of 10 SSC cycles, and the inverse of this result will be computed to produce the modulation frequency result.

Note that the DUT may be transmitting into the Zero-Length Test Load, as the measured SSC profile, being a timing-specific measurement, is relatively insensitive to the termination environment presented to the transmitter.

The measurement can potentially be performed while the DUT is transmitting any arbitrary data pattern, provided the post-processing implementation is designed to handle non-clock data patterns, which requires that any multi-UI edge-to-edge time intervals (caused by consecutive runs of multiple 1’s or 0’s) be divided into separate single-UI values. If the post-processing implementation does not support this ability, the measurement must be performed on a repeating 1010 data pattern.

The post-processing procedure used to extract the modulation profile from the waveform data is nearly identical to that used in Test 5.3.1 to determine the TX Physical Link Rate Long Term Stability (see Test 5.3.1

Discussion), except for this test a different cutoff filter frequency will be used. Rather than using a single-pole (1 st

order) Butterworth filter with a cutoff frequency of 3.7 +/-0.2 MHz, this test will use a 4 th

-order Butterworth with a

200kHz cutoff.

The purpose of the lower cutoff value is to remove as much of the high-frequency artifacts from the SSC profile as possible, so that the filter output produces as smooth of a signal as possible, from which to measure the period. Any residual high-frequency content that is present on the SSC profile when the period is measured can potentially cause errors, particularly if they result in multiple crossing points at the threshold level used to determine the start and end points of the SSC profile period. Note that the exact filter cutoff value used does not have a significant affect on the result, as this measurement is effectively looking to measure the fundamental frequency of the modulation, which should be approximately 30 to 33 kHz. A 200MHz filter cutoff limit is a robust practical value, as it allows enough harmonic to remain such that the resulting waveform still contains the characteristic

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Averaged Max = -491ppm

Averaged Min = -3114ppm

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Figure 5.2.1-2 below shows these concepts pictorially. The figure shows two copies of an SSC profile obtained from an actual device, which has been filtered with both a 2MHz, 2 nd

-order Butterworth filter, and 200kHz,

4 th

-order Butterworth filter. One can clearly see the difference in high-frequency content between the two waveforms, and how this added HF content complicates the ability to determine an accurate period value. The

200kHz-filtered waveform however (shown in pink) is significantly smoother, and crosses the reference threshold level at only a single clear time point, which can be accurately measured.

-500

Filtered SSC Profile Using Different Filters

2MHz 2nd-Order Butter ECN (Filter)

200kHz 4th-Order Butter (Filtfilt)

Fssc = 31.88kHz

-1000

-1500

-2000

-2500

-3000

1.8

1.85

1.9

1.95

2 2.05

UI #

2.1

2.15

2.2

2.25

2.3

x 10

5

Figure 5.2.1-2: Filtered SSC Profile Using Different Lowpass Cutoff Frequencies

(2MHz vs. 200kHz)

Test Setup: See Appendix 5.A.4

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DSO to capture at least 2 million samples at a minimum of 80GS/s.

3.

Configure the DUT to transmit a 1010 pattern at the required bit rate.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Capture a single acquisition of the DUT’s differential transmitted data signal.

6.

Using post-processing techniques, compute the 200kHz-filtered SSC profile as described above.

7.

Measure the mean period of the SSC profile over a minimum of 10 periods.

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8.

Compute the inverse of the period value to produce the SSC modulation frequency result.

Observable Results: a.

The SSC modulation frequency shall be between 30 and 33kHz (inclusive).

Possible Problems: None.

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Test 5.2.2 - TX SSC Modulation Deviation and Balance

Purpose: To verify that the SSC modulation deviation of the DUT’s transmitted signaling is within the conformance limits. (Note this test only applies to DUT’s that support transmission of SSC.)

References:

[1] SAS-3 Standard, Section 5.8.6.1 - SSC Overview

[2] Ibid, Section 5.8.6.1 - Transmitter SSC Modulation

Resource Requirements: See Appendix 5.A

Last Modification: March 5, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes requirements for the modulation deviation of a device’s Spread Spectrum Clocking (SSC)[1], which is the range over which the DUT’s instantaneous TX bitrate is allowed to deviate when SSC is enabled. A copy of the requirements is reproduced from the Standard in the figure below.

Figure 5.2.3-1: SSC Modulation Deviation and Asymmetry Requirements

In this test, the SSC modulation deviation of the DUT’s transmitted output signaling will be measured while the DUT is transmitting SSC enabled by the SENDDIAG command or proprietary means. It will signal directly into the DSO. A sample of the DUT’s NRZ data signaling will be captured using a real-time DSO, and will be post-processed to recover the SSC modulation profile. The deviation of the modulation will be determined by measuring maximum and minimum profile peak values per period, over at least 10 complete SSC cycles (i.e., periods). From these values, the average maximum and average minimum peak values will be computed, and the results compared against the requirements listed above for the appropriate SSC modulation types.

The post-processing procedure used to recover the SSC profile from the waveform data is identical to that described in Test 5.2.2, except that while Test 5.2.2 used a 200kHz filter cutoff value to isolate only the lowest harmonics of the SSC profile, this test will use the full 3.7+/-0.2MHz cutoff value (1 st

-order Butterworth LPF) in order to include the entire required range of harmonic content in the deviation measurement.

Note that in addition to specifying the deviation ranges for Center-spreading and Down-spreading modes, there is also one additional requirement defined for the Center-spreading case, which limits the maximum allowed asymmetry of the deviation around 0ppm. As stated in the specification text in the figure above, the difference

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Deviation Asymmetry = abs(averaged max peak level + averaged minimum peak value).

(For example, if the averaged maximum peak value is measured to be +2100ppm, and the averaged lower peak level is -2200ppm, the Deviation Asymmetry would equal abs (2100 + -2200) = 100ppm.

Test Setup: See Appendix 5.A.3

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DSO to capture a minimum of 2 million samples at a minimum sampling rate of 80GS/s.

3.

Configure the DUT to transmit valid SAS NRZ data signaling, with SSC Modulation enabled of the appropriate type (Down-spreading for SAS phys, and Center-spreading for Expander phys.).

4.

Capture a single acquisition of the DUT’s differential transmitted data signal.

5.

Using post-processing techniques, compute the 3.7+/-0.2MHz-filtered SSC profile as described above.

6.

Record the maximum and minimum profile peak values for each complete period, over at least 10 complete SSC cycles (periods). (Note: Measurements may be recorded across multiple waveform acquisitions, to accumulate as many cycles’ worth of data as is desired. There is no requirement that all recorded values be acquired from a single, contiguous block of SSC cycles.)

7.

Using the per-period max/min peak data, compute the average maximum peak and average minimum peak values.

8.

If the DUT is an Expander phy (i.e., supports Center-spreading), compute the Deviation Asymmetry as described above, using the average maximum peak and average minimum peak values.

9.

If the DUT is an Expander phy that supports SSC transmission when connected to SATA link partners, repeat Steps 3 through 7 above with the DUT transmitting in Down-spreading mode.

Observable Results: a.

If the DUT is a SAS phy that supports Down-spreading when connected to SAS link partners, verify that the average maximum and average minimum peak values are both within the range of 0 to -

2300ppm (inclusive) for 1.5 to 6Gbps and within the range of 0 to –1000ppm (inclusive) for 12Gbps. b.

If the DUT is an Expander phy that supports Center-spreading when connected to SAS link partners, verify that the average maximum and average minimum peak values are both within the range of

+2300 to -2300ppm (inclusive) for 1.5 to 6Gbps and within the range of 1000 to –1000ppm (inclusive) for 12Gbps. c.

If the DUT is an Expander phy that supports Center-spreading when connected to SAS link partners, verify that the Deviation Asymmetry is less than or equal to 288ppm. d.

(INFORMATIVE): If the DUT is an Expander phy that supports Down-spreading when connected to

SATA link partners, verify that the average maximum and average minimum peak values are both within the range of 0 to -5000ppm (inclusive) for 1.5Gbps to 6Gbps devices.

Possible Problems: None.

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Test 5.2.3 - TX SSC DFDT (Informative)

Purpose: To verify that the maximum short-term rate of change (slope) of the SSC modulation profile (also referred to as ‘dF/dt’) is less than the maximum recommended value. (Note: This specification is formally stated as a recommendation and not a normative requirement in the SAS-3 Standard. Therefore this is test is considered INFORMATIVE for the purposes of this Test Suite.)

References:

[1] SAS-3 Standard, Section 5.8.6.1 - SSC Overview

Resource Requirements: See Appendix 5.A

Last Modification: July 3, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes an informative specification for the slope of the modulation deviation of a device’s SSC profile[1]. (Note this parameter is also known by the name ‘dF/dt’, or simply DFDT, though the SAS-3 Standard does not use either of these terms.) A copy of the requirement is reproduced from the Standard in the figure below.

Figure 5.2.4-1: SSC Modulation Slope (dF/dt) Specification

Note that the slope definition is not a normative requirement (as the specification text uses the word

‘should’, rather than ‘shall’), however as is included in the Standard as a recommendation, it is included in this test suite for any informative value it may provide.

In this test, the slope of the SSC profile will be computed using post-processing techniques. The profile used will be the profile that was measured in Test 5.2.3. An additional processing step will be performed on the profile, where a ‘sliding window’ will be moved across the profile values to compute the slope. This window will have a width of 0.27us, and the slope value for each horizontal point will be calculated using the equation defined above.

The figure below shows an example of this measurement, using an actual measured SSC profile. The source SSC profile is shown in light blue, and the slope/DFDT plot is shown in dark blue. Note the light blue SSC profile is actually a Down-spreading profile, but has been vertically shifted to be centered around 0ppm, primarily to facilitate visual comparison between the DFDT result and the source SSC profile. (Note that any vertical shifting

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InterOperability Laboratory operation will have no impact on the computed result, as the difference operation is not affected by the relative vertical offset of the profile.)

Df/dt Measurement

1500

2MHz Filtered SSC Profile

Df/dt (0.27us Sliding Window)

+/-850ppm df/dt Test Limits

Peak df/dt = -1541ppm/us

1000

500

0

-500

-1000

0.95

1 1.05

1.1

1.15

1.2

UI #

1.25

1.3

1.35

1.4

1.45

x 10

5

Figure 5.2.4-2: Example DFDT Measurement Plot

(Single SSC Period Shown)

The DFDT result must be no greater than 850ppm/us in order to be considered conformant to the informative recommendation of the Standard. (Note that for reporting purposes, the result of this measurement will still be reported using a PASS or FAIL indication, however it will be clearly noted that the test itself is considered

INFORMATIVE in any test report.)

Test Setup: See Appendix 5.A.3

Test Procedure:

1.

Obtain the SSC profile data from Test 5.2.2

2.

Post-process the profile data as described above, to create the DFDT profile.

3.

Measure and record the peak DFDT value.

Observable Results: a.

The peak DFDT shall not exceed +/-850ppm/us.

Possible Problems: None.

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GROUP 3: TX NRZ DATA SIGNALING REQUIREMENTS

Overview:

This group of tests verifies the electrical signaling specifications for SAS NRZ data signals, as defined in Clause 5 of the SAS-3 Standard.

Scope:

All of the tests described in this section are implemented and currently active through the

UNH IOL SAS Consortium. Comments and questions are welcome, and may be forwarded to the SAS Lab (saslab@iol.unh.edu).

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Test 5.3.1 - TX Physical Link Rate Long Term Stability

Purpose: To verify that the long term stability of the DUT transmitter’s physical link rate is within the conformance limits. (Note: This test must be performed while the DUT’s TX SSC type is set to No

Spreading.)

References:

[1] SAS-3 Standard, Table 34 - Transmitter device general electrical characteristics

[2] Ibid, Section 5.8.6.1 - SSC Overview

Resource Requirements: See Appendix 5.A

Last Modification: March 5 th

, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes a requirement for the physical link rate long-term stability[1], which is one metric for characterizing the quality and consistency of the transmitter’s reference clock. A copy of the specification is reproduced in the figure below.

Figure 5.3.1-1: Physical Link Rate Long-Term Stability Requirements

Note that the specification defines conformance tolerances of +/- 100ppm for the physical link rate, however it is important to clarify specifically what this means, and also how it is measured, for the purposes of this test.

(Also note that this test is only applicable to DUT’s when their TX SSC Type is configured for No

Spreading.)

First, the use of ppm (Parts Per Million) must be clarified, as ppm is by definition a tolerance with respect to a defined reference. For the purposes of this test, the reference is understood to be the nominal (i.e., ‘ideal’) bit rate specified for the given speed class (e.g., 1.5Gbps, exactly). The table below shows how the link rate tolerances in ppm translate to bit rate tolerances in Kbps for 1.5Gbps, 3.0Gbps, 6.0Gbps, and 12.0Gbps devices.

Table 5. 3.1-1: Link Rate/Bit Rate Equivalent Tolerances

Link Rate

Tolerance

+/- 100 ppm

Bit Rate Tolerance -

1.5Gbps

+/- 150 Kbps

Bit Rate Tolerance -

3.0Gbps

+/- 300 Kbps

Bit Rate Tolerance -

6.0Gbps

+/- 600 Kbps

Bit Rate Tolerance -

12.0Gbps

+/- 1200 Kbps

Second, the meaning of ‘stability’ must be clarified, as well as the methodology used to measure it. For the purposes of this test, stability is defined as the short-term accuracy of the transmitted bitrate of the device. In other

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InterOperability Laboratory words, the bitrate ay any given point in time must be within the conformance limits (as opposed to just the long-term average bitrate, as may be specified by other high-speed serial standards.)

However, in terms of measurement, even this definition is insufficient by itself, as how the instantaneous bitrate is measured can affect the numerical measurement result. Therefore, a more explicit definition and procedure must be specified for test purposes.

For the purpose of this test, the procedure used will consist of acquiring a sample of the DUT’s transmitted differential signal using a real-time DSO, while the DUT is transmitting a repeating 1010 data pattern into the Zero-

Length test load. (The DSO should be configured to capture at least 2M samples at a sampling rate of 20GS/s or greater.)

The differential waveform will then be post-processed to determine the TX Link Rate Long-Term Stability, using the following algorithm: First, the time points will be found where the differential signal crosses zero volts

(i.e., zero crossings). A diff (difference) operation will be performed on this array of time values to produce an array of Unit Interval (UI) widths.

Note that because of the relatively low resolution of the sampled waveform (i.e., number of samples per

UI), the computed UI values at this point will contain a certain amount of error. If the inverse of these UI values is computed, one could consider them to reflect the instantaneous bitrate of the transmitter. This is partially true, however the results would contain a high degree of high-frequency error, caused by the limited resolution of the sampling rate, and hence the UI accuracy. However, it is possible to remove this error by filtering the data using a low-pass filter, which will reveal the underlying lower-frequency stability of the link rate.

One important detail however, is that the cutoff frequency, as well as the exact implementation of the filter can have a significant impact on the result. While the Standard does not explicitly specify filtering requirements for the Physical Link Rate Long-Term Stability measurement, it does specify the use of a single-pole (first-order) filter with a cutoff frequency of 3.7 +/-0.2 MHz for the measurement of the slope of the frequency deviation (a.k.a.,

‘df/dt’)[2], hence for consistency the same filter will be used here to compute the frequency deviation data. (For the df/dt measurement methodology, see Test 5.2.4). Also, although the Standard does not explicitly specify the type of filter required, a Butterworth filter will be used.

The inverse of the UI values will be taken to produce an array of instantaneous frequency values. The test filter will then be applied to the inverse of the UI values. Note that in this case the ‘sample rate’ of the data is one value per UI, so the test filter must be designed accordingly in order to produce the desired 3.7 MHz cutoff.

The resulting waveform that is produced at the output of the test filter will then be converted to ppm. This result will represent the instantaneous bitrate of the DUT. All of the values must be between +100ppm and -100ppm of the nominal bit rate under test in order to be considered conformant.

Test Setup: See Appendix 5.A.4

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DSO to capture at least 2 million samples at a minimum of 80GS/s.

3.

Configure the DUT to transmit a 1010 pattern at required bit rate.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Capture a single acquisition of the DUT’s differential transmitted data signal.

6.

Using post-processing techniques, compute the instantaneous physical link rate as described above.

7.

Record the maximum, minimum, and mean bitrate values (in ppm) observed over the entire capture.

Observable Results: a.

The mean TX bitrate values shall be within +/- 100ppm of nominal bit rate. b.

The maximum and minimum TX bitrate values will be reported as informative values.

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Possible Problems: None.

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InterOperability Laboratory

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Test 5.3.2 - TX Common Mode RMS Voltage Limit

Purpose: To verify that the common-mode RMS voltage of the DUT’s transmitter device is less than the maximum allowed value.

References:

[1] SAS-3 Standard, Table 38 - Transmitter device signal output characteristics for trained 1.5 Gbps, 3

Gbps, and 6 Gbps at IT and CT

[2] SAS-3 Standard, Table 43 Transmitter device signal output characteristics for trained 12 Gbps at ET,

IT, and CT

Resource Requirements: See Appendix 5.A

Last Modification: July 3, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes a requirement for the TX common-mode RMS voltage[1], which is a limit on the broadband RMS common-mode voltage. (Note this is a separate specification from the common-mode spectral requirements, which are verified in the next test, Test 5.3.3). A copy of the specification is reproduced from the Standard in the figure below.

Figure 5.3.2-1: TX Common-Mode RMS Voltage Requirements

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Figure 5.3.2-2: TX Common-Mode RMS Voltage Requirements

Whereas the differential signal is defined as the difference of the TXp and TXn waveforms, a transmitter’s common-mode signal is mathematically computed as the average of the TXp and TXn waveforms, i.e., Vcm =

(TXp + TXn)/2. The characteristics of a device’s common-mode signal are valuable to look at primarily because the common-mode signal provides a measure of how symmetric the positive and negative halves are of the differential signal.

In an ideal transmitter, The TXn signal would be a perfectly inverted copy of the TXp signal. Thus, the average of the two signals would be exactly zero at all points of the waveform. In reality however, many characteristics of the driver can introduce asymmetry into the signals. Any difference in amplitude, rise/fall time, overshoot, and also timing skew between the two halves of the differential signal will result in a residual commonmode signal remaining when the average is taken. This is important, as one of the benefits of differential signaling is the decreased EMI that is introduced when the opposite fields from the positive and negative signaling halves serve to cancel each other out. If there is imbalance between the two signal halves, this cancellation is reduced, and radiated EMI is increased.

Note the Standard does not clearly define a specific data pattern to be used when measuring he RMS common-mode voltage. However for the purposes of this test the CJTPAT test pattern will be used, as it is also the required pattern to be used for the common-mode spectral limit test (see Test 5.3.3). Also, while the Standard does not explicitly specify the SSC state of the transmitter for this test, the measurement will be performed with SSC disabled.

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In this test, the RMS value of the DUT’s common-mode signal will be measured using a real-time DSO over a minimum capture length of 100us, at a sampling rate of at least 20GS/s, while the DUT is transmitting the

CJTPAT pattern with SSC disabled into the Zero-Length Test Load.

The RMS value of the common-mode signal must be less than or equal to 30mV in order to be considered conformant.

Test Setup: See Appendix 5.A.4

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DSO to capture at least 100us of signaling at a minimum of 80GS/s.

3.

Configure the DUT to transmit the CJTPAT test pattern at required bit rate, with SSC disabled.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Capture a single acquisition of the DUT’s differential transmitted data signal.

6.

Using post-processing techniques, compute and record the RMS value of the common-mode signal as described above.

Observable Results: a.

The RMS common-mode voltage shall be less than or equal to 30mV.

Possible Problems:

Because the magnitude of the common-mode signal is particularly sensitive to any imbalance in the measured signaling, extra care must be taken to ensure that all test fixtures, cabling, etc, do not introduce any added imbalance into the measurement. Skew is perhaps the most significant contributor in this regard, and false failures or unnecessarily high measurement results can occur if the DSO cables and fixtures are not properly and accurately de-skewed. Any measured failures for this test should be carefully scrutinized and verified to ensure that the failure is actually due to the DUT, and not attributable to the test setup.

Care should also be taken to ensure that the vertical scale of the sampling scope is optimized to the signals being measured, to minimize quantization noise/error in the result.

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Test 5.3.3 - TX Common Mode Spectrum

Purpose: To verify that the common-mode spectral characteristics of the DUT transmitter device are below the maximum allowed limits.

References:

[1] SAS-3 Standard, Table 39 - Transmitter device common mode voltage limit characteristics

[2] Ibid, Figure 126 - Transmitter device common mode voltage limit

[3] Ibid, Table 44 – 12 Gbps Transmitter device common mode voltage limit characteristics

[4] Ibid, Figure 132 – 12 Gbps Transmitter device common mode voltage limit

Resource Requirements: See Appendix 5.A

Last Modification: July 30, 2013

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes a requirement for the TX common-mode spectral limit[1][2], which places limits on the spectral content of the transmitted common-mode signal energy from the transmitter device. (Note this is a separate specification from the common-mode RMS voltage limit which was verified in the previous test, see Test 5.3.2). A copy of the specification is reproduced from the Standard in the figure below.

Figure 5.3.3-1: TX Common-Mode Spectral Limit Requirements for 1.5Gbps, 3.0Gbps, and 6Gbps

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Figure 5.3.3-2: TX Common-Mode Spectral Limit Requirements for 12Gbps

In this test, the frequency spectrum of the DUT’s common-mode signal will be measured while the DUT is transmitting the CJTPAT pattern into the Zero-Length Test Load. (Also note that while the Standard does not explicitly specify the SSC state of the transmitter for this test, the measurement will be performed with SSC disabled.)

The spectrum the common-mode signal must be less than the specified limits in order to be considered conformant.

Test Setup: See Appendix 5.A.4

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DSO to capture at least 100us of signaling at a minimum of 80GS/s.

3.

Configure the DUT to transmit the CJTPAT test pattern at required bit rate, with SSC disabled.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Capture a single acquisition of the DUT’s differential transmitted data signal.

6.

Using post-processing techniques, compute the spectrum of the common-mode signal as described above, expressed in dBmV, with an effective resolution bandwidth of 1MHz.

7.

Measure and record the minimum margin between the common-mode spectrum and the limit line.

(The margin should be recorded in dBmV, with a positive margin denoting a passing result, and a negative margin denoting a failing result.)

Observable Results: a.

The margin shall be greater than 0dBmV (implying that the spectrum is below the limit line for all frequencies between 100MHz and 6GHz).

Possible Problems:

(See Possible Problems section for test 5.3.2. The same applies to this test.)

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Test 5.3.4 - TX Peak-to-Peak Voltage

Purpose: To verify that the peak-to-peak output voltage of the DUT’s transmitter device is less than the maximum allowed value.

References:

[1] SAS-3 Standard, Table 38 - Transmitter device signal output characteristics for trained 1.5 Gbps, 3

Gbps, and 6 Gbps at IT and CT

[2] Ibid, Section 5.8.4.6.6 - 6Gbps Transmitter equalization, VMA, and V

P-P

measurement

[3] Ibid, Table 43 - Table 43 - Transmitter device signal output characteristics for trained 12 Gbps at ET,

IT, and CT

[4] Ibid, Annex D – End to end simulation for trained 12 Gb/s

Resource Requirements: See Appendix 5.A

Last Modification: September 30, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes requirements for the TX peak-to-peak voltage [1], as well as the procedure by which the parameter shall be measured [2]. Copies of these specifications are reproduced from the Standard in the figures below.

Figure 5.3.4-1: TX Peak-to-Peak Voltage Requirements for 1.5Gbps, 3Gbps, and 6Gbps

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Figure 5.3.4-2: TX Peak-to-Peak Voltage Measurement Definition for 1.5Gbps, 3Gbps, and 6Gbps

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Figure 5.3.4-3: TX Peak-to-Peak Voltage Measurement Definition

As seen above, the V

P-P

measurement is simply the absolute peak-to-peak voltage of the DUT’s transmitted signaling. The Standard also specifies that this measurement be made while the DUT is transmitting a repeating

D30.3 pattern into the Zero-Length Test Load. (Note that the binary value of D30.3 is either 0111100011 or

1000011100, depending on the running disparity, and since both forms invert running disparity, a properly encoded stream of D30.3 codewords would consist of an alternating sequence of both of the values above.) For 12Gbps the transmitter must be set to its maximum amplitude without equalization.

In this test, the absolute peak-to-peak voltage of the DUT transmitter device’s differential signaling will be measured while the DUT is connected to the Zero-Length Test Load, and is transmitting a repeating D30.3 pattern into a sampling scope. The scope shall be set to 4096 averages and 512 points per bit of the 10 bits of D30.3. If a real time scope is used, take a capture of at least 2 million points at 80GS/s and average the waveform at least 16 times to mitigate scope noise. The maximum V

P-P

will be reported.

The measured peak-to-peak voltage must be between 850 and 1200m Vppd for 1.5Gbps, 3Gbps, 6Gbps and

12Gbps in order to be considered conformant. At 12Gbps, SAS3_EYEOPENING (or equivalent tool) is used on

IDLE dwords to measure at the ET. This is stated in [3] and can be found in [4]. IDLE dwords may be used as the pattern for 12Gbps ET point

Test Setup: See Appendix 5.A.4

Test Procedure:

For 3 and 6Gbps:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the scope to capture the 10-bit D30.3 sequence as stated above.

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3.

Configure the DUT to transmit a repeating D30.3 pattern at the required bit rate.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Capture the waveform of the DUT’s differential transmitted data signal.

6.

Compute and record the absolute max peak-to-peak value of the differential signal as described above for 3 and 6Gbps.

For 12Gbps:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the scope to capture the 10-bit D30.3 sequence as stated above.

3.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

4.

Capture the waveform of the DUT’s differential transmitted data signal.

5.

Verify that the absolute max peak to peak value of the differential signal as described above.

6.

Configure the scope to capture the IDLE dwords as stated above.

7.

Compute and record that the DUT is sourcing valid SAS signaling at the expected rate.

8.

Capture the waveform of the DUT’s differential transmitted data signal.

9.

Run the captured waveform through SAS3_EYEOPENING and record the reported peak to peak value.

Observable Results: a.

The TX peak-to-peak voltage shall be between 850 and 1200 mVppd (inclusive) for 1.5Gbps, 3Gbps,

6Gbps. b.

The TX peak-to-peak minimum voltage shall be 850mVppd at an ET point reported by the

SAS3_EYEOPENING script and the maximum shall be 1200 mVppd at an IT or CT point measured on the D30.3 waveform.

Possible Problems: None.

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Test 5.3.5 - TX VMA and EQ (Informative for 6Gbps, Required for 12Gbps)

Purpose: To verify that the bit rate of the DUT transmitter device is within the conformance limits

References:

[1] SAS-3 Standard, Section 5.8.4.6.4 - Recommended transmitter device settings for interoperability

[2] Ibid, Section 5.8.4.6.6 – 6Gbps Transmitter equalization, VMA, and V

P-P

measurement

[5] Ibid, Table 43 - Transmitter device signal output characteristics for trained 12 Gbps at ET, IT, and CT

[3] Ibid, Figure 134 – 12Gbps transmitter circuit output waveform

[5] Ibid, Table 43, Precursor and Post cursor equalization

Resource Requirements: See Appendix 5.A

Last Modification: July 30, 2013

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. While the Standard specifies a normative requirement for the differential peak-to-peak voltage (see Test 5.3.4), it also provides recommended (i.e., informative) limits for the TX voltage modulation amplitude (VMA), and also transmitter equalization (EQ) [1]. The Standard also provides definitions of these parameters, which include how they are measured [2]. Copies of the recommended VMA and EQ settings and graphical descriptions of the parameters are reproduced from the Standard in the figures below. (Note: See Figure 5.3.4-2 in Test 5.3.4 for a more detailed version of Figure 5.3.5-2 below.)

Figure 5.3.5-1: Recommended (Informative) 6Gbps Transmitter VMA and EQ Settings

Figure 5.3.5-2: Graphical Description of VMA and EQ Parameters for 6Gbps (Also see Figure 5.3.4-2, Test

5.3.4)

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In this test for 6Gbps, the VMA of the DUT’s transmitter will be measured using the Zero-Length test load, while the DUT is transmitting a repeating D30.3 pattern (see Discussion, Test 5.3.4, for additional details about this pattern). The VMA is measured as the mode-to-mode amplitude of the non-emphasized portion of the DUT’s signaling, (which corresponds to the ‘flat’ portion of the eye, as shown in the Figure 5.3.5-2 above.)

Once the VMA value has been determined for the DUT, the EQ value will be computed using this value, plus the V

P-P

result obtained in Test 5.3.4. The EQ result (which is defined in units of dB) will be computed as

20*log

10

(V

P-P

/VMA).

Note that for 6Gbps reporting purposes, the results for the VMA and EQ measurements will still be reported using a PASS or FAIL indication according to the limits specified in the figure above (with FAIL being assigned for any value outside of the recommended ranges), however for either result (pass or fail) it will be clearly noted that the result is considered INFORMATIVE, and does not affect conformance to the Standard.

Figure 5.3.5-3: Table 43 Transmitter output characteristics for trained 12Gbps at ET, IT, and CT

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Figure 5.3.5-4: Figure 134 – 12Gbps transmitter circuit output

The standard changes the VMA measurement for 12Gbps. The VMA of the DUT’s transmitter will be measured using the Zero-Length test load, while the DUT is transmitting repeating TRAIN_DONE primitives. To be consistent with measuring Vppd the transmitter coefficient 2 should be set to its maximum. The VMA is defined as the V

2

-V

5

voltage as defined in Figure 5.3.5-4.

The precursor ratio is measured with post cursor equalization disabled and the post cursor ratio is measured with precursor equalization disabled. Both the precursor and post cursor are measured with a repeating

TRAIN_DONE pattern. At such instance when both the precursor and post cursor equalization are active the R pre shall not be greater than 3.8 while the R post

shall not be greater than 5.5 at the VMA limit. [5]

Test Setup: See Appendix 5.A.4

Test Procedure:

For 3 and 6Gbps

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DUT to transmit a repeating D30.3 pattern at the required bit rate.

3.

Configure the sampling scope to capture at least 4096 waveforms of the required pattern.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Capture a single acquisition of the DUT’s differential transmitted data signal.

6.

Using built in scope measurements, get the VMA.

7.

For 6Gbps, using the V

P-P

result obtained in Test 5.3.4, compute and record the EQ value as described above.

For 12Gbps

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DUT to transmit a repeating TRAIN_DONE pattern at the required bit rate.

3.

Configure the sampling scope to capture at least 4096 waveforms of the required pattern.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Capture a single acquisition of the DUT’s differential transmitted data signal.

6.

Measure the voltage at V

2

and V

5

and compute the VMA.

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7.

Configure the DUT to transmit a repeating TRAIN_DONE pattern at the required bit rate with only precursor active.

8.

Follow steps 3 through 5.

9.

Measure the voltage at V

2

and V

3

and compute the R pre

. R pre

=V

3

/V

2

10.

Configure the DUT to transmit a repeating TRAIN_DONE pattern at the required bit rate with only precursor active.

11.

Follow steps 3 through 5.

12.

Measure the voltage at V

1

and V

2

and compute the R post

. R post

=V

1

/V

2

Observable Results: a.

The TX VMA result shall be greater than or equal to 600mV for 6Gbps and greater than 80mV p-p

for

12Gbps. b.

6Gbps only, The EQ result shall be between 2 and 4dB (inclusive). c.

The TX VMA R pre

for 12Gbps shall be between 1 and 1.66, unless post cursor is active [5] d.

The TX VMA R post

for 12Gbps shall be between 1 and 1.33, unless precursor is active [5]

Possible Problems: None.

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Test 5.3.6 - TX Rise and Fall Times

Purpose: To verify that the rise and fall times of the DUT’s transmitted SAS signaling are within the conformance limits

References:

[1] SAS-3 Standard, Table 38 - Transmitter device signal output characteristics for trained 1.5 Gbps, 3

Gbps, and 6 Gbps at IT and CT

[2] Ibid, Table 43 - Transmitter device signal output characteristics for trained 12Gbps at ET, IT, and CT

Resource Requirements: See Appendix 5.A

Last Modification: July 3, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes a requirement for the transmitter device rise and fall times[1]. A copy of the specification is reproduced in the figure below.

Figure 5.3.6-1: TX Rise/Fall Time Requirements for 1.5Gbps, 3Gbps, and 6Gbps

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Figure 5.3.6-2: TX Rise/Fall Time Requirements for 12Gbps

The Standard specifies that the rise/fall time measurements be performed while the DUT is transmitting a repeating 1010 pattern. The measurement is defined as a 20/80% rise time, however the specification does not provide any additional detail about what amplitude reference is used to determine the 20/80% levels, or how this reference is measured.

For the purposes of this test suite, an eye-diagram-based methodology will be used. This method determines the reference amplitude and subsequent rise/fall times using an accumulated eye diagram, constructed from the DUT’s transmitted signaling.

The reference amplitude (i.e., the 0/100% levels) will be defined as the mode values of the 0/1 symbol levels, measured at the center (i.e., 50% horizontal time point) of the Unit Interval. (Note in this case the mean and mode values should be practically identical, as the data pattern used is a 1010 pattern, thus there are no datadependent characteristics to affect the shape of the eye, unlike the case for non-1010 patterns, where different bits may have different amplitudes due to ISI effects.)

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Based on the measured 0/100% levels, the corresponding 20/80% levels will be computed, and horizontal histograms will be computed based on where the rising and falling transitions of the eye diagram cross these levels.

The mean values of these histograms will be used to determine the start and end times of the rise/fall measurements.

An example of this methodology is demonstrated in the figure below. (Note: The example shown was measured on a 3Gbps signal. However the methodology is no different for the other rates).

Figure 5.3.6-2: Example Rise/Fall Measurement

(Eye-Diagram-Based Methodology)

The primary benefit of the eye diagram approach is that the measured results are typically very stable and repeatable, due to the inherent averaging effect gained by using the eye diagram data as the basis for measurement.

The method also provides direct visual feedback, which clearly shows how the measurement is computed based on the acquired data, which can help identify sources of measurement discrepancies when correlating results between different DUTs, test equipment, etc.

The rise and fall times must be greater than or equal to 41.6ps at 1.5Gbps, 3.0Gbps, and 6.0Gbps; and greater than or equal to 20.8ps for 12Gbps in order to be considered conformant.

Test Setup: See Appendix 5.A.4

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DUT to transmit a repeating 1010 pattern at the required bit rate, with SSC disabled.

3.

Configure the sampling scope to create an Eye Diagram of at least 200 waveforms at 512 points/waveform.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Capture a single Eye as listed in step 3 of the DUT’s differential transmitted data signal.

6.

Measure the mean rise and fall times as described above.

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Observable Results: a.

The rise time shall be greater than or equal to 41.6ps for 1.5Gbps, 3.0Gbps, and 6.0Gbps. b.

The fall time shall be greater than or equal to 41.6ps for 1.5Gbps, 3.0Gbps, and 6.0Gbps. c.

The rise time shall be greater than or equal to 20.8ps for 12Gbps. d.

The fall time shall be greater than or equal to 20.8ps for 12Gbps.

Possible Problems: None.

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Test 5.3.7 - TX Random Jitter (RJ)

Purpose: To verify that the random jitter of the DUT transmitter device is less than the maximum allowed limit.

References:

[1] SAS-3 Standard, Table 38 - Transmitter device signal output characteristics for trained 1.5 Gbps, 3

Gbps, and 6 Gbps at IT and CT

[2] SAS-3 Standard, Table 43 part 2 - Transmitter device signal output characteristics for trained 12 Gbps at ET, IT and CT

[3] Ibid, Section 5.8.3.2 - Jitter transfer function (JTF)

Resource Requirements: See Appendix 5.A

Last Modification: July 3, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes a requirement for the transmitter device random jitter (RJ)[1]. A copy of the specification is reproduced in the figure below.

UNH IOL SAS Consortium

Figure 5.3.7-1: Random Jitter Requirements (1.5 – 6Gbps)

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Figure 5.3.7-2: Random Jitter Requirements (12Gbps)

In this test, the RJ of the transmitter device will be measured while the DUT is transmitting a repeating

1100 pattern into the Zero-Length test load, with SSC disabled.

Note the specification requires that the measurement shall include the effects of the JTF (Jitter Transfer

Function), which is a Standard-defined weighting function that is intended to separate the low-frequency timing variations due to SSC from the actual jitter. The RJ measurement requires that the Jitter Measurement Device

(JMD) be configured to use the proper JTF characteristics required by the Standard[3]. A copy of these requirements is reproduced from the Standard in the figure below.

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Figure 5.3.7-3: SAS JTF Requirements for Jitter Measurement Devices (JMDs)

The specified RJ limit of 0.15UI corresponds to 14 times the 1-sigma (i.e., RMS) value, based on a BER of

1E-12. The measured RJ value must be less than or equal to this value in order to be considered conformant.

Test Setup: See Appendix 5.A.4

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the JMD to use a JTF that meets the requirements described above.

3.

Configure the DUT to transmit a repeating 1100 pattern at the required bit rate, with SSC disabled.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Measure and record the RJ as described above.

Observable Results: a.

For all test cases, the Random Jitter (RJ) shall be less than or equal to 0.15UI.

Possible Problems: None.

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Test 5.3.8 - TX Total Jitter (TJ)

Purpose: To verify that the transmit jitter of the DUT transmitter device is within the conformance limits

References:

[1] SAS-3 Standard, Table 38 - Transmitter device signal output characteristics for trained 1.5 Gbps, 3

Gbps, and 6 Gbps at IT and CT

[2] SAS-3 Standard, Table 43 part 2 - Transmitter device signal output characteristics for trained 12 Gbps at ET, IT and CT

[3] Ibid, Section 5.8.3.2 - Jitter transfer function (JTF)

Resource Requirements: See Appendix 5.A

Last Modification: July 3, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements SAS devices. This includes a requirement for the transmitter device total jitter (TJ)[1]. A copy of the specification is reproduced in the figure below.

UNH IOL SAS Consortium

Figure 5.3.8-1: Total Jitter Requirements (1.5 – 6Gbps)

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Figure 5.3.8-2: Total Jitter Requirements (12Gbps)

In this test, the TJ of the transmitter device will be measured while the DUT is transmitting a repeating

1100 pattern into the Zero-Length test load.

Note the specification requires that the measurement shall include the effects of the JTF (Jitter Transfer

Function), which is a Standard-defined weighting function that is intended to separate the low-frequency timing variations due to SSC from the actual jitter. The TJ measurement requires that the Jitter Measurement Device

(JMD) be configured to use the proper JTF characteristics required by the Standard[2]. A copy of these requirements is reproduced from the Standard in the figure below.

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Figure 5.3.8-3: SAS JTF Requirements For Jitter Measurement Devices (JMDs)

Note that the specification states that the measurement shall be performed both with SSC enabled and SSC disabled, if the DUT supports SSC on its output signaling. For all test cases the measured TJ value must be less than or equal to 0.25UI in order to be considered conformant.

Test Setup: See Appendix 5.A.4

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the JMD to use a JTF that meets the requirements described above.

3.

Configure the DUT to transmit a repeating 1100 pattern at the required bit rate, with SSC disabled.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Measure and record the TJ as described above.

6.

If the DUT supports SSC, repeat steps 3, 4, and 5 with SSC enabled.

Observable Results: a.

For all test cases, the Total Jitter (TJ) shall be less than or equal 0.25UI.

Possible Problems: None.

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Test 5.3.9 - TX Waveform Distortion Penalty (WDP) (1.5 – 6.0 Gbps Only)

Purpose: To verify that the Waveform Distortion Penalty (WDP) of the DUT transmitter device is below the maximum conformance limits

References:

[1] SAS-3 Standard, Table 38 - Transmitter device signal output characteristics for trained 1.5 Gbps, 3

Gbps, and 6 Gbps at IT and CT

[2] Ibid, Section 3.1.122 (Definition of WDP)

[3] Ibid, Section 5.8.4.6.2 - Transmitter device test procedure

[4] Ibid, Annex B - SASWDP (MATLAB implementation)

Resource Requirements: See Appendix 5.A

Last Modification: July 3, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes a requirement for the transmitter device’s waveform distortion penalty (WDP)[1]. A copy of the specification is reproduced in the figure below.

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Figure 5.3.9-1: WDP Requirements

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The Standard defines WDP as, “

A simulated measure of the deterministic penalty of the signal waveform from a particular transmitter device transmitting a particular pattern and a particular test load with a reference receiver device.

”[2]. It also describes it as, “ a characterization of the signal output within the reference receiver device after equalization ”[3]. The latter description is perhaps somewhat easier to understand from a conceptual perspective, as the WDP measurement is an example of what the DUT’s transmitted signaling would ‘look like’ to a receiver device, after passing through an interconnect (i.e., channel, backplane, cable, etc), and being received and processed by an equalizer circuit inside the receiver device.

Because it is not typically possible to observe the signal at this point (as it is conceptually located inside the actual receiver IC, post-equalization) it is not possible to practically measure this signal, however it can be mathematically computed, based on a reference model of a SAS interconnect, and a reference receive equalizer.

This mathematical modeling is performed by a set of MATLAB code that is included as part of the Standard[4].

The Standard specifies a test procedure for performing the WDP measurement, which is reproduced below.

Figure 5.3.9-2: WDP Test Procedure

Note that the specified procedure requires that the measurement be performed using the SCRAMBLED_0 pattern, which is one of several reference patterns defined by the Standard. This pattern will typically be enabled via the Protocol-Specific diagnostic page mechanism.

Note also that the MATLAB code for the SASWDP function assumes that the input waveform data contains 16 evenly spaced samples per UI (which is the format offered by some sampling scopes, which allow a selectable number of samples per UI when exporting waveform data). However, if a real-time DSO is used as the digitizing source, note that the sampling rate of the DSO is typically fixed at a constant rate, that is not frequency or phase synchronous with the DUT’s transmitted signal. In these cases, the captured waveform data will need to be resampled and interpolated to produce exactly 16 evenly spaced samples per UI. This can be accomplished relatively easily via post-processing in MATLAB prior to passing the data to the SASWDP function.

The SASWDP function produces as one of its outputs a plot showing the simulated eye opening as a statistical BER map. An example BER map is shown in the figure below.

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Figure 5.3.9-3: Example BER Map With WDP Results

(Output From SASWDP MATLAB Script)

The primary value of interest produced by the WDP script is the WDP result (marked ‘xWDP’ in the figure above). This value must be less than the values listed in Table 37 to be considered conformant.

Test Setup: See Appendix 5.A.3

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DSO to capture at least 2320 Unit Intervals of waveform data (approximately 390us

@6G) at a minimum sampling rate of 80GS/s.

3.

Configure the DUT to transmit the SCRAMBLED_0 pattern at the required bit rate, with SSC disabled.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

5.

Adjust the DSO so that a stable trigger is achieved on the DUT’s transmitted signal.

6.

Once a stable trigger has been attained, enable averaging on the DSO.

7.

Capture and export at least 2320 UIs of averaged SCRAMBLED_0 signaling.

8.

If necessary, resample the waveform data (based on an ideal linear-fit recovered reference clock) so that it contains 16 evenly-spaced samples per UI.

9.

Post-process the resampled waveform data with the SASWDP MATLAB script.

10.

Once the script has finished, record the WDP result from the BER map figure.

Observable Results: a.

The WDP result shall be less than or equal to the value listed in Table 38.

Possible Problems: None.

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Test 5.3.10 - End to End Simulation

Purpose: To verify the characteristics of a transmitter connected to passive TxRx connections.

References:

[1] SAS-3 Standard, Section 5.7.1 (End to end simulation for trained 12 Gbit/s overview)

[2] Ibid, Annex D

Resource Requirements: See Appendix 5.A

Last Modification: July 3, 2014

Discussion:

The SAS-3 Standard defines the electrical interface requirements for SAS devices. This includes a requirement for an end to end simulation. A copy of the specification is reproduced below [1].

The specific end to end simulation procedures defined in 5.8.4.7.4, 5.5.6, and 5.8.5.7.6.6 follow this sequence:

1) capture the signal from a transmitter device with no equalization and without SSC into a zero length test load or model the transmitter using the reference transmitter (see 5.8.4.7.3);

2) connect passive TxRx connection segments, crosstalk, reference transmitter, and reference receiver according to the reference end to end simulation diagram (see 5.7.2 and D.2);

3) in the simulator, set the transmitter reference equalization (see 5.7.3 and figure 147) and set the receiver reference DFE equalization (see 5.8.5.7.3); and

4) perform a linear simulation, including the effects of edge rates, ISI, and crosstalk (see D.1).

The end to end simulation uses a reference transmitter with RJ and TJ set to zero. RJ and TJ and non-linear behavior present in the captured signal used for simulation are removed by the simulation process. Margins for these effects are provided in the required simulation characteristics. The simulation characteristics are processed at a BER of 10-

15.

Crosstalk transmitters are simulated using reference transmitters. These reference transmitters shall be set to the characteristics of table D.1. The crosstalk transmitters shall be asynchronous to the data sent to the channel under test. Characteristics are measured from the simulation at specified measurement points for the usage model and characterization type (see table 49, table 28, and table 64).

Figure 5.3.10-1: End to End Simulation Insertion Loss Model [2]

Test Setup: See Appendix 5.A.3

Test Procedure:

1.

Connect the Zero-Length test load to the DUT transmitter device.

2.

Configure the DSO to capture at least 2 million samples of a sampling rate of at least 80GS/s.

3.

Configure the DUT to transmit the IDLE dwords at the required bit rate, with SSC disabled.

4.

Verify that the DUT is sourcing valid SAS signaling at the expected rate.

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5.

Capture and export at the waveform.

6.

Post-process the waveform data with the two times using the SAS3_EYEOPENING MATLAB script with the separable and non-separable files listed in tables D.2 and D.3 [2] respectively.

7.

Once the script has finished, record the results from the output of the script.

Observable Results: a.

The script output shall give a passing result.

Possible Problems: None.

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GROUP 4: S-PARAMETER REQUIREMENTS

Overview:

This group of tests verifies the SAS TX and RX S-parameter specifications defined in

Clause 5 of the SAS-3 Standard.

Scope:

All of the tests described in this section are implemented and currently active through the

UNH IOL SAS Consortium. Comments and questions are welcome, and may be forwarded to the SAS Lab (saslab@iol.unh.edu).

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Test 5.4.1 - RX Differential Return Loss (SDD11)

Purpose: To verify that the differential return loss of the DUT’s receiver device is within the specified conformance limits.

References:

[1] SAS-3 Standard, Section 5.8.5.7.2 - Receiver device S-parameter limits

[2] Ibid, Figure 140 - Receiver device |SCC11|, |SDD11|, and |SCD11| limits

[3] Ibid, Table 3 – 1.5 Gbps, 3 Gbps, 6 Gbps and 12 Gbps compliance points

Resource Requirements: See Appendix 5.A

Last Modification: March 5, 2014

Discussion:

The SAS-3 Standard specifies the electrical interface requirements for SAS devices. This includes requirements for the differential return loss of the receiver device (denoted by S-parameter SDD11), as well as the conditions under which the measurement shall be made. A copy of the specification is reproduced in the figure below.

Figure 5.4.1-1: Receiver Device SDD11 Requirements

The formulas above directly translate to limit lines for each of the S-parameter specifications. The different limit lines are shown in the Standard, and are reproduced in the figure below[2].

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Figure 5.4.1-2: SDD11 RX Differential Return Loss Limit Line (Blue)

Note that the location of the reference plane (i.e., where the measurement is intended to be made) is for the

S-parameter measurements is different for SAS-3 devices, as compared to pre-SAS-2 devices that are based on earlier versions of the SAS Standard.

Pre-SAS-2 Standard primarily defined the TX and RX impedance specifications in terms of time-domainbased impedance profile limits. Due to various practical measurement issues and other associated complications involved with defining impedance specifications this manner, the SAS-2 Standard moved to using S-parameterbased impedance specifications, which are far more robust, and less prone to the sensitivities associated with the time-domain-based specifications.

One additional major modification that was associated with the change to S-parameter-based specifications is that a different reference plane (or compliance point) is used with the S-parameter-based specifications. In the earlier time-domain-based specifications for 1.5 and 3.0Gbps SAS devices, the mated SAS connector pair was always included in the measurement. This was beneficial from a practical perspective (as it is difficult to perform measurements otherwise, as most DUT’s are actual products that contain a SAS connector, and it is impractical if not impossible to measure the impedance without including the effects of the SAS connector). However given that the quality of SAS connectors can vary significantly from manufacturer to manufacturer, and the connector itself is not a metrology-grade connector, the SAS connector can often serve as the greatest source of error and uncertainty in terms of impedance characteristics.

The advent of the S-parameter specifications in the SAS-2 Standard also introduced a new set of compliance points, IT

S

and CT

S

, which are located on the transmitter device between the IC and the SAS connector, and are intended as the reference compliance point from which the TX S-parameter requirements are applied. A description of the IT

S

and CT

S

points is reproduced from the Standard in the figure below[3].

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Figure 5.4.1-3: Description of IT

S

and CT

S

Compliance Points

The addition of these new compliance point requirements adds a level of complexity for the purposes of conformance testing, as unless the DUT is provided in the form of an evaluation board that contains SMA connectors rather than SAS connectors, it is not possible to directly perform the S-parameter measurements without going through the mated SAS connector on the DUT (which will then also include the second half of the mated pair found on the test fixture. If an accurate S-parameter characterization was provided for the DUT SAS connector, it might be possible to remove the effects of this connector through simulation, however that is not a practical option, as it requires 1) that the vendor provide that model, which isn’t always possible, 2) that the model be accurate, which is not easily verifiable from a 3 rd

-party standpoint, and 3) that the test facility possesses the necessary simulation tools and skills to perform such a procedure.

As all of these requirements are not easily addressed, another alternative must be considered. One such option is presented here, for the purposes of this test suite.

From a device characterization perspective (where one would like to determine the exact amount of margin a SAS silicon implementation might have), it is necessary to employ as many techniques as possible to isolate only the characteristics of the IC, and minimize all other contributions and sources of error from other components (e.g.,

PCB, SAS connectors, etc), so that the amount of margin achieved by just the IC alone can be determined.

However, for conformance test purposes, this level of precision is generally not necessary, as the goal of conformance testing is to show that the device meets the minimum requirements, and is typically less concerned with the amount of margin attributed to just the IC.

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Based on this fundamental premise, one can make the argument that if a DUT can satisfy the minimum Sparameter requirements when the measurement is performed with the mated SAS connector pair included in the measurement, it will typically only pass with even greater margin if the contributions (i.e., reflections) due to the

SAS connector could be removed from the measurement (as the added reflections will typically act to further degrade the return loss, rather than improve it).

Based on this rationale, the S-parameter test procedure defined for the purposes of this test suite will initially require the tests to be performed with the mated SAS connector pair included in the measurement. If the

DUT meets the conformance requirements under these conditions, a passing result will be assigned, and the test will be considered complete.

If the DUT should exhibit failing results when tested with the mated SAS connector pair included, a second procedure will be performed. Using post-processing software, the effects of the mated SAS connector pair will be removed from the measurement via time-gating of the time-domain response characteristics. While this methodology is not as accurate as compensating for (or calibrating out) the SAS connectors using a set of characterized S-parameters for the connector pair, it is a relatively easy and supported method that can be performed by most VNA’s, without requiring full-featured simulation and modeling software capabilities.

The SDD11 differential return loss of the receiver device will be measured while the DUT is powered on.

(No additional DUT configuration is required, as the receiver should be in the proper functional state following powerup.) Once the S-parameter measurement is performed, the minimum margin between the measured DUT result and the SDD11 limit line will be recorded and reported as the final result (with a positive margin denoting a passing result, and a negative margin denoting a failing result).

The minimum SDD11 margin must be greater than 0dB in order for the DUT to be considered conformant.

Test Setup: See Appendix 5.A.5

Test Procedure:

1.

Verify that the DUT is powered on.

2.

Connect the DUT receiver device to the S-parameter measurement instrument using the appropriate

SAS->SMA test fixture.

3.

Measure the RX differential return loss as the SDD11 reflection parameter.

4.

Measure and record the minimum margin between the DUT response and the SDD11 limit line.

5.

If the minimum margin is less than 0dB (failing result), post-process the data to remove the effect of the mated SAS connector pair by time-gating out the response from the connector pair in the timedomain, and re-computing the S-parameters based on the modified impedance profile data.

6.

Measure and record the minimum margin between the DUT response and the SDD11 limit line.

Observable Results: a.

The minimum SDD11 margin shall be greater than 0dB.

Possible Problems: None.

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Test 5.4.2 - RX Common-Mode Return Loss (SCC11)

Purpose: To verify that the common-mode return loss of the DUT’s receiver device is within the specified conformance limits

References:

[1] SAS-3 Standard, Section 5.8.5.7.2 - Receiver device S-parameter limits

[2] Ibid, Figure 140 - Receiver device |SCC11|, |SDD11|, and |SCD11| limits

Resource Requirements: See Appendix 5.A

Last Modification: March 5, 2014

Discussion:

The SAS-3 Standard specifies the electrical interface requirements for SAS devices. This includes requirements for the common-mode return loss of the receiver device (denoted by S-parameter SCC11), as well as the conditions under which the measurement shall be made. A copy of the specification is reproduced in the figure below.

Figure 5.4.2-1: Receiver Device SCC11 Requirements

(Note that the structure and procedure for this test is essentially identical to the previous test where the

SDD11 parameter was measured (see Test 5.4.1, Differential Return Loss), except that for this test the SCC11 common-mode return loss will be measured. A copy of the limit line is reproduced from the Standard in the figure below[2].)

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Figure 5.4.2-2: SCC11 RX Common-Mode Return Loss Limit Line (Green)

The SCC11 common-mode return loss of the receiver device will be measured while the DUT is powered on. (No additional DUT configuration is required, as the receiver should be in the proper functional state following powerup.) Once the S-parameter measurement is performed, the minimum margin between the measured DUT result and the SCC11 limit line will be recorded and reported as the final result (with a positive margin denoting a passing result, and a negative margin denoting a failing result).

The minimum SCC11 margin must be greater than -1.0dB in order for the DUT to be considered conformant.

Test Setup: See Appendix 5.A.5

Test Procedure:

1.

Verify that the DUT is powered on.

2.

Connect the DUT receiver device to the S-parameter measurement instrument using the appropriate

SAS->SMA test fixture.

3.

Measure the RX common-mode return loss as the SCC11 reflection parameter.

4.

Measure and record the minimum margin between the DUT response and the SCC11 limit line.

5.

If the minimum margin is less than -1.0dB (failing result), post-process the data to remove the effect of the mated SAS connector pair by time-gating out the response from the connector pair in the timedomain, and re-computing the S-parameters based on the modified impedance profile data.

6.

Measure and record the minimum margin between the DUT response and the SCC11 limit line.

Observable Results: a.

The minimum SCC11 margin shall be greater than -1.0dB.

Possible Problems: None.

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Test 5.4.3 - RX Differential Impedance Imbalance (SCD11)

Purpose: To verify that the differential impedance imbalance of the DUT’s receiver device is within the specified conformance limits

References:

[1] SAS-3 Standard, Section 5.8.5.7.2 - Receiver device S-parameter limits

[2] Ibid, Figure 140 - Receiver device |SCC11|, |SDD11|, and |SCD11| limits

Resource Requirements: See Appendix 5.A

Last Modification: March 5, 2014

Discussion:

The SAS-3 Standard specifies the electrical interface requirements for SAS devices. This includes requirements for the differential impedance imbalance of the receiver device (denoted by S-parameter SCD11), as well as the conditions under which the measurement shall be made. A copy of the specification is reproduced in the figure below.

Figure 5.4.3-1: Receiver Device SCD11 Requirements

(Note that the structure and procedure for this test is essentially identical to Test 5.4.1, except that for this test the SCD11 differential-to-common-mode conversion loss parameter will be measured. A copy of the limit line is reproduced from the Standard in the figure below[2].)

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Figure 5.4.3-2: SCD11 RX Impedance Imbalance Limit Line (Red)

The SCD11 impedance imbalance of the receiver device will be measured while the DUT is powered on.

(No additional DUT configuration is required, as the receiver should be in the proper functional state following powerup.) Once the S-parameter measurement is performed, the minimum margin between the measured DUT result and the SCD11 limit line will be recorded and reported as the final result (with a positive margin denoting a passing result, and a negative margin denoting a failing result).

The minimum SCD11 margin must be greater than 0dB in order for the DUT to be considered conformant.

Test Setup: See Appendix 5.A.5

Test Procedure:

1.

Verify that the DUT is powered on.

2.

Connect the DUT receiver device to the S-parameter measurement instrument using the appropriate

SAS->SMA test fixture.

3.

Measure the RX differential impedance imbalance as the SCD11 reflection parameter.

4.

Measure and record the minimum margin between the DUT response and the SCD11 limit line.

5.

If the minimum margin is less than 0dB (failing result), post-process the data to remove the effect of the mated SAS connector pair by time-gating out the response from the connector pair in the timedomain, and re-computing the S-parameters based on the modified impedance profile data.

6.

Measure and record the minimum margin between the DUT response and the SCD11 limit line.

Observable Results: a.

The minimum SCD11 margin shall be greater than 0dB.

Possible Problems: None.

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Test 5.4.4 - TX Differential Return Loss (SDD22)

Purpose: To verify that the differential return loss of the DUT’s transmitter device is within the specified conformance limits.

References:

[1] SAS-3 Standard, Section 5.8.4.6.3 - Transmitter device S-parameter limits

[2] Ibid, Figure 127 - Transmitter device |SCC22|, |SDD22|, and |SCD22| limits

[3] Ibid, Section 5.8.4.7.2 – 12 Gbps Transmitter device S-parameter limits

[4] Ibid, Figure 135 - Transmitter device |SCC22|, |SDD22|, and |SCD22| limits

Resource Requirements: See Appendix 5.A

Last Modification: July 4, 2014

Discussion:

The SAS-3 Standard specifies the electrical interface requirements for SAS devices. This includes requirements for the differential return loss of the transmitter device (denoted by S-parameter SDD22), as well as the conditions under which the measurement shall be made. A copy of the specification is reproduced in the figure below.

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Figure 5.4.4-1: Transmitter Device SDD22 Requirements

(Note that the structure and procedure for this test is similar to Test 5.4.1, except that for this test the

SDD22 differential return loss parameter will be measured and the measurement will be performed on the DUT transmitter port, rather than the receiver. A copy of the limit line is reproduced from the Standard in the figure below[2].)

Figure 5.4.4-2: SDD22 TX Differential Return Loss Limit Line (Blue) (1.5 – 12 Gbps)

One significant difference between this test and Test 5.4.1 (RX Differential Return Loss) is that this test is performed on the transmitter port while it is actively transmitting SAS data signaling, whereas the receiver Sparameter test procedure does not need to account for the presence of any DUT signaling on the RX port. The fact that the DUT transmitter interface is actively transmitting SAS signaling does not prevent S-parameter measurements from being performed, however additional steps must be taken to ensure that the energy contained in the DUT’s signaling does not interfere with the desired measurement, which is an assessment of the energy being reflected off of the DUT interface due to impedance mismatches and discontinuities, rather than the transmitted

DUT signaling energy.

Documented techniques exist for minimizing the DUT signaling energy in the measurement result, and different approaches are used depending on whether the measurement is being performed with a TDR (TDNA) or

VNA. The TDNA approach typically uses averaging or filtering of the time domain impedance profile to remove signaling energy before mathematically computing the S-parameters, while the VNA approach relies on the IFBW filter of the VNA to minimize the effect of the transmitted signaling. (Further details regarding these techniques are considered outside the scope of this document, but can be found in the literature.)

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The SDD22 differential return loss of the transmitter will be measured while the DUT is powered on and transmitting a repeating 1100 pattern, per the specification requirements shown above. Once the S-parameter measurement is performed, the minimum margin between the measured DUT result and the SDD22 limit line will be recorded and reported as the final result (with a positive margin denoting a passing result, and a negative margin denoting a failing result).

The minimum SDD22 margin must be greater than 0dB in order for the DUT to be considered conformant.

Test Setup: See Appendix 5.A.5

Test Procedure:

1.

Verify that the DUT is powered on and is transmitting a repeating 1100 data pattern.

2.

Connect the DUT transmitter device to the S-parameter measurement instrument using the appropriate

SAS->SMA test fixture.

3.

Configure the S-parameter measurement instrument to ensure that the effects of the DUT’s transmitted signaling energy are minimized. (Note: Exact procedures will depend on the equipment being used.)

4.

Measure the TX differential return loss as the SDD22 reflection parameter.

5.

Measure and record the minimum margin between the DUT response and the SDD22 limit line.

6.

If the minimum margin is less than 0dB (failing result), post-process the data to remove the effect of the mated SAS connector pair by time-gating out the response from the connector pair in the timedomain, and re-computing the S-parameters based on the modified impedance profile data.

7.

Measure and record the minimum margin between the DUT response and the SDD22 limit line.

Observable Results: a.

The minimum SDD22 margin shall be greater than 0dB.

Possible Problems:

As mentioned above, care must be taken to ensure that the DUT’s transmitted signaling energy is sufficiently removed from the measurement result. When this is insufficiently done, the result will generally appear as distinct ‘spikes’ in the S-parameter response, which may cause conformance violations at single frequency points, or narrow groups of frequencies. Another telltale sign of inadequate DUT signaling energy removal is if these spikes extend above the 0dB level (indicating that more energy was reflected from the DUT interface than was contained in the incident test signal, which is a physical impossibility, unless the extraneous energy is being sourced by the DUT interface itself.

In cases where this behavior is observed, increasing the time domain averaging factor (for TDNA instruments), or using a narrower IFBW setting (for VNA instruments) will typically resolve this issue.

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Test 5.4.5 - TX Common-Mode Return Loss (SCC22)

Purpose: To verify that the common-mode return loss of the DUT’s transmitter device is within the specified conformance limits.

References:

[1] SAS-3 Standard, Section 5.8.4.6.3 - Transmitter device S-parameter limits

[2] Ibid, Tables 40 & 47 - Transmitter device |SCC22|, |SDD22|, and |SCD22| limits

[3] Ibid, Section 5.8.4.7.2 – 12 Gbps Transmitter device S-parameter limits

[4] Ibid, Figure 127 - Transmitter device |SCC22|, |SDD22|, and |SCD22| limits

Resource Requirements: See Appendix 5.A

Last Modification: July 4, 2014

Discussion:

The SAS-3 Standard specifies the electrical interface requirements for SAS devices. This includes requirements for the common-mode return loss of the transmitter device (denoted by S-parameter SCC22), as well as the conditions under which the measurement shall be made. A copy of the specification is reproduced in the figure below.

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Figure 5.4.5-1: Transmitter Device SCC22 Requirements

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(Note that the structure and procedure for this test is similar to Test 5.4.4, except that for this test the

SCC22 differential return loss parameter will be measured. A copy of the limit line is reproduced from the Standard in the figure below[2].)

Figure 5.4.5-2: SCC22 TX Common-Mode Return Loss Limit Line (Green) (1.5 – 12 Gbps)

The SCC22 common-mode return loss of the transmitter will be measured while the DUT is powered on and is actively transmitting a repeating 1100 data pattern. (See comments in the Discussion section of Test 5.4.4 regarding S-parameter measurements on actively transmitting interfaces.) Once the S-parameter measurement is performed, the minimum margin between the measured DUT result and the SCC22 limit line will be recorded and reported as the final result (with a positive margin denoting a passing result, and a negative margin denoting a failing result).

The minimum SCC22 margin must be greater than 0dB in order for the DUT to be considered conformant.

Test Setup: See Appendix 5.A.5

Test Procedure:

1.

Verify that the DUT is powered on and is transmitting a repeating 1100 data pattern.

2.

Connect the DUT transmitter device to the S-parameter measurement instrument using the appropriate

SAS->SMA test fixture.

3.

Configure the S-parameter measurement instrument to ensure that the effects of the DUT’s transmitted signaling energy are minimized. (Note: Exact procedures will depend on the equipment being used.)

4.

Measure the TX common-mode return loss as the SCC22 reflection parameter.

5.

Measure and record the minimum margin between the DUT response and the SCC22 limit line.

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6.

If the minimum margin is less than 0dB (failing result), post-process the data to remove the effect of the mated SAS connector pair by time-gating out the response from the connector pair in the timedomain, and re-computing the S-parameters based on the modified impedance profile data.

7.

Measure and record the minimum margin between the DUT response and the SCC22 limit line.

Observable Results: a.

The minimum SCC22 margin shall be greater than 0dB.

Possible Problems: (See ‘Possible Problems’ for Test 5.4.4, which is also applicable to this test.)

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Test 5.4.6 - TX Differential Impedance Imbalance (SCD22)

Purpose: To verify that the differential impedance imbalance of the DUT’s transmitter device is within the specified conformance limits.

References:

[1] SAS-3 Standard, Section 5.8.4.6.3 - Transmitter device S-parameter limits

[2] Ibid, Tables 40 & 47 - Transmitter device |SCC22|, |SDD22|, and |SCD22| limits

[3] Ibid, Section 5.8.4.7.2 – 12 Gbps Transmitter device S-parameter limits

[4] Ibid, Figure 127 - Transmitter device |SCC22|, |SDD22|, and |SCD22| limits

Resource Requirements: See Appendix 5.A

Last Modification: July 4, 2014

Discussion:

The SAS-3 Standard specifies the electrical interface requirements for SAS devices. This includes requirements for the differential impedance imbalance of the transmitter device (denoted by S-parameter SCD22), as well as the conditions under which the measurement shall be made. A copy of the specification is reproduced in the figure below.

UNH IOL SAS Consortium

Figure 5.4.6-1: Transmitter Device SCD22 Requirements

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(Note that the structure and procedure for this test is similar to Test 5.4.4, except that for this test the

SCD22 differential impedance imbalance parameter will be measured. A copy of the limit line is reproduced from the Standard in the figure below[2].)

Figure 5.4.6-2: SCD22 TX Differential Impedance Imbalance Limit Line (Red) (1.5 – 12 Gbps)

The SCD22 differential impedance imbalance of the transmitter will be measured while the DUT is powered on and is actively transmitting a repeating 1100 data pattern. (See comments in the Discussion section of

Test 5.4.4 regarding S-parameter measurements on actively transmitting interfaces.) Once the S-parameter measurement is performed, the minimum margin between the measured DUT result and the SCD22 limit line will be recorded and reported as the final result (with a positive margin denoting a passing result, and a negative margin denoting a failing result).

The minimum SCD22 margin must be greater than 0dB in order for the DUT to be considered conformant.

Test Setup: See Appendix 5.A.5

Test Procedure:

1.

Verify that the DUT is powered on and is transmitting a repeating 1100 data pattern.

2.

Connect the DUT transmitter device to the S-parameter measurement instrument using the appropriate

SAS->SMA test fixture.

3.

Configure the S-parameter measurement instrument to ensure that the effects of the DUT’s transmitted signaling energy are minimized. (Note: Exact procedures will depend on the equipment being used.)

4.

Measure the TX differential impedance imbalance as the SCD22 reflection parameter.

5.

Measure and record the minimum margin between the DUT response and the SCD22 limit line.

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6.

If the minimum margin is less than 0dB (failing result), post-process the data to remove the effect of the mated SAS connector pair by time-gating out the response from the connector pair in the timedomain, and re-computing the S-parameters based on the modified impedance profile data.

7.

Measure and record the minimum margin between the DUT response and the SCD22 limit line.

Observable Results: a.

The minimum SCD22 margin shall be greater than 0dB.

Possible Problems: (See ‘Possible Problems’ for Test 5.4.4, which is also applicable to this test.)

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APPENDICES

Overview:

Test suite appendices are intended to provide additional low-level technical detail pertinent to specific tests contained in this test suite. These appendices often cover topics that are outside of the scope of the standard, and are specific to the methodologies used for performing the measurements defined in this test suite. Appendix topics may also include discussion regarding a specific interpretation of the standard (for the purposes of this test suite), for cases where a particular specification may appear unclear or otherwise open to multiple interpretations.

Scope:

Test suite appendices are considered informative supplements, and pertain solely to the test definitions and procedures contained in this test suite.

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Appendix 5.A - Hardware Requirements, Test Fixtures, and Test Setups

Purpose: To specify the measurement hardware, test fixtures, and setups used in this test suite.

References:

[1] SAS-3 Standard, Section 5.6.2 - Zero-length test load

[2] SAS-3 SPL, Section 9.2.9.2 - Protocol-Specific diagnostic page

Last Modification: July 30, 2013

Discussion:

5.A.1 - Introduction

The purpose of this appendix is to specify the test equipment and setups needed for performing the tests as defined in this test suite.

5.A.2 - Equipment

Table 5.A-1 below summarizes the list of measurement equipment required for performing the tests in this test suite.

Table 5.A-1: Hardware Requirements

Functional Block

Real-Time Digital Storage

Oscilloscope (DSO)

Vector Network Analyzer

(VNA)

Or

Time Domain Reflectometer

(TDR)

Equipment

Agilent DSO8xxxx/9xxxx, or

Tektronix DSAxxxxxx,

or

LeCroy SDAxxxxx

Agilent E5071C 300kHz to

20GHz ENA or

Agilent 86100C (with at least one

54754A module, and S-Parameter software Option 202) or

Tektronix DSA8200 (with two

80E08 and one 80A07 modules,

Minimum Key Specifications

>2 CH, >18 GHz BW, >80GS/s, >2 MS memory per channel

>12GHz bandwidth,

S-parameter capability

Sampling Scope

SAS-to-SMA

HDD Test Adapter and 80SSPAR S-Parameter Test

Software)

(or equivalent)

Agilent 86100C with 86108A or

600-1008-000 equivalent

Wilder Technologies SAS

Receptacle Test Adapter Part No.

>15dB return loss from 50MHz to 12GHz, and insertion loss that meets the Zero-

Length Test Load requirements per the

Standard[1]

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5.A.3 - DSO Setup (Direct SMA Connection)

The DSO setup is used for most of the tests in Groups 1 and 2. It basically consists of connecting the DSO

TX + and - signals directly to two separate channels of the DSO, using high-quality (>36GHz rated) SMA cables.

(Exact channel numbers will differ depending on the DSO manufacturer and model). A SAS-to-SMA Test Adapter is used to convert the DUT’s SAS connector type to SMA. The basic setup diagram is shown below.

Figure 5.A.3-1: DSO Setup

For most of the Group 2 tests (i.e., non-OOB tests), the DUT is configured to transmit the specified NRZ data pattern at the line rate being tested with SSC enabled. This ensures that the transmitter circuitry is measured in its typical operating state during SAS data transmission (which may be different than when transmitting OOB signaling.) Configuration of the DUT may be achieved either by vendor-specific means (e.g., register settings), or via the SAS interface (using the PHY TEST function via the Protocol-Specific diagnostic page[2]).

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5.A.4 – Sampling Scope Setup (Direct SMA Connection)

Figure 5.A.4-1: Sampling Scope Setup (Direct SMA Connection)

The sampling scope setup is used for the Group 3 testing. It follows the same as the DSO setup.

5.A.5 - TDR/S-Parameters Setup

The TDR setup is used for the tests in Group 4. It consists of connecting the DSO TX+/- and RX +/- ports to four separate channels of the TDR, using high-quality (>18GHz rated) SMA cables. (Exact channel numbers will differ depending on the DSO manufacturer and model). A SAS-to-SMA Test Adapter is used to convert the DUT’s

SAS connector type to SMA. The basic setup diagram is shown below.

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Figure 5.A.5-1: TDR Setup

For the S-parameter measurements, the DUT is configured such that it is transmitting a repeating 1100

NRZ data pattern at the line rate being tested. This ensures that the transmitter circuitry is measured in its typical operating state during SAS data transmission (which may be different than when transmitting OOB signaling.)

Configuration of the DUT may be achieved either by vendor-specific means (e.g., register settings), or via the SAS interface (using the PHY TEST function via the Protocol-Specific diagnostic page[2]).

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Appendix 5.B - Summary of Test Patterns/Modes

Purpose: To summarize the test patterns and waveforms required for each test in this suite.

References: None.

Last Modification: July 30, 2013

Discussion:

5.B.1 - Pattern Requirements Per Test

Most of the tests in this suite are intended to be performed using a real-time DSO. This approach allows for the capturing of the required waveform data from a DUT, and then post-processing that data to obtain the required measurement results. While several different test patterns and SSC modes are required for the different tests and test cases, the table below summarizes the requirements per test:

Table 5.B-1: Test Pattern/Waveform Requirements

Test

5.1.1

5.1.2

5.1.3

5.1.4

5.2.1

5.2.2

5.2.3

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

Required Waveform(s)

Six-burst COMINIT, no TCTF

Six-burst COMINIT, no TCTF

Six-burst COMINIT, with TCTF

Six-burst COMINIT, no TCTF

Six-burst COMINIT, no TCTF

HFTP with SSC ON

HFTP with SSC ON

HFTP with SSC ON

HFTP with SSC OFF

CJTPAT with SSC OFF

CJTPAT with SSC OFF

D30.3 with SSC OFF

IDLE dwords for 12 Gbps

D30.3 with SSC OFF for 6 Gbps

TRAIN_DONE with SSC OFF for 12 Gbps

HFTP with SSC OFF

Comments

5.3.6

5.3.7

5.3.8

5.3.9

5.4.x

MFTP with SSC OFF

MFTP with SSC OFF

MFTP with SSC ON (if supported)

SCRAMBLED_0 with SSC OFF or

PRBS with SSC OFF

MFTP with SSC OFF or

Scrambled_0 with SSC OFF

Although not standard conformant if Scrambled_0 is not supported PRBS can be used.

DUT transmits pattern during S-Parameter tests, but waveform data is not captured.

If using TDR use the MFTP pattern

If using VNA use the Scrambled_0 pattern

(Note: HFTP = 1010 , MFTP = 1100 , D30.3 = 1000011100 or 0111100011 )

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5.B.2 - Summary of Required Waveforms

Because of the duplication of certain test cases for multiple tests, it is possible to break the list shown in

Table 5.B-1 into the following list of cases, which comprise all of the waveform data cases that are required to be captured using a real-time DSO.

6-Burst COMINIT sequence (no TCTF)

6-Burst COMINIT sequence (with TCTF)

HFTP w SSC ON

HFTP w SSC OFF

CJTPAT w SSC OFF

D30.3 w SSC OFF

MFTP w SSC OFF

MFTP w SSC ON

SCR_0 w SSC OFF

TRAIN_DONE w SSC OFF (12G Only)

Valid IDLE dwords

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