Faculty of Electrical and Computing Engineering
Department of Electronics, Microelectronics, Computer and Intelligent Systems
ELECTRONICS 1
LABORATORY EXCERCISES
Fall 2013
A. Barić, R. Blečić, Ž. Butković, V. Čeperić, T. Knežević, M. Koričić,
M. Križan, J. Kundrata, I. Krois, T. Mandić, K. Martinčić, M. Poljak,
G. Zelić, J. Žilak, S. Žonja
Name:
Zagreb, 2013
II CONTENTS
Laboratory Exercise 1 .............................................................................................. 1 RC and CR network .............................................................................................................................. 1 OVERVIEW ....................................................................................................................................... 1 HOMEWORK .................................................................................................................................... 2 LAB ASSIGNMENT ............................................................................................................................ 4 A. RC NETWORK ....................................................................................................................... 4 B. CR NETWORK ....................................................................................................................... 6 Laboratory Exercise 2 .............................................................................................. 9 PN diode I(U) characteristic measurement ......................................................................................... 9 OVERVIEW ....................................................................................................................................... 9 HOMEWORK .................................................................................................................................. 10 LAB ASSIGNMENT .......................................................................................................................... 11 A. MEASUREMENT PROCEDURE ............................................................................................ 12 Laboratory Exercise 3 ............................................................................................ 16 CMOS inverter ................................................................................................................................... 16 OVERVIEW ..................................................................................................................................... 16 HOMEWORK .................................................................................................................................. 17 LAB ASSIGNMENT .......................................................................................................................... 18 Laboratory exercise 4............................................................................................. 20 Measurements of the static characteristics of npn bipolar junction transistor ................................ 20 OVERVIEW ..................................................................................................................................... 20 HOMEWORK .................................................................................................................................. 21 LAB ASSIGNEMENT ........................................................................................................................ 24 Laboratory Exercise 5 ............................................................................................ 27 Transistor amplifiers: common emitter and common base configuration ....................................... 27 OVERVIEW ..................................................................................................................................... 27 A. MODULE ............................................................................................................................ 33 B. TRANSISTOR AMPLIFIER IN COMMON‐EMITTER CONFIGURATION .................................. 33 C. TRANSISTOR AMPLIFIER IN COMMON‐BASE CONFIGURATION ........................................ 36 Laboratory Exercise 6 ............................................................................................ 38 Operational amplifier ........................................................................................................................ 38 OVERVIEW ..................................................................................................................................... 38 III HOMEWORK .................................................................................................................................. 39 LAB ASSIGMENT ............................................................................................................................ 40 A. MODULE ............................................................................................................................ 40 B. OPERATIONAL AMPLIFIER ................................................................................................. 40 C. INVERTING AMPLIFIER ....................................................................................................... 41 D. NONINVERTING AMPLIFIER ............................................................................................... 42 Appendix I ............................................................................................................... 45 SOLDERING AND DESOLDERING ........................................................................................................ 45 Appendix II .............................................................................................................. 48 Agilent Advanced Design System ‐ Tutorial ....................................................................................... 48 SCHEMATIC .................................................................................................................................... 48 SIMULATIONS ................................................................................................................................ 50 A. DC simulation .................................................................................................................... 50 B. AC simulation ..................................................................................................................... 50 C. Transient analysis .............................................................................................................. 52 Appendix III ............................................................................................................. 54 Instructions for oscilloscope operation ............................................................................................. 54 MEASUREMENT PROCEDURE ........................................................................................................ 55 A. DC VOLTAGE MEASUREMENTS ......................................................................................... 55 B. AC WAVEFORM MEASUREMENTS ..................................................................................... 56 C. SYNCHRONISATION ........................................................................................................... 57 TYPICAL MEASUREMENT PROCEDURE .......................................................................................... 58 IV LABORATORY
EXERCISE 1
Assistant
RC- AND CR-NETWORK
Checked by
(Homework)
Checked by (Results)
OVERVIEW
Electronic circuit built by using a resistor and a capacitor connected in series is called RC or
CR network. In the RC network the output signal is on the capacitor, while in the CR network
the output signal is on the resistor. The resistance and capacitance have a direct influence
on the time constant, rise time, fall time and cutoff frequency.
The rise time refers to the time required for the output voltage to change its value from 10%
to 90% of the steady-state value. If a square waveform is applied to the input of the RC
network, the smaller the time constant the steeper the edge of the output voltage is obtained,
i.e. the output voltage will be similar to the input voltage.
The fall time refers to the time required for the output voltage to change its value from 90% to
10% of the steady-state value. For the RC or CR network the fall time equals the rise time. If
a square waveform is applied to the input of the CR network, the short fall time will result in
sharp and short spikes at the output.
The time constant of the RC or CR network is defined by the product of the resistance and
capacitance, τ = RC. Knowing the value of the time constant τ, it is possible to calculate the
fall time and the rise time, as well as the cutoff frequency. The steepness of the output
voltage edges is determined by the time constant τ; the smaller the time constant τ the
stepper the edges of the output voltage. Decreasing the value of the time constant τ can be
accomplished by decreasing the resistance of the resistor R or the capacitance of the
capacitor C. Decreasing the resistance will result in higher capacitor charging current and
therefore the edges of the output voltage will be steeper. Similarly, having the constant
charging current, if the capacitor C is smaller, it will be charged faster. Charging and
discharging of the capacitor follow the exponential curve. For t = τ the output voltage is
63.2% of the steady-state value, and for t = 5τ the output voltage is 99.3% of the steady-state
value. Practically it is assumed that after time t = 5τ the output voltage reaches the steadystate value.
The RC-network prevents fast transitions of the output voltage. The cutoff frequency of the
network is inverse of the time constant ωd = 1/(RC) = 1/τ. The RC network can be also called
low-pass filter, i.e. it attenuates the frequencies higher than the cutoff frequency. The slope
of attenuation is 20 dB/decade.
The CR network is a high-pass filter and therefore attenuates low frequencies contained in
the input signal. The cutoff frequency ωd can be calculated using the time constant τ as
ωd = 1/(RC) = 1/τ.
1 The applications of RC and CR networks are countless. They are often used as input filters
to shape frequency components from the signal spectrum. Furthermore, their ability to
change the shape of the signal is used for signal conditioning (i.e. triggering flip-flops in
digital circuits). The CR-network is e.g. in the input stage of oscilloscope channels. If the
“Coupling” parameter is set to ac, then the input of the oscilloscope is connected through the
CR network and therefore suppresses the dc component of the input signal.
HOMEWORK
1) Let the RC network values be R = 5,6 kΩ and C = 100 nF. Calculate the rise time and fall
time of the output voltage. Suppose that the symmetrical square waveform, having the
amplitude of 2 Upp and the frequency of 100 Hz with the dc component of 1 V, is
connected to the input. Draw the input and output voltage in the same coordinate system
(remark: Upp relates to the peak-to-peak voltage, which means the difference between the
high-state and the low-state).
tr , s
tf, s
Derive expressions for the rise time
and fall time by using expressions for
10% and 90% of the output voltage
(the expressions for 10% and 90% of
the output voltage must be also
derived!!!)
Space reserved for calculations:
Figure 1.1 - Waveforms of the input and output
signals of the network from assignment 2).
REMARK: Waveforms drawn in coordinate systems must have properly defined axis. This
means that each axis must have defined the number of tick marks and units. If the
coordinate system has several curves, the curves must be clearly differentiated from each
other (different colours, dashed-solid, etc.). Graphs that do not comply with these rules
will not be accepted.
2 2) Let the CR network have R = 5,6 kΩ and C = 100 nF and calculate the rise time and the
fall time of the output voltage. Suppose the symmetrical square waveform, having the
amplitude of 2 Upp and frequency of 100 Hz with superimposed dc component of 1 V, is
applied to the input. Draw the input and output voltage in the same coordinate system.
t f, s
Space reserved for calculations:
Figure 1.2 - Waveforms of input and output signals of
network from assignment 3).
REMARK: Waveforms drawn in coordinate systems must have properly defined axis. This
means that each axis must have defined the number of tick marks and units. If the
coordinate system has several curves, the curves must be clearly differentiated from each
other (different colours, dashed-solid, etc.). Graphs that do not comply with these rules
will not be accepted.
3 LAB ASSIGNMENT
A. RC-NETWORK
1) Assemble the circuit presented in Fig. 1.3 on the protoboard.
Figure 1.3 - RC-network.
2) Apply the input signal shown in Fig. 1.4. Adjustment of the dc offset is performed by
the trimmer marked “DC OFFSET”. To switch the dc offset on, GENTLY pull out the
trimmer knob.
Figure 1.4 - Input signal.
REMARK: Waveforms drawn in coordinate systems must have properly defined axis. This
means that each axis must have defined the number of tick marks and units. If the
coordinate system has several curves, the curves must be clearly differentiated from each
other (different colours, dashed-solid, etc.). Graphs that do not comply with these rules
will not be accepted.
IMPORTANT!
Measurement of input and output voltages must be performed by using BOTH
OSCILLOSCOPE CHANNELS SIMULTANEOUSLY in order to see their relation in time.
4 3) In the same coordinate system draw one period of the input and output voltage.
Determine the rise time tr and the fall time tf of the output voltage. Calculate the
capacitance of the capacitor C assuming that the nominal resistance of the resistor R
is correct. Enter the calculated results in Table 1.1.
Table 1.1 – Capacitance
calculation
tr , s
tf, s
C, nF
Figure 1.5 - Waveforms of the input and output signals of
the network from assignment 3).
4) Change the frequency of the input signal to f2 = 500 Hz.
5) In the new coordinate system redraw the input and output voltages for the given
frequency.
Figure 1.6 - Waveforms of the input and output signals of
the network from assignment 5).
5 6) Change the frequency of the input signal to f3 = 5 kHz.
7) In the new coordinate system redraw the input and output voltages for the given
frequency.
Figure 1.7 - Waveforms of the input and output signals of
the network from assignment 7).
B. CR NETWORK
1) Assemble the circuit in Fig. 1.8 on protoboard presented.
Figure 1.8 - CR-network.
2) Apply the input signal presented in Fig. 1.9. Adjustment of the dc offset is performed
by the trimmer marked “DC OFFSET”. To switch the dc offset on, GENTLY pull out
the trimmer knob.
6 Figure 1.9 - Input signal.
3) In the same coordinate system draw one period of the input and output voltage. From
the measurements determine the fall time tf.
t f, s
Figure 1.10 - Waveforms of the input and output signals of
the network from assignment 3).
4) Change the frequency of the input signal to f2 = 500 Hz.
5) In the new coordinate system redraw the input and output voltages for the given
frequency.
7 Figure 1.11 - Waveforms of the input and output signals of
the network from assignment 5).
6) Change the frequency of the input signal to f3 = 5 kHz.
7) In the new coordinate system redraw input and output voltages for given frequency.
Figure 1.12 - Waveforms of the input and output signals of
the network from assignment 7).
8 LABORATORY
EXERCISE 2
Assistant
Checked by
(Homework)
PN DIODE I(U)
CHARACTERISTIC
MEASUREMENT
Checked by (Results)
OVERVIEW
Semiconductor pn diodes belong to the group of the basic semiconductor electronic devices.
There are many types of pn diodes depending on the type of semiconductor and the
manufacturing technology used for the realization of the pn junction. The function of the pn
diode is based on its current-voltage characteristic. The fundamental property of the diode is
the ability to conduct the electric current in the forward direction and it blocks the current in
the opposite, reverse direction. This is the simplest view on the function of the diode.
Semiconductor pn diodes have a nonlinear electric characteristic. The current is being
conducted only when it is forward biased and the knee voltage is reached and passed. The
voltage varies very little with the current once the knee voltage is passed. The knee voltage
is different for different semiconductor materials. For silicon diodes it is typically 0,7 V.
Forward currents can have different values depending on the diode type (e.g. a switching
diode and a power diode have significantly different forward currents).
When reverse biased, the current through the diode is not equal to zero. There is a small
reverse current which is several orders of magnitude smaller than the forward current. When
the reverse voltage becomes large enough, the reverse breakdown occurs, which causes an
sharp increase in the reverse current. This process can destroy the diode. In some types of
diodes, e.g. Zener diode, the breakdown region of the characteristic is designed so that the
increase in the reverse current starts at the known Zener voltage. This type is used for
voltage regulation.
The current-voltage diode characteristic is temperature dependant and this effect can be
used for temperature measurement.
Diodes are used in many electric circuits for voltage rectification (ac-dc), protection from high
voltage (avalanche diodes), limiting the voltage, generation of light (LED) etc.
Figure 2.1 – Various packages of diodes: a) Zener diode, b) pn silicon diode, c) LED.
9 HOMEWORK
1) The current-voltage characteristic of the ideal pn diode is given by Shockley equation:
exp
1
(1)
Assuming m = 1, UT = 25,84 mV i IS = 1 nA, calculate the voltage for which the current equals
10 IS and 100 IS. What is the error in the current calculation at UD = 0,5 V if the number 1 in
the brackets is ignored. Express the error relatively to the current obtained for the same
voltage when the number 1 is not ignored.
Space reserved for calculation:
2) For ID equal to 50 mA, 40 mA, 30 mA, 20 mA, 10 mA, 1 mA i 0,1 mA determine the
voltage UD using the expression in the assignment 1). Fill in the table with the results.
ID [mA]
UD [V]
10 3) Plot the results from the table. (Voltage UD from 0 to 1 V on the x-axes and the current ID
from 0 to 50 mA on the y-axes. Both axes should have linear scale).
Figure 2.2 - Current vs. voltage (linear scale).
LAB ASSIGNMENT
1) Measure the I(U) characteristic when the diode is forward biased and plot it in Fig. 2.4
(linear scale) and Fig. 2.5 (log scale).
2) From the measured voltage values that correspond to I1 = 0.25 mA and I2 = 2.5 mA
calculate the reverse saturation current IS and parameter m.
3) Determine the parameter IS using graphical method.
4) Calculate the diode series resistance Rs using the difference in the measured and
theoretical value of the voltage for the current I3 = 50 mA.
11 Figure 2.3 - Circuit for I-U characteristic measurement.
A. MEASUREMENT PROCEDURE
1) Connect the elements in the circuit given in Figure 2.3. Using the variable voltage source
adjust the current in the circuit according to the values in Table 2.1. As the input
resistance of the oscilloscope is large (1 MOhm), the current entering the oscilloscope
can be neglected.
(2)
The current through the diode and ampermeter (A) are approximately the same. The
220 Ohm resistor is used for limiting the current in the circuit.
Plot the measured values in the diagrams in Fig. 2.4 and 2.5.
Table 2.1 – Measured diode voltage for given current through diode
ID [mA]
UD [V]
0.01
0.025
0.05
0.1
0.25
0.5
1
2.5
5
10
25
50
12 2) The reverse saturation current IS and parameter m are calculated using the following
equations:
exp
(3)
exp
(4)
where the thermal voltage UT equals
11600
V
(5)
Assume the temperature T = 300 K, while the currents I1 = 0.25 mA and I2 = 2.5 mA.
Hint: first divide the equations (3) and (4) to calculate m. Write the results in Table 2.2.
Table 2.2 - Diode parameters
IS [A]
m
3) To determine the parameter IS use the measurement results for the current ID in the
interval 0,1 mA to 10 mA. It is safe to assume that the diode current is described well by
the equation
exp
(6)
Taking the logarithm of both sides we obtain
(7)
The left side is now the log-scaled diode current which matches scaling in Fig 2.5. The
straight line can be fitted through the measured results and if extrapolated to UD = 0 we can
find the intersection with y axis. At that point log ID = log IS. The best line through measured
points should be determined only approximately.
Write IS obtained from Fig. 2.5 in Table 2.3.
Table 2.3 - Reverse saturation current obtained from the graph in Fig. 2.5
IS [A]
13 4) Using the parameter IS calculated in the assignment 2, calculate the voltage for I3 = 50
mA using the equation
ln
(8)
Compare the calculated and measured voltage corresponding to the current I3 = 50 mA.
Using the fact that the current is high enough to produce voltage drop on the series
resistance of a real diode, calculate this resistance using the equation:
(9)
Fill in the value of Rs into Table 2.4.
Table 2.4 - Series resistance of the diode
Rs [Ohm]
Figure 2.4 - Current vs. voltage (linear scale).
14 Figure 2.5 - Current vs. voltage (log scale).
Note:
Y axis is log scaled. It is marked with major and minor ticks. The major ticks are increasing
by a factor of 10. The minor tic presents the 2,5 and 5 times the value of the first lower major
tic. For example, between the major tics labeled “1 m” and “10 m” there are two ticks that
correspond to the values 2,5 m and 5 m.
15 LABORATORY
EXERCISE 3
Assistant
CMOS INVERTER
Checked by
(Homework)
Checked by (Results)
OVERVIEW
Digital electronic circuits and systems are mostly realized as integrated circuits in which all of
the circuit elements are built and interconnected on a semiconductor chip. Today, most of
digital integrated circuits are realized in CMOS technology. CMOS technology uses
complementary pairs of n-channel and p-channel MOSFETs to accomplish logic functions.
This results in a number of useful properties and the most significant is no power
consumption in steady-state conditions. Thanks to sub-micrometer dimensions of MOS
transistors and the low power consumption, very complex digital systems, e.g.
microprocessors with 109 MOS transistor on chip, are realized in CMOS technology.
Realization of CMOS integrated circuits is very expensive and complex so the number of
companies, worldwide, processing these circuits is relatively small. On the other hand, due to
a large number of applications, CMOS integrated circuits are designed in a number of design
companies around the world. Design of the CMOS circuits is done using specialized
computer programs which include electrical circuit analysis programs. The model parameters
of MOS transistors used during the design corresponds to the characteristics of the real
CMOS process technology. Thanks to complex MOS transistors models, the circuit analysis
very accurately describes the behavior of the real integrated CMOS circuits.
The aim of the exercise is to introduce students to one of the specialized computer programs
for electronic circuit analysis - Advanced Design System (ADS). The program can be used
in analysis and design of analog and digital, discrete and integrated circuits. ADS will be
used to analyze the operation of a CMOS inverter. The MOS transistor model used in the
simulations is BSIM3 (abbr. "Berkeley Short-Channel IGFET Model"), whose parameters
are adjusted to the properties of sub-micrometer transistors in the 0.25 μm TSMC (abbr.
“Taiwan Semiconductor Manufacturing Company") CMOS process.
Figure 3.1 - Loaded CMOS inverter.
16 CMOS inverter is a fundamental digital CMOS circuit. Although very simple, the CMOS
inverter presents a basic configuration for more complex CMOS circuits. The CMOS inverter
consists of a complementary pair of n-channel MOSFET Tn1 and p-channel MOSFET Tp1 as
given in Figure 3.1.
Electric properties of CMOS circuits are adjusted with dimensions of the individual MOS
transistors. In the exercise, the influence of the channel width ratio Wp/Wn of the pMOS and
nMOS transistors on the steady-state and dynamic properties of the CMOS inverter will be
analyzed. For the steady-state properties the influence of the Wp/Wn ratio on the switching
voltage and noise margins will be calculated. For the dynamic properties the influence of the
Wp/Wn ratio on the propagation delay will be analyzed. To achieve realistic results of the
dynamic analysis, the CMOS inverter with Tn1 and Tp1 transistors, is loaded with the same
inverter with transistors Tn2 and Tp2 as given in Figure 3.1.
HOMEWORK
1) A CMOS inverter having the channel dimensions Ln = Lp = 0,25 µm and Wn = 0.5 µm
works with the supply voltage UDD = 2.5 V. The transistor parameters are K'n = µn Cox =
150 µA/V2, K'p = -µp Cox = -37.5 µA/V2 and UGS0n = -UGS0p = 0,5 V. Calculate the switching
voltage of the inverter UM for the given Wp/Wn ratios of pMOS and nMOS transistor:
a) Wp/Wn = 1; b) Wp/Wn = 3 and c) Wp/Wn = 9.
Neglect the drain current increase in the saturation region.
Space reserved for calculation:
17 LAB ASSIGNMENT
1) Use ADS to draw electrical schematic of the CMOS inverter given in Figure 3.1. The
inverter with the transistors Tn1 and Tp1 is loaded with the inverter of the same type with
transistors Tn2 and Tp2. The second inverter represents the real load for the first inverter
whose characteristics are analyzed. The channel length for the transistors is L = 0,25 µm.
The channel widths of both nMOS transistors are Wn = 0,5 µm. The channel widths of the
pMOS transistors are changing so the pMOS to nMOS channel width ratios (Wp/Wn) are
1, 3 and 9. Drawing of the schematic and the analysis of the circuit should be done using
the instructions in Appendix II.
Note: Substrates of both nMOS transistors should be connected to ground, and
substrates of both pMOS transistors should be connected to the supply voltage.
2) Use ADS to determine the transfer characteristics of the CMOS inverter with transistors
Tn1 and Tp1. The supply voltage is 2,5 V.
•
Determine the voltage of logic levels 1 and 0. Do the logic levels depend on the
channel width ratio of pMOS and nMOS transistors Wp/Wn? Explain.
•
Read out the switching voltage VM and the maximum current of the circuit for all
the channel width ratios of pMOS and nMOS transistors. Enter the data in Table
3.1.
Table 3.1 - CMOS inverter transfer characteristic parameters
Wp/Wn
VM [V]
IDmax [μA]
1
3
9
•
Determine the channel width ratio that results in VM being in the middle of the
supply voltage? Explain.
18 3) Use ADS to determine the pulse transient response of the CMOS inverter with transistors
Tn1 and Tp1. The amplitude of the input symmetric pulse voltage is 2,5 V and the period is
500 ps. Determine the propagation delay of the transitions for the first inverter for all
channel width ratios of pMOS and nMOS transistors. Enter the data in Table 3.2.
Table 3.2 - Transient response of CMOS inverter
Wp/Wn
tpHL [ps]
tpLH [ps]
tp [ps]
1
3
9
•
Determine the channel width ratio that results in the minimum propagation delay
tp? Explain.
19 LABORATORY EXERCISE 4
MEASUREMENTS OF THE STATIC CHARACTERISTICS OF
NPN BIPOLAR JUNCTION TRANSISTOR
OVERVIEW
In 1947, Bardeen, Brittain and Schockley (Bell Telephone Laboratories) invented bipolar
junction transistor which launched a complete revolution in the field of electronics. Bipolar
transistors were widely used to replace vacuum tubes (relatively large, fragile and dissipated
a large amount of power) and this enabled the development of small, relatively simple
electronic devices which we use today.
Bipolar transistor is an active semiconductor element. It consists of two pn junctions and
three differently doped semiconductor layers, or three electrodes, called emitter, base and
collector. Base is always the middle layer while emitter and collector are the outer ones.
Depending on the polarity of pn junctions, we can differentiate four modes of operation of the
bipolar transistor. In the active region base-emitter junction is forward biased and the basecollector junction is reverse biased. The other modes of operation are reverse-active region
(two pn junctions of the BJT are reversely polarized when compared to the active region),
saturation (both junctions are forward-biased) and cutoff (junctions are reverse-biased)
region. Bipolar transistors are so named because their operation involves both electrons and
holes.
In analog circuits, bipolar transistor can be used as a current-controlled current source. In
other words, with a small base current IB, much greater collector IC and IE currents can be
controlled. In addition, it can also be used to amplify voltage or power in the circuit. Their
main application includes circuits where high speed of operation is needed.
a)
b)
Figure 4.1 - a) First junction transistor, b) BJT transistors in different housings
commonly used today.
20 HOMEWORK
In the forward active mode the base-emitter junction must be forward biased and the basecollector junction reverse-biased.
For npn transistor, is the UBE voltage positive or negative?
1) What is the usual value of UBE?
In npn transistor, emitter and collector are n-doped and base is a p-doped semiconductor. At
first glance, it seems that emitter and collector could replace places/functions without an
impact on the electrical characteristics of the transistor. However if in the transistor, which is
in the active region, emitter and collector exchange places (and we get the reverse-active
region), electrical characteristic will be very different.
2)
There is a difference in a technology parameter between emitter and collector. Which
one is that?
3) Why is the current gain in the reverse-active region lower than the current gain in the
active region?
The output characteristics for a BJT in the common base can be described with:
α
1
exp
Where IC and IE are collector (output) and emitter (input) currents, respectively. UCB is the
voltage on the collector-base junction (output voltage), α and ICBO are constants and
UT=25,84 mV is the thermal voltage.
Determine the collector current IC for emitter currents IE1=–1 mA and IE2=–2 mA if the voltage
UCB changes according to the table below (α = 0,995 i ICB0 = 0.1 nA). Write the results in
Table 4.1.
21 The area for calculations (if needed, the back side of the paper can be used)
22 Table 4.1 - Collector current IC for given values of currents IE and voltages UCB
UCB [V]
IE = –1 mA
IE = –2 mA
IC [mA]
–0,5
–0,4
–0,3
–0,2
–0,1
0,0
1,0
2,0
3,0
4,0
5,0
Plot the results for IC which you calculated in the previous section. (Graph instructions:
voltage UCB in the range from –0,5 to 0,5 V should be plotted on the x-axis and on y-axis is
the collector current IC in the range from 0 to 2 mA. You should also mark which of the
characteristics goes with which emitter current IE.)
Figure 4.2 - Collector current IC according to Table 4.1.
23 LAB ASSIGNEMENT
Construct the circuit according to Fig. 4.3.
Figure 4.3 - Measurement setup.
Note: The positive side of the voltage source is connected to the ground of the circuit. Actual
currents in Fig. 4.3 may have different directions relative to reference directions (also shown
in Fig. 4.3).
IMPORTANT: Resistor RB=100 kΩ is used when measuring active characteristics, while
RB = 1 kΩ is used in the reverse-active region.
In Fig. 4.4, the bottom view of the transistor in the TO-18 package together with the adequate
pin placement is shown.
base C
emitter
collector B
E
Figure 4.4 - The bottom view of the transistor in the TO-18 package.
Voltage source is used to set the dc IE current according to Fig. 4.3.
The current value is read out from the ampere meter, while the voltages UE and UB are the
ones registered by oscilloscope. Voltage UBE is the difference between these two voltages:
.
(4.1)
The base current is:
.
24 (4.2)
If the transistor is in the active region, voltage UBE is positive and UBC is negative:
0i
0.
Collector is connected to the ground, UB is small and we can assume that
0, transistor will operate between the active and saturation region. voltage
(4.3)
0. If the
From the known values of currents IE and IB, we can calculate β (the common-emitter current
gain):
1
,
(4.4)
from which we can get:
1.
(4.5)
Using β we can easily obtain α (the common-base current gain):
1
.
(4.6)
The collector current is:
.
(4.7)
You should measure, calculate and write down in Table 4.2 all the currents and voltages.
Check if the resistor RB is 100 kΩ.
Table 4.2 - Results of the measurements and calculations for
0. The voltages UB and
UE are negative while UBE is positive (base emitter junction is forward biased)
IE [mA]
UE [mV]
UB [mV]
UBE [mV]
IB [μA]
β
α
IC [mA]
–0,5
–1,0
–1,5
–2,0
–2,5
In transistor, if emitter and collector change places, transistor will work in the reverse-active
region. That means that they will also switch functions. Even though, collector and emitter
are both n-doped, their technical properties are different (impurity concentration in collector is
usually much lower than in emitter) leading to lower current gain than in the active region.
In the reverse-active region, the base collector junction is forward, and base emitter junction
reverse biased.
0i
0.
With this setup, transistor will work between reverse-active and saturation region (
(4.8)
0).
In the circuit given in Fig. 4.3, change the places of emitter and collector. Change the
RB resistor from 100 kΩ to 1 kΩ.
25 Set the collector current IC values according to Table 4.3 and measure the collector UC and
base UB voltages. From the measured values determine the base current IB and current gain
factors αI i βI in the reverse active region:
1,
(4.9)
1
The emitter current is:
(4.10)
NOTE: In Fig. 4.3 currents IE, IC i IB are defined as positive if they enter the transistor. In the
reverse-active region, the collector current leaves the transistor which makes it negative. The
emitter and base currents are positive in the reverse-active region.
0
Table 4.3 - The measurement and calculation results for
IC [mA]
UC [mV]
UB [mV]
UBC [mV]
IB [μA]
–0,5
–1,0
–1,5
–2,0
–2,5
26 βI
αI
IE [mA]
LABORATORY
EXERCISE 5
Assistant
TRANSISTOR
AMPLIFIERS: COMMON
EMITTER AND COMMON
BASE CONFIGURATION
Checked by
(Homework)
Checked by (Results)
OVERVIEW
The main task of analogue electronic circuits is the amplification of small signals and large
current control by small signals. This is why the transistor became the most suitable active
element. Bipolar transistor is connected as a four-terminal network, where the input signal is
brought to input terminal and from the output terminal signal is delivered to the load. The
third terminal is common for the both input and output port. Depending on the type of the
common terminal there are three basic configurations of the bipolar transistor: commonemitter, common-base and common-collector amplifier.
In the common-emitter configuration the input terminal is base and the output terminal is
collector. Voltage gain is high and negative. It is defined by the product of transistor
transconductance and total resistance in the collector circuit. Current gain is also high and
negative. It is defined by the transistor current gain that is reduced because of current losses
in input and output circuit. Input resistance is determined by the resistance in the base circuit
and the typical values are around 1 kOhm. Output resistance is determined by the resistance
in collector circuit. In the common-emitter configuration both voltage and current gain are
negative so there is phase shift of the input signal. This is the most frequently used bipolar
transistor amplifier.
In the common-base configuration the input terminal is emitter and the output terminal is
collector. Voltage gain is positive, high and defined in the same way as in the common
emitter configuration without use of emitter degeneration. Input resistance depends on the
base circuit resistance and because it is inversely proportional to the current gain factor its
values are small, around 10 Ohms. Current gain is positive and smaller than one. Small
value of the current gain is caused by the transistor current gain factor and the current losses
through the resistances in input and output circuits. Both voltage and current gain are
positive so there is no phase shift of the input signal.
27 HOMEWORK
1) Determine DC bias point and maximum output voltage signal swing for the circuit given in
Figure 5.1 for the following cases:
a. RL =1 kΩ, CE = 0
b. RL =1 kΩ, CE = ∞
Ignore the collector current increase in the active mode. β = hfe = 100. Draw the smallsignal model and derive the expressions for voltage and current gain.
+12 V
8k2
Co
ii
RL
1k8
io
Ci
uo
ui
Rs
us
3k3
970
CE
Figure 5.1 – Common-emitter configuration.
2) For the amplifier in the Figure 5.1 determine Ri, AV=uo/ui, AI=io/ii, AVs=uo/us and Ro when:
a. CE → ∞
b. CE = 0
Source resistance is Rs = 1 kΩ, load resistance is RL = 1 kΩ and Ci = Co → ∞.
3) For the common-base amplifier in Figure 5.2 calculate bias point and the values of Ri,
AV=uo/ui, AI=io/ii, AVs=uo/us and Ro. Transistor parameters are the same as in task 1.
Values of CB, Ci, Co → ∞.
Draw the small-signal model and derive the expressions for voltage and current gain.
28 Figure 5.2 – Common-base configuration.
Space reserved for calculation:
29 Space reserved for calculation:
30 Space reserved for calculation:
31 Table 5.1 - Numerical results of the homework tasks
Common-emitter configuration
Ri
Max. swing
AV
AI
AVs
Ro
RL = 1 kΩ
CE = 0
RL = 1 kΩ
CE = ∞
Common-base configuration
Ri
AV
AI
32 AVs
Ro
LAB ASSIGNMENT
A. MODULE
During the exercise use the module shown in Figure 5.3. The module ports are marked with
the numbers.
Figure 5.3 - Module scheme: common emitter configuration.
The electrolytic capacitor will be used during this exercise. Its physical looks and symbol are
shown in Figure 5.4.
Figure 5.4. Physical view and symbol of the electrolytic capacitor.
B. TRANSISTOR AMPLIFIER IN COMMON-EMITTER CONFIGURATION
1) Connect the circuit according to Figure 5.5.
33 1
15V
8k2
Function
generator R1
1k8
C1
R3
2
+
4
+
+ C 2 5
R L
3
uo
- 150R
u s R 2 ui
6
3k3
-
- 820R
C 3
7
Figure 5.5 - Amplifier scheme in common-emitter configuration.
2) With disconnected function generator measure dc voltages on base, emitter and collector
(UB, UE, UC) and write the values in Table 5.2. From the measured voltage values
conclude if the module is working properly (transistor should be in active region).
Table 5.2 - Transistor DC voltage values
UB,V
UE,V
UC,V
3) Connect the function generator, adjust the frequency of 10 kHz of sine wave source and
adjust the amplitude of the input signal to get largest possible output signal without any
distortion. Measure the phase shift between output and input signal.
4) Measure the us, ui, and uo for RL = R4 and RL = ∞. Calculate the gains AV, AI and AVs and
input resistance. Input resistance is determined from following expression:
Ri =
ui
ui
=
⋅ R3
ii us − ui
For both cases (RT = R4 and RT = ∞) voltages us and ui should be equal, so the amplitude of
the input signal should be set in a way that the amplification of the amplifier is higher.
Measured and calculated values should be written in Table 5.3.
34 Table 5.3 - Results
RL = ∞
RL = R4
Us
Ui
Uo
AI
Ri
AV
AVs
5)
The output resistance can be determined from measurements conducted without load
and with load RL = R4. (Figure 5.6)
Figure 5.6 - Measurement procedure of the output resistance.
The output resistance Ro is
Ro =
uo0 − uo
⋅ RL
uo
6) With assumption
Ro = RC || rce
dynamic output resistance rce of the transistor should be calculated. Required values should
be written in Table 5.4.
Table 5.4 - Output resistance of the amplifier and the transistor
Ro
rce
35 C. TRANSISTOR AMPLIFIER IN COMMON-BASE CONFIGURATION
1)
Connect the circuit according the Figure 5.7.
1
8k2
C 3
1k8
15V
C2
+
RL
uo
2
4 5
3
+
150R 6
C1
3k3
820R 7 R1
+
ui
us
-
-
Function
generator Figure 5.7 - Amplifier scheme in common-base configuration.
2)
With disconnected function generator measure dc voltages on base, emitter and
collector (UB, UE, UC) and write the values in Table 5.5. From the measured voltage
values conclude if the module is working properly (transistor should be in active region).
Table 5.5 - Transistor DC voltage values
UB,V
UE,V
UC,V
3) Connect the function generator, adjust the frequency of 10 kHz of sine wave source and
adjust the amplitude of the input signal to get largest possible output signal without any
distortion. Measure the phase shift between output and input signal.
4) Measure the us, ui, and uo for RL = R4 and RL = ∞. Calculate the amplifications AV, AI and
AVs and input resistance.
5) Calculate the output resistance of the amplifier based on the measurements conducted
without load RL and with load of RL =R4. Results should be written in Table 5.6.
36 Table 5.6 - Results
RL=∞
us
Ui
Uo
AI
Ri
Ro
AV
AVs
37 RL=R4
LABORATO
ORY
EXERCISE 6
Assistantt
OPER
RATION
NAL
AMPL
LIFIER
Checked
C
byy
(Homework)
(
)
hecked by (R
Results)
Ch
OVER
RVIEW
Operatio
onal ampliffier is an amplifier
a
witth two diffe
erential inpu
ut terminalss and, usua
ally, one
single-e
ended outpu
ut terminal.. Two input terminals, i.e. the noninverting marked as + and
inverting
g marked as
a – in the Fig. 6.1, and
a
the outtput termina
al (voltage uo), are th
he signal
terminals. Operatio
onal ampliffier should be connec
cted to the dc power supplies using the
nd – UEE. Usually,
U
UCC is equal to UEE. So
ometimes, – UEE is
terminals marked as UCC an
connectted to the ground.
Figu
ure 6.1 - Ope
erational am
mplifier – cirrcuit symbo
ol with termin
inals.
perational amplifier
a
is considered
c
to have inffinite voltag
ge gain AVOAA, defined as
a ration
Ideal op
of outpu
ut voltage uo and inputt differential voltage ud, infinite inp
put resistan
nce and zerro output
resistan
nce.
Figure
re 6.2 - Integ
grated opera
ational amp
plifiers.
Operatio
onal ampliffiers are th
he most ussed analog
g circuits to
oday. There are used
d in the
realizatiion of various amplifiers, oscillato
ors, active fiilters, etc. They
T
are ussually develloped as
integratted circuits in variouss technolog
gies and packages
p
o as parts of more complex
or
integratted circuits in bipolar or CMOS technology.
t
. Many variants of operational amplifiers
have be
een develop
ped, e.g. ge
eneral purpo
ose, low-noiise, high-sp
peed, high-vvoltage etc.
38 The characteristics of real operational amplifiers are different than the characteristics of ideal
operational amplifiers. Typical voltage gains of real operational amplifiers are between 104
and 105, while the input resistances are larger than 1 MΩ, and the output resistances are less
than 100 Ω.
The purpose of this laboratory exercise is the introduction to integrated operational amplifiers
and its application for the realization of the non-inverting and inverting amplifier.
HOMEWORK
1) Determine the UO, U1 and U2 for the circuit in Fig. 6.3 (RF = 10 kΩ and RF = 100 kΩ).
Determine the function UO(U1,U2) and enter the results in Table 6.1.
Figure 6.3 - Operational amplifier schematic.
Space reserved for calculations:
39 Table 6.1 - Results
RF = 10 kΩ
RF = 100 kΩ
U1
U2
UO
LAB ASSIGMENT
A. MODULE
A module shown in Fig. 6.4 is used throughout this laboratory exercise.
a)
b)
Figure 6.4 - Operational amplifier module: a) module and b) module schematic.
B. OPERATIONAL AMPLIFIER
1) Assemble the circuit as shown in Fig. 6.5.
Figure 6.5 - Schematic of the circuit using an operational amplifier.
40 Write the values of resistors used in this exercise in Table 6.2.
Table 6.2 - Resistors used in this exercise
R1
R2
R4
R3
R5
R6
2) Set the value of resistance RF = R5 and calculate and measure the power supply voltage,
UO, U1 and U2 and enter the results in the Table 6.3.
Table 6.3 - Results
Power supply
U1
U2
UO
RF = R5
Measured
Calculated
+15V
RF = R6
Measured
Calculated
+15V
3) Set the value of resistance RF = R6 and repeat the calculations and measurements
described in 2). Enter the results in Table 6.3.
C. INVERTING AMPLIFIER Assemble the circuit as shown in Fig 6.6.
Figure 6.6 - Inverting amplifier schematic.
1)
Function generator should be set to generate sine wave with frequency of 1kHz and
amplitude of 1 V. Use the value of RF = R6.
2)
Draw the input and the output voltage in the two separate coordinate systems on this
page.
41 REMARK: Waveforms drawn in coordinate systems must have properly defined axis. This
means that each axis must have defined the number of tick marks and units. If the
coordinate system has several curves, the curves must be clearly differentiated from each
other (different colours, dashed-solid, etc.). Graphs that do not comply with these rules
will not be accepted.
Figure 6.7 - Input and output voltage of inverting amplifier.
D. NONINVERTING AMPLIFIER
1) Assemble the circuit as shown in Fig. 6.8.
42 Figure 6.8 - Noninverting amplifier.
2) Function generator should be set to generate sine wave with frequency of 1 kHz and
amplitude of 1 V. Set the value RF = R5.
3) Draw the input and output voltage in the two separate coordinate systems on the next
page.
43 Figure 6.9 - Input and output voltage of non-inverting amplifier.
44 APPENDIX I
SOLDERING AND DESOLDERING
45 46 47 APPENDIX II
AGILENT ADVANCED DESIGN SYSTEM - TUTORIAL
Agilent Advanced Design System is CAD software that will be used to analyze the common
source amplifier shown in Figure 1.
Figure II.8 – Common source amplifier.
SCHEMATIC
1) Create a new project: File Æ New Project… in D:\ADS2009\<project_name>
Figure II.9 – Advanced Design System schematic editor.
2) In the newly opened window in the drop-down menu, select the library LumpedComponents, and from that library component R (Figure II.2). Place five R components
on the schematic and set them up using double-click: Instance name = R1 and R = 8200
48 Ohm for the first one (Figure 3), Instance name = R2 and R = 8200 Ohm for the second
one, Instance name = RC and R = 1800 Ohm for the third one, Instance name = RE1
and R = 150 Ohm for the fourth one and Instance name = RE2 and R = 820 Ohm for
the fifth one.
Figure II.10 – Component parameter dialog.
3) From the same library place three components C and set them up: Instance name = CG
and C = 1 uF for the first one, Instance name = CP and C = 100 pF for the second one
and Instance name = CE and C = 33 nF for the third one.
4) Additionally, add transistor and transistor model to the design. The template with
transistor model has been created for this exercise. The template can be added by using:
Insert Æ Template Æ npn_transistor.
5) From the library Sources-Freq Domain add a voltage sources V_DC and V_AC and set
them up: Instance name = UCC and Vdc = 15 V for the first one and Instance name =
UUL for the second one. Also, place the reference node by using: Insert Æ GROUND.
6) Place the components as shown in Figure 1 and connect them all by using: Insert Æ
Wire. Final design is shown in Figure II.4.
Figure II.11 – Final design of a common source amplifier shown in Figure II.1.
49 SIMULATIONS
A. DC simulation
DC simulation is used to calculate the DC bias point of the components in the schematic. To
do a DC simulation:
7) From the library Simulation-DC add a component DC.
8) Start the simulation: Simulate Æ Simulate.
DC SIMULATION RESULTS
9) To see the results of the analysis annotate them to the schematic: Simulate Æ Annotate
DC Solution.
10) To see detailed results of the analysis for the transistor select: Simulate Æ Detailed
Device Operating Point and click on the transistor. The final result is shown in Figure
II.5.
Figure II.12 – The results of the DC simulation.
B. AC simulation
11) From the library Simulation-AC add a component AC and set it up: Sweep Type = Log,
Start = 10 Hz, Stop = 100 MHz and Pts./decade = 10 (Figure II.6).
12) Label the wires that connect the components UUL and CG and the components CP, RC
and Q1 by using: Insert Æ Wire/Pin Label…1
13) Start the simulation: Simulate Æ Simulate.
1
The results of the AC analysis will be saved only for the labeled wires/nods. 50 Figure II.13 – AC component parameters.
AC SIMULATION RESULTS
14) To view the results open a data display window by using: Window Æ New Data Display.
15) Add a graph by using: Insert Æ Plot…
16) Add a plot: select the output node name and click >>Add Vs…>>, then select the dB,
and then the x axis variable AC.Freq (Figure 7). Set up the graph: under the Plot
Options, X Axis choose the Log scale. The final result is shown in Figure II.8. Use
Marker Æ New… to probe the data.
Figure II.14 – The plot option window.
51 Figure 15 – The data display window.
C. Transient analysis
17) Save the design under a new name.
18) Delete the components AC and UUL.
19) From the library Sources-Time Domain add a component Pulse (VtPulse) and set it up:
Vlow = -0.25 V, Vhigh = 0.25 V, Rise = 0, Fall = 0, Width = 5 usec and Period = 10
usec.
20) From the library Simulation-Transient place the component Trans and set it up:
StopTime = 20 usec and MaxTimeStep = 0.1 usec.
21) Start the simulation: Simulate Æ Simulate.
TRANSIENT SIMULATION RESULTS
22) To view the results open a data display window by using: Window Æ New Data Display.
23) Add a graph by using: Insert Æ Plot…
24) Add a plot: select the output node name and click >>Add>>. The final result is shown in
Figure II.9.
52 Figure II.16 – The data display window.
25) From the library Sources-Time Domain add a component Sine and set it up: Amplitude
= 0.5 V and Freq = 100 kHz.
26) Start the simulation: Simulate Æ Simulate.
27) To view the results open a data display window by using: Window Æ New Data Display.
28) Add a graph by using: Insert Æ Plot…
29) Add a plot: select the output node name and click >>Add>>. The final result is shown in
Figure II.10.
Figure II.17 – The data display window.
53 APPENDIX
X III
INST
TRUCTIO
ONS FO
OR OSCILLOSC
COPE OPERAT
O
TION
An oscilloscope is used to me
easure the voltage wa
aveforms. It can be alsso used to measure
he voltage.
the DC values of th
Figurre III.1 - The front panel of
o the oscillosscope.
Figure III.2 - The main
n menu of the
e oscilloscop
pe channel.
54 MEASUREMENT PROCEDURE
The front panel of the oscilloscope is shown in Figure 1. The oscilloscope is powered on by
the ON / OFF button. After the oscilloscope has booted up, the oscilloscope can be used for
measurements. The device used in these exercises has two measurement channels labeled
1 and 2. By pressing the appropriate button (No. 1 and 2) the respective channel is turned
on. If the channel is active, the corresponding button is turned on. If the channel button is
turned on, pressing it one more time calls up the channel menu on the right side of the
display as Figure 2 shows. The channel settings can be changed by using the buttons placed
next to the menu. When the channel menu is activated, it is necessary to select the probe
type which is used in the measurements. The probes x1 and x10 are used in these
exercises. An important field in the channel menu is the Coupling field. It shows what kind of
connection is used at the input of the oscilloscope channel. Pressing the button next to this
field will change its value between the AC, DC or GND settings. If the AC setting is selected
then only the alternating component of the measured voltage is displayed on the
oscilloscope. To achieve this effect a CR network is used at the input of the oscilloscope. If
the DC settings is selected then the complete voltage is displayed, i.e. the sum of the DC
and AC voltage components. When the GND settings is selected then the oscilloscope
display will show the reference voltage level (GND). The reference position level for each
active channel is always displayed on the left side of the display (Figure 2). If the reference
position level is out of the display range, then the level marker is set vertically and points up
or down and the oscilloscope can not be used for measurements. The oscilloscope
measurement is based on measuring the beam deflection compared to the reference level.
The value of the measured voltage is defined by the beam deflection and the set sensitivity
of the oscilloscope channel. The sensitivity of the oscilloscope channel is displayed at the
bottom of the screen (Figure 2). The measured voltage is proportional to the vertical
deflection compared to the reference level, and its value is calculated by multiplying the
beam deflection (expressed in the number of display divisions) and the oscilloscope
sensitivity. The oscilloscope screen is vertically divided into 8 sections, divisions. When
measuring a voltage, it is best to choose the maximum possible oscilloscope sensitivity while
the oscilloscope beam is fully visible on the display. Thus the highest measurement accuracy
is achivied.
A. DC VOLTAGE MEASUREMENTS
When measuring a DC voltage, one first needs to set the Coupling setting to the GND value
and the display will show the reference level. If a positive voltage is measured, the beam will
be deflected upwards and the reference line should be aligned with the bottom of the
oscilloscope display. In this case, we can achieve the maximum beam deflection and the
measurement will be more accurate. In a similar way, if we measure a negative voltage, then
the reference level should be
aligned with the top of the display. Once the reference line is properly set, the Coupling is set
to the DC value and the channel sensitivity should be set to a value that yields the greatest
55 d
W
When
doing
g so, the be
eam must be visible on
o the scre
een. The measured
m
beam deflection.
voltage is equal to the beam deflection
d
frrom the refe
erence level multiplied by the sens
sitivity of
annel displa
ayed on the
e bottom of the scree
en. The refe
erence leve
el and the channel
the cha
sensitivvity of the are adjusted
d with the vertical
v
conttrol knobs (position
(
kn
nob and sca
ale knob
respectively) show
wn in Figure
e 1 and magnified in Figure
F
3. Th
he controls of the oscilloscope
channels are group
ped into columns.
Figure IIII.3 - Controlss for the vertiical deflection
n settings.
B. AC
A WAVE
EFORM MEASURE
M
EMENTS
When the
t
characcteristics off n electronic circuitts are mea
asured, the
en we usu
ually are
intereste
ed in response signa
al to some test signa
als such ass step or rectangular signals.
Likewise
e if amplificcation and other dynamic parame
eters are measured
m
th
hen a test signal
s
in
the form
m of a sine
e wave is used. Gen
nerally, the electronic circuits be
ehave differrently at
different frequencie
es which iss described
d by their frrequency ch
haracteristiccs. The sin
ne signal
he other pe
eriodic signa
al (e.g. recta
angular and
d triangular waveformss) contains only
o
one
unlike th
frequency compon
nent and thu
us the outp
put of a line
ear electron
nic circuit generates an output
n the form of
o a sine wa
ave of the same
s
freque
ency. Depen
nding on wh
hich signal features
signal in
are of interest, app
propriate Coupling settting should
d be selecte
ed in the m
main channel menu
mponents waveform
w
is
s interesting
g then the C
Coupling sh
hould be
(Figure 2). If only the AC com
t
AC settting. If the complete waveform
w
of
o the obse
erved signal is interestting, the
set to the
Coupling should be set to the
e DC setting. The verttical axis re
epresents th
he amplitud
de of the
a
represe
ents the tim
me axis whe
en measurin
ng a wavefo
orm with
voltage,, while the horizontal axis
an oscillloscope. Th
he horizonta
al scale (tim
me base) is displayed on
o the botto
om of the display as
well and
d can be ch
hanged by the
t control knobs in the Horizonta
al controls ssection as shown
s
in
Figure 1.
1 By meassuring the horizontal va
alues on the
e display, oscilloscope
o
e can measure time
quantitie
es as well. When
W
meassuring the voltage
v
wav
veforms, the
e display should contain one or
56 nal periods.. If the frequ
uency of the test signa
al is known,, then the h
horizontal se
ensitivity
two sign
should be set so that the disp
play shows one to two
o periods off the signall. The perio
od of the
d
the timeba
ase (horizon
ntal sensitiv
vity) by using the rela
ation T = 1 / f. The
signal determines
oscillosccope displa
ay is horizo
ontally divided into 12 divisions. Often
O
the ssignal period or the
signal phase
p
is of interest. Th
he phase re
elationship of two sign
nals can be
e measured using a
two-cha
annel oscillo
oscope. For example, the first ch
hannel mea
asures the iinput voltag
ge, while
the othe
er channel measures the output voltage. Th
he display shows
s
both
h waveforms with a
common time axis..
S
RONISATION
C. SYNCHR
he waveforms are mea
asured with
h an oscillos
scope, then
n a still imag
ge of the waveform
w
When th
is prese
ent on the display.
d
When measuring periodic
c signals, th
he synchron
nization is achieved
a
based on
o the mea
asured signa
al. The disp
played waveform is go
oing to be sstill if the measured
m
voltage is station
nary, i.e. its wavefo
orm doesn
n't change with time
e. The waveform
w
synchro
onization ca
an be achievved by using the Trigge
er controls shown
s
in Fiigure 1. The
e Mode /
Coupling menu is called up by
b pressing the corres
sponding bu
utton. This activates th
he menu
shown in Figure 4.
Figu
ure III.4 - The
e measurem
ment trigger menu.
m
ode setting should be set to the Edge
E
value
e and the measuremen
m
nt will trigge
er at the
The Mo
signal edge.
e
The Source
S
settting is used
d to set the triggering signal sourrce. If only a single
oscillosccope chann
nel is measu
ured then th
he appropria
ate channel needs to b
be selected in order
to achie
eve synchro
onization. The
T
setting Slope allo
ows the cho
oice of wha
atever the rising or
falling edge
e
of the signal is used
u
to syn
nchronize th
he signal display. The triggering signal is
uniquelyy determine
ed by its voltage gra
adient and its rising or
o falling ed
dge. The trriggering
voltage level can be
b set by using the Trig
gger knob which
w
is placced below th
he Mode / Coupling
C
(
1). When setting the trigg
ger level a horizontal line is displayed that indicates
button (Figure
57 the trigger level. In order to achieve synchronization of the waveform, the trigger level must
set to a certain value of the measured signal. The Sweep setting should be set to the AUTO
value.
TYPICAL MEASUREMENT PROCEDURE
PRESS THE
CHANNEL (1
OR 2)
BUTTON
Figure III.5 - The main menu of the oscilloscope channel.
PRESS THE
MODE /
COUPLING
BUTTON
Figure III.6 - The measurement trigger menu.
58 Figure III.7 – Typical graph. Numbers 1-6 relate to Fig. III.5 and Fig. III.6.
59